JP4104577B2 - Image transmission apparatus, image transmission method, transmission system, and video surveillance system - Google Patents

Description

  The present invention performs high-efficiency encoding on an image signal output from an imaging apparatus to reduce the amount of data, and has been transmitted in a network environment where the data is transmitted via Ethernet (Ethernet) or a wireless LAN. An image transmission device used when remotely controlling a horizontal (pan), vertical (tilt), and enlargement (zoom) control of an imaging device while viewing a display image based on encoded image data, and The present invention relates to an image transmission method.

  All analog signal processing is being digitized along with recent high performance and low price of CPU and system LSI. An image signal is not an exception, and an SD (Standard Definition) image can be compressed to about several Mbps in the MPEG2 (Motion Picture Experts Group 2) method employed in DVD players / recorders, digital broadcasting, and the like. MPEG2 is an ITU-T recommendation H.264. 222.0 (ISO / IEC 13818-1) “GENERIC CODING OF MOVING PICTURES AND ASSOCIATED AUDIO INFORMATION”. In an image transmission apparatus used in a video surveillance system, an image compression technique (high-efficiency encoding technique) is an indispensable technique for effective use of a transmission path and cost reduction. In particular, in a video surveillance system using a large number of surveillance cameras, video from a plurality of surveillance cameras can be transmitted using a single Ethernet using an MPEG2 image compression technique.

  In general, in a video monitoring system, image data output from a plurality of monitoring cameras is monitored by a monitoring monitor in a central control room for monitoring. Then, when a suspicious person is found on the monitoring screen, the monitoring person confirms the suspicious person by remotely controlling the direction of the monitoring camera while looking at the monitoring monitor. At that time, in the conventional video surveillance system using analog video, image data is transmitted with almost no delay, so that remote operation such as panning, tilting and zooming on the surveillance camera can be performed well while watching the surveillance monitor. It can be carried out.

  On the other hand, for example, an image compression method using MPEG2 uses a temporal / spatial correlation to compress image data with high image quality. Therefore, in the video monitoring system using MPEG2, image compression, image expansion, and control for removing jitter generated in the network system are performed, so that the image captured by the monitoring camera is displayed on the monitoring monitor with a delay of 1 second or more. Is done. Therefore, when performing remote operations such as panning, tilting, and zooming on the surveillance camera while looking at the surveillance monitor, the delay time of the image described above makes the operability very poor.

  A conventional video monitoring system using a compressed image will be described below. FIG. 19 is a block diagram showing a conventional video monitoring system 19a. As shown in FIG. 19, the conventional video surveillance system 19 a is connected to the surveillance camera 1, the electric camera platform 2 that controls the orientation of the surveillance camera 1, the image transmission device 7 a, and the communication cable 9. A transmission system 18a comprising the image receiving device 14a, a monitoring monitor 15 for displaying an image taken by the monitoring camera 1, and an operation panel 16 for controlling the monitoring camera 1 and the electric camera platform 2 via the transmission system 18a. It is composed of. In the following description, in order to simplify the description, it is assumed that the image transmission device 7a and the image reception device 14a are connected one-to-one on the same network as shown in FIG. In the video surveillance system, a plurality of image transmission apparatuses 7a and a plurality of image reception apparatuses 14a are connected on the same network.

  As shown in FIG. 19, the image transmission device 7 a includes an image compression circuit 3, a communication module 4, a CPU 5, and a CPU bus 6. The image compression circuit 3 converts an image signal input from the surveillance camera 1 into a digital signal, and performs high-efficiency encoding on the converted digital image signal to reduce the amount of transmission data. The communication module 4 transmits image data compressed by the image compression circuit 3, receives a control signal for controlling the direction of the electric camera platform 2, etc., and receives a control signal for performing zoom control of the monitoring camera 1. . The CPU 5 outputs a control signal 8 for controlling the zoom of the monitoring camera 1 or the direction of the electric camera platform 2 to the monitoring camera 1 and the electric camera platform 2. As shown in FIG. 19, the image receiving device 14 a includes a communication module 10, an image expansion circuit 11, a CPU 12, and a CPU bus 13. The communication module 10 receives the compressed image data output from the image transmission device 7a, and transmits the control signal of the electric camera platform 2 and the control signal of the monitoring camera 1 output from the CPU 12. The image decompression circuit 11 decompresses the image data compressed by the image compression circuit 3 and restores the original image data. An operation for controlling the zoom of the surveillance camera 1 or the direction of the electric pan head 2 is performed by the operation panel 16.

  The operation of the conventional video monitoring system 19a will be described below with reference to FIG. The analog image signal output from the surveillance camera 1 is converted into a digital signal in the image compression circuit 3 and then subjected to image compression by MPEG2 to generate a transport stream (hereinafter referred to as “TS”). . The TS generated in the image compression circuit 3 is added with header information or the like at the head of the TS by the CPU 5 and input to the communication module 4 as a TS packet. As described above, in a general video monitoring system 19a, a plurality of image transmission devices 7a and image reception devices 14a are connected on the same network. Accordingly, the CPU 5 adds information for determining which TS packet is output from which image transmission device 7a to which image reception device 14a to the header. In this conventional example, information for identifying image data and control information of the monitoring camera 1 is added as header information, and TCP / IP is used as a communication protocol. When the TS packet to which the TCP / IP header is added is input, the communication module 4 transmits the TS packet to the communication module 10 in the image receiving device 14a via the communication cable 9.

  When a TS packet is input from the communication module 4 of the image transmission device 7a to the communication module 10 of the image reception device 14a, the CPU 12 of the image reception device 14a analyzes the header information. The CPU 12 analyzes the TCP / IP header information. If the TS packet is addressed to itself, the CPU 12 deletes the header information and inputs the TS to the image decompression circuit 11. In this conventional example, it is assumed that only the TS packet is received from the image transmission device 7a. To do.) The image decompression circuit 11 restores the original image data from the input TS and outputs it to the monitor monitor 15.

  Next, the flow of the camera control signal when the supervisor confirms the suspicious person and changes the orientation of the surveillance camera 1 will be described. When the monitoring person confirms the suspicious person and starts control of the direction of the monitoring camera 1 using the operation panel 16, a control signal of the monitoring camera 1 is input to the CPU 12 from the operation panel 16. When the control signal 17 of the monitoring camera 1 is input, the CPU 12 adds header information to the control signal 17 and outputs the header information to the communication module 10. The CPU 12 also adds a TCP / IP header to the control signal 17. When the control signal packet of the monitoring camera 1 is input from the CPU 12, the communication module 10 transmits this control signal packet to the communication module 4 in the image transmission device 7 a via the communication cable 9. On the other hand, when the communication module 4 in the image transmission device 7 a completes reception of the control signal packet of the monitoring camera 1 from the communication module 10, the communication module 4 generates an interrupt to the CPU 5. When an interrupt is input from the communication module 4, the CPU 5 reads the received data from the communication module 4 and analyzes the header information. As a result of analyzing the header information, if the received packet is addressed to itself, the header information is analyzed to determine what information is received. When this determination result is the control information of the monitoring camera 1, the header information is deleted and this control information is output to the electric pan head 2. Actually, pan and tilt control information for controlling the orientation of the monitoring camera 1 is output to the electric camera platform 2, and control signals of the monitoring camera 1 itself such as zoom and focus are output to the monitoring camera 1. In the conventional example, to simplify the description, it is assumed that any control signal is output to the electric pan head 2 as shown in FIG.

  When the control signal 8 of the monitoring camera 1 is input from the CPU 5 in the image transmission apparatus 7a, the electric camera platform 2 controls the direction of the monitoring camera 1 and the like based on the input control information, and the monitoring camera 1 zooms and the like. Implement the control. However, when an image compression method using frame correlation such as MPEG2 is adopted, it takes about 1 second until an image captured by the monitoring camera 1 is displayed on the monitoring monitor 15 connected to the image receiving device 14a. Take it. Therefore, in the conventional video monitoring system 10a that compresses the image signal and transmits it digitally, even if the monitor operates the operation panel 16 to change the direction of the monitoring camera 1, the display image on the monitoring monitor 15 reacts. However, there is a problem that the operation is very difficult. As a method for improving this problem, a method has been proposed in which the image compression method for controlling the surveillance camera 1 is switched from an image compression method using frame correlation to a compression method with a small delay time (for example, , See Patent Document 1).

  The operation of the conventional image transmission apparatus described in Patent Document 1 will be described below. In Patent Document 1, a method of displaying a thinned image with reduced resolution of an input image is used in order to shorten the time during compression processing, or a high image quality IPB mode during normal monitoring is used as an image compression mode. By controlling to switch from (using bi-directional prediction) to I mode (using intra-frame coding) or IP mode (using unidirectional prediction) with a short delay time, the delay time of the image is shortened.

Japanese Patent Laid-Open No. 2001-45337 (paragraph 0011, FIG. 5) JP-A-9-214477 (paragraphs 0001 to 0044, FIGS. 1 to 7)

  However, the above method has the following problems. First, the method of reducing the resolution of an input image and shortening the image compression processing time is a compression method using MPEG2, and when using the IPB mode, a delay of 4 frames occurs at least during image compression and image expansion. . In this case, since the resolution of the input image is reduced, the image processing time and the transmission time on the network are reduced, but the operability is not improved so much.

  On the other hand, when the surveillance camera 1 is controlled, when the I mode or the IP mode with a short delay time is used, there are the following three problems.

  The first problem is the delay time at the start of control. In the above-described method, it takes 1 second or more after the monitor confirms the suspicious person on the monitor screen until the monitor shifts to the I mode or IP mode with a short actual delay time. This occurs because image data is continuously transmitted serially. Therefore, even if the supervisor starts camera control on the subject, there is a slight delay time before switching to an image with a short delay time, and in the case of a person who moves it, the initial reaction is delayed. There is. In addition, in a commercially available MPEG2 decoder, it is necessary to reset the image expansion circuit 11 once in order to shorten the delay amount in the image receiving device 14a when converting from the IPB mode to the I mode or the IP mode. At that time, there is a possibility that several frame images may stop or may not be displayed. Similarly, regarding the transition from the I mode or the IP mode to the IPB mode, it is necessary to reset the image expansion circuit 11 once. In this case, the image is displayed for about 1 second until the next image is displayed. There was a problem that there might not be. That is, there is a problem that there is a possibility that an image does not appear for about 1 second because the stream is changed.

  The second problem is clock synchronization control between the image transmission device 7a and the image reception device 14a. In general, in a network using Ethernet or the like, clock synchronization between a transmission apparatus and a reception apparatus cannot be achieved. Specifically, in the master clock of the image compression circuit 3 and the master clock of the image expansion circuit 11, even if the same 27 MHz crystal oscillator is used, each master clock is equivalent to the frequency deviation of the crystal oscillator. Have different frequencies. Further, in a network using Ethernet or the like, jitter occurs when packets are transmitted and received. In the MPEG2 system, a PCR (Program Clock Reference) is inserted to synchronize the clock between the image compression circuit 3 and the image expansion circuit 11. This PCR is information for setting the value of STC (System Time Clock), which is a reference of time in the image decompression circuit 11, to a value intended on the image compression circuit 3 side. Therefore, the timing at which the PCR is input to the image decompression circuit 11 needs to be the timing intended by the image compression circuit 3. This rule is determined by the MPEG2 system specification, and it is necessary to transmit the PCR at least once every 100 ms in the case of TS. Furthermore, regarding TS including PCR, it is necessary to suppress the jitter to several tens μs or less (for example, 50 μs).

  As for the clock synchronization control and jitter suppression control, there is one using ATM (Asynchronous Transfer Mode) as an improvement measure (see, for example, Patent Document 2).

  Patent Document 2 describes a communication method using an SRTS (Synchronous Residual Time Stamp) method and a communication method using an adaptive clock method. The SRTS method is a method used when a common clock on the transmitting side and the receiving side for communication can be referred to. The common clock is measured at the fixed data transfer rate information interval at every N bits on the transmission side, and only the portion of the measured value whose value changes due to transmission clock frequency fluctuation is inserted into the packet as synchronous time stamp residual information and transmitted. To do. On the receiving side, the N-bit fixed speed information interval is regenerated from the received synchronous time stamp residual information and the common clock, and the transmitting side clock is regenerated based on this interval. On the other hand, the adaptive clock method is a method in which the fixed speed information stored in the packet received on the receiving side is stored in the buffer, and the read clock information of the buffer is controlled so that the stored information amount holds the reference value. .

  In the method combining the SRTS method and the adaptive clock method, the clock is regenerated by the SRTS method after the amount of information stored in the buffer reaches a preset reference value. Thereafter, when the amount of information stored in the buffer reaches a preset upper limit value or lower limit value, the clock is regenerated by the adaptive clock method, and the information amount of the buffer is returned to the reference value. After the information amount of the buffer amount returns to the reference value, the clock is reproduced again based on the SRTS method. In this case, even if the communication side and the transmission side cannot refer to the clock, the SRTS method clock recovery can be used without causing overflow or underflow of the buffer on the reception side.

  However, in the system described in Patent Document 1, when the surveillance camera 1 is controlled, the encoding method according to MPEG2 is changed, so that the transmission rate of the transmitted TS packets is expected to be different from that during normal monitoring. Therefore, the system described in Patent Document 1 has a problem that it is very difficult to perform clock synchronization control and jitter suppression control using the SRTS method, the adaptive clock method, or a combination of both. That is, the method of Patent Document 2 is used only when input packet data is input at a constant rate, and is difficult to apply to the system described in Patent Document 1. There was a point.

  Further, the third problem is a problem of the arrival delay time of the TS packet when the surveillance camera 1 is controlled. In general, in a network using Ethernet or the like, all packets flowing on the network are equal. As described above, in a general video surveillance system, a plurality of image transmission devices 7a and image reception devices 14a are connected on the same network. In such a network, in order to suppress jitter that normally occurs on the network, a memory that primarily stores TS packets is disposed on the image receiving device 14a side. However, in the video surveillance system as shown in this conventional example, the memory size must be made very small in order to suppress the delay time of the image when the surveillance camera 1 is controlled. However, when the memory size is reduced, the jitter generated on the network cannot be sufficiently absorbed, and there is a problem that it is very difficult to transmit the image without interruption.

  Therefore, the present invention has been made to solve the above-described problems of the prior art. When a surveillance camera is controlled in a video surveillance system using a compressed image signal, an image displayed on the surveillance monitor is displayed. The delay time can be shortened, images can be switched smoothly at the start and end of control of the surveillance camera, and images can be displayed without interruption during normal surveillance and surveillance camera operation. An object of the present invention is to obtain an image transmission apparatus and an image transmission method.

Image transmission apparatus of the present invention performs a high efficiency coding on the image data input from the imaging device, the image receiving apparatus which outputs the restored display image data subjected to the above-described high efficiency encoding, In the transmitting image transmission apparatus, a first high-efficiency encoding unit that performs first high-efficiency encoding on the image data input from the imaging apparatus, and a second high-efficiency unit for the image data input from the imaging apparatus. a second high-efficiency coding means for applying efficiency coding, the image data subjected to the above-described first high-efficiency encoding of applied image data and the second high efficiency encoding to the image receiving apparatus Transmitting means for transmitting; receiving means for receiving an imaging condition change request signal for changing an imaging condition including at least one of an imaging position or zoom of the imaging apparatus; and an imaging condition control signal based on the imaging condition change request signal The An imaging condition control means for outputting to the imaging device, and the delay amount of the image data when the first high-efficiency encoding is performed is the image data when the second high-efficiency encoding is performed less than the amount of delay, the compression ratio of the image data of the second high-efficiency encoding means at the time when the upper Symbol imaging condition control means outputs the image pickup condition control signal, the imaging condition control means the imaging condition with a high Ku system to control than the compression ratio of the image data of the second high-efficiency encoding means in addition when outputting a control signal, when the imaging condition control means outputs the image pickup condition control signal, the transmission For the signal transmitted from the means, the priority of the image data subjected to the first high-efficiency encoding is set higher than the priority of the image data subjected to the second high-efficiency encoding, First high efficiency It is characterized by controlling the transmission means to transmit the image data subjected to the No. of priority.

  In the image transmission apparatus or the image transmission method of the present invention, for example, when changing imaging conditions such as the imaging position and zoom, at least an image to be displayed on the display device is encoded by the first high efficiency encoding means. And the compression rate of the image data encoded by the second high-efficiency encoding means is controlled to be higher than when the imaging condition is changed. When operating, the delay time of image data can be shortened. Further, the image data subjected to the first high-efficiency encoding is displayed on the display device when the image pickup apparatus is operated, but the image data by the second high-efficiency encoding means is also continuously transmitted. Synchronous control or the like can be performed using image data output from the second high-efficiency encoding unit, and after the imaging device control is finished, an image displayed on the display device is output by the second high-efficiency encoding unit. Even when the image data is switched, there is an effect that the display image can be smoothly switched without disturbing the image data (for example, the display image does not freeze for about 1 second immediately after the switching).

Hereinafter, the present invention will be specifically described with reference to the drawings showing embodiments thereof.
Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a video monitoring system according to Embodiment 1 of the present invention. As shown in FIG. 1, the video surveillance system 19 according to the first embodiment includes a surveillance camera 1, an electric camera platform 2 that controls the orientation of the surveillance camera 1, an image transmission device 7, and the image transmission device 7. An image receiving device 14 connected to the communication cable 9 (network), a monitoring monitor 15 for displaying an image taken by the monitoring camera 1, and an operation panel 16 for controlling the monitoring camera 1 and the electric camera platform 2. It is composed of As shown in FIG. 1, the image transmission device 7 and the image reception device 14 constitute a transmission system 18. Moreover, the monitoring camera 1 and the electric camera platform 2 constitute an imaging device (monitoring camera device). In the first embodiment, in order to simplify the description, a case where the image transmission device 7 and the image reception device 14 are connected one-to-one on the same network as shown in FIG. 1 will be described. In this video surveillance system, a plurality of image transmission devices 7 and a plurality of image reception devices 14 are connected on the same network.

  As shown in FIG. 1, the image transmission device 7 includes an image compression circuit 20, a communication module 4, a CPU 5, and a CPU bus 6. The image compression circuit 20 converts an image signal input from the surveillance camera 1 into a digital signal, and performs high-efficiency encoding on the converted digital image signal to reduce the amount of transmission data. The communication module 4 performs transmission of image data compressed by the image compression circuit 20, reception of a control signal for controlling the direction of the electric camera platform 2, reception of a control signal for performing zoom control of the monitoring camera 1, and the like. . The CPU 5 outputs a control signal 8 for controlling the zoom of the monitoring camera 1 or the direction of the electric camera platform 2 to the monitoring camera 1 and the electric camera platform 2.

  As shown in FIG. 1, the image reception device 14 includes a communication module 10, an image expansion circuit 21, a CPU 12, and a CPU bus 13. The communication module 10 receives compressed image data output from the image transmission device 7 and transmits a control signal for the electric camera platform 2 and a control signal for the monitoring camera 1 output from the CPU 12. The image decompression circuit 21 decompresses the image data compressed by the image compression circuit 20 and restores the original image data. An operation for controlling the zoom of the monitoring camera 1 or the direction of the electric pan head 2 is performed by the operation panel 16.

  FIG. 2 is a block diagram of the image compression circuit 20 shown in FIG. As shown in FIG. 2, the image compression circuit 20 includes an NTSC decoder 32, an MPEG2 encoding circuit 33, a JPEG encoding circuit 34, an image compression control circuit 35, a time stamp generation circuit 36, a TS packet generation circuit 37, and a JPEG packet generation circuit. 38, a TS storage memory 39, and a JPEG packet storage memory 40. The NTSC decoder 32 decodes the composite image signal input from the surveillance camera 1 via the input terminal 31 and converts it into a luminance signal and two color difference signals. The MPEG2 encoding circuit 33 performs MPEG2 encoding on the luminance signal and the two color difference signals output from the NTSC decoder 32. The JPEG encoding circuit 34 performs JPEG encoding on the luminance signal and the two color difference signals output from the NTSC decoder 32. The image compression control circuit 35 controls the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34. The time stamp generation circuit 36 generates a time stamp to be added to the TS output from the MPEG2 encoding circuit 33. The TS packet generation circuit 37 adds the time stamp information generated by the time stamp generation circuit 36 to the TS output from the MPEG2 encoding circuit 33 to generate a TS packet. The JPEG packet generation circuit 38 converts JPEG-encoded data output from the JPEG encoding circuit 34 into a packet format for transmission by the communication module. The TS storage memory 39 stores the TS packet output from the TS packet generation circuit 37. The JPEG packet storage memory 40 stores the JPEG packet generated by the JPEG packet generation circuit 38.

  FIG. 3 is a block diagram of the image expansion circuit 21 shown in FIG. As shown in FIG. 3, the image expansion circuit 21 includes an MPEGTS memory control circuit 50, an MPEGTS memory 51, an MPEG2 decoding circuit 52, a TV synchronization generation circuit 53, an image decoding control circuit 54, a JPEG decoding circuit 55, and a JPEG memory. 56, a JPEG memory control circuit 57, a switch 58, and an NTSC encoder 59. The MPEGTS memory control circuit 50 controls the writing of the received TS packet to the MPEGTS memory 51 and the reading control from the MPEGTS memory 51. In addition, the MPEGTS memory control circuit 50 also separates the JPEG packet from the received packet and performs packet separation that is input to the JPEG decoding circuit 55. The MPEGTS memory 51 stores TS packets. The MPEG2 decoding circuit 52 decodes the TS output from the MPEGTS memory 51. The TV synchronization generation circuit 53 generates TV synchronization (timing of horizontal synchronization signal and vertical synchronization signal) of the image data output based on the control signal output from the MPEG2 decoding circuit 52. The image decoding control circuit 54 controls the MPEG2 decoding circuit 52 and the JPEG decoding circuit 55. The JPEG decoding circuit 55 decodes the JPEG compressed image data separated by the MPEGTS memory control circuit 50. The JPEG memory 56 stores one field or one frame of image data decoded by the JPEG decoding circuit 55. The JPEG memory control circuit 57 controls the JPEG memory 56. The switch 58 switches between the image data output from the MPEG2 decoding circuit 58 and the image data output from the JPEG memory 56. The NTSC encoder 59 encodes the image data from the MPEG2 decoding circuit 58 output from the switch 58 or the image data from the JPEG memory 56 and outputs the encoded image data to the monitoring monitor 15 via the output terminal 60.

  FIGS. 4A to 4C are diagrams for explaining jitter generated when a TS is transmitted via the communication cable 9. 4A to 4C, the horizontal axis is the time axis. FIG. 4A shows the output timing of the TS output from the MPEG2 encoding circuit 33 (FIG. 2) in the image compression circuit 20. In addition, the hatched TS (0th, 5th, and 12th TS packets) in FIGS. 4A to 4C is a TS including a PCR. As described in the section for solving the above-described problems, when decoding MPEGTS, TS jitter including PCR needs to be suppressed to several tens of μs or less. However, jitter occurs in the communication cable 9. In the first embodiment, a case where Ethernet is used as a communication method will be described. However, in a communication method using Ethernet, generally, priorities of transmitted packets are equal. Therefore, when a packet conflicts with another packet when the packet is transmitted on the network, the packet transmission may be awaited. In addition, the maximum transmission rate when Ethernet is used is about 100 Mbps when 100BASE is used, and the execution throughput is about half of that. Therefore, when transmitting data encoded at VBR (variable bit rate) as shown in FIG. 4 (a), contention during data transmission and the instantaneous transmission rate of the input TS and communication cable As shown in FIG. 4B, due to the difference in the data transmission band of 9, the data flows on the communication cable 9 at a timing different from the timing at which each TS is input. For example, as shown in FIG. 4 (a), after four TSs from the 0th to the 3rd are continuously input from the MPEG2 encoding circuit 33, the TS is not received for a while, and then the 4th to 7th. The four TSs up to the th are input, and then the eighth and ninth two TSs are input. Thus, TS input from the MPEG2 encoding circuit 33 is not always input at a constant interval.

  On the other hand, as described in the section of means for solving the above problems, the TS includes an MPEG2 encoding circuit 33 (FIG. 2) in the image compression circuit 20 and an MPEG2 decoding circuit 52 (FIG. 3) in the image expansion circuit 21. PCR is inserted in order to synchronize the clock with the clock. This PCR is information for setting the STC value as a time reference in the MPEG2 decoding circuit 52 to a value intended on the transmission side. Therefore, the timing at which the PCR is input to the MPEG2 decoding circuit 52 needs to be the timing intended on the transmission side. This rule is determined by the MPEG2 system specification, and it is necessary to transmit the PCR at least once every 100 ms in the case of TS. Furthermore, regarding TS including PCR, it is necessary to suppress the jitter to several tens μs or less (for example, 50 μs). Therefore, as shown in FIG. 4C, each TS needs to be input to the MPEG2 decoding circuit 52 with a certain delay amount with respect to the input TS.

  FIG. 5 is a diagram showing a configuration of a TS packet transmitted from the image transmission device 7 according to Embodiment 1 of the present invention. In the first embodiment, a 4-byte time stamp is added to the beginning of a 188-byte TS to correct jitter generated in the communication cable 9, thereby forming a TS packet.

  FIG. 6 is a diagram showing a configuration of a JPEG packet transmitted from the image transmission device 7 according to Embodiment 1 of the present invention. In the first embodiment, a JPEG packet is composed of 192 bytes, similar to the TS packet shown in FIG.

  FIG. 7 is a diagram for explaining how the storage capacity of the MPEGTS packet in the MPEGTS memory 51 changes due to clock jitter generated in the image receiving device 7 according to Embodiment 1 of the present invention.

  The operation of the video monitoring system 19 in the first embodiment will be described below with reference to FIGS. First, when normal monitoring is performed (when the direction of the monitoring camera 1 and zooming are not controlled, that is, the shooting conditions such as the shooting position and shooting range of the monitoring camera 1 are changed). (When not) The monitoring image captured by the monitoring camera 1 is input to the image compression circuit 20 in the image transmission device 7. In the first embodiment, it is assumed that an NTSC signal (composite signal) is output from the surveillance camera 1. The operation of the image compression circuit 20 will be described below with reference to FIG. The monitoring image input via the input terminal 31 is input to the NTSC decoder 32, converted into a luminance signal and two color difference signals, and input to the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34. At that time, the NTSC decoder 32 separates the horizontal synchronizing signal and the vertical synchronizing signal from the inputted monitoring image, and the separated horizontal synchronizing signal and vertical synchronizing signal are also inputted to the MPEG2 coding circuit 33 and the JPEG coding circuit 34. .

  The image compression control circuit 35 controls the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34 based on a command output from the CPU 5. Specifically, in the first embodiment, the image compression control circuit 35 performs initialization of the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34, setting of a transmission rate of image data to be transmitted, and the like. In the first embodiment, it is assumed that the monitoring image is not encoded by the JPEG encoding circuit 34 during normal imaging (JPEG compression is not performed).

  The monitoring image input to the MPEG2 encoding circuit 33 is encoded in the IPB mode and input to the TS packet generation circuit 37 in the TS format. Further, when outputting the TS, the MPEG2 encoding circuit 33 outputs a control signal indicating the head of the TS to the time stamp generation circuit 36. The time stamp generation circuit 36 measures the reference time of the image transmission device 7 based on the system clock in the image transmission device 7, and when the control signal indicating the head of the TS is output from the MPEG2 encoding circuit 33, The time (time stamp) is output to the TS packet generation circuit 37. In the first embodiment, the time stamp information is assumed to be composed of 4 bytes as shown in FIG. The TS packet generation circuit 37 adds the type stamp output from the time stamp generation circuit 36 to the head of the TS input from the MPEG2 encoding circuit 33, and generates the TS packet shown in FIG. The TS packet output from the TS packet generation circuit 37 is temporarily stored in the TS storage memory 39.

  On the other hand, when a predetermined amount of TS packets (7 TS packets in the first embodiment) are stored in the TS storage memory 39, the CPU 5 continuously reads the TS packets from the TS storage memory 39, and at the head thereof. After adding information such as destination information to be transmitted, packet data type (information for identifying control data, MPEGTS, JPEG, etc.), and priority (priority will be described later), the header information for Ethernet is added. In addition, it is sent to the communication module 4. When the packet data to which the header information is added is input, the communication module 4 checks whether there is any other competing packet. If there is no competing packet, the input packet data Is sent to the communication cable 9.

  Next, the operation of the image receiving apparatus 14 (FIG. 3) when normal monitoring is performed will be described with reference to FIG. The packet data input to the communication module 10 via the communication cable 9 is checked for header information by the CPU 12 to determine the destination, type, etc. of the packet data. If the packet data is control data addressed to itself, a predetermined process is performed based on the control data. On the other hand, if the packet data is MPEGTS, the data is output to the MPEGTS memory control circuit 50 in the image expansion circuit 21. At this time, identification information indicating whether the MPEGTS or JPEG packet is also output.

  When an MPEGTS packet including a time stamp is input to the MPEGTS memory control circuit 50, a control signal such as an address for writing the packet to the MPEGTS memory 51 is generated, and the MPEGTS packet is written to the MPEGTS memory 51. The MPEGTS packet stored in the MPEGTS memory 51 is read based on a read control signal such as a read address output from the MPEGTS memory control circuit 50 and input to the MPEG2 decoding circuit 52.

  Details of the MPEGTS packet read operation of the MPEGTS memory control circuit 50 will be described below. When the leading MPEGTS packet output from the image transmission apparatus 7 is stored in the MPEGTS memory 51, the MPEGTS memory control circuit 50 firstly adds the time stamp information added to the beginning of the MPEGTS packet to the MPEGTS memory 51. After the data is read out, the MPEGTS packet reading operation is not started until a predetermined amount of MPEGTS packets are stored in the MPEGTS memory 51, and the apparatus waits. When a predetermined amount of MPEGTS packets are stored in the MPEGTS memory 51, the initial value of the MPEGTS packet read control timer (not shown) in the MPEGTS memory control circuit 50 is added to the first MPEGTS packet. In addition to setting time stamp information, a control signal for reading out the leading MPEGTS packet from the MPEGTS memory 51 is generated. When the reading of the head MPEGTS packet is completed, the time stamp information added to the head of the next MPEGTS packet is read. If the value of the read control timer matches the time stamp value read from the MPEGTS memory 51 or the read control timer value is larger, a control signal such as an address for reading the MPEGTS packet from the MPEGTS memory 51 is sent. appear. When the reading of data for one TS is completed, the time stamp added to the head of the next MPEGTS packet is read, and thereafter, the reading control of the MPEGTS packet from the MPEGTS memory 51 is performed as described above.

  In general, the reference clock frequencies in the image transmission device 7 and the image reception device 14 are not synchronized. Hereinafter, the difference in the frequency of the reference clock between the image transmission device 7 and the image reception device 14 is referred to as clock jitter. Therefore, the reference time in the time stamp generation circuit 36 and the read control timer in the MPEGTS memory control circuit 50 are not synchronized. Therefore, when the frequency of the reference clock in the image receiving device 14 is slightly faster than the reference clock in the image transmission device 7, the read control timer in the MPEGTS memory control circuit 50 advances faster. Since the reading of the MPEGTS packet in the memory 51 is slightly faster than the writing, the MPEGTS memory 51 underflows, and the above-described TS jitter cannot be suppressed. FIG. 7 shows the relationship between the amount of MPEGTS packets stored in the MPEGTS memory 51 and time. In FIG. 7, in order to simplify the explanation, when the amount of MPEGTS packets stored in the MPEGTS memory 51 changes at a constant rate (that is, MPEG2 encoding is performed at a constant rate). Case). In FIG. 7, the hatched portion indicates the change in the memory storage amount due to the clock jitter. On the other hand, when the frequency of the reference clock in the image receiving device 14 is slightly slower than the reference clock in the image transmission device 7, the read control timer in the MPEGTS memory control circuit 50 advances later. The reading of the MPEGTS packet in the memory 51 is slightly slower than the writing, and the MPEGTS memory 51 overflows.

  As described above, in the first embodiment, in order to prevent the MPEGTS memory 51 from overflowing or underflowing, the amount of MPEGTS packets (memory storage capacity) stored in the MPEGTS memory 51 is macroscopically viewed. It is assumed that the time of the read control timer in the MPEGTS memory control circuit 50 is periodically corrected so as to be constant (for example, the average memory storage capacity per second is substantially constant). Specifically, when the memory storage capacity as viewed macroscopically increases, it is determined that the read control timer proceeds slowly and the timer value is periodically advanced. When the memory storage capacity seen decreases, it is determined that the read control timer advances quickly and the timer value is periodically returned. As described above, by controlling the reading of the MPEGTS packet (the reading of the MPEGTS packet based on the time stamp and the time control of the reading control timer using the memory storage capacity), as shown in FIG. In addition, TS jitter generated on the communication cable 9 can be absorbed.

  The MPEGTS in which TS jitter generated on the communication cable 9 is absorbed by the above procedure is input to the MPEG2 decoding circuit 52. It is assumed that the time stamp added to the head of the MPEGTS packet is removed when it is read from the MPEGTS memory 51. The MPEGTS input to the MPEG2 decoding circuit 52 is decoded and the image signal is restored. The TV synchronization generation circuit 53 generates a vertical synchronization signal and a horizontal synchronization signal of the image signal based on the control signal output from the MPEG2 decoding circuit 52. The image signal output from the MPEG2 decoding circuit 52 is output in synchronization with the vertical synchronization signal and horizontal synchronization signal output from the TV synchronization generation circuit 53. The switch 58 is configured to select an image signal output from the MPEG2 decoding circuit 58 during normal monitoring. Therefore, the decoded image signal output from the MPEG2 decoding circuit 52 is input to the NTSC encoder via the switch 58. The NTSC encoder 59 converts the image signal output from the MPEG2 decoding circuit 52 into an NTSC signal (composite signal) based on the vertical sync signal and horizontal sync signal output from the TV sync generation circuit 53 and outputs the NTSC signal. The output of the NTSC encoder 59 is displayed on the monitoring monitor 15.

  Next, the operation when the surveillance camera 1 is operated will be described with reference to FIGS. FIG. 8 is a diagram showing priorities when transmitting each data in the first embodiment. FIG. 9 is a flowchart showing the operation of the image transmission device 7 when the monitoring camera 1 is controlled in the first embodiment, and FIG. 10 is the operation of the image receiving device 14 when the monitoring camera 1 is controlled in the first embodiment. It is a flowchart which shows. FIG. 11 is a flowchart showing the clock jitter correction operation at the start of monitoring camera 1 control in the first embodiment, and FIG. 12 explains the clock jitter correction operation at the start of monitoring camera 1 control in the first embodiment. It is a figure for doing. FIG. 13 is a flowchart showing the clock jitter correction operation at the end of the monitoring camera 1 control in the first embodiment, and FIG. 14 shows the clock jitter correction operation at the end of the monitoring camera 1 control in the first embodiment. It is a figure for demonstrating.

  Below, the operation | movement at the time of the control start of the surveillance camera 1 is demonstrated. A case where the supervisor finds a suspicious person on the screen of the monitor 16 and operates the operation panel 16 to control shooting conditions such as pan, tilt, and zoom of the monitor camera 1 will be described. First, the operation of the image receiving device 14 at the start of control of the surveillance camera 1 will be described. When the supervisor starts operating the operation panel 16, the operation panel 16 notifies the CPU 12 in the image receiving device 14 of the operation content. As shown in FIG. 10, when monitoring is started, the CPU 12 waits until an input of a control request for the monitoring camera 1 from the operation panel 16 is input (step S31). When a control request for the monitoring camera 1 is input from the operation panel 16, the CPU 12 starts control of the monitoring camera 1 (step S32). When the monitoring camera 1 control is started, the CPU 12 transmits a monitoring camera 1 control start command to the image transmission device 7 (step S33).

  In the first embodiment, the image receiving device 14 transmits the control signal output from the operation panel 16 until the decoding of one field of the JPEG image is completed from the image transmitting device 7 after the surveillance camera 1 control command is transmitted. 7 is not sent out. This is due to the following reason. During normal monitoring, monitoring is performed with the high-quality MPEG2 decoded image output from the MPEG2 decoding circuit 52 as described above. However, the MPEG2 decoded image is an image delayed by about 1 second due to MPEG2 code, image transmission, clock jitter correction, MPEG2 decoding, and the like. On the other hand, a JPEG decoded image has two fields for JPEG code, two fields for JPEG decoding, and a delay due to image transmission or the like of 0.1 second or less. Therefore, at the moment when the screen is switched from the MPEG2 decoded image to the JPEG decoded image, it corresponds to about 0.9 seconds (the difference between the delay of the MPEG2 decoded image (about 1 second) and the delay of the JPEG decoded image (less than 0.1 second)). Time) The display image displayed on the monitor 15 advances at a stretch. At this time, when following a moving object such as a person, if the control direction of the surveillance camera 1 where the screen is switched and the movement of the person are different, the operation may not be performed smoothly. Therefore, in the first embodiment, the control operation of the monitoring camera 1 is masked on the image receiving device 7 side until the display image on the monitoring monitor 15 is switched. By configuring in this way, the first embodiment has an effect that the operation of the monitoring camera 1 can be smoothly performed at the time of image switching.

  When JPEG decoding for one field is completed (step S34), the image receiving apparatus 14 switches the monitoring image displayed on the monitoring monitor 15 to the image output from the JPEG memory 56, and the monitoring image is switched to the monitoring person. Notify that. Specifically, the switch 58 shown in FIG. 3 is switched to the output of the JPEG memory 56 (step S35). As for the notification method, notification is made on the monitoring monitor 15 or the LED on the operation panel 16 is caused to emit light. When the switching of the display image on the monitoring monitor 15 is completed, the CPU 12 outputs the control signal of the monitoring camera 1 input from the operation panel 16 to the communication module 10 (step S36). When receiving the control signal of the monitoring camera 1 from the CPU 12, the communication module 10 transmits the control signal to the image transmission device 7 via the communication cable 9.

  Next, the operation of the image transmission device 7 when the control of the surveillance camera 1 is started will be described with reference to FIG. When the monitoring operation is started, the CPU 5 in the image receiving device 7 waits for the control of the monitoring camera 1 until the monitoring camera 1 control start command output from the image receiving device 14 is received (step S10). When this monitoring camera 1 control start command is received, the CPU 5 first issues a command to the communication module 4 to switch the priority of each transmission data (step S11). Below, the priority of each transmission data is demonstrated easily. In general, in a network such as the Internet, when data is transmitted, the priority of transmission of any data is equal. Therefore, even data that requires real-time properties such as image data or audio data is transmitted with the same priority as still image data or data such as a home page when distributed over the network. It is very difficult to ensure real-time communication. On the other hand, studies are underway in next-generation IP standards such as IPv6 (Internet Protocol Version 6), and priority control at the time of data transmission includes data that requires the real-time property and data that does not require real-time property. And prioritize each data to transmit the data. As a result, data with high priority is preferentially processed by a communication module such as Ethernet or a relay router, and is discharged onto the network.

  The first embodiment is configured such that the priority of the transmission data described above is changed between control of the monitoring camera 1 and normal monitoring. FIG. 8 shows the priority of each transmission data (transmission packet) in the first embodiment. As described above during normal monitoring, the MPEGTS packet and the monitoring camera 1 control signal for controlling the monitoring camera 1 flow on the communication cable 9. As shown in FIG. 8, the priority of each packet at that time is as follows: the surveillance camera 1 control signal is the highest priority first, the MPEGTS packet is the second highest priority, and finally Set the JPEG packet to No. 3 with low priority. It is assumed that the priority in FIG. 8 is higher as the value is smaller (data is transmitted preferentially on the network when data is transmitted). The reason for setting the priority is as follows. Since the surveillance camera 1 control signal with the highest priority is output only when the surveillance camera 1 is operated, there is little opportunity for data to be sent out on the communication cable 9, and the data length is very short. On the other hand, although the MPEGTS packet is required to have real-time properties, since the data length is long, for example, if the priority is the highest, when the supervisor requests control of the surveillance camera 1, the priority is low. There is a case where the packet is not sent to the image receiving device 7. In particular, in the first embodiment, the case where the image transmission device 7 and the image reception device 14 are connected in a one-to-one manner has been described for the sake of clarity of explanation, but when performing normal video monitoring, A plurality of image transmission devices 7 and a plurality of image reception devices 14 are arranged on the same network. In such a system, unless the priority of the control signal of the surveillance camera 1 is increased, there are cases where distribution on the network is difficult. Further, as described above, since the monitoring camera 1 control signal has a short data length, even if the priority is increased, the network load is not compressed. Therefore, in the first embodiment, the priority of the monitoring camera 1 control signal is set higher than the priority of the MPEGTS packet. As a result, the surveillance camera 1 control start command can be transmitted promptly, the surveillance camera 1 can be smoothly transferred to the control mode, and the same priority is set when the surveillance camera 1 is operated. There is an effect that the surveillance camera 1 can be controlled smoothly.

  Next, the priority of each transmission data when the surveillance camera 1 is controlled will be described. When the monitoring camera 1 is controlled, a JPEG packet, an MPEGTS packet, and a monitoring camera 1 control signal for controlling the monitoring camera 1 flow on the communication cable 9. As shown in FIG. 8, the priority of each packet at that time is the second highest priority for the surveillance camera 1 control signal, the highest priority for the first priority, and the second highest priority for the JPEG packet. Finally, the MPEGTS packet is set to the third priority with the lowest priority. Since the JPEG packet is a still image, real-time characteristics are not so required, but in the first embodiment, it is set to the next priority of the surveillance camera 1 control signal. This is due to the following reason. The reason why the priority of the monitoring camera 1 control signal is set high is that, as described above, even if the data length is short and the priority is increased, the network load is not increased so much, and the monitoring camera 1 can be controlled smoothly. It is to make it. On the other hand, the reason why the priority of the JPEG packet is set higher than the priority of the MPEGTS packet is that JPEG is a still image, but in the first embodiment, monitoring is performed when panning, tilting and zooming control of the surveillance camera 1 is performed. Control is performed by looking at the JPEG decoded image displayed on the monitor 15. Therefore, it is necessary to transmit the image data to the monitoring monitor 15 with as little delay as possible. Therefore, the first embodiment is configured to suppress the delay amount of the JPEG packet on the communication cable 9 by raising the priority of the JPEG packet as compared with the priority of the MPEGTS packet. With the above configuration, the delay amount of the JPEG packet on the communication cable 9 can be minimized, so that an image with a small delay amount can be displayed on the monitoring monitor 15 and the control of the monitoring camera 1 can be smoothly performed. There is an effect that can be implemented.

  In the first embodiment, the priorities shown in FIG. 8 are given, but the present invention is not limited to this. For example, when the priority can be set in three or more stages, the priority at the time of normal monitoring is the first, the surveillance camera 1 control signal is the first, the MPEGTS packet is the third priority, and the JPEG packet is the fourth priority. When controlling the surveillance camera 1, the surveillance camera 1 control signal may be set to No. 1, the priority of the JPEG packet may be set to No. 2, and the priority of the MPEGTS packet may be set to No. 4. By setting in this way, even in a video surveillance system in which a plurality of image transmission devices 7 and image reception devices 14 are arranged on the same network, the image transmission device 7 and the image reception that control the surveillance camera 1 are performed. The device 14 sets the priority at the time of monitoring camera 1 control, and the image transmission device 7 and the image receiving device 14 that perform normal monitoring set the priority at the time of normal monitoring as described above. Since the delay amount of the JPEG packet on the network can be minimized even in the network system, an image with a small delay amount can be displayed on the monitoring monitor 15, and the control of the monitoring camera 1 can be performed smoothly. effective.

  When the priority switching is completed, the CPU 5 initializes the JPEG encoding circuit 34 to the image compression control circuit 35 and outputs a control command for starting image compression (step S12). When this control command is input from the CPU 5, the image compression control circuit 35 performs initialization of the JPEG encoding circuit 34 and also sends a JPEG encoding start signal to the JPEG encoding circuit 34 so as to start image encoding of the input image. Is output. When the JPEG encoding start signal is input, the JPEG encoding circuit 34 performs JPEG encoding on the input image data and outputs the JPEG encoded image data to the JPEG packet generation circuit 38. Further, when the control command is input, the image compression control circuit 35 detects an intra frame based on the control signal output from the MPEG2 encoding circuit 33 (step S13). When detecting the intra frame, the image compression control circuit 35 switches the target value of the code amount (data rate) at the time of the MPEG2 encoding to the MPEG2 encoding circuit 33 (step S14). Specifically, the target value is switched so that the sum of the MPEGTS image transmission rate used by the image transmission apparatus 7 during normal monitoring and the sum of the MPEGTS and JPEG compressed image transmission rates during control of the monitoring camera 1 are substantially equal. More specifically, when MPEGTS of about 12 Mbps is transmitted during normal monitoring, when monitoring camera 1 is controlled, an image is transmitted with a JPEG transmission rate of about 6 Mbps and an MPEGTS transmission rate of about 6 Mbps. To do.

  This is due to the following reason. When the surveillance camera 1 is controlled, a JPEG image is displayed. Therefore, when only this image is transmitted, the clock synchronization between the image transmission device 7 and the image reception device 14 cannot be controlled only by the JPEG packet. As described above, when the surveillance camera 1 is controlled, a large capacity for realizing clock synchronization using a JPEG packet in the image receiving device 14 in order to shorten the delay amount of the surveillance image displayed on the surveillance monitor 15. No memory etc. are arranged. Similarly, when controlling the surveillance camera 1, it is necessary to perform control so that the delay amount of the image is minimized rather than the image quality of the surveillance image on the surveillance monitor 15. Therefore, the JPEG compressed image only needs to have an image quality that can recognize the target. Therefore, in order to reduce the data delay amount on the communication cable 9, the transmission of the JPEG compressed image is performed while suppressing the data amount as much as possible. The reason why MPEGTS are transmitted simultaneously is to compensate for clock synchronization between the image transmission device 7 and the image reception device 14. The clock jitter suppression when controlling the monitoring camera 1 will be described later. Note that the code amount of each compressed image data during normal monitoring and control of the monitoring camera 1 is not limited to the above-described code amount, and may be set according to the image transmission band of the entire video monitoring system. Since the image transmission device 7 is controlled as described above when the monitoring camera 1 is controlled, it is configured so that the clock synchronization between the image transmission device 7 and the image receiving device 14 is also taken by the received MPEGTS even when a JPEG image is transmitted. When the camera 1 control mode is switched to the normal monitoring, there is an effect that the screen can be smoothly switched without disturbing the display image such as the image displayed on the monitoring monitor 15 being stopped. When the switching of the MPEG2 code amount target value is completed, the control signal 8 of the monitoring camera 1 transmitted from the image receiving device 14 is output to the electric camera platform 2 and the monitoring camera 1.

  Next, the operation at the time of controlling the surveillance camera 1 will be described. An image signal input via the surveillance camera 1 is input to the image compression circuit 20. The image signal input via the image input terminal 31 is input to the NTSC decoder 32 and converted into a luminance signal and two color difference signals. The output of the NTSC decoder 32 is input to an MPEG2 encoding circuit 33 and a JPEG encoding circuit 34. At that time, the NTSC decoder 32 separates the horizontal synchronization signal and the vertical synchronization signal from the input monitoring image, and the separated horizontal synchronization signal and vertical synchronization signal are also input to the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34. When the surveillance camera 1 is controlled, the MPEG2 encoding circuit 33 performs encoding by switching the target value of the code amount according to the flow shown in FIG. Similarly, the JPEG encoding circuit 34 performs JPEG encoding on the input luminance signal and the two color difference signals and outputs them when the surveillance camera 1 is controlled.

  When outputting the TS, the MPEG2 encoding circuit 33 outputs a control signal indicating the head of the TS to the time stamp generation circuit 36. The time stamp generation circuit 36 generates a time stamp based on this control signal and outputs it to the TS packet generation circuit 36. The TS packet generation circuit 37 adds the type stamp output from the time stamp generation circuit 36 to the head of the TS input from the MPEG2 encoding circuit 33 to generate a TS packet. The TS packet output from the TS packet generation circuit 37 is temporarily stored in the TS storage memory 39. Similarly, the JPEG packet generation circuit 38 collects 192 bytes of JPEG data output from the JPEG encoding circuit 34 and generates a JPEG packet as shown in FIG. The JPEG packet generated by the JPEG packet generation circuit 38 is temporarily stored in the JPEG packet storage memory 40.

  On the other hand, when a predetermined amount of TS packets (7 TS packets in the first embodiment) are stored in the TS storage memory 39, the CPU 5 continuously reads the TS packets from the TS storage memory 39, and at the head thereof. After adding information such as destination information to be transmitted, type of packet data, and priority thereof (third priority in the first embodiment), header information for Ethernet is added and sent to the communication module 4 . Similarly, when a predetermined amount of JPEG packets (referred to as 3TS packets in the first embodiment) are stored in the JPEG packet storage memory 40, the CPU 5 reads them continuously from the JPEG packet storage memory 40, After adding information such as destination information to be transmitted, packet data type, and priority (second priority in the first embodiment), communication module is added with Ethernet header information. Send to 4. In the first embodiment, the size of the transmission packet sent to the communication cable 9 is configured to be different between when the MPEGTS packet is transmitted and when the JPEG packet is transmitted. This is due to the following reason. As described above, when controlling the surveillance camera 1, it is necessary to set the delay amount during JPEG encoding, decompression, and transmission as small as possible. Therefore, the JPEG packet is configured to reduce the amount of packets transmitted at one time as compared with MPEGTS. Thereby, since the delay amount generated in the JPEG packet storage memory 40 or the like can be reduced, an image with a small delay amount can be displayed on the monitor monitor 15, and the control of the monitor camera 1 can be carried out smoothly. effective. In addition, since the overhead of transmission / reception increases when the amount of packets transmitted at a time is reduced, the packet size may be changed according to the configuration of the video monitoring system.

  When the MPEGTS packet or JPEG packet data to which the header information is added is input, the communication module 4 checks whether there is any other competing packet, and if there is no competing packet, The input packet data is sent to the communication cable 9. At that time, if there is a transmission request for both data of the MPEGTS packet and the JPEG packet, the packet data is transmitted in the order according to the priority. As described above, in the first embodiment, when the monitoring camera 1 is controlled, the priority of the JPEG packet is higher than that of the MPEGTS packet, so the JPEG packet is sent to the communication cable 9 first.

  Next, the operation of the image receiving device 14 when the surveillance camera 1 is controlled will be described. The packet data input to the communication module 10 via the communication cable 9 is checked for header information by the CPU 12 to determine the destination, type, etc. of the packet data. If the control data is addressed to itself, a predetermined process is performed based on the control data. On the other hand, if it is an MPEGTS or JPEG packet, the data is output to the MPEGTS memory control circuit 50 in the image expansion circuit 21. At this time, identification information indicating whether the MPEGTS or JPEG packet is also output.

  When the received data is MPEGTS, the MPEGTS memory control circuit 50 writes the MPEGTS packet including the time stamp in the MPEGTS memory 51 as in the case of normal monitoring. On the other hand, when the received data is a JPEG packet, the MPEGTS memory control circuit 50 inputs the JPEG packet to the JPEG decoding circuit 55. The JPEG packet processing will be described below. When a JPEG packet is input from the MPEGTS memory control circuit 50 to the JPEG decoding circuit 55, the JPEG decoding circuit 55 performs JPEG decoding to restore the original image data. The image data restored by the JPEG decoding circuit 55 is input to the JPEG memory 56 to form one-field image data. The image data writing control and the image data reading control to the JPEG memory 56 are generated and output by the JPEG memory control circuit 57. Specifically, the JPEG memory control circuit 57 generates a write control signal such as the write address based on the vertical synchronization reference signal and the horizontal synchronization reference signal of the decoded image data output from the JPEG decoding circuit 55, and A read control signal is generated based on the vertical synchronization signal and horizontal synchronization signal output from the TV synchronization generation circuit 53. Further, the image decoding control circuit 54 uses the image decoding completion signal of the first field output from the JPEG decoding circuit 55 and synchronizes with the vertical synchronizing signal output from the TV synchronization generating circuit 53, so that the switching signal of the switch 58 is obtained. Is output. The image data output from the switch 58 is converted into a composite NTSC signal by the NTSC encoder 59 and output to the monitoring monitor 15 via the output terminal 60. The operation of the NTSC encoder 59 is the same as during normal monitoring. Specifically, after the output of image data for one field of the MPEG decoded image currently being displayed is completed, switching is performed to output a JPEG image. With the configuration described above, there is an effect that even when switching from the MPEG2 decoded image to the JPEG decoded image, the display image on the monitor monitor 15 can be switched without being disturbed.

  Next, MPEGTS packet processing will be described. As in the case of the normal monitoring, when the surveillance camera 1 is controlled, the MPEGTS memory control circuit 50 reads the MPEGTS from the MPEGTS memory 51 based on the time stamp added to the head of the MPEGTS packet and outputs it to the MPEG2 decoding circuit 52. . Note that the MPEGTS packet write operation of the MPEGTS memory control circuit 50 is the same as the control during the normal monitoring described above. The MPEGTS packet read control of the MPEGTS memory control circuit 50 is the same as the normal monitoring control.

  Hereinafter, clock jitter control at the start of monitoring camera 1 control will be described. In the first embodiment, as described above, when the control of the surveillance camera 1 is finished, the MPEGTS is transmitted without being displayed on the monitor monitor 15 in order to smoothly switch the image displayed on the monitor monitor 15. This is due to the following reason. Even when the surveillance camera 1 is controlled, the MPEGTS packet is received and decoded, whereby the synchronization of the image signal output to the surveillance monitor 15 can be output in synchronization with the synchronization of the image signal output from the surveillance camera 1 and the image receiving device 14. This reference time can be matched with the reference time in the image transmission device 7. As a result, when the image displayed on the monitor 15 is switched from the JPEG compressed image to the MPEG2 compressed image after the control of the monitoring camera 1 is finished, the display image is temporarily stopped or the display image is disturbed. There is an effect that the displayed image can be switched smoothly.

  Hereinafter, clock jitter correction control at the start of control of the monitoring camera 1 will be described with reference to FIGS. 11 and 12. The control of the clock jitter correction has been described in the operation during normal imaging, but basically, the amount of MPEGTS packets (memory storage capacity) stored in the MPEGTS memory 51 is macroscopically constant (for example, The time of the read control timer in the MPEGTS memory control circuit 50 is periodically corrected so that the average memory storage capacity for one second is substantially constant. However, when the MPEGTS data transmission rate changes, the storage capacity of the TS in the MPEGTS memory 51 is smaller than the target value during normal monitoring, as shown in FIG. . This is due to the following reason. Until the image receiving apparatus 14 receives the MPEGTS packet and outputs it to the MPEG2 decoding circuit 52, for example, image data for about 0.3 seconds is stored in the MPEGTS memory 51 in order to correct the clock jitter described above. The clock jitter correction control is performed so that the storage capacity is substantially constant. Therefore, when the average reception rate of the received MPEGTS packet changes from 12 Mbps to 6 Mbps, the MPEGTS packet stored for 0.3 seconds is read from the MPEGTS memory 51 at the average rate of 12 Mbps as shown in FIG. On the other hand, since the average rate of MPEGTS packets to be written is 6 Mbps, the memory storage capacity is reduced. Therefore, if the clock jitter correction control is performed at the start of control of the monitoring camera 1, clock synchronization is lost. Therefore, the first embodiment is configured such that the clock jitter correction control is stopped when the control of the monitoring camera 1 is started.

  The clock jitter correction control operation will be described below using the flowchart shown in FIG. When the monitoring camera 1 control is started, the CPU 12 stops the clock synchronization control (clock jitter correction control) (step S50). Then, it is confirmed whether or not the average rate of the MPEGTS packets input to the image receiving device 14 is the rate at the time of monitoring camera 1 control (step S51). When it is confirmed that the average rate of the input MPEGTS packet is the average rate at the time of monitoring camera 1 control (6 Mbps in the first embodiment), the memory storage capacity (memory remaining in the MPEGTS memory 51) is next. It is determined whether the amount has converged substantially constant (step S52). If it has converged, the clock jitter correction control target value is reset to the current memory storage capacity. Then, the clock jitter correction control is resumed. In the first embodiment, since the clock jitter correction control is performed as described above at the start of monitoring camera 1 control, control is performed without removing clock synchronization control even when the MPEGTS packet reception rate changes. Can do. Accordingly, even when the control of the monitoring camera 1 is started, there is an effect that the display image switching control can be performed smoothly without disturbing the display image displayed on the monitoring monitor 15.

  Next, the operation at the end of the surveillance camera 1 control will be described. As shown in FIG. 10, when the image receiving device 14 detects the completion of control of the monitoring camera 1 (step S37), it outputs a monitoring camera control 1 end command to the image transmission device 7 (step S38). In the first embodiment, the control signal of the monitoring camera 1 input from the operation panel 16 is monitored, and when the control signal is not input for a predetermined time, it is determined that the control of the monitoring camera 1 is finished. In addition, you may comprise so that the end of control of the monitoring camera 1 may be notified directly from the operation panel 16. Thereafter, the image decoding control circuit 54 detects an intra frame of the MPEGTS packet input from the image transmission device 7 (step S39). When the intra frame is detected, a control signal is output to the switch 58 so as to select the output of the MPEG2 decoding circuit 52. The control signal is switched in synchronism with the vertical synchronization signal output from the TV synchronization generation circuit 53 in the same manner as when the surveillance camera 1 is started. With the configuration described above, there is an effect that the JPEG decoded image and the MPEG2 decoded image can be smoothly switched without disturbing the display image on the monitoring monitor 15 even when the control of the monitoring camera 1 is finished.

  On the other hand, as shown in FIG. 9, when the image transmission apparatus 7 receives the monitoring camera 1 control end command (step S16), the image compression control circuit 35 detects an intra frame at the time of MPEG2 encoding. When an intra frame is detected, the image compression control circuit 35 switches the target code amount at the time of MPEG2 encoding to the target amount at the time of normal monitoring (in the first embodiment, 12 Mbps) (step S18). Then, the priority of the transmission data is switched to the priority during normal monitoring (see FIG. 8) (step S19). Then, a control signal is output to the JPEG encoding circuit 34 so as to stop the JPEG encoding operation.

  Next, the operation at the end of the surveillance camera 1 control will be described. An image signal input via the surveillance camera 1 is input to the NTSC decoder 32 via the input terminal 31, and is converted into a luminance signal and two color difference signals by the NTSC decoder 32. At that time, as in normal monitoring, the vertical synchronization signal and the horizontal synchronization signal are separated, and the output is input to the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34. On the other hand, when the monitoring camera 1 control end command is received from the image receiving device 14 via the communication cable 9, the CPU 5 notifies the image compression control circuit 35 to that effect. When the end of control of the surveillance camera 1 is notified, the image compression control circuit 35 detects an intra frame based on information output from the MPEG2 encoding circuit 33. When detecting the intra frame, the image compression control circuit 35 sets the target code amount at the time of MPEG2 encoding to be the code amount at the time of normal monitoring. On the other hand, when the CPU 5 notifies the image compression control circuit 35 that the control of the monitoring camera 1 has been completed, the CPU 5 switches the priority of each data at the time of transmission to the priority at the time of normal monitoring (see FIG. 8). On the other hand, when the switching of the target code amount at the time of MPEG2 encoding is completed, the image compression control circuit 35 next outputs a control signal to the JPEG encoding circuit 34 so as to stop the JPEG encoding operation. When receiving the stop command, the JPEG encoding circuit 34 stops the JPEG compression operation after the processing of the image data currently being encoded.

  It should be noted that the JPEG encoding circuit 34 finishes the JPEG encoding circuit 34 after confirming that the display image on the monitor 15 is switched from the JPEG image to the MPEG image in the image receiving apparatus 14. May be configured to stop. The subsequent operations of the MPEG2 encoding circuit 33, the time stamp generation circuit 36, the TS packet generation circuit 37, and the TS storage memory 39, and the operation of the communication module 4 are the same as those during normal monitoring.

  Next, the operation of the image receiving device 14 at the end of the control of the surveillance camera 1 will be described. When it is confirmed that there is no input of a control signal from the operation panel 16 for a predetermined period, the CPU 12 outputs a monitoring camera 1 control end command to the communication module 10. The communication module 10 outputs the input surveillance camera 1 control end command to the image transmission device 7 via the communication cable 9. When the sending of the monitoring camera 1 control end command is completed, the CPU 12 notifies the image decoding control circuit 54 that the monitoring camera 1 control has ended. When notified that the surveillance camera 1 control is completed, the image decoding control circuit 54 detects an MPEG2 intra frame. Specifically, the image decoding control circuit 54 detects an intra frame based on the image decoding information output from the MPEG2 decoding circuit 52. When detecting the intra frame, the image decoding control circuit 54 outputs a control signal so that the input of the switch 58 is selected as the output of the MPEG2 decoding circuit 52. The control signal for switching the input of the switch 58 is output in synchronization with the vertical synchronization signal output from the TV synchronization generation circuit 53. When the switching control of the switch 58 is completed, the image decoding control circuit 54 outputs a control signal to the JPEG decoding circuit 55 so as to stop the JPEG decoding operation. At this time, a control signal is similarly output to the JPEG memory control circuit 57 so as to stop the control of the JPEG memory 56. The decoded image data output from the switch 58 is input to the NTSC encoder and output to the monitoring monitor 15 via the output terminal 60 as an NTSC composite signal.

  Next, clock jitter control at the end of monitoring camera 1 control will be described. In the first embodiment, as described above, when the control of the monitoring camera 1 is completed, the MPEGTS is transmitted without being displayed on the monitoring monitor 15 in order to smoothly switch the image displayed on the monitoring monitor 15. Therefore, although the surveillance camera 1 is controlled using the JPEG image, the clock synchronization between the image transmission device 7 and the image reception device 14 can be compensated using MPEGTS as described above. As a result, as described above, after the control of the monitoring camera 1 is finished, when the image displayed on the monitoring monitor 15 is switched from the JPEG compressed image to the MPEG2 compressed image, the display image is temporarily stopped or the display image is disturbed. There is an effect that the display image can be switched smoothly without causing the occurrence of the problem.

  The clock jitter correction control operation at the end of the control of the monitoring camera 1 will be described below with reference to FIGS. As described above, the clock jitter correction is basically controlled by a macroscopically constant amount of MPEGTS packets (memory storage capacity) stored in the MPEGTS memory 51 (for example, an average memory for one second). The read control timer time in the MPEGTS memory control circuit 50 is periodically corrected so that the storage capacity is substantially constant. However, when the MPEGTS data transmission rate changes, the storage capacity of the TS in the MPEGTS memory 51 is smaller than the target value during normal monitoring, as shown in FIG. . As described at the start of control of the surveillance camera 1, when the MPEGTS transmission data rate is increased from 6 Mbps to 12 Mbps, the average data rate stored in the MPEGTS memory 51 is 6 Mbps as shown in FIG. Until all of the MPEGTS are read out, the data storage capacity of the MPEGTS memory increases. Therefore, if the clock jitter correction control is performed at the end of the monitoring camera 1 control, the clock synchronization is lost. Therefore, the first embodiment is configured such that the clock jitter correction control is stopped at the end of the control of the monitoring camera 1 similarly to the start of the clock jitter.

  The clock jitter correction control operation will be described below using the flowchart shown in FIG. When detecting the end of the monitoring camera 1 control, the CPU 12 stops the clock synchronization control (clock jitter correction control) (step S60). Then, after confirming the switching of the display screen of the monitoring monitor 15 (step S61), the CPU 12 confirms whether the average rate of the MPEGTS packets input to the image receiving apparatus 14 is the normal monitoring rate (step S62). ). When the CPU 12 confirms that the average rate of the input MPEGTS packets is the average rate during normal monitoring (12 Mbps in the first embodiment), the CPU 12 then stores the memory storage capacity (memory in the MPEGTS memory 51). It is determined whether the remaining amount has converged substantially constant (step S63). If it has converged, the CPU 12 resets the clock jitter correction control target value to the current memory storage capacity. Then, the CPU 12 restarts the clock jitter correction control. In the first embodiment, when the control of the surveillance camera 1 is finished, the clock jitter correction control is performed as described above. Therefore, even when the reception rate of the MPEGTS packet changes, the control can be performed without removing the clock synchronization control. Therefore, even when the control of the monitoring camera 1 is finished, there is an effect that the display image switching control can be performed smoothly without disturbing the display image displayed on the monitoring monitor 15.

  Since the first embodiment is configured as described above, when monitoring camera 1 is controlled, an image compressed using an image compression unit with a small delay amount is transmitted and displayed on monitor monitor 15 and image transmission is performed. In order to synchronize the clock between the device 7 and the image receiving device 14, a stream such as MPEG2, which has a large image delay amount but can be compressed to high image quality, is simultaneously distributed. There is an effect that it is possible to smoothly switch to the normal monitoring image without disturbing the display image on the monitoring monitor 15.

  In the first embodiment, the priority of the data flowing on the network is switched between the normal monitoring time and the monitoring camera 1 control time, so that an optimum image can be displayed in each state. Specifically, since the priority of the JPEG packet is increased when the monitoring camera 1 is controlled, the delay amount of the JPEG packet on the network can be minimized, and at the time of normal monitoring, the MPEGTS packet Therefore, the MPEGTS can be decoded in real time.

  In the first embodiment, the code amount is switched in the MPEG2 encoding circuit 33 at the head of the GOP. This is due to the following reason. For example, when the code amount is switched in the middle of the GOP (from 12 Mbps to 6 Mbps), if the intra field occupies about 20% of the total code amount, the P frame or B frame after the code amount is switched This greatly affects the MPEG2 code amount control, such that the code amount allocated to is very small or exceeds the target code amount at the time of switching. Therefore, as shown in the first embodiment, by switching the target value of the code amount at the head of the GOP, the code amount can be smoothly switched, and the clock jitter control in the image receiving apparatus 14 or the MPEG2 decoding circuit 52 And the TV synchronization generation operation in the TV synchronization generation circuit 53 can be performed smoothly. For example, when the target code amount is switched, the TV synchronization is lost, the synchronization is disturbed, and the output image to the monitor monitor 15 is disturbed There is an effect that can be suppressed.

Embodiment 2. FIG.
The second embodiment of the present invention will be described below with reference to the drawings. In general, when the direction of the monitoring camera 1 or zoom control is performed, normal image resolution is not necessary. Therefore, in the second embodiment, a case will be described in which the resolution of an image is reduced as a preprocessing when JPEG encoding is performed on image data when the surveillance camera 1 is controlled. In image compression using the same in-plane correlation such as JPEG, the image encoding time is determined by the image size at the time of compression. Specifically, JPEG compression is performed after image data of one field is stored in the memory, and the amount of calculation at that time increases in proportion to the area of the image to be compressed. The amount of image data to be transmitted also increases in proportion to the area of the image to be compressed. Therefore, in the second embodiment, as a preprocessing at the time of JPEG compression, for example, a case where transmission is performed with the number of pixels in the horizontal direction and the vertical direction being halved will be described.

  FIG. 15 is a block diagram showing a JPEG encoding circuit 34 used in the image compression circuit in the image transmission apparatus according to Embodiment 2 of the present invention. As shown in FIG. 15, the JPEG encoding circuit 34 includes an image reduction circuit 70 that reduces the number of pixels in the horizontal direction and the vertical direction of the input image signal in half, and a horizontal direction and an output from the image reduction circuit 70. A second JPEG encoding circuit 71 that performs JPEG encoding on image data in which the number of pixels in the vertical direction is reduced to half. FIG. 16 shows an example of the configuration of an LPF used when thinning out pixels in the horizontal direction or vertical direction in half. The LPF shown in FIG. 16 includes delay circuits 72 and 73 that delay one pixel, multiplier circuits 74 and 76 that multiply data by 0.25, a multiplier circuit 75 that multiplies data by 0.5, and an adder circuit 77. It is configured. When the vertical LPF is configured with the configuration shown in FIG. 15, the delay circuits 72 and 73 are configured to delay one line. In the second embodiment, as shown in FIG. 16, a case where the LPFs in the horizontal direction and the vertical direction are configured by a 3-tap filter will be described. The configuration of the LPF in the horizontal direction and the vertical direction is not limited to FIG.

  FIG. 17 is a block configuration diagram showing a JPEG decoding circuit 55 used in the image expansion circuit in the image receiving apparatus according to Embodiment 2 of the present invention. As shown in FIG. 17, the JPEG decoding circuit 55 includes a second JPEG decoding circuit 80 that decodes input JPEG packet data, and image data input from the second JPEG decoding circuit 80 in the horizontal and vertical directions. And an image enlarging circuit 81 each enlarging twice in the direction. FIG. 18 is a block configuration diagram of a pixel interpolation circuit used when a horizontal or vertical pixel is doubled. The pixel interpolation circuit shown in FIG. 18 includes a delay circuit 82 that delays input image data by halving the number of pixels by one clock, an adder circuit 83, and a multiplier circuit 84 that multiplies input data by 0.5. , And a switch 85. When the vertical pixel interpolation circuit is configured with the configuration shown in FIG. 17, the delay circuit 82 is configured to delay one line.

  The operation of the second embodiment of the present invention will be described below. The operation during normal monitoring is the same as that in the first embodiment. The operation at the time of monitoring camera 1 control will be described. As in the first embodiment, an image signal input via the surveillance camera 1 is input to the NTSC decoder 32 in the image compression circuit 20 and converted into a luminance signal and two color difference signals. The output of the NTSC decoder 32 (including the horizontal synchronization signal and the vertical synchronization signal) is input to the MPEG2 encoding circuit 33 and the JPEG encoding circuit 34. When the surveillance camera 1 is controlled, the MPEG2 encoding circuit 33 performs encoding by switching the target value of the code amount according to the flow shown in FIG. 9 as in the first embodiment. In the second embodiment, the image size of the JPEG image used when controlling the surveillance camera 1 is reduced, so that the encoding time and decoding time of the image are shortened, and the amount of image data to be sent on the communication cable 9 is reduced. Therefore, the target value of the code amount at the time of MPEG2 encoding is larger than that in the first embodiment. In the second embodiment, the description will be continued assuming that the target code amount at the time of MPEG2 encoding is 9 Mbps. The TS output from the MPEG2 encoding circuit 33 is added with the time stamp generated by the time stamp generating circuit 36 at the head of the TS by the TS packet generating circuit 37 and stored in the TS storage memory 39 as in the first embodiment. Is done. The subsequent TS packet processing operation of the image transmission apparatus 7 is the same as in the first embodiment.

  On the other hand, when the surveillance camera 1 is controlled, the JPEG encoding circuit 34 halves the number of pixels in the horizontal direction and the vertical direction of the input luminance signal and the two color difference signals and then performs JPEG encoding and outputs the result. Hereinafter, the operation of the JPEG encoding circuit 34 will be described with reference to FIGS. 15 and 16. When an image signal is input from the NTSC decoder 32, the image reduction circuit 70 reduces the image size by thinning the horizontal and vertical pixels in half. Hereinafter, the pixel thinning operation in the horizontal direction will be described with reference to FIG. The input pixel data is input to the delay circuit 72 and the multiplication circuit 74. The delay circuit 72 delays the input pixel by one clock. The multiplication circuit 74 multiplies the input data by 0.25. The output of the delay circuit 72 is input to the delay circuit 73 and the multiplication circuit 75. The delay circuit 73 delays the input pixel by one clock. The multiplication circuit 75 multiplies the input data by 0.5. The output of the delay circuit 73 is multiplied by 0.25 by the multiplication circuit 76. The outputs of the multiplying circuits 74, 75, and 76 are added by the adding circuit 77, and the band in the horizontal direction is dropped and output. At that time, for example, even-numbered pixels in the horizontal direction are thinned out and output. In the manner described above, the image in which the pixels in the horizontal direction are thinned out is output from the image reduction circuit 70 after, for example, even lines are thinned out after the vertical band is reduced by the LPF in the vertical direction. The operation of the LPF in the vertical direction is the same except that the delay circuits 72 and 73 in FIG. 16 are replaced with a line memory having a one-line delay. The output of the image reduction circuit 70 is subjected to JPEG encoding in the second JPEG encoding circuit 71 and input to the JPEG packet generation circuit 38. The subsequent JPEG packet processing operation of the image transmission apparatus 7 is the same as that of the first embodiment.

  Next, the operation of the image receiving device 14 when the surveillance camera 1 is controlled will be described. The packet data input to the communication module 10 via the communication cable 9 is checked for header information by the CPU 12 to determine the destination, type, etc. of the packet data. If the control data is addressed to itself, a predetermined process is performed based on the control data. On the other hand, if it is an MPEGTS or JPEG packet, the data is output to the MPEGTS memory control circuit 50 in the image expansion circuit 21. At this time, identification information indicating whether the MPEGTS or JPEG packet is also output.

  In the MPEGTS memory control circuit 50, when the received data is MPEGTS, the MPEGTS packet including the time stamp is written in the MPEGTS memory 51 as in the case of normal monitoring, as in the first embodiment. Note that MPEGTS packet processing is the same as in the first embodiment. On the other hand, if the received data is a JPEG packet, it is input to the JPEG decoding circuit 55. The JPEG packet processing will be described below. When a JPEG packet is input from the MPEGTS memory control circuit 50, the second JPEG decoding circuit 80 performs JPEG decoding to restore the original image data. The image data restored by the second JPEG decoding circuit 80 is input to the image enlargement circuit 81. In the image enlargement circuit 81, pixel interpolation in the horizontal direction and vertical direction is performed to restore the original image size. Hereinafter, the pixel interpolation operation in the horizontal direction will be described with reference to FIG. The image data restored by the second JPEG decoding circuit 80 is input to the delay circuit 82, the addition circuit 83, and the switch 85. The delay circuit 82 delays the input image by one clock (note that one clock is synchronized with the pixel clock output from the second JPEG decoding circuit 82). The adder circuit 83 adds the output of the second JPEG decoding circuit 80 and the output of the delay circuit 32 and inputs the result to the multiplier circuit 83. The multiplication circuit 84 multiplies the input data by 0.5 to generate interpolation image data. The output of the multiplier circuit 84 is input to the switch 85. The switch 85 is driven by a clock having a frequency twice that of the pixel clock output from the second JPEG decoding circuit 82, and switches between the output of the second JPEG decoding circuit 80 and the output of the multiplication circuit 84 in the horizontal pixel interpolation. To implement. The vertical interpolation operation is the same except that the delay circuit 82 in FIG. 18 is replaced with a line memory having a one-line delay. The image data restored by the JPEG decoding circuit 55 is input to the JPEG memory 56 to form one field of image data. Subsequent operations are the same as those in the first embodiment.

  The reason why the above-described configuration is adopted in the second embodiment will be described. As described above, when performing horizontal position control, vertical position control, or zoom control of the monitoring camera 1, it is necessary to shorten the delay time of the image even if the resolution of the image is decreased. When JPEG is used as the image delay time, generally, one field of image data is stored in the memory at the time of encoding, and then one field of image data stored in the memory is subjected to JPEG encoding. . Also, the encoding time during JPEG encoding becomes longer in proportion to the size (area) of the image to be encoded. Therefore, as shown in the second embodiment, the encoding time is ¼ compared with the first embodiment by halving the image size in both the horizontal direction and the vertical direction. Similarly, since the JPEG decoding time is ¼ compared with the first embodiment, there is an effect that the image delay time can be further shortened.

  Further, since the data amount of the JPEG packet is about ¼ compared with the first embodiment, the code amount at the time of MPEG2 encoding can be increased (9 Mbps in the second embodiment). In a video surveillance system, the image data output from the surveillance camera 1 is often recorded on a surveillance recorder or the like. At that time, the system described in the first and second embodiments is configured to transmit the MPEG2 TS stream even when the surveillance camera 1 is controlled. There is an effect that the captured images to be recorded can be stored continuously (without interruption) in the monitoring recorder.

  In the second embodiment, since the data transmission rate of the JPEG packet is reduced to the data transmission rate of the MPEG2 TS, the monitoring video when controlling the monitoring camera 1 when recording the monitoring video on the monitoring recorder is used. Has an effect of being able to record with higher image quality than in the first embodiment.

Other forms of use.
In the first embodiment and the second embodiment, as shown in FIG. 4, a case has been described in which a 4-byte time stamp is added to the beginning of a 188-byte TS, but the present invention is limited to this. is not. For example, a time stamp is added by 2 bytes, or an error correction code such as a Reed-Solomon code is added after the 192-byte transmission data shown in FIG. 3 in order to correct a random error occurring during wireless transmission. It may be transmitted. Further, the error correction code may be added only to the TS or to both the time stamp and the TS.

  In the first and second embodiments, the case where the size of the JPEG packet is the same as that of the TS packet has been described. However, the present invention is not limited to this.

  Furthermore, in Embodiments 1 and 2, the case of a wired network using Ethernet as a network has been described, but the present invention is not limited to this. For example, a wireless LAN such as IEEE 802.11, a wireless network such as UWB (Ultra Wideband), a network using a power line such as high-speed power line communication (PLC), a peer-to-peer (PtoP) network, or The same effect can be obtained in a communication method using USB or the like.

  Furthermore, in the first and second embodiments, when the monitoring camera 1 is controlled, the monitoring camera 1 control is masked until switching to the JPEG image. At that time, the control of the monitoring camera 1 is masked. In this case, the operability is further improved. More specifically, the monitoring monitor 15 may be configured to display the fact that the control of the monitoring camera 1 is activated, or the LED on the operation panel 16 is turned on. With the configuration described above, the user does not say that the image does not move even if the user controls the monitoring camera 1, so that the operability is not greatly deteriorated and the monitoring camera 1 is smoothly controlled. There is an effect that can be done.

  In the first and second embodiments, the case where the clock jitter is absorbed using the TS of the MPEG2 system has been described. However, the present invention is not limited to this. For example, clock jitter absorption using video data transmitted by other compression methods, MPEG2 system PES format, audio data such as telephones, or digital audio data reproduced from a CD or the like, which requires real-time characteristics. Even if configured, the same effect is obtained.

  In the first and second embodiments, as a high-efficiency encoding method in the image transmission apparatus 7, MPEG2 is used during normal monitoring, and JPEG encoding is used during monitoring camera 1 control. Although described, the present invention is not limited to this. For example, MPEG4 may be used during normal monitoring. Also, the same effect can be obtained by reducing the image resolution (image size is 1/4 and the number of colors is 256 gradations) instead of JPEG encoding.

It is a block diagram which shows the video surveillance system in Embodiment 1 and Embodiment 2 of this invention. It is a block block diagram which shows the image compression circuit in the image transmission apparatus in Embodiment 1 of this invention. It is a block block diagram which shows the image expansion circuit in the image receiver in Embodiment 1 of this invention. (A) thru | or (c) is a figure for demonstrating the jitter of TS which generate | occur | produces in the network transmission in Embodiment 1 of this invention. It is a figure which shows the format of the TS signal to which the time stamp transmitted by radio | wireless in Embodiment 1 of this invention was added. It is a figure which shows the format of the JPEG packet transmitted in Embodiment 1 of this invention. It is a figure for demonstrating the concept of the clock jitter in Embodiment 1 of this invention. It is a figure which shows the priority at the time of the image transmission apparatus in Embodiment 1 of this invention performing data communication. It is a flowchart which shows operation | movement of the image transmission apparatus at the time of surveillance camera control in Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the image receiver at the time of surveillance camera control in Embodiment 1 of this invention. It is a flowchart which shows the clock jitter correction | amendment operation | movement at the time of the surveillance camera control start in Embodiment 1 of this invention. It is a figure for demonstrating the clock jitter correction | amendment operation | movement at the time of the monitoring camera control start in Embodiment 1 of this invention. It is a flowchart which shows the clock jitter correction | amendment operation | movement at the time of completion | finish of surveillance camera control in Embodiment 1 of this invention. It is a figure for demonstrating the clock jitter correction | amendment operation | movement at the time of completion | finish of surveillance camera control in Embodiment 1 of this invention. It is a block block diagram which shows the JPEG encoding circuit used in the image compression circuit in the image transmission apparatus in Embodiment 2 of this invention. It is a block block diagram which shows LPF used in the image reduction circuit in the JPEG encoding circuit shown in FIG. It is a block block diagram which shows the JPEG decoding circuit used in the image expansion circuit in the image receiver in Embodiment 2 of this invention. It is a block block diagram which shows the image expansion circuit in the JPEG decoding circuit shown by FIG. It is a block diagram which shows the image | video monitoring system using the conventional digital image | video.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Surveillance camera, 2 Electric pan head, 4 Communication module, 5 CPU, 7 Image transmission apparatus, 9 Communication cable, 10 Communication module, 12 CPU, 15 Surveillance monitor, 16 Operation panel, 18 Transmission system, 19 Video surveillance system, 20 Image compression circuit, 21 Image expansion circuit, 32 NTSC decoder, 33 MPEG2 encoding circuit, 34 JPEG encoding circuit, 35 Image compression control circuit, 36 Time stamp generation circuit, 37 TS packet generation circuit, 38 JPEG packet generation circuit, 39 TS storage Memory, 40 JPEG packet storage memory, 50 MPEGTS memory control circuit, 51 MPEGTS memory, 52 MPEG2 decoding circuit, 53 TV synchronization generation circuit, 54 image decoding control circuit, 55 JPEG decoding circuit, 56 JPEG memory, 5 JPEG memory control circuit, 58 a switch, 59 NTSC encoder, 70 image reduction circuit, 71 the second JPEG coding circuit, 80 the second JPEG decoding circuit, 81 an image enlargement circuit.

Claims (11)

Subjected to high-efficiency coding on the image data input from the imaging device, the image receiving apparatus which outputs the restored display image data subjected to the above-described high efficiency encoding, in the image transmission apparatus for transmitting,
First high-efficiency encoding means for applying first high-efficiency encoding to image data input from the imaging device;
Second high efficiency encoding means for performing second high efficiency encoding on image data input from the imaging device;
Transmission means for transmitting said first high efficiency encoding image data and the image data subjected to the above second high-efficiency encoding has been subjected to reduction to the image receiving apparatus,
Receiving means for receiving an imaging condition change request signal for changing an imaging condition including at least one of an imaging position or a zoom of the imaging device;
Imaging condition control means for outputting an imaging condition control signal based on the imaging condition change request signal to the imaging apparatus;
The delay amount of the image data when performing a first high-efficiency encoding is less than the delay amount of the image data when carrying out the second high-efficiency encoding, the upper Symbol imaging condition control means the imaging condition the compression ratio of the image data of the second high-efficiency encoding means at the time for outputting a control signal, the second high-efficiency encoding means in addition when the imaging condition control means outputs the image pickup condition control signal with a high Ku system to control than the compression ratio of the image data, when the imaging condition control means outputs the image pickup condition control signal, with respect to the signal transmitted from said transmitting means, the first high efficiency encoding The priority of the applied image data is set higher than the priority of the image data subjected to the second high-efficiency encoding, and the image data subjected to the first high-efficiency encoding is preferentially set. Send above to send Image transmission apparatus characterized by controlling means. The image transmission apparatus according to claim 1, wherein the first high-efficiency encoding is a high-efficiency encoding method using correlation in the same field or the same frame. The image transmission apparatus according to claim 1 or 2 , wherein the second high-efficiency encoding is MPEG2. When the imaging condition control means receives the imaging condition change request signal and outputs the imaging condition control signal, the switching of the compression rate of the image data of the second high efficiency encoding is switched from the head of the GOP. 4. The image transmission apparatus according to claim 3 , wherein the image transmission apparatus is controlled as follows. When changing the imaging condition, a notification signal for notifying that the image data displayed by the display device has been switched to the image data subjected to the first high-efficiency encoding is output. The image transmission apparatus according to any one of claims 1 to 4 . Subjected to high efficiency coding on the image data input from the imaging device, the image receiving apparatus which outputs the restored display image data subjected to the above-described high efficiency encoding, an image transmission method for transmitting,
Applying first high efficiency encoding to image data input from the imaging device;
Applying second high efficiency encoding to image data input from the imaging device;
And transmitting to the image receiving apparatus the first high-efficiency encoding of applied image data and the second high efficiency encoding image data subjected to the reduction was from the transmitting means,
Receiving an imaging condition change request signal for changing an imaging condition including at least one of an imaging position or a zoom of the imaging device;
Outputting an imaging condition control signal based on the imaging condition change request signal to the imaging device,
The delay amount of the image data when performing the first high efficiency encoding is smaller than the delay amount of the image data when performing the second high efficiency encoding, and the imaging condition change request signal is received, image in the second high-efficiency encoding step in except when a compression rate of the image data in the second high-efficiency encoding step at the time of outputting the image pickup condition control signal, and outputs the upper Symbol imaging condition control signal as well as high rather controlled than the compression rate of the data, the imaging condition changing request signal is received, when outputting the image pickup condition control signal, with respect to the signal transmitted from said transmitting means, said first high efficiency encoding Is set higher than the priority of the image data subjected to the second high-efficiency encoding, and the image data subjected to the first high-efficiency encoding is set to Image transmission method characterized by controlling the transmission means to transmit earlier manner. 7. The image transmission method according to claim 6 , wherein the first high-efficiency encoding is a high-efficiency encoding method using correlation in the same field or the same frame. The image transmission method according to claim 6 or 7 , wherein the second high-efficiency encoding is MPEG2. When receiving the imaging condition change request signal and outputting the imaging condition control signal, switching of the compression rate of the image data of the second high-efficiency encoding is controlled so as to switch from the head of the GOP. 9. The image transmission method according to claim 8, wherein: When changing the imaging condition, a notification signal for notifying that the image data displayed by the display device has been switched to the image data subjected to the first high-efficiency encoding is output. An image transmission method according to any one of claims 6 to 9 . In a transmission system having an image transmission device that performs high-efficiency encoding on image data input from an imaging device and transmits the image data that has been subjected to the high-efficiency encoding and outputs the image data to a display device ,
The image transmission apparatus is
First high-efficiency encoding means for applying first high-efficiency encoding to image data input from the imaging apparatus, and second for applying second high-efficiency encoding to image data input from the imaging apparatus The high-efficiency encoding means, the transmission means for transmitting the image data subjected to the first high-efficiency encoding and the image data subjected to the second high-efficiency encoding to the image receiving apparatus, and A receiving means for receiving an imaging condition change request signal for changing an imaging condition including at least one of an imaging position or a zoom of the imaging device, and an imaging condition control signal based on the imaging condition change request signal to the imaging device Imaging condition control means for outputting,
The delay amount of the image data when the first high-efficiency encoding is performed is smaller than the delay amount of the image data when the second high-efficiency encoding is performed, and the imaging condition control means controls the imaging condition control. The compression rate of the image data of the second high-efficiency encoding means when the signal is output is the same as that of the second high-efficiency encoding means other than when the imaging condition control means outputs the imaging condition control signal. While controlling higher than the compression rate of the image data, at least the second high-efficiency encoding means outputs the image data subjected to the second high-efficiency encoding regardless of the presence or absence of the imaging condition control signal . In addition to transmitting to the image receiving device, the image receiving device uses the second high-efficiency encoding unit based on the image data encoded by the second high-efficiency encoding unit. Standard clock And a difference between the reference clock used in decoding the data encoded by the second high-efficiency encoding means in the image receiving apparatus, and the difference between the frequencies of the reference clock A transmission system that is controlled so as to be absorbed in a receiving apparatus .

Images