JP2004219625A - Organic el driving circuit and organic el display device using the circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an organic EL driving circuit in which irregularity in luminance of display screen of a portable telephone or the like is easily adjusted and high luminance color display is provided and to provide an organic EL display device. <P>SOLUTION: A current adjusting circuit is constituted by a current mirror circuit having a plurality of second output transistors that are current mirror connected to a first input side transistor of one to n current mirror circuits which conduct current distribution or current mirror connected to a second input side transistor into which current corresponding to the current to be flowed into the first input side transistor is flowed. The current adjusting circuits are provided corresponding to terminal pins and a prescribed number of the second output side transistors of the respective circuit are operated in accordance with the prescribed data and distributed currents are respectively adjusted in accordance with the number of transistors being operated. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an organic EL drive circuit and an organic EL display device using the same, and more particularly, to an organic EL display device that can easily adjust the brightness unevenness of a display screen of a mobile phone or the like and is particularly suitable for high brightness color display.
[0002]
[Prior art]
In an organic EL display panel of an organic EL display device mounted on a mobile phone, a PHS, a DVD player, a PDA (portable terminal device), or the like, 396 (132 × 3) terminal pins (hereinafter referred to as pins) having 396 column lines, A row line having 162 pins has been proposed, and the column line and row line pins tend to increase more.
The output stage of the current drive circuit of such an organic EL display panel is provided with a drive circuit of a current source, for example, an output circuit of a current mirror circuit, corresponding to the pin, whether it is an active matrix type or a simple matrix type.
[0003]
An output circuit based on a current mirror circuit is arranged corresponding to a pin, and its drive stage includes, for example, as shown in Japanese Patent Application No. 2002-82662, a parallel drive current mirror circuit having a large number of output-side transistors corresponding to a pin. Then, it receives a reference current from a reference current generation circuit, which is an input stage in front, and generates a mirror current corresponding to the pin. Further, a D / A conversion circuit composed of a current mirror is provided for each pin, and each D / A conversion circuit receives the mirror current as a reference drive current and receives display data based on the current. D / A conversion is performed to generate a drive current corresponding to each pin, and drive the output circuit of the current mirror.
[0004]
As described above, by generating the drive current with the current mirror configuration, for example, in the case of a passive matrix, a large current of about mA or 1 A is amplified from a very small reference current of about several μA while suppressing power loss. And a driving circuit with low power consumption can be realized. In the case of an active matrix, a driving current of 1 nA to 1 μA can be obtained with low power consumption in the same manner.
A driving circuit of an organic EL element that drives an organic EL element arranged in a matrix in a current manner and resets the organic EL element by dropping an anode and a cathode of the organic EL element to the ground is known as Patent Document 1. Further, a technique for driving an organic EL element with low power consumption by using a DC-DC converter is known as Patent Document 2.
[0005]
[Patent Document 1]
Japanese Patent Application Laid-Open No. 9-232074 [Patent Document 2]
JP 2001-143867 A
[Problems to be solved by the invention]
In the above-mentioned prior art Japanese Patent Application No. 2002-82662, in order to increase the integration efficiency of a current driving circuit that drives an organic EL display panel with current through pins, n output circuits are provided for one input transistor. A 1: n current mirror circuit having transistors is provided to distribute a reference current to each pin. In this case, when n becomes 30 or more, the distributed reference current becomes non-uniform, which appears as uneven brightness on the display screen. Therefore, the input-side transistor of the current mirror circuit is arranged at the center of the output-side transistor. However, there is a high demand for reduction of luminance unevenness. At present, uneven brightness due to variations in transistor characteristics at the manufacturing stage has become a problem.
[0007]
FIG. 3 is an explanatory diagram of a current drive circuit centering on a reference current distribution circuit according to the prior art of the present invention.
1 is a reference current generation circuit, 2 is a reference current adjustment circuit, 3 is a reference current distribution circuit, 4 is a current switching D / A conversion circuit (D / A) of a current mirror configuration, and 5 is an output. The stage current sources and X1, X2 to Xm are output terminals on the column side, and are connected to pins of the organic EL panel.
The reference current distribution circuit 3 includes a P-channel input-side transistor TPa and P-channel output-side transistors TPb and TPc to TPm connected in parallel with the input-side transistor TPa. It is driven by the reference current Iref generated by the current generation circuit 1 and adjusted by the reference current adjustment circuit 2. The reference current adjustment circuit 2 is a circuit that adjusts the reference current to Iref by laser trimming or the like in a manufacturing process, and is usually provided corresponding to each of R, G, and B, and adjusts white balance and the like. Used to do. 2a is an output terminal for the reference current Iref.
Here, in the reference current distribution circuit 3, since 30 or more transistors are used as the output side transistors forming the current mirror circuit, the pair characteristics of each transistor cannot be sufficiently taken for the input side transistor, and the transistor TPb , TPc to TPm, the output currents i1 to im distributed for each pin also vary. As a result, similar variations occur in the output currents I1 to Im of the respective D / As 4, which are now regarded as a problem as uneven brightness.
SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem of the related art, and it is easy to adjust unevenness in brightness of a display screen of a mobile phone or the like, and in particular, an organic EL driving circuit suitable for high brightness color display and An object of the present invention is to provide an organic EL display device.
[0008]
[Means for Solving the Problems]
The features of the organic EL drive circuit of the present invention and the organic EL display device using the same to achieve such an object include a first input-side transistor receiving a current flowing through a terminal pin or a base current thereof, and a first input-side transistor. A plurality of first output transistors which are current mirror connected to one input transistor and are provided corresponding to the terminal pins, and generate a predetermined amount of mirror current in the first output transistor; A current distribution circuit for distributing the current received by the terminal pin corresponding to the terminal pin, and a current corresponding to the current flowing through the first input side transistor which is provided corresponding to the terminal pin and is current mirror-connected to the first input side transistor The current is mirror-connected to the second input-side transistor through which the current flows, and a predetermined number of the transistors operate according to a predetermined data to distribute the electric power. A plurality of current adjustment circuits having a plurality of second output transistors for generating a current to be added to the plurality of current adjustment circuits; and a memory capable of externally writing data which sends predetermined data to each of the plurality of current adjustment circuits. It is provided with.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
As described above, according to the present invention, the current mirror-connected to the first input-side transistor or the current corresponding to the current flowing through the first input-side transistor of the 1: n current mirror circuit for performing the current distribution is used. A current adjustment circuit is configured as a current mirror circuit having a plurality of second output transistors that are current mirror-connected to the second input transistor that flows. A current adjusting circuit is provided corresponding to the terminal pin, a plurality of second output transistors of each circuit are operated by a predetermined number according to predetermined data, and a current is distributed according to the number of operating transistors. And adjust the current.
Thus, the current value of the current to be distributed can be adjusted only by setting the number of operations of the second output-side transistor as predetermined data.
Usually, when such a circuit is formed into an IC, the current mirror circuit is formed by selectively connecting the same unit transistors. A circuit in which a number of unit transistors are arranged vertically and horizontally can be easily integrated into an IC, so that the current value can be adjusted for each pin with a simple circuit, and the current value can be adjusted by the number of transistor operations. Is also easy.
As a result, it is easy to adjust the brightness unevenness of the display screen for each device such as a mobile phone and a PHS, and it is possible to easily realize an organic EL driving circuit and an organic EL display device particularly suitable for high brightness color display.
[0010]
【Example】
FIG. 1 is a block diagram mainly showing a current distribution circuit of a column driver according to an embodiment to which the organic EL drive circuit of the present invention is applied, and FIG. 2 is another block diagram of the present invention in which a distributed current value fine adjustment circuit is independently provided. FIG. 4 is a block diagram of an embodiment of FIG. Note that the same components as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted.
In FIG. 1, reference numeral 100 denotes a column driver IC of an organic EL drive circuit, 11 denotes a reference current distribution circuit thereof, and 12 denotes a number of stages of P × 4 with respect to the total pin number P of the column driver IC 100. This is a shift register including a flip-flop. Thereby, four stages of flip-flops are assigned to one pin.
The reference current distribution circuit 11 includes a plurality of transistors TPa on the input side and one transistor TPa on the output side in FIG. 3, for example, the transistor TPb in FIG. Is assigned to 10 transistors TP1 and TP2 to TP10, and two output transistors TP11 and TP12 are added.
As a result, a current mirror circuit composed of the output transistors TP1 to TP12 per pin is provided, and a total of 12 output transistors are provided. The sources of the transistors TP1 to TP12 are connected to the power supply line + VDD (for example, 3 V), the drains are commonly connected to the output terminal 11b, and the output current is sent to the D / A4 via the output terminal 11b.
Here, the drain of the transistor TPa receives the reference current value Iref of the current sink from the reference current adjustment circuit 2.
[0011]
Switch circuits SW1 to SW4 are provided between the respective sources and the power supply line + VDD in the rear four transistors TP9 to TP12 of the output side transistors TP1 to TP12 as shown in FIG. Make up.
Each of the switch circuits SW1 to SW4 is assigned four stages per pin of the shift register 12, receives the Q bar output (inverted output of the Q output) from the flip-flop (FF) 13 of each stage, and Is set to "1", the corresponding switch circuit is turned on, and when "0" is set, it is turned off.
The data set in the shift register 12 is transmitted to the input terminal 12a when the power is turned on in accordance with the clock CLK input to the input terminal 12b from the MPU 8, and is set in the shift register 12.
Reference numeral 6 denotes a display data register in which display data is set from the MPU 8 for each pin. The display data corresponding to each pin set in the display data register 6 is sent to a D / A 4 provided for each pin, and is converted as an analog value by the D / A 4 based on the distributed reference current. You.
[0012]
Here, by setting the switch circuits SW1 and SW2 basically in the ON state, the reference current value Iref is divided into ten transistors and generated, and each pin is set as a total current value of the ten transistors. Generate the corresponding distribution current.
For example, assuming that each of the transistors TPb and TPc to TPm corresponding to the pin for distributing the reference current in FIG. 3 generates a reference current of 4 μA as the distribution current, the ratio of the channel width (gate width) of each transistor is 1: If it is set to 1, the total output current of the ten transistors TP1 to TP10 is 4 μA, and here, the output current of each of the transistors TP1 to TP10 is 400 nA. Therefore, the reference current value Iref output from the reference current adjustment circuit 2 at this time is 400 nA.
When the reference current to be distributed is generated by driving the ten transistors in parallel in this manner, the variation caused by one transistor is averaged, and the variation can be suppressed. Furthermore, by setting the 4-bit data for turning on / off the switch circuits SW1 to SW4 to a predetermined value, in this example, the reference current distributed in the range of −20% to + 20% is added and adjusted in units of 10%. can do. This adjustment data is set as data in a nonvolatile memory incorporated in the MPU 8 by adjusting the brightness unevenness at the stage of product shipment. The luminance unevenness is obtained by measuring the luminance of the screen by a luminance measuring device that measures the luminance in pixel units, and as a result, the above-described setting data is input to the MPU 8 and generated as data.
[0013]
The actual variation in the drive current value between the pins is provided with a reference current adjustment circuit 2 in which a high-precision reference current is generated. Can be. Therefore, apart from the white balance adjustment of R, G, and B, correction in the range of -20% to + 20% is not actually necessary, and correction accuracy of 10% unit is coarse.
Therefore, in the above-described circuit, the ratio of the channel width (gate width) of the latter two transistors TP11 to TP12 of the four transistors for adjusting the current value is set to 2: If it is 1, the reference current value to be distributed can be adjusted in 5% units in the range of -20% to + 10%. Further, one transistor with a switch circuit is added lastly on the output side transistor provided with the switch circuit, and the ratio of the channel width (gate width) of these three transistors to the input side transistor TP is 3: 1. Then, the reference current value to be distributed in units of about 3% can be adjusted. In addition, two transistors with a switch circuit are added last to the output transistor provided with the switch circuit, and the ratio of the channel width (gate width) of these four transistors to the input transistor TP is set to 4: 1. For example, the reference current value to be distributed in units of 2.5% can be adjusted.
Incidentally, the ratio of the channel width (gate width) may be realized not by adjusting the gate width but by the number of unit transistors connected in parallel.
[0014]
By the way, since the switch circuits SW1 to SW4 of the embodiment of FIG. 1 are also constituted by transistors, if a more accurate adjustment of 2.5% or less is to be performed, the current value adjustment circuit shown in FIG. However, the number of transistors must be increased. In addition, since the current adjusting circuit is provided for each pin, the number of transistors in the entire circuit is considerably increased.
FIG. 2 is a block diagram of a column driver IC 101 according to another embodiment of the present invention in which a distributed current value fine adjustment circuit is independently provided, and solves such a problem.
2, a reference current adjustment circuit 7 is provided in place of the reference current adjustment circuit 2 in FIG. The reference current adjustment circuit 7 adjusts the reference current to a value of Iref−0.03 × Iref by laser trimming or the like. As a result, the current value serving as the adjustment reference is set to 97% × Iref, and is set lower by -3%. This is because the variation of the reference current value distributed by the reference current distribution circuit 11 is suppressed to about 100% ± 3% due to the improvement of the manufacturing technology. Therefore, the reference current input to the lower limit of the reference current value of this variation is reduced. Set the value.
The reference current distribution circuit 20 is provided with a distribution current fine adjustment circuit 14 for each of the output transistors TPb and TPc to TPm in FIG. The reference current adjustment circuit 7 receives a reference current value Ir of 0.97 × Iref corresponding to the lower limit value of the variation of the reference current value.
[0015]
The distributed current value fine adjustment circuit 14 will be described below with the output transistor TPb of FIG. 3 as a representative. One input transistor TP20 and six P-channel output transistors TP21 are provided for the output transistor TPa. , TP22 to TP26, a distributed current value fine adjustment circuit 14 of a current mirror circuit is provided. As in FIG. 1, the source side of each transistor is connected to the power supply line + VDD via the switch circuits SW1 to SW6, and the drain side is commonly connected to the output terminal 11b. The transistor TPa is driven by an N-channel transistor current mirror circuit 17 provided downstream.
Note that reference numeral 11c denotes a similar output terminal of a circuit corresponding to the output-side transistor TPc in FIG. 3, and a vertical dotted line is a boundary line thereof.
The current mirror circuit 17 is a circuit including a transistor TN1 on the input side and a transistor TN2 on the output side. The respective source sides are connected to the ground GND, and the reference of the discharge from the reference current adjustment circuit 7 to the drain of the transistor TN1. Upon receiving the current value Ir, a sink current Ir is generated in the output-side transistor TN2.
If the ratio of the channel width (gate width) between the transistor TN1 and the transistor TN2 is 1: 1 and the reference current Iref in FIG. 3 is 4 μA, the reference current value Ir becomes 3.88 μA.
[0016]
In the distributed current value fine adjustment circuit 14, the drain of the input side transistor TP20 is connected to the drain of the N-channel transistor TN3, and the transistor TN3 is current mirror connected to the input side transistor N1 of the current mirror circuit 17 as an output side transistor. I have.
The ratio of the channel width (gate width) between the transistor TN1 and the transistor TN3 is 1: 1/100. Therefore, a current of 38 nA, which is 1/100 of the transistor TPa, flows through the output-side transistors TP21 to TP25 connected in a current mirror. In the figure, for the sake of explanation, the transistor TN3 is shown as one transistor, and the ratio of the channel width (gate width) is set to 100: 1. However, actually, a 10: 1 current mirror circuit is provided in two stages. With this arrangement, a current of 100: 1 is generated.
As a result, the current value can be adjusted in units of about 40 nA, which is 1/100 of 4 μA of the reference current Iref. This makes it possible to adjust the output current value of the output-side transistor TPa in units of 1% in a range of -3% to + 3% with 97% × Iref being the lower limit of the variation of the reference current.
In this embodiment, each of the switch circuits SW1 to SW6 is assigned six stages per pin of the shift register 12, and receives a Q bar output (an inverted output of the Q output) from the flip-flop 13 of each stage. It turns on when "1" is set to the flip-flop, and turns off when "0" is set. In this case, the total number of stages of the shift register 12 is the total number of pins P × 6 in this case.
[0017]
As described above, in the embodiment, the switch circuits SW1 to SW6 are provided between the source of each transistor and the power supply line, respectively, and are connected between the drain and the output terminals 11b, 11c. May be provided respectively.
In the embodiment, the reference current adjustment circuit 2 and the reference current adjustment circuit 7 are current adjustment circuits by laser trimming. However, this is a software wafer that is adjusted later by a program processing by a D / A conversion circuit or the like. May be used.
The shift register 12 is configured such that data is set when the power is turned on from the MPU 8, but this may be constituted by a non-volatile memory. The information may be set via the memory or directly in the nonvolatile memory.
In the embodiment, the MOSFET transistor is mainly used, but it is needless to say that a bipolar transistor may be mainly used.
Further, the N-channel transistor (or npn type) of the embodiment can be replaced with a P-channel (or pnp) transistor, and the P-channel transistor can be replaced with an N-channel (or npn) transistor. In this case, the power supply voltage becomes negative, and the transistor provided upstream is provided downstream.
In addition, since the terminal pins of the organic EL panel and the output pins of the column driver IC connected to the terminal pins are originally connected and integrated, they should not be particularly distinguished in the specification and the claims. .
[0018]
【The invention's effect】
As described above, according to the present invention, the current mirror connected to the first input-side transistor or the current flowing through the first input-side transistor of the one-to-n current mirror circuit for performing the current distribution is used. A current adjustment circuit is configured as a current mirror circuit having a plurality of second output transistors connected to a second input transistor through which a current to be supplied flows. A current adjusting circuit is provided corresponding to the terminal pin, a plurality of second output transistors of each circuit are operated by a predetermined number according to predetermined data, and a current is distributed according to the number of operating transistors. And adjust the current.
Thus, the current value of the current to be distributed can be adjusted only by setting the number of operations of the second output-side transistor as predetermined data.
As a result, it is easy to adjust the brightness unevenness of the display screen for each device such as a mobile phone and a PHS, and it is possible to easily realize an organic EL drive circuit and an organic EL display device particularly suitable for high-brightness color display.
[Brief description of the drawings]
FIG. 1 is a block diagram mainly showing a current distribution circuit of a column driver according to an embodiment to which an organic EL drive circuit of the present invention is applied.
FIG. 2 is a block diagram of another embodiment of the present invention in which a distributed current value fine adjustment circuit is independently provided.
FIG. 3 is an explanatory diagram of a current drive circuit centered on a reference current distribution circuit according to the prior art of the present invention.
[Explanation of symbols]
1: Reference current generation circuit, 2: Reference current adjustment circuit,
3, 11 ... reference current distribution circuit,
4 ... D / A conversion circuit (D / A), 5 ... Output stage current source,
6 ... display data register, 8 ... MPU,
10, 100 ... column driver IC,
12 shift registers,
13 ... Flip-flop,
X1 to Xm: output terminals on the column side;
TPa to TPn-1 ... transistors.

Claims (8)

In an organic EL drive circuit for driving an organic EL panel with current through a terminal pin of the organic EL panel,
A first input-side transistor receiving a current flowing through the terminal pin or a base current thereof, and a plurality of first output-sides which are current mirror-connected to the first input-side transistor and provided for the terminal pin; A current distribution circuit having a transistor, and distributing the current received by generating a predetermined amount of mirror current to the first output-side transistor in correspondence with the terminal pin;
Current mirror connected to the first input-side transistor provided corresponding to the terminal pin or current mirror-connected to a second input-side transistor through which a current corresponding to a current flowing through the first input-side transistor flows. A plurality of current adjustment circuits having a plurality of second output transistors that generate a current to be added to the current to be distributed by operating a predetermined number according to predetermined data;
An organic EL drive circuit, comprising: a memory capable of externally writing data to each of the plurality of current adjustment circuits for transmitting the predetermined data. The memory is a shift register, and each of the first output transistors includes a plurality of transistors, at least one of which is connected to a power supply line or a distribution current output terminal via a first switch circuit. , Each of the plurality of second output-side transistors is current mirror-connected to the first input-side transistor, and connected to the power supply line or the ground line via a second switch circuit, respectively. 2. The organic EL drive circuit according to claim 1, wherein the first and second switch circuits are turned on / off according to the predetermined data. A current mirror circuit for driving the first and second input transistors; the memory is a shift register; and the second output transistor is connected to an output current of the first output transistor. 2. The organic EL drive circuit according to claim 1, wherein an output current of substantially 1 / n (where n is a number of 2 or more) is generated. Each of the plurality of second output-side transistors is connected to a power supply line or a distribution current output terminal via a first switch circuit, and the first switch circuit outputs the predetermined data. 4. The organic EL drive circuit according to claim 3, which is turned on / off in response to the request. In an organic EL display device having an organic EL driving circuit that drives an organic EL panel with current through a terminal pin of the organic EL panel,
A first input-side transistor receiving a current flowing through the terminal pin or a base current thereof, and a plurality of first output-sides which are current mirror-connected to the first input-side transistor and provided for the terminal pin; A current distribution circuit having a transistor, and distributing the current received by generating a predetermined amount of mirror current to the first output-side transistor in correspondence with the terminal pin;
Current mirror connected to the first input-side transistor provided corresponding to the terminal pin or current mirror-connected to a second input-side transistor through which a current corresponding to a current flowing through the first input-side transistor flows. A plurality of current adjustment circuits having a plurality of second output transistors that generate a current to be added to the current to be distributed by operating a predetermined number according to predetermined data;
An organic EL display device comprising: a memory capable of externally writing data to each of the plurality of current adjustment circuits for transmitting the predetermined data. The memory is a shift register, and each of the first output transistors includes a plurality of transistors, at least one of which is connected to a power supply line or a distribution current output terminal via a first switch circuit. , Each of the plurality of second output-side transistors is current mirror-connected to the first input-side transistor, and connected to the power supply line or the ground line via a second switch circuit, respectively. 6. The organic EL display device according to claim 5, wherein the first and second switch circuits are turned on / off according to the predetermined data. A current mirror circuit for driving the first and second input transistors; the memory is a shift register; and the second output transistor is connected to an output current of the first output transistor. 7. The organic EL display device according to claim 6, wherein an output current of substantially 1 / n (where n is a number of 2 or more) is generated. Each of the first output-side transistors is one transistor, and each of the plurality of second output-side transistors is connected to a power supply line or a distribution current output terminal via a first switch circuit. The organic EL display device according to claim 7, wherein the first switch circuit is turned on / off in accordance with the predetermined data.

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