JP2004219189A - Electric characteristic evaluation device and electric characteristic evaluation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric characteristic evaluation device and an electric characteristic evaluation method capable of determining simply the electric characteristic of a transistor 1 to be measured by evaluating the surface electron state of the transistor 1 to be measured from a gate current-voltage characteristic. <P>SOLUTION: This electric characteristic evaluation device which is an electric characteristic evaluation device for evaluating the electric characteristic of the transistor 1 to be measured is equipped with a measuring device 2 for measuring the surface current of the transistor 1 to be measured, and a voltage application means connected to a gate electrode 8 in the transistor 1 to be measured and at least either of a source electrode 9 and a drain electrode 10 in the transistor 1 to be measured through the measuring device 2. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electrical property evaluation apparatus and an electrical property evaluation method, and more particularly, to an electrical property evaluation apparatus and an electrical property evaluation method for a semiconductor device by evaluating a surface electronic state density related to a surface state such as impurity attachment.
[0002]
[Prior art]
As a conventional technique for evaluating the electrical characteristics of a semiconductor element, for example, those described in JP-A-5-203697 and JP-A-7-221150 are exemplified.
[0003]
JP-A-5-203697 discloses a method for measuring and extracting the junction capacitance of a transistor. According to this, there is provided a method of extracting a junction capacitance parameter of a transistor from measurement data of a parameter of a substrate of the transistor through a multi-stage conversion or the like.
[0004]
Japanese Patent Application Laid-Open No. 7-221150 provides an evaluation device that includes an infrared light detecting unit that detects infrared light transmitted through or reflected by an insulating film and capable of capturing structural changes in the insulating film. ing.
[0005]
As a conventional method for evaluating the electrical characteristics of a semiconductor device using the gate current-voltage characteristics, there is, for example, a Statz Model described in Non-Patent Document 1 below. According to Non-Patent Document 1, the Statz Model skillfully expresses a state in which a gate current shifts from a square characteristic to a gate voltage to a linear characteristic, and accurately expresses a characteristic near a pinch-off of a field-effect transistor. .
[0006]
[Patent Document 1]
JP-A-5-203697
[Patent Document 2]
JP-A-7-221150
[Non-patent document 1]
Yasuyuki Ito, Naoki Takagi, "Basics and Application of MMIC Technology" Realize, 1996, p. 64
[0009]
[Problems to be solved by the invention]
For example, when a gate electrode of a GaAs heterojunction field effect transistor is formed, an etching process is generally performed by patterning with a photoresist so that an etching region for forming a recess is exposed. Further, a series of steps of depositing a metal to be a gate electrode using the resist as a mask, removing an excess metal film together with the resist, and forming a protective film to protect the surface without the electrode are performed. I have.
[0010]
In performing the above-described steps, the surface electronic state of the recess may change depending on, for example, a chemical or a process gas used. This change results in a change in the electrical characteristics of the semiconductor element.
[0011]
However, as described above, in the conventional method for evaluating the electrical characteristics of a semiconductor device, there is no means for measuring the surface electronic state, and the surface state of the manufactured semiconductor element is measured and evaluated. Can not.
[0012]
The present invention has been made in view of such circumstances, and an object of the present invention is to easily determine the electrical characteristics of a semiconductor device by evaluating the surface electronic state of the semiconductor device from the gate current-voltage characteristics. It is an object of the present invention to provide an electrical characteristic evaluation device and an electrical characteristic evaluation method that can perform the following.
[0013]
[Means for Solving the Problems]
The electrical property evaluation device according to the present invention is an electrical property evaluation device that evaluates the electrical characteristics of the semiconductor element, a measurement device that measures the surface current of the semiconductor device, and a gate electrode in the semiconductor device via the measurement device And a voltage applying means connected to at least one of a source electrode and a drain electrode in the semiconductor element.
[0014]
An electrical property evaluation method according to the present invention is an electrical property evaluation method for evaluating an electrical property of a semiconductor element, wherein a voltage is applied to a gate electrode of the semiconductor element, and a current flowing on a surface of the semiconductor element is measured by the voltage. And evaluating the surface state of the semiconductor element based on the current measurement result.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of an electric characteristic evaluation device and an electric characteristic evaluation method according to the present invention will be described with reference to FIGS.
[0016]
A structure of a GaAs heterojunction field effect transistor as an example of the transistor under measurement 1 in the present embodiment will be described with reference to FIG.
[0017]
In the transistor 1, an n-type GaAs channel layer 14 is formed on a semi-insulating GaAs substrate 16 via a GaAs buffer layer 15. On the channel layer 14, an AlGaAs electron supply layer 12 doped with an n-type impurity and an AlGaAs Schottky layer 11 doped with a non-doped or very low-concentration impurity are formed via an AlGaAs spacer layer 13. . On the AlGaAs Schottky layer 11, two ohmic junctions at a contact portion with the source electrode 9 and the drain electrode 10 and one Schottky junction at a contact portion with the gate electrode 8 are formed.
[0018]
By using the AlGaAs spacer layer 13, the AlGaAs electron supply layer 12, and the AlGaAs Schottky layer 11 for the GaAs channel layer 14, free electrons are diffused from the AlGaAs layer to the GaAs layer due to the high band gap between AlGaAs and GaAs. Electrons exist only on the GaAs side of the junction surface, and a two-dimensional electron gas layer is formed on the GaAs channel layer 14. Since there is no donor impurity in the two-dimensional electron gas layer, high mobility can be obtained.
[0019]
In the field-effect transistor having the above configuration, a region having no electrode is formed between the gate electrode 8 and the source electrode 9 and the drain electrode 10. In this region, a surface depletion layer is generated by surface charges. If the surface depletion layer is large, the path through which the current flows becomes narrow, causing an increase in parasitic resistance and a decrease in the current. In order to avoid this, a recess 7 is usually dug by etching, and a gate electrode 8 is formed there.
[0020]
In the process of forming the recess 7 and forming the gate electrode 8, the surface of the semiconductor element is exposed to the process environment, so that the surface electronic state changes due to the contamination of the process environment and impurities contained in the used chemicals, and Properties may change. Further, as the miniaturization for improving the performance of the semiconductor device progresses, the surface electronic state becomes one of the factors that greatly influence the electrical characteristics of the semiconductor device.
[0021]
A method for evaluating electric characteristics in the present embodiment, focusing on the change in the surface electronic state of the semiconductor element as described above, will be described below. FIG. 2 is a block diagram of the electrical characteristic evaluation device according to the present embodiment.
[0022]
The electrical characteristic evaluation device in the present embodiment is an electrical characteristic evaluation device that evaluates the electrical characteristics of the transistor under measurement 1, and a measurement device 2 that measures the surface current of the transistor 1 to be measured, and And a controller 3 as a voltage application means connected to the gate electrode of the transistor under measurement 1 and at least one of the source electrode and the drain electrode of the transistor under measurement 1.
[0023]
Here, the measuring device 2 and the gate electrode 8 are connected via the first path 4, and the measuring device 2 is connected to the source electrode 9 and the drain electrode 10 via the second path 5.
[0024]
Further, it is preferable that the above-described electrical characteristic evaluation device further includes an arithmetic processing device 6, and the arithmetic processing device 6 has a function of decomposing the measurement result of the surface current into an exponential function component and a linear component described later.
[0025]
As shown in FIG. 3, a voltage is applied to the gate electrode 8 by voltage applying means (the controller 3 in FIG. 2) connected via the measuring device 2, and the gate electrode 8 on the transistor 1 to be measured and the source The current flowing between the electrode 9 and the drain electrode 10 is measured using the measuring device 2 which can measure a current value of at least about 10 ⁻¹⁰ A to about 10 ⁻⁹ A. FIG. 3 shows a case where the source electrode 9 and the drain electrode 10 are short-circuited and set to the ground potential, but it is also possible to use only one of the source electrode 9 and the drain electrode 10 for measurement. Good. Further, the above-described measurement may be performed in a state of the wafer before being divided into the transistors under measurement 1 as individual devices, similarly to FIG.
[0026]
Next, a procedure for evaluating electrical characteristics according to the present embodiment will be described.
The method for evaluating electric characteristics according to the present embodiment includes a step of applying a voltage to the gate electrode 8 of the transistor under test 1, a step of measuring a current flowing through the surface of the recess 7 of the transistor 1 under test by the voltage, and a step of measuring the current. Evaluating the surface condition of the recess 7 of the transistor under measurement 1 based on the measurement result.
[0027]
For example, a predetermined voltage is applied to the gate electrode 8, and the current flowing through the surface of the recess 7 is measured by the measuring device 2. FIG. 4 is an example of a current-voltage characteristic obtained by measuring a current flowing through the surface of the transistor under measurement 1 when a voltage is applied to the gate electrode 8 as described above. Then, a measurement result of a change in a current flowing on the surface of the recess 7 between the gate electrode 8 and the drain electrode 10 when the gate voltage is changed from +0.3 V to −0.3 V is shown.
[0028]
Next, the following processing is performed on the results shown in FIG. 4, and the surface state of the recess 7 of the transistor under measurement 1 is evaluated based on the processing results. In FIG. 5, a fitting curve 23 (solid line) of the actually measured value 26 (solid circle) of the current-voltage characteristic shown in FIG. 4 is converted into an exponential function component 24 (dash-dot line) and a linear component 25 (dashed line) by the least squares fitting method. Fig. 2 shows a state of disassembly.
[0029]
When the gate voltage is on the positive side (forward bias side), the exponential function component 24 (surface current component) is dominant in the fitting curve 23, and the current value increases with the increase in the voltage applied to the gate electrode 8. Increases exponentially. The exponential function component 24 (surface current component) is a current component of interest in evaluating the electrical characteristics of the semiconductor device according to the present embodiment. The component is closely related to the surface electronic state of the semiconductor device according to the principle described later.
[0030]
On the other hand, when the gate voltage is on the negative side (reverse bias side), the linear component 25 (surface leakage current component) becomes dominant in the fitting curve 23, and the current value is substantially proportional to the voltage applied to the gate electrode 8. It is in. The linear component 25 (surface leak current component) is a component that is unintentionally leaked regardless of the surface state of the semiconductor element. Since the component is proportional to the voltage applied to the gate electrode 8 regardless of the direction of the bias, the gate voltage is also included in the fitting curve 23 on the plus side.
[0031]
In the present embodiment, since the exponential function component 24 is very large with respect to the linear component 25, if they are obtained at the same time, there is a possibility that the resolution accuracy may be reduced. Therefore, a method is employed in which the linear component 25 is experimentally determined and its inclination is fixed, and then the exponential function component 24 is determined by curve fitting.
[0032]
By extracting only the exponential function component 24 shown in FIG. 5 using such a numerical calculation process, it is possible to more accurately compare the amount of change of the surface current component, and to grasp the surface state more precisely. Can be.
[0033]
Next, the principle of the electrical characteristic evaluation in the present embodiment will be described.
6 and 7 show the band structure as viewed in the direction perpendicular to the surface of the recess 7. 6 shows a case where the state density (surface state density) of the surface states 17 is large, and FIG. 7 shows a case where the surface state density is small. Since electrons are adsorbed on the surface level 17 existing on the surface of the recess 7, the conduction band 18 near the surface of the recess 7 is larger than the lower layer. Here, the Fermi level 22 is determined at a position where the amount of negative charges adsorbed on the surface level 17 and the amount of positive charges of the ionized donor inside the transistor under measurement 1 balance.
[0034]
As shown in FIGS. 6 and 7, the Fermi level 22 shifts depending on the density of states of the surface states 17. That is, when the surface state density is low (FIG. 7), the band bending amount is small because the Fermi level 22 approaches the conduction band 18 as compared with the case where the surface state density is high (FIG. 6).
[0035]
FIG. 8 shows a band structure when the vicinity of the surface of the recess 7 is viewed in the horizontal direction. As shown in FIG. 8, in the band structure 20 (small surface state density) indicated by the broken line, the barrier height from the electrons on the surface of the recess 7 to the gate electrode 8 is smaller than the band structure 19 (high surface state density) indicated by the solid line. . Therefore, when the state density of the surface level 17 is small, that is, when the adhesion of impurities on the surface of the recess 7 is small, the exponential function component 24 (surface current component) of the current due to the voltage applied to the gate electrode 8 increases.
[0036]
If the voltage applied to the gate electrode 8 is near zero bias, the value of the current flowing between the gate electrode 8 and the drain electrode 10 becomes smaller, so that the change in the surface state density is larger than the current value. Affect. Therefore, the surface state density can be more accurately evaluated. In addition, since the measuring device 2 in the present embodiment can detect a current of at least about 10 ⁻¹⁰ A to 10 ⁻⁹ A, it is possible to accurately measure the above minute current.
[0037]
Here, the step of measuring the current is preferably performed at room temperature (for example, about 20 ° C. to 30 ° C.) minus 50 ° C. or more and about room temperature or less. At low temperatures, the probability of re-excitation of the electrons adsorbed by the surface states 17 is reduced, so that the occupancy of the surface states 17 is relatively increased as compared with the case at room temperature. Therefore, as shown in FIG. 9, when the vicinity of the surface of the recess 7 is viewed in the horizontal direction, the band structure 21 (low temperature) indicated by the solid line is smaller than the band structure 20 (room temperature) indicated by the broken line. The barrier height from the electrons on the surface to the gate electrode 8 increases. When a voltage is applied to the gate electrode 8 in this state, the exponential function component 24 reacts to a smaller change in the surface state density, so that a finer change in the surface state is detected than when the change is performed at room temperature. be able to. On the other hand, when the temperature decreases from room temperature by about 50 ° C., the carrier concentration decreases from about 1/100 to about 1/1000, and the current value decreases in proportion thereto. The lower limit is about room temperature minus 50 ° C.
[0038]
An example of an evaluation result of the electrical characteristics by the evaluation device and the evaluation method having the above configuration will be described below.
[0039]
FIG. 10 shows that the voltage of 0.1 V is applied to the gate electrode 8 of the transistor under measurement 1 shown in FIG. 1 and the exponential function component 24 (surface current component) of each transistor under measurement 1 is calculated by the above configuration. However, these are classified into non-defective devices and defective devices with respect to the standard value of the high frequency characteristics.
[0040]
As shown in FIG. 10, the defective element has a smaller surface current component. This indicates that, in the defective element, the surface current component decreased due to an increase in the surface state density. By measuring the surface current component, the surface state of the semiconductor element was grasped, and the electric current of the element was measured. It can be seen that the characteristics can be evaluated. Further, the above results can be fed back to process control such as a clean room environment and chemical purity at the time of manufacturing a semiconductor device.
[0041]
As described above, the embodiments of the present invention have been described. However, the embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
[0042]
【The invention's effect】
According to the present invention, since the surface electronic state of a semiconductor device can be evaluated from the gate current-voltage characteristics, an electric characteristic evaluation device and an electric characteristic evaluation method capable of easily determining the electric characteristics of the semiconductor device Can be provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor element that can be evaluated by an electric property evaluation device and an electric property evaluation method according to one embodiment of the present invention.
FIG. 2 is a block diagram of an electrical characteristic evaluation device according to one embodiment of the present invention.
FIG. 3 is a diagram showing a state in which the electrical characteristic evaluation device according to one embodiment of the present invention is connected to a semiconductor element.
FIG. 4 is a diagram showing a measurement result of a gate current-gate voltage characteristic of a semiconductor element by an electric characteristic evaluation device and an electric characteristic evaluation method according to one embodiment of the present invention.
FIG. 5 is a diagram showing a result of a numerical calculation process of a gate current-gate voltage characteristic of a semiconductor element by an electric characteristic evaluation device and an electric characteristic evaluation method according to one embodiment of the present invention.
FIG. 6 is a band structure diagram in a direction perpendicular to the surface of the semiconductor element (when the surface state density is large).
FIG. 7 is a band structure diagram in a direction perpendicular to the surface of the semiconductor element (when the surface state density is small).
FIG. 8 is a band structure diagram in a direction parallel to the surface of the semiconductor element (comparison based on surface state density).
FIG. 9 is a band structure diagram (comparison by temperature) in a direction parallel to the surface of the semiconductor element.
FIG. 10 is a diagram showing evaluation results of electrical characteristics of a semiconductor element by an electrical characteristic evaluation device and an electrical characteristic evaluation method according to one embodiment of the present invention.
[Explanation of symbols]
Reference Signs List 1 transistor to be measured, 2 measuring device, 3 controller, 4 first path, 5 second path, 6 arithmetic processing unit, 7 recess, 8 gate electrode, 9 source electrode, 10 drain electrode, 11 AlGaAs Schottky layer, 12 AlGaAs electron supply layer, 13 AlGaAs spacer layer, 14 GaAs channel layer, 15 GaAs buffer layer, 16 GaAs substrate, 17 surface level, 18 conduction band (vertical direction), 19 band structure (large surface state density), 20 band Structure (small surface state density / room temperature), 21 band structure (low temperature), 22 Fermi level, 23 fitting curve, 24 exponential function component (surface current component), 25 linear component (surface leak current component), 26 measured values.

Claims (5)

An electrical property evaluation device for evaluating electrical properties of a semiconductor element,
A measuring device for measuring a surface current of the semiconductor element,
An electrical characteristic evaluation device, comprising: a voltage application unit connected to a gate electrode of the semiconductor device and at least one of a source electrode and a drain electrode of the semiconductor device via the measurement device. The electrical characteristic evaluation device further includes an arithmetic device,
The measuring device can detect a small current of at least 10 ⁻¹⁰ A to 10 ⁻⁹ A,
The electrical characteristic evaluation device according to claim 1, wherein the arithmetic device decomposes the measurement result of the minute current into an exponential function component and a linear component. An electrical property evaluation method for evaluating electrical properties of a semiconductor element,
Applying a voltage to the gate electrode of the semiconductor element,
Measuring a current flowing through the surface of the semiconductor element by the voltage;
Evaluating the surface condition of the semiconductor element based on the measurement result of the current. 4. The method according to claim 3, further comprising a step of decomposing the measurement result of the current into an exponential function component and a linear component. The method for evaluating electrical characteristics according to claim 3, wherein the step of measuring the current is performed at a temperature of room temperature minus 50 ° C. or more and room temperature or less.

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