JP2004214691A - Electro-optic device and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance light-shielding performance to the incident light and return light in a channel area and a channel neighboring area of a TFT in a pixel section using a comparatively simple constitution in an electro-optic device. <P>SOLUTION: An electro-optic device is provided in a lower layer through a layer insulation film 12 than the semiconductor layer 1a which constitutes a thin film transistor. The device is provided with a light-shielding film 11a covering at least the channel area of the semiconductor layer, and channel area enclosure sections 6a, 6b enclosing at least from an upper portion to laterals of the channel area. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention belongs to the technical field of an electro-optical device of an active matrix driving system driven by a thin film transistor (hereinafter, appropriately referred to as a TFT (Thin Film Transistor)) and a method of manufacturing the same, and in particular, a lower side of a TFT used for a projector or the like. And a method of manufacturing the same.

  Conventionally, when this type of electro-optical device is used as a light valve in a projector or the like, generally, projection light is incident from the side of a counter substrate that is disposed to face the TFT array substrate with the electro-optical material layer interposed therebetween. Here, when the projection light is incident on a channel region of a semiconductor layer formed of an a-Si (amorphous silicon) film, a p-Si (polysilicon) film, or the like of a TFT in a pixel portion, a photocurrent is generated by a photoelectric conversion effect in this channel region. Occurs, and the transistor characteristics of the TFT deteriorate. For this reason, a light shielding film called a black matrix or a black mask is generally formed from a metal material such as Cr (chromium) or resin black on the opposite substrate at a position facing each TFT. The light-shielding film defines an opening area of each pixel (that is, an area through which projected light is transmitted in the image display area), and thus, in addition to shielding light from the semiconductor layer of the TFT, improves the contrast and prevents color mixture of color materials. And so on.

  In this type of electro-optical device, a positive staggered or coplanar a-Si or p-Si TFT having a top gate structure (i.e., a structure in which a gate electrode is provided above a channel on a TFT array substrate) is used. When used, it is necessary to prevent a part of the projection light from entering the TFT channel region from the TFT array substrate side as return light by the projection optical system in the electro-optical material projector. Similarly, when the projection light is reflected from the surface of the TFT array substrate when the projection light passes, or when the projection optical system is emitted from another electro-optical device when a plurality of electro-optical devices are used in combination for color, the projection optical system is changed. It is also necessary to prevent a part of the projected light that penetrates from entering the TFT channel region from the TFT array substrate side as return light. For this reason, Japanese Patent Application Laid-Open Nos. 9-127497, 3-52611, 3-125123, 8-171101, and the like disclose TFTs on a TFT array substrate formed of a quartz substrate or the like. An electro-optical device has been proposed in which a light-shielding film (hereinafter, appropriately referred to as a “first light-shielding film”) is formed of an opaque high-melting point metal, for example, also at a position opposite to (ie, below the TFT).

  Further, in this type of electro-optical device, in addition to the above-described light-shielding film on the opposing substrate (hereinafter appropriately referred to as “second light-shielding film”), a light-shielding metal thin film such as an Al (aluminum) film is usually used. The data line is arranged above the channel region of the TFT via the interlayer insulating film, so that the channel region of the TFT is more reliably shielded from high-intensity light projected from the opposite substrate side. Like that.

  As described above, according to the conventional electro-optical device, the light from the counter substrate is shielded from the channel region of the TFT by the second light shielding film and the light shielding data line formed on the opposite substrate. The return light from the TFT array substrate side is shielded from light by the first light-shielding film formed below the TFT, so that the channel region of the TFT is shielded. Of the transistor characteristics is reduced.

  However, according to the conventional electro-optical device in which the first and second light-shielding films and the light-shielding data lines are provided above and below the channel region of the TFT as described above, when the incident light is perpendicularly incident on the substrate, Although there is no problem, when the incident light is obliquely incident on the substrate, it passes through the electro-optical material layer once and is reflected on the upper surface (the surface facing the TFT side) of the first light shielding film on the TFT array substrate side. , May be incident on the channel region of the TFT. In addition, the light once reflected on the upper surface of the first light-shielding film is usually formed on the lower surface (the surface facing the TFT side) of the data line made of a material having a high reflectance such as Al or the second light-shielding film on the counter substrate. In some cases, the light is reflected again on the lower surface of the TFT and enters the channel region of the TFT. Further, the light once reflected on the upper surface of the first light-shielding film causes multiple reflections between the data line or the lower surface of the second light-shielding film and the upper surface of the first light-shielding film, and finally enters the channel region of the TFT. In some cases. In any of these cases (especially when the light intensity of the incident light is extremely high, such as in an electro-optical device for a projector), after the light is obliquely incident from the side of the data line covering the channel region of the TFT from above. There is a problem that light leakage occurs in the TFT due to the projection light or the like reflected on the upper surface of the first light-shielding film, and the characteristics of the TFT deteriorate. In particular, in order to efficiently perform light shielding in the TFT, the channel region is generally located near the center of the range where light is shielded by the first light shielding film below the TFT, or is shielded by the second light shielding film of the counter substrate. Although arranged near the center of the range, the semiconductor layer in a region adjacent to the channel region (hereinafter, appropriately referred to as “channel adjacent region”) due to such an arrangement is located at the edge of the range shielded by the light shielding film. Located near. Therefore, the projection light and the return light obliquely incident are likely to be incident on the adjacent region of the channel and cause light leakage in the semiconductor layer. In addition, in the case of the TFT adopting the LDD structure, the channel adjacent region includes the LDD region, and therefore, light enters not the channel region but the LDD region having a relatively large photoelectric conversion effect. As a result, there is also a problem that the characteristic deterioration of the TFT appears remarkably.

  On the other hand, the intensity of the return light from the back surface is lower than that of the incident light, but the return light is also reflected by the data line and the lower surface of the second light-shielding film and is incident on the channel region of the TFT. Further, the light may be reflected on the upper surface of the first light-shielding film and may enter the TFT channel region by multiple reflection. Therefore, also in these cases, the return light reflected by the data line or the lower surface of the second light-shielding film after being obliquely incident from the side of the first light-shielding film that covers the channel region of the TFT from below, and the like. There is a problem that light leakage occurs and TFT characteristics are degraded.

  In order to solve these problems, for example, even if the size of the second light-shielding film on the opposing substrate is increased and the incident light is slightly obliquely incident, the area where the first light-shielding film and the data lines are formed is formed. Although it is technically possible to design so that it does not reach, the pixel aperture ratio is significantly reduced in this case, so there is a general demand to increase the pixel aperture ratio and realize bright and high-quality image display. Fundamentally contrary to.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems. In a TFT active matrix driving type electro-optical device, a relatively simple structure is used to prevent incident light and return light in a TFT channel region and a channel adjacent region. An object of the present invention is to provide an electro-optical device capable of improving light-shielding performance and displaying a high-quality image, and a method for manufacturing the same.

  In order to solve the above-described problems, an electro-optical device according to the present invention includes an electro-optical material sandwiched between a pair of first and second substrates, and a plurality of pixels arranged in a matrix on the first substrate. An electrode, a plurality of thin film transistors respectively driving the plurality of pixel electrodes, and a light-shielding film provided below the semiconductor layer forming the plurality of thin film transistors with an interlayer insulating film interposed therebetween and covering at least a channel region of the semiconductor layer. And a channel region surrounding portion surrounding at least the channel region of the semiconductor layer from above to the side.

According to the electro-optical device of the present invention, the light shielding film is provided at a position covering at least the channel region of the plurality of thin film transistors. Therefore, the channel region of the thin film transistor is shielded from the return light and the like incident from the side of the first substrate by the light shielding film, so that the characteristic deterioration due to the return light and the like of the thin film transistor can be prevented. Further, the projection light and the like obliquely incident on the first substrate are shielded by the channel surrounding portion.
For this reason, it is possible to prevent deterioration of characteristics due to not only the projection light vertically incident on the first substrate of the thin film transistor but also the projection light obliquely incident.

Thus, light is shielded by three-dimensionally surrounding the channel region and the channel adjacent region of the thin film transistor. As a result, in the thin film transistor, deterioration of transistor characteristics due to generation of a photocurrent due to the projection light, the return light, or the like is almost independent of the incident angle of the projection light or the return light, the reflection angle in the electro-optical device, or the like. Is reduced.
In the electro-optical device according to the aspect of the invention, it is preferable that the channel region surrounding portion surrounds both sides of the channel region.

  In the electro-optical device according to the aspect of the invention, an opening may be provided in the interlayer insulating film below the semiconductor layer, and the channel region surrounding portion may be provided in the opening of the interlayer insulating film.

  Further, in the electro-optical device according to the present invention, it is preferable that an upper portion of the channel region surrounding portion extends in a direction in which the semiconductor layer extends.

  The operation and other advantages of the present invention will become more apparent from the embodiments explained below.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First Embodiment of Electro-Optical Device)
The first embodiment of the electro-optical device according to the present invention will be described with reference to FIGS. FIG. 1 is an equivalent circuit of various elements, wiring, and the like in a plurality of pixels formed in a matrix forming an image display area of the electro-optical device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, etc. are formed, and FIG. FIG. 4 is a sectional view taken along line AA ′ of FIG. FIG. 5 is an enlarged perspective view showing the data lines and the semiconductor layers of the electro-optical device shown in FIGS. 2 to 4 partially extracted. FIG. 6 is a schematic cross-sectional view showing a state where oblique incident light is reflected and enters a channel region of a TFT in a comparative example. FIG. 7 is a cross-sectional view corresponding to the AA ′ cross section of FIG. 2 in a modified embodiment. In FIGS. 3, 4, 6, and 7, the scale of each layer and each member is different for each layer and each member so as to be recognizable in the drawings.

  In FIG. 1, a plurality of pixels formed in a matrix forming an image display area of the electro-optical device according to the present embodiment include a plurality of TFTs 30 for controlling the pixel electrodes 9a formed in a matrix, and image signals are formed. Is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6a for each group. good. Also, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulsed manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and by closing the switch of the TFT 30 as a switching element for a certain period, the image signals S1, S2,... Write at a predetermined timing. The image signals S1, S2,..., Sn of a predetermined level written in the electro-optical material via the pixel electrodes 9a are held for a certain period of time with a counter electrode (described later) formed on a counter substrate (described later). Is done. The electro-optic material modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gray scale display. In the normally white mode, the incident light cannot pass through the electro-optical material portion according to the applied voltage. In the normally black mode, the incident light does not pass through the electro-optical material according to the applied voltage. Light having a contrast corresponding to an image signal is emitted from the electro-optical device as a whole, which can pass through the optical material portion. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with the electro-optical material capacitor formed between the pixel electrode 9a and the counter electrode. For example, the voltage of the pixel electrode 9a is held by the storage capacitor 70 for a time that is three orders of magnitude longer than the time during which the source voltage is applied. Thereby, the holding characteristics are further improved, and an electro-optical device having a high contrast ratio can be realized.

  2, a plurality of transparent pixel electrodes 9a (indicated by dotted lines 9a ') are provided in a matrix on a TFT array substrate of the electro-optical device. A data line 6a, a scanning line 3a, and a capacitance line 3b are provided along each of the boundaries. The data line 6a is electrically connected to a later-described source region of the semiconductor layer 1a made of a polysilicon film or the like via the contact hole 5, and the pixel electrode 9a is connected to the source layer of the semiconductor layer 1a via the contact hole 8. It is electrically connected to a drain region described later. Further, the scanning line 3a is arranged so as to face the channel region 1a '(the obliquely downward-sloping region in the figure) of the semiconductor layer 1a, and the scanning line 3a functions as a gate electrode. As described above, at the intersections of the scanning lines 3a and the data lines 6a, TFTs in which the scanning lines 3a are opposed to each other as gate electrodes in the channel region 1a '(that is, the TFTs 30 shown in FIG. 1) are provided. ing.

  The capacitance line 3b has a main line portion extending substantially linearly along the scanning line 3a, and a protruding portion protruding forward (upward in the drawing) along the data line 6a from a location intersecting the data line 6a. .

  Further, a first light-shielding film 11a is provided in a region shown by oblique lines rising to the right in the figure so as to pass below the scanning line 3a and the TFT, respectively. More specifically, in FIG. 2, each of the first light-shielding films 11a is formed in a stripe shape along the scanning line 3a, and a portion that intersects with the data line 6a is formed to be wide vertically. The wide portion is provided at a position to cover the channel region 1a ′ of each TFT and the channel adjacent region 1a ″ adjacent to the channel region as viewed from the TFT array substrate side.

  In the present embodiment, in particular, in FIG. 2, a groove is formed in an interlayer insulating film, which will be described later, in a black-painted rectangular region located on both sides of the channel adjacent region 1a ″ near the contact hole 5, and is formed in the groove. A side light-shielding portion 6b extending from the edge of the main wiring portion of the data line 6a toward the paper surface in Fig. 2 is provided, that is, the channel adjacent region 1a "on the side close to the contact hole 5 in Fig. 2 is provided. It is surrounded from the left and right by the side light shielding portion 6b, and the light from the left and right is shielded. The configuration relating to the side light shielding portion 6b will be described later in detail with reference to FIGS.

Next, as shown in the cross-sectional view of FIG. 3, the electro-optical device includes a TFT array substrate 10 that forms an example of one transparent substrate, and an opposing structure that forms an example of the other transparent substrate that is disposed to face the substrate. And a substrate 20. The TFT array substrate 10 is made of, for example, a quartz substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate. The pixel electrode 9a is provided on the TFT array substrate 10, and an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided above the pixel electrode 9a. The pixel electrode 9a is made of, for example, a transparent conductive thin film such as an ITO film (Indium Tin Oxide film).
The alignment film 16 is made of, for example, an organic thin film such as a polyimide thin film.

  On the other hand, a counter electrode (common electrode) 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode (common electrode) 21. ing. The counter electrode 21 is made of, for example, a transparent conductive thin film such as an ITO film. The alignment film 22 is made of an organic thin film such as a polyimide thin film.

  The TFT array substrate 10 is provided with a pixel switching TFT 30 for controlling the switching of each pixel electrode 9a at a position adjacent to each pixel electrode 9a.

  As shown in FIG. 3, the opposing substrate 20 is further provided with a second light-shielding film 23 called a black mask or a black matrix in a region other than the opening region of each pixel. Therefore, incident light does not enter the channel region 1a 'or the LDD regions 1b and 1c of the semiconductor layer 1a of the pixel switching TFT 30 from the side of the counter substrate 20. Further, the second light-shielding film 23 has functions such as improvement of contrast and prevention of color mixture of coloring materials. The LDD regions 1b and 1c are included in the channel adjacent region 1a ″ shown in FIG.

  A sealing material (see FIGS. 14 and 15) described later surrounds the space between the TFT array substrate 10 and the opposing substrate 20, which are configured as described above and are arranged so that the pixel electrode 9a and the opposing electrode 21 face each other. The electro-optical material is sealed in the space defined, and the electro-optical material layer 50 is formed. The electro-optical material layer 50 assumes a predetermined alignment state by the alignment films 16 and 22 in a state where no electric field is applied from the pixel electrode 9a. The electro-optic material layer 50 is made of, for example, an electro-optic material obtained by mixing one or several kinds of nematic electro-optic materials. The sealing material is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the two substrates 10 and 20 around them, and a glass for setting a distance between the two substrates to a predetermined value. Spacers such as fibers or glass beads are mixed.

  Further, as shown in FIG. 3, a first light shielding film 11a is provided between the TFT array substrate 10 and each pixel switching TFT 30 at a position facing each of the pixel switching TFTs 30. The first light-shielding film 11a is preferably made of a simple metal, an alloy, a metal silicide, or the like including at least one of Ti, Cr, W, Ta, Mo, and Pd, which are preferably opaque refractory metals. With such a material, the first light-shielding film 11a is not broken or melted by the high-temperature treatment in the step of forming the pixel switching TFT 30 performed after the step of forming the first light-shielding film 11a on the TFT array substrate 10. I can do it. Since the first light-shielding film 11a is formed, it is possible to prevent a situation in which return light or the like from the TFT array substrate 10 enters the channel region 1a 'or the LDD regions 1b and 1c of the pixel switching TFT 30 beforehand. The characteristics of the pixel switching TFT 30 are not degraded due to the generation of a photocurrent due to this.

  Further, a first interlayer insulating film 12 is provided between the first light-shielding film 11a and the plurality of pixel switching TFTs 30. The first interlayer insulating film 12 is provided to electrically insulate the semiconductor layer 1a constituting the pixel switching TFT 30 from the first light shielding film 11a. Further, since the first interlayer insulating film 12 is formed on the entire surface of the TFT array substrate 10, it also has a function as a base film for the pixel switching TFT 30. That is, it has a function of preventing deterioration of the characteristics of the pixel switching TFT 30 due to roughening of the surface of the TFT array substrate 10 during polishing, dirt remaining after cleaning, and the like. The first interlayer insulating film 12 is made of a highly insulating glass such as NSG (non-doped silicate glass), PSG (phosphosilicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), or a silicon oxide film. , A silicon nitride film or the like. The first interlayer insulating film 12 can prevent the first light-shielding film 11a from contaminating the pixel switching TFT 30 and the like.

  In the present embodiment, the gate insulating film 2 is extended from a position facing the scanning line 3a to be used as a dielectric film, the semiconductor film 1a is extended to form a first storage capacitor electrode 1f, and further, a capacitor opposed to these is formed. The storage capacitor 70 is configured by using a part of the line 3b as the second storage capacitor electrode. More specifically, a high-concentration drain region 1e of the semiconductor layer 1a extends below the data line 6a and the scanning line 3a, and an insulating film is formed on a portion of the capacitance line 3b extending along the data line 6a and the scanning line 3a. The first storage capacitor electrode (semiconductor layer) 1f is disposed so as to be opposed to each other with the first storage capacitor electrode 2 therebetween. In particular, since the insulating film 2 as a dielectric of the storage capacitor 70 is nothing but the gate insulating film 2 of the TFT 30 formed on the polysilicon film by high-temperature oxidation, it can be a thin and high withstand voltage insulating film. The capacitor 70 can be configured as a large-capacity storage capacitor with a relatively small area.

  As a result, a space outside the opening area, that is, the area below the data line 6a and the area where the electro-optical material disclination occurs along the scanning line 3a (that is, the area where the capacitance line 3b is formed) is effectively used. Thus, the storage capacitance of the pixel electrode 9a can be increased.

  In FIG. 3, a pixel switching TFT 30 has an LDD structure, and includes a scanning line 3a, a channel region 1a 'of a semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, a scanning line 3a and a semiconductor layer. 1a, a gate insulating film 2, a data line 6a, a low-concentration source region (source-side LDD region) 1b and a low-concentration drain region (drain-side LDD region) 1c of the semiconductor layer 1a, and a high-concentration source region of the semiconductor layer 1a. 1d and a high concentration drain region 1e. A corresponding one of the plurality of pixel electrodes 9a is connected to the high-concentration drain region 1e. As described later, the source regions 1b and 1d and the drain regions 1c and 1e are provided with a predetermined concentration of n-type or p-type dopants for the semiconductor layer 1a depending on whether an n-type or p-type channel is formed. It is formed by doping. An n-type channel TFT has the advantage of a high operating speed, and is often used as a pixel switching TFT 30 that is a pixel switching element. In this embodiment, in particular, the data line 6a is formed of a light-shielding thin film such as a low-resistance metal film such as Al or an alloy film such as metal silicide. On the scanning line 3a, the gate insulating film 2, and the first interlayer insulating film 12, a contact hole 5 communicating with the high-concentration source region 1d and a contact hole 8 communicating with the high-concentration drain region 1e are formed. An interlayer insulating film 4 is formed. Data line 6a is electrically connected to high-concentration source region 1d via contact hole 5 to source region 1b. Further, on the data line 6a and the second interlayer insulating film 4, a third interlayer insulating film 7 having a contact hole 8 to the high-concentration drain region 1e is formed. The pixel electrode 9a is electrically connected to the high-concentration drain region 1e via the contact hole 8 to the high-concentration drain region 1e. The above-mentioned pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 7 configured as described above. The pixel electrode 9a and the high-concentration drain region 1e may be electrically connected to each other by relaying the same Al film as the data line 6a or the same polysilicon film as the scanning line 3b.

  The pixel switching TFT 30 preferably has the LDD structure as described above, but may have an offset structure in which impurity ions are not implanted in the low-concentration source region 1b and the low-concentration drain region 1c, or use the gate electrode 3a as a mask. A self-aligned TFT in which impurity ions are implanted at a high concentration and high-concentration source and drain regions are formed in a self-aligned manner may be used.

  Further, in this embodiment, the single gate structure in which only one gate electrode 3a of the pixel switching TFT 30 is disposed between the high-concentration source region 1d and the high-concentration drain region 1e has been described. May be arranged. At this time, the same signal is applied to each gate electrode. When a TFT is formed with a dual gate or a triple gate or more as described above, a leak current at a junction between a channel and a source-drain region can be prevented, and a current in an off state can be reduced. If at least one of these gate electrodes has an LDD structure or an offset structure, the off-state current can be further reduced, and a stable switching element can be obtained.

  Next, as shown in FIG. 4, in the present embodiment, the channel adjacent region 1a ″ on the side closer to the contact hole 5 among the two channel adjacent regions 1a ″ located above and below the channel region 1a ′ in FIG. The lower portion of the channel adjacent region 1a ") including the source side LDD region 1b in FIG. 3 is shielded from light by the light shielding film 11a, and the upper portion of the main line of the data line 6a is provided as shown in FIGS. In particular, as shown in Fig. 4, the first interlayer insulating film 12 and the second interlayer insulating film 4 have edges of the main wiring portion of the data line 6a at a position facing the channel adjacent region 11a ". A groove is formed at a position opposing to the data line 6a, a side light shielding portion 6b of the data line 6a extends from the edge of the main wiring portion toward the groove, and the channel adjacent region 11a ″ is partially formed from the groove side. I will surround you It is configured.

  As described above, since the side of the channel adjacent region 1a "is surrounded by the side light shielding portion 6b, the side of the channel adjacent region 1a" is shielded from light. As shown in FIG. 5, the data line portion 6c extending inside the contact hole 5 also has a function of shielding the channel adjacent region 1a ″ from the side opposite to the channel region 1a ′. The channel adjacent region 1a ″ near the hole 5 is light-shielded from three directions by these two side light-shielding portions 6b and one data line portion 6c. Further, on the side of the channel adjacent region 1a ″ on the same side as the channel region 1a ′, there is no side light shielding portion or data line portion in the contact hole, but this side (upper in FIG. 2) Since the light is largely covered by the second light-shielding film 23 shown in FIG. 3 and the incident light obliquely incident is originally small, a portion for shielding the light is not practically formed on the data line 6a. There are few or no problems.

  As described above, according to the electro-optical device of the present embodiment, the main wiring portion and the side light shielding portion 6b of the data line 6a formed so as to cover the scanning line 3a from above are formed by the channel region 1a 'and the LDD region 1b. And the channel adjacent region 1a "including the channel switching region 1a" is shielded from the incident light. The first light shielding film 11a provided below the pixel switching TFT 30 includes a channel region 1a 'and a channel including the LDD regions 1b and 1c. The adjacent area 1a ″ is shielded from return light. That is, the main wiring portion of the data line 6a, the side light shielding portion 6b, and the first light shielding film 11a three-dimensionally surround the channel region 1a 'and the channel adjacent region 1a "to perform light shielding. Deterioration of transistor characteristics due to generation of photocurrent due to projection light, return light, or the like is reduced with little or no dependence on the incident angle of the projection light or return light, the reflection angle in the electro-optical device, or the like.

  On the other hand, in the comparative example shown in FIG. 6, the data line 6a is not provided with the side light shielding portion 6b. Therefore, as is apparent from FIG. 6, the incident light obliquely incident on the TFT array substrate 10 is reflected on the upper surface of the first light shielding 11a below the TFT, and the channel adjacent region 1a ″ including the LDD region is reflected. Or reflected on the upper surface of the first light-shielding film 11a and then reflected on the lower surface of the data line 6a to enter the channel adjacent region 1a ″, and further on the upper surface of the first light-shielding film 11a and the lower surface of the data line 6a. As a result, the incident light perpendicular to the TFT array substrate 10 is effectively shielded by the main wiring portion of the data line 6a. Although it is possible, it cannot effectively block oblique incident light with respect to the TFT array substrate 10. In order to prevent such oblique incident light from reaching the upper surface of the first light shielding film 11a, a counter substrate is required. Although it is possible to increase the width of the second light-shielding film 23 (see FIG. 4) on the surface 20, it is necessary to narrow the opening area, and as a result, the displayed image becomes dark.

  In the present embodiment, as described above with respect to this comparative example, since the side light shielding portion 6b surrounds the channel adjacent region 1a ″ from the side, the light obliquely incident on the TFT array substrate 10 can be effectively shielded. is there.

  In the present embodiment, both the first and second interlayer insulating films 12 and 4 are opened to form a groove having a depth corresponding to the two layers, and the side light shielding portion 6b is formed in the groove. Although provided, for example, as shown in FIG. 7, if only the second interlayer insulating film 4 is opened, a groove having a depth corresponding to its thickness is formed. It is to be noted that the term “open hole” means both a through hole and a non-through hole. In FIG. 4, even if the first interlayer insulating film 12 is not completely opened, 7, even if the second interlayer insulating film 4 is not completely opened, a groove having a depth commensurate with the opening can be formed, and the side light shielding portion 6b corresponding to the depth of the groove can be formed. is there.

  On the other hand, in the present embodiment, the first light-shielding film 11a may be electrically connected to a constant potential source or a large capacity portion. With such a configuration, the potential fluctuation of the first light-shielding film 11a does not adversely affect the pixel switching TFT 30 that is disposed to face the first light-shielding film 11a. Further, by setting the capacitance line 3b to a constant potential, the capacitor line 3b can function well as the second storage capacitor electrode of the storage capacitor 70. In this case, as the constant potential source, a constant potential source such as a negative power supply or a positive power supply supplied to a peripheral circuit (for example, a scanning line driving circuit, a data line driving circuit, or the like) for driving the electro-optical device, or a ground. A power source and a constant potential source supplied to the counter electrode 21 are exemplified.

  The capacitor line 3b and the scanning line 3a are made of the same polysilicon film, and the dielectric film of the storage capacitor 70 and the gate insulating film 2 of the pixel switching TFT 30 are made of the same high-temperature oxide film. The storage capacitor electrode 1f and the channel forming region 1a ', source region 1d, drain region 1e, etc. of the pixel switching TFT 30 are formed of the same semiconductor layer 1a. For this reason, the laminated structure formed on the TFT array substrate 10 can be simplified, and further, in the method of manufacturing an electro-optical device described later, the capacitor line 3b and the scanning line 3a can be simultaneously formed in the same thin film forming step, and The dielectric film of the capacitor 70 and the gate insulating film 2 can be formed simultaneously.

As described in detail above, according to the electro-optical device of the present embodiment, since the light shielding function in the channel region 1a ′ and the channel adjacent region 1a ″ of the TFT 30 in the pixel portion is high, a high-quality image display can be performed with good TFT characteristics. Since the pixel aperture ratio is hardly reduced by the light-shielding film, the pixel aperture ratio is high and a bright image can be displayed.
(Manufacturing process in the first embodiment of the electro-optical device)
Next, a manufacturing process of the electro-optical device having the above configuration will be described with reference to FIGS. 8 to 10 are process diagrams showing each layer on the TFT array substrate side in each process corresponding to the AA 'section in FIG. 2 as in FIG.

First, as shown in step (1) of FIG. 8, a TFT array substrate 10 such as a quartz substrate or hard glass is prepared. Here, annealing is preferably performed in an inert gas atmosphere such as N ₂ (nitrogen) and a high temperature of about 900 to 1300 ° C., and a pre-processing is performed so that distortion generated in the TFT array substrate 10 in a high-temperature process performed later is reduced. Keep it. That is, the TFT array substrate 10 is preliminarily heat-treated at the same temperature or a higher temperature in accordance with the highest temperature in the manufacturing process. Then, a metal such as Ti, Cr, W, Ta, Mo and Pd or a metal alloy film such as a metal silicide is formed on the entire surface of the TFT array substrate 10 thus processed by sputtering to a thickness of about 1000 to 5000 Å. The light-shielding film 11 having a thickness of, preferably, about 2,000 angstroms is formed. Note that an anti-reflection film such as a polysilicon film may be formed on the light-shielding film 11 to reduce surface reflection.

  Next, as shown in a step (2), a resist mask corresponding to the pattern of the first light-shielding film 11a (see FIG. 2) is formed on the formed light-shielding film 11 by photolithography. The first light-shielding film 11a is formed by etching the light-shielding film 11 by using the etching method.

  Next, as shown in step (3), TEOS (tetra-ethyl-ortho-silicate) gas, TEB (tetra-ethyl-borate) is formed on the first light-shielding film 11a by, for example, normal pressure or low pressure CVD. ) Gas, TMOP (tetramethyl oxyphosphate) gas or the like to form a first interlayer insulating film 12 made of a silicate glass film such as NSG, PSG, BSG or BPSG, a silicon nitride film or a silicon oxide film. Form. The layer thickness of the first interlayer insulating film 12 is, for example, about 5,000 to 20,000 angstroms.

  Next, as shown in a step (4), a monosilane gas having a flow rate of about 400 to 600 cc / min on the first interlayer insulating film 12 in a relatively low temperature environment of about 450 to 550 ° C., preferably about 500 ° C. An amorphous silicon film is formed by low-pressure CVD using disilane gas or the like (for example, CVD at a pressure of about 20 to 40 Pa). Thereafter, the polysilicon film 1 is subjected to an annealing treatment in a nitrogen atmosphere at about 600 to 700 ° C. for about 1 to 10 hours, preferably for 4 to 6 hours, so that the polysilicon film 1 has a thickness of about 500 to 2000 Å, Preferably, the solid phase is grown to a thickness of about 1000 Å. As a method of solid phase growth, annealing treatment using RTA (Rapid Thermal Anneal) may be used, or laser annealing using excimer laser or the like may be used.

  At this time, when an n-channel type pixel switching TFT 30 is formed as the pixel switching TFT 30 shown in FIG. 3, Vb such as Sb (antimony), As (arsenic), or P (phosphorus) is formed in the channel region. A group element dopant may be slightly doped by ion implantation or the like. When the pixel switching TFT 30 is of a p-channel type, a dopant of a group III element such as B (boron), Ga (gallium), or In (indium) may be slightly doped by ion implantation or the like. The polysilicon film 1 may be directly formed by a low pressure CVD method or the like without passing through the amorphous silicon film. Alternatively, the polysilicon film 1 may be formed by implanting silicon ions into a polysilicon film deposited by a low-pressure CVD method or the like to make the polysilicon film amorphous once (amorphization), and then recrystallize by annealing or the like.

  Next, as shown in a step (5), a semiconductor layer 1a having a predetermined pattern as shown in FIG. 2 and including the channel region 1a ′ and the channel adjacent region 1a ″ is formed by a photolithography process, an etching process, or the like. .

  Next, as shown in step (6), the first storage capacitor electrode 1f (see FIG. 3) together with the semiconductor layer 1a constituting the pixel switching TFT 30 is heated at a temperature of about 900 to 1300 ° C., preferably about 1000 ° C. A thermally oxidized silicon oxide film having a relatively small thickness of about 300 angstroms is formed by thermal oxidation, and a high-temperature silicon oxide film (HTO film) or a silicon nitride film of a relatively thin thickness of about 500 angstroms is formed by a low pressure CVD method or the like. A gate insulating film 2 for capacitance formation is formed together with the gate insulating film 2 of the pixel switching TFT 30 having a multilayer structure and deposited to a thickness. As a result, the thickness of the first storage capacitor electrode 1f is about 300 to 1500 angstroms, preferably about 350 to 500 angstroms, and the thickness of the gate insulating film 2 is about 200 to 1500 angstroms. Thickness, preferably about 300-1000 Angstroms. By shortening the high-temperature thermal oxidation time in this way, warpage due to heat can be prevented particularly when a large substrate of about 8 inches is used. However, the gate insulating film 2 having a single-layer structure may be formed only by thermally oxidizing the polysilicon layer 1.

Although not particularly limited in the step (6), the semiconductor layer portion to be the first storage capacitor electrode 1f is doped with, for example, P ions at a dose of about 3 × 10 ¹² / cm ² to reduce the resistance. Is also good.

  Next, as shown in step (7), after depositing a polysilicon layer 3 by a low pressure CVD method or the like, phosphorus (P) is thermally diffused to make the polysilicon film 3 conductive. Alternatively, a doped silicon film in which P ions are introduced simultaneously with the formation of the polysilicon film 3 may be used.

  Next, as shown in step (8) of FIG. 9, the capacitor lines 3b are formed along with the scanning lines 3a having a predetermined pattern as shown in FIG. 2 by a photolithography step using a resist mask, an etching step, or the like. The layer thickness of these capacitance lines 3b (scanning lines 3a) is, for example, about 3500 angstroms. In the A-A 'cross section shown in step (8) of FIG. 9, there is no portion where the polysilicon film 3 remains.

Next, when the pixel switching TFT 30 shown in FIG. 3 is an n-channel TFT having an LDD structure, scanning is performed to first form the low concentration source region 1b and the low concentration drain region 1c in the semiconductor layer 1a. Using the line 3a (gate electrode) as a diffusion mask, a dopant of a group V element such as P is doped at a low concentration (for example, P ions are doped at a dose of 1 to 3 × 10 ¹³ / cm ² ). Thus, the semiconductor layer 1a below the scanning line 3a becomes the channel region 1a '. The resistance of the capacitance line 3b and the scanning line 3a is also reduced by the doping of the impurity. Further, in order to form the high-concentration source region 1b and the high-concentration drain region 1c that constitute the pixel switching TFT 30, a resist layer is formed on the scanning line 3a with a mask wider than the scanning line 3a, and then the P layer is formed. Dopant of a group V element such as P is doped at a high concentration (for example, P ions are doped at a dose of 1 to 3 × 10 ¹⁵ / cm ² ). In the case where the pixel switching TFT 30 is a p-channel type, B or the like is used to form the low-concentration source region 1b and the low-concentration drain region 1c and the high-concentration source region 1d and the high-concentration drain region 1e in the semiconductor layer 1a. Using a Group III element dopant. Note that, for example, a TFT having an offset structure may be used without doping at a low concentration, or a self-aligned TFT may be formed by an ion implantation technique using P ions, B ions, or the like using the scanning line 3a as a mask. The resistance of the capacitance line 3b and the scanning line 3a is further reduced by the doping of the impurity.

  In parallel with the element forming process of the TFT 30, peripheral circuits such as a data line driving circuit and a scanning line driving circuit having a complementary structure composed of an n-channel TFT and a p-channel TFT are mounted on the TFT array substrate 10. It may be formed on the upper peripheral portion. As described above, in the present embodiment, since the semiconductor layer of the pixel switching TFT 30 is formed of polysilicon, the peripheral circuit can be formed in substantially the same process when the pixel switching TFT 30 is formed, which is advantageous in manufacturing.

  Next, as shown in a step (9), for example, a normal pressure or low pressure CVD method or a TEOS so as to cover the capacitance line 3b and the scanning line 3a together with the gate insulating film 2a and the scanning line 3a in the pixel switching TFT 30 (not shown). Using a gas or the like, a second interlayer insulating film 4 made of a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed. The thickness of the second interlayer insulating film 4 is preferably about 5,000 to 15,000 angstroms.

  Next, in a step (10), an annealing process at about 1000 ° C. is performed for about 20 minutes to activate the high-concentration source region 1d and the high-concentration drain region 1e shown in FIG. The second interlayer insulating film 4 and the first interlayer insulating film 12 are formed by dry etching such as reactive etching or reactive ion beam etching in order to form a groove in which the side light-shielding portion 6b is disposed in the rectangular area indicated by painting. The region is opened by etching or wet etching. In parallel with this, a contact hole 5 for the data line 31 is opened (see FIGS. 2 and 3). Further, a contact hole for connecting the scanning line 3a and the capacitance line 3b to a wiring (not shown) is also formed in the second interlayer insulating film 4 in the same process as the contact hole 5.

  Next, as shown in step (11), a low-resistance metal such as Al or a metal silicide having a light-shielding property or a metal silicide is formed as a metal film 6 on the second interlayer insulating film 4 by a sputtering process or the like. Deposit to a thickness of Angstroms, preferably about 3000 Angstroms.

  Next, as shown in a step (12), a data line 6a is formed by a photolithography step, an etching step, or the like. At this time, in particular, in the inside of the groove formed in the second interlayer insulating film 4 and the first interlayer insulating film 12, the side light shielding portion 6b (extending from the edge of the data line 6a toward the inside of the groove). FIG. 5) is formed.

Next, as shown in step (13), a silicate glass film such as NSG, PSG, BSG, BPSG, or the like is formed so as to cover the data line 6a by using, for example, normal pressure or reduced pressure CVD, TEOS gas, or the like. A third interlayer insulating film 7 made of a silicon film, a silicon oxide film, or the like is formed. The thickness of the third interlayer insulating film 7 is preferably about 5,000 to 15,000 angstroms. In the manufacturing process of the present embodiment, in particular, the upper surface of the third interlayer insulating film 7 is flattened by performing a CMP (Chemical Mechanical Polishing) process or forming an SOG (Spin On Glass) by spin coating or the like. .
Alternatively, planarization may be performed using an organic SOG film, an inorganic SOG film, or the like. Therefore, disclination (poor alignment) of the electro-optical material caused by unevenness of the surface of the third interlayer insulating film 7 can be reduced.

  After that, in the pixel switching TFT 30, a contact hole 8 for electrically connecting the pixel electrode 9a and the high-concentration drain region 1e is formed by dry etching such as reactive etching or reactive ion beam etching.

  Next, as shown in step (14) of FIG. 10, a transparent conductive thin film 9 such as an ITO film is deposited on the third interlayer insulating film 7 by sputtering or the like to a thickness of about 500 to 2,000 angstroms. Then, as shown in step (15), a pixel electrode 9a is formed by a photolithography step, an etching step, or the like. When the electro-optical device is used for a reflection-type electro-optical device, the pixel electrode 9a may be formed from an opaque material having a high reflectance such as Al.

  Subsequently, a coating solution of a polyimide-based alignment film is applied on the pixel electrode 9a, and then a rubbing process is performed so as to have a predetermined pretilt angle and in a predetermined direction. 4) is formed.

  On the other hand, as for the counter substrate 20 shown in FIGS. 3 and 4, a glass substrate or the like is first prepared, and the second light shielding film 23 and the third light shielding film (see FIGS. After chromium is sputtered, it is formed through a photolithography step and an etching step. The second and third light-shielding films may be formed of a material such as resin black in which carbon or Ti is dispersed in a photoresist, in addition to a metal material such as Cr, Ni, or Al.

  Thereafter, a transparent conductive thin film such as ITO is deposited on the entire surface of the opposing substrate 20 by sputtering or the like to a thickness of about 500 to 2,000 angstroms to form the opposing electrode 21. Further, after a coating solution of a polyimide-based alignment film is applied to the entire surface of the counter electrode 21, a rubbing process is performed so as to have a predetermined pretilt angle and in a predetermined direction. Ref) is formed.

Finally, the TFT array substrate 10 on which the respective layers are formed as described above and the opposing substrate 20 are bonded together with the sealing material 52 so that the alignment films 16 and 22 face each other. Then, for example, an electro-optic material obtained by mixing a plurality of types of nematic electro-optic materials is sucked to form an electro-optic material layer 50 having a predetermined thickness.
(Second embodiment of electro-optical device)
A second embodiment of the electro-optical device according to the present invention will be described with reference to FIGS. 11 to 13 and its operation, particularly focusing on the configuration in an image display area. FIG. 11 is a plan view of a plurality of adjacent pixel groups of a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, etc. are formed, and FIG. 12 is a cross-sectional view taken along line BB ′ of FIG. FIG. 13 is a cross-sectional view taken along the line CC ′ of FIG. In the second embodiment shown in FIGS. 11 to 13, the same components as those in the first embodiment shown in FIGS. 2 to 6 are denoted by the same reference numerals, and the description thereof will be omitted. In FIGS. 12 and 13, the scale of each layer and each member is different in order to make each layer and each member have a size recognizable in the drawings.

  In FIG. 11, firstly, in the second embodiment, unlike the first embodiment, the groove formed in the interlayer insulating film in the frame-shaped region shown in black in the figure is viewed from the counter substrate 20 side. Each of the TFTs is formed so as to surround the channel region 1a ′ and the channel adjacent region 1a ″, and the side light shielding portions 6b ′ are parallel to the TFT array substrate 10 corresponding to the grooves formed as described above. It surrounds the channel region 1a ′ and the channel adjacent region 1a ″ in the plane. Therefore, according to the second embodiment, the channel region 1a ′ and the channel adjacent region 1a ″ are surrounded by the side light-shielding portions 6b ′ without any gap in a plane parallel to the substrate, and thus are oblique from any direction. Even if the projection light, the return light, or the reflected light is going to be incident on the light source, the light can be shielded by the side light shield 6b '.

  As shown in FIGS. 12 and 13, in the present embodiment, an opening is formed in the first interlayer insulating film 12 and no opening is formed in the second interlayer insulating film 4. A groove is formed in the second interlayer insulating film 4 according to the thickness of the film 12, and a side wiring portion 6b 'of the data line 6a extends in the groove. Accordingly, side light shielding is performed by the side light shielding portion 6b '.

  Referring again to FIG. 11, second, unlike the first embodiment, the first light-shielding film 11a is divided into a plurality of island-shaped portions. Therefore, for example, the area of the integrally formed portion is much smaller than the case of the light-shielding film provided in a stripe shape (see FIG. 2) or in a lattice shape. The stress generated in the light-shielding film due to the difference in physical properties can be greatly reduced. Therefore, it is possible to prevent the first light-shielding film 11a from being peeled, deformed, or cracked. At the same time, it is possible to prevent a situation in which the characteristics of the pixel switching TFT 30 are degraded due to the stress of the first light shielding film 11a itself. Furthermore, since each island-like portion of the first light-shielding film 11a is provided at least in a region necessary for performing light-shielding on the channel region 1a 'of the TFT 30, the non-opening region of the pixel portion is limited. In this case, the region where the data line 6a or the scanning line 3a overlaps each island-shaped portion (light-shielding film) is also minimized, and an unintended projection or the like is formed on the first light-shielding film 11a during the manufacturing process. This is advantageous in that the possibility that the first light-shielding film 11a and the data line 6a or the scanning line 3a are short-circuited and the electro-optical device becomes defective can be reduced.

In each of the above embodiments, the side wall portion of the groove in which the side light shielding portions 6b and 6b 'are formed may be formed in a tapered shape. With such a configuration, even if the back light of the side light shielding portions 6b and 6b 'of the data line 6a is irradiated with the return light, irregular reflection is performed by controlling the taper angle, and the channel region 1a' and the channel adjacent region are controlled. Irradiation of light to 1a ″ can be prevented. Further, in addition to the side light shielding portions 6b and 6b '(that is, the Al thin film) formed in the post-process in the groove, for example, a polysilicon film, a resist, or the like does not remain. Further, it is not easy to form the side light-shielding portions 6b and 6b 'across the side wall having no taper or reverse taper or to route the wiring, which causes a wiring failure. In order to taper the side wall portion of the groove in this manner, for example, in the etching step (10) shown in FIG. 9, wet etching may be performed after dry etching.
(Overall configuration of electro-optical device)
The overall configuration of each embodiment of the electro-optical device configured as described above will be described with reference to FIG. 14 and FIG. FIG. 14 is a plan view of the TFT array substrate 10 together with the components formed thereon viewed from the counter substrate 20 side. FIG. It is H 'sectional drawing.

  In FIG. 14, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof, and parallel to the inside thereof, for example, as a peripheral partition made of the same or different material as the second light shielding film 23. Is provided. In a region outside the sealing material 52, a data line driving circuit 101 and a mounting terminal 102 for driving the data line 6a by supplying an image signal to the data line 6a at a predetermined timing are provided along one side of the TFT array substrate 10. A scanning line driving circuit 104 for driving the scanning line 3a by supplying a scanning signal to the scanning line 3a at a predetermined timing is provided along two sides adjacent to this one side. If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the sides of the image display area. For example, the odd-numbered data lines 6a supply an image signal from a data line driving circuit arranged along one side of the image display area, and the even-numbered data lines are arranged along the opposite side of the image display area. The image signal may be supplied from a data line driving circuit arranged in a predetermined manner. By driving the data lines 6a in a comb-tooth shape as described above, the area occupied by the data line driving circuit can be expanded, and a complicated circuit can be formed. Further, on one remaining side of the TFT array substrate 10, a plurality of wirings 105 for connecting between the scanning line driving circuits 104 provided on both sides of the image display area are provided. In at least one of the corners of the opposing substrate 20, an upper / lower conducting material 106 for establishing electric conduction between the TFT array substrate 10 and the opposing substrate 20 is provided. Then, as shown in FIG. 15, the counter substrate 20 having substantially the same contour as the sealing material 52 shown in FIG. 14 is fixed to the TFT array substrate 10 by the sealing material 52. Note that, on the TFT array substrate 10, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., a sampling circuit 103 for applying an image signal to a plurality of data lines 6a at a predetermined timing, a plurality of data A precharge circuit for supplying a precharge signal of a predetermined voltage level to the line 6a in advance of the image signal, an inspection circuit for inspecting the quality, defects, and the like of the electro-optical device during manufacturing or shipping are formed. You may.

  In the embodiments described above with reference to FIGS. 1 to 15, instead of providing the data line driving circuit 101 and the scanning line driving circuit 104 on the TFT array substrate 10, for example, on a TAB (tape automated bonding substrate) May be electrically and mechanically connected to the driving LSI mounted on the TFT array substrate via an anisotropic conductive film provided on the periphery of the TFT array substrate 10. For example, a TN (twisted nematic) mode, an STN (super TN) mode, and a D-STN (double-side) are provided on the side of the opposite substrate 20 on which the projection light is incident and on the side of the TFT array substrate 10 where the emission light is emitted, respectively. A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to an operation mode such as an STN) mode or a normally white mode / normally black mode.

  Since the electro-optical device in each of the embodiments described above is applied to a color electro-optical material projector, three electro-optical devices are respectively used as light valves for RGB, and each panel has an RGB color separation valve. The light of each color decomposed via the dichroic mirror is incident as projection light. Therefore, in each embodiment, the opposing substrate 20 is not provided with a color filter. However, an RGB color filter may be formed on the opposing substrate 20 in a predetermined area facing the pixel electrode 9a where the second light-shielding film 23 is not formed, together with the protective film. In this way, the electro-optical device according to each embodiment can be applied to a color electro-optical device such as a direct-view or reflection type color electro-optical material television other than the electro-optical material projector. Further, a micro lens may be formed on the counter substrate 20 so as to correspond to one pixel. By doing so, a bright electro-optical device can be realized by improving the light collection efficiency of incident light. Furthermore, a dichroic filter that creates RGB colors using light interference may be formed by depositing many layers of interference layers having different refractive indices on the counter substrate 20. According to the counter substrate with the dichroic filter, a brighter color electro-optical device can be realized.

  In the electro-optical device according to each of the embodiments described above, incident light is incident from the side of the counter substrate 20 as in the related art. However, since the first light-shielding film 11a is provided, from the side of the TFT array substrate 10 The incident light may be made incident and emitted from the counter substrate 20 side. That is, even if the electro-optical device is attached to the electro-optical material projector, light can be prevented from being incident on the channel region 1a 'and the LDD regions 1b and 1c of the semiconductor layer 1a, and a high-quality image can be displayed. It is possible to do. Here, conventionally, in order to prevent reflection on the back surface side of the TFT array substrate 10, it has been necessary to separately arrange a polarizing plate coated with an anti-reflection AR coating or attach an AR film. However, in each embodiment, the first light-shielding film 11a is formed between the surface of the TFT array substrate 10 and at least the channel region 1a 'and the LDD regions 1b and 1c of the semiconductor layer 1a. It is not necessary to use a polarizing plate or an AR film that has been used or to use a substrate obtained by performing an AR process on the TFT array substrate 10 itself. Therefore, according to each of the embodiments, the material cost can be reduced, and the yield is not significantly reduced due to dust, scratches or the like at the time of attaching the polarizing plate, which is very advantageous. In addition, since light resistance is excellent, even if a bright light source is used or polarization conversion is performed by a polarizing beam splitter to improve light use efficiency, image quality deterioration such as crosstalk due to light does not occur.

Also, the switching element provided in each pixel has been described as a normal stagger type or coplanar type polysilicon TFT. However, other types of TFTs such as an inverse stagger type TFT and an amorphous silicon TFT are also applicable. Each embodiment is effective.
(Electronics)
Next, an embodiment of an electronic apparatus including the liquid crystal device 100 described in detail above will be described with reference to FIGS.

  First, FIG. 16 shows a schematic configuration of an electronic apparatus including the liquid crystal device 100 as described above.

16, the electronic device includes a display information output source 1000, a display information processing circuit 1002, a driving circuit 1004, a liquid crystal device 100, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a read only memory (ROM), a random access memory (RAM), a memory such as an optical disk device, a tuning circuit that tunes and outputs an image signal, and the like. Based on the information, display information such as an image signal in a predetermined format is output to the display information processing circuit 1002. The display information processing circuit 1002 includes various known processing circuits such as an amplification / polarity inversion circuit, a serial-parallel conversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and is input based on a clock signal. Digital signals are sequentially generated from the display information and output to the drive circuit 1004 together with the clock signal CLK. The drive circuit 1004 drives the liquid crystal device 100. The power supply circuit 1010 supplies a predetermined power to each of the above-described circuits.
Note that the drive circuit 1004 may be mounted on the TFT array substrate included in the liquid crystal device 100, and in addition, the display information processing circuit 1002 may be mounted.

  Next, FIGS. 17 and 18 show specific examples of the electronic device configured as described above.

  In FIG. 17, a liquid crystal projector 1100, which is an example of an electronic apparatus, prepares three liquid crystal display modules including the liquid crystal device 100 in which the above-described drive circuit 1004 is mounted on a TFT array substrate, and each includes a light valve 100R for RGB, It is configured as a projector used as 100G and 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, three mirrors 1106 and two dichroic mirrors 1108 light components R, G, and R corresponding to the three primary colors of RGB. B, and are led to light valves 100R, 100G, and 100B corresponding to each color. At this time, in particular, the B light is guided through a relay lens system 1121 including an entrance lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. The light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are combined again by the dichroic prism 1112, and then projected as a color image on the screen 1120 via the projection lens 1114.

In this embodiment, in particular, since the light-shielding film is also provided below the TFT, the light reflected by the projection optical system in the liquid crystal projector based on the light projected from the liquid crystal device 100 and the light when the projected light passes therethrough. Even if reflected light from the surface of the TFT array substrate, part of the projected light that passes through the dichroic prism 1112 after being emitted from another liquid crystal device, and the like is returned from the TFT array substrate side, It is possible to sufficiently shield a channel region such as a switching TFT from light.
For this reason, even if a prism suitable for miniaturization is used in the projection optical system, an AR film for preventing return light is adhered between the TFT array substrate and the prism of each liquid crystal device, or an AR coating is applied to the polarizing plate. Is unnecessary, which is very advantageous in reducing the size and simplifying the configuration.

  In FIG. 18, a laptop personal computer (PC) 1200 for multimedia, which is another example of electronic equipment, has the above-described liquid crystal device 100 provided in a top cover case, and further includes a CPU, a memory, a modem, and the like. And a main body 1204 in which a keyboard 1202 is incorporated.

  In addition to the electronic devices described above with reference to FIGS. 17 and 18, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a car navigation device, an electronic organizer, a calculator, a word processor, an engineering workstation ( EWS), a mobile phone, a videophone, a POS terminal, a device having a touch panel, and the like are examples of the electronic device shown in FIG.

  As described above, according to the present embodiment, it is possible to realize various electronic devices including a liquid crystal device capable of displaying images with high manufacturing efficiency and high quality.

3 is an equivalent circuit of various elements, wiring, and the like provided in a plurality of pixels in a matrix forming an image display area in the embodiment of the electro-optical device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, and the like are formed in the first embodiment of the electro-optical device. FIG. 3 is a sectional view taken along line D-D ′ of FIG. 2. FIG. 3 is a sectional view taken along line A-A ′ of FIG. 2. FIG. 4 is a partially enlarged perspective view of the data line showing a state where a channel region and a region adjacent to a channel are shielded by a main wiring portion, a side light shielding portion, and a portion extending into a contact hole of the data line in the first embodiment. FIG. 3 is a cross-sectional view corresponding to a cross section taken along line A-A ′ of FIG. 2 in a comparative example. FIG. 3 is a cross-sectional view corresponding to a cross section A-A ′ of FIG. 2 in a modification of the first embodiment. FIG. 4 is a process diagram (part 1) for sequentially illustrating the manufacturing process of the electro-optical device. FIG. 9 is a process diagram (part 2) illustrating the manufacturing process of the electro-optical device in order. FIG. 9 is a process diagram (part 3) for sequentially illustrating the manufacturing process of the electro-optical device. FIG. 9 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which a data line, a scanning line, a pixel electrode, a light shielding film, and the like are formed in a second embodiment of the electro-optical device. FIG. 12 is a sectional view taken along line B-B ′ of FIG. 11. It is C-C 'sectional drawing of FIG. FIG. 3 is a plan view of a TFT array substrate in an embodiment of an electro-optical device together with components formed thereon viewed from a counter substrate side. FIG. 15 is a sectional view taken along line H-H ′ of FIG. 14. 1 is a block diagram illustrating a schematic configuration of an electronic device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view illustrating a liquid crystal projector as an example of an electronic apparatus. FIG. 21 is a front view illustrating a personal computer as another example of the electronic apparatus.

Explanation of reference numerals

1a semiconductor layer 1a 'channel region 1a "channel adjacent region 1b low concentration source region (source side LDD region)
1c: Low-concentration drain region (drain-side LDD region)
1d high concentration source region 1e high concentration drain region 1f first storage capacitance electrode 2 gate insulating film 3a scanning line 3b capacitance line (second storage capacitance electrode)
4 second interlayer insulating film 5 contact hole 6a data line 6b side light shielding portion 7 third interlayer insulating film 8 contact hole 9a pixel electrode 10 TFT array substrate 11a first light shielding film 12 first 1 interlayer insulating film 16 ... alignment film 20 ... counter substrate 21 ... counter electrode 22 ... alignment film 23 ... second light shielding film 30 ... pixel switching TFT
50 electro-optical material layer 52 sealing material 53 third light-shielding film 70 storage capacitor 101 data line driving circuit 104 scanning line driving circuit

Claims (5)

An electro-optical material is sandwiched between a pair of first and second substrates, and on the first substrate,
A plurality of pixel electrodes arranged in a matrix,
A plurality of thin film transistors that respectively drive the plurality of pixel electrodes;
A light-shielding film provided below a semiconductor layer constituting the plurality of thin film transistors via an interlayer insulating film, and covering at least a channel region of the semiconductor layer;
An electro-optical device, comprising: a channel region surrounding portion surrounding at least the channel region from above to the side of the semiconductor layer. The electro-optical device according to claim 1, wherein the channel region surrounding portion surrounds both sides of the channel region. 3. The electro-optical device according to claim 1, wherein an opening is provided in the interlayer insulating film below the semiconductor layer, and the channel region surrounding portion is provided in the opening of the interlayer insulating film. apparatus. The electro-optical device according to claim 1, wherein an upper portion of the channel region surrounding portion extends in a direction in which the semiconductor layer extends. An electronic apparatus comprising the electro-optical device according to claim 1.

Images