JP2004214378A - High frequency integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency integrated circuit device at a low cost which has a plurality of capacitors connected with a part between bias lines for supplying a bias voltage to a high frequency semiconductor element and ground patterns, and in which the ground patterns on a substrate are connected with each other. <P>SOLUTION: On the substrate 10, the high frequency integrated circuit is provided with a high frequency semiconductor element 11, compound electronic components 12A-12D containing the capacitors, the bias lines 15A-15D, and the ground patterns 16A-16D and 17A, 17B. The compound electronic components 12A-12D form the capacitors connected with parts between the bias lines 15A-15D and the ground patterns 16A-16D and 17A, 17B. A ground path is formed which connects a part between the adjacent ground patterns interposing each of the bias lines. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a high-frequency integrated circuit device used in a high frequency range such as a microwave band or a millimeter wave band.
[0002]
[Prior art]
2. Description of the Related Art In recent years, due to rapid growth in demand in the information and communication field, it has become urgent to increase communication capacity and the number of communication lines. In response to this demand, the practical use of a system that uses a very high frequency band such as a microwave band or a millimeter wave band for communication is progressing at a rapid pace. Accordingly, wireless communication devices used as communication terminals are required to be able to support the microwave band or the millimeter wave band.
[0003]
A high-frequency circuit including an oscillator, a synthesizer, a modulator, a power amplifier, a low-noise amplifier, a demodulator, and the like in a wireless communication device is required to have excellent electrical characteristics and to be easily miniaturized. In order to reduce the size of the high-frequency circuit, it is effective to use a MIC (Microwave Integrated Circuit) or an MMIC (Monolitic Microwave Integrated Circuit) to integrate the circuit as much as possible. Since the MIC and the MMIC are used in a microwave band, a quasi-millimeter wave band, or a millimeter wave band, circuit devices using these are collectively referred to as high-frequency integrated circuit devices in the present invention.
[0004]
In MICs and MMICs, with the rapid development of semiconductor integration technology, circuits formed in one module substrate are replaced by functional circuit blocks that perform one circuit function of a device from a single active element, and a plurality of circuits. , The degree of integration is gradually increasing. These functional circuit blocks are generally realized by high-frequency semiconductor elements such as HEMTs, HBTs, and MESFETs, passive elements such as capacitors, inductors, and resistors, and various lines.
[0005]
A bias line for supplying a bias to the semiconductor element is connected to an input electrode and an output electrode of the high-frequency semiconductor element. One end of a decoupling capacitor is connected to the bias line for high-frequency grounding provided near the semiconductor element and for suppressing fluctuations in bias voltage. The other end of the decoupling capacitor is connected to a ground pattern. Ideally, the decoupling capacitor exhibits a frequency characteristic with a very low value such that the impedance is sufficiently close to zero in the entire frequency range from DC to the operating frequency of the circuit, but in practice, a specific The characteristic shows that the impedance is reduced only in the frequency domain.
[0006]
In view of this, a technique is employed in which a plurality of decoupling capacitors having different capacitance values are used in combination to reduce the impedance as much as possible in a wide frequency range from DC to the operating frequency of the circuit (for example, see Non-Patent Document 1, especially FIG. 1). And its description).
[0007]
In such a high-frequency integrated circuit device in which a plurality of decoupling capacitors are arranged near the semiconductor chip, each capacitor is connected between a separate bias line and a ground pattern. According to the conventional metal pattern layout on the module substrate, one end of each bias line is connected to each capacitor, and the other end is connected to one of two ground patterns arranged so as to sandwich each bias line. Therefore, the ground patterns disposed on both sides of the bias line are separated from each other on the substrate. Generally, in order to maintain the characteristics of a high-frequency integrated circuit device, ground patterns separated from each other are electrically connected to each other at a distance as short as possible so that each ground pattern has a common ground potential. is necessary.
[0008]
[Non-patent document 1]
Naoko Ono, Eiji Takagi, Miki Mori, Kenji Ishida, Horoyuki Kayano, Kunio Yoshihara and Mitsuo Konno "MINIATURIZED POWER AMPLIFIER MODULE USINGLGA STRUCTURE" IMC 1996 Proceedings, Omiya, April 26, 1996
[0009]
[Problems to be solved by the invention]
In order to avoid deterioration of the characteristics of the high-frequency integrated circuit device, there are the following two methods for connecting the separated grounds on the substrate. One method is to provide a ground pattern uniformly on the entire back surface of the module substrate, and connect the ground pattern on the back surface to the ground pattern on the main surface of the module substrate via a through hole. Another method is a method of connecting ground patterns on a substrate with a bridge member using a wire.
[0010]
However, the former method requires a through-hole and a ground pattern on the back surface of the substrate, which increases the cost of the substrate, and the latter method involves a problem that the bridge member and the cost required for mounting the bridge member are required.
[0011]
The present invention relates to a low-cost high-frequency integrated circuit device having a plurality of capacitors connected between a bias line for supplying a bias to a high-frequency semiconductor element and a ground pattern, wherein the ground patterns on the substrate are connected to each other. The purpose is to provide.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, a high-frequency integrated circuit device according to one aspect of the present invention includes a substrate having a main surface, a high-frequency semiconductor element provided on the main surface of the substrate, and a high-frequency semiconductor element provided on the main surface of the substrate. At least one bias line for supplying a bias to the high-frequency semiconductor element, first and second ground patterns provided on both sides of the bias line on the main surface of the substrate, and a bias line. First and second capacitors connected between the first and second ground patterns, respectively, and a composite electronic component having a connection conductor connecting between the first and second ground patterns is provided. I do.
[0013]
A high-frequency integrated circuit device according to another aspect of the present invention includes a substrate having a main surface, a high-frequency semiconductor element provided on the main surface of the substrate, and a high-frequency semiconductor element provided in parallel on the main surface of the substrate. First and second bias lines for supplying different biases to the first and second ground lines; a first ground pattern provided between the first and second bias lines on the main surface of the substrate; A second ground pattern provided so as to sandwich the bias line between the first ground pattern and a third ground line provided so as to sandwich the second bias line between the first ground pattern. A ground pattern, first to fourth capacitors connected between the first and second bias lines and the first to third ground patterns, and connection between the first and second ground patterns, respectively. 1 connection conductors, and comprising a composite electronic component having a second connecting conductor for connecting the second and third ground patterns.
[0014]
As described above, by using the composite electronic component including the connection conductor connecting the plurality of ground electrodes in addition to the capacitor, a ground path connecting the ground patterns separated from each other on the substrate is formed. A high-frequency semiconductor device with good high-frequency characteristics and low cost can be realized.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a high-frequency integrated circuit device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a plan view of the high-frequency integrated circuit device according to the present embodiment, and FIG. 2 is a cross-sectional view taken along the line AA 'in FIG.
1 and 2, the module substrate 10 is a substrate 10 having a size of, for example, about several millimeters, which is also called a carrier substrate. The module substrate 10 has a single dielectric layer, and has a structure in which a metal pattern is provided only on the main surface. As the module substrate 10, an alumina substrate, a semiconductor substrate made of a semi-insulating material such as silicon or gallium arsenide, or an insulating substrate such as a resin substrate can be used. In the present embodiment, for example, an alumina substrate is used as the carrier substrate 10.
[0016]
On the main surface of the module substrate 10 (hereinafter simply referred to as the substrate 10), a high-frequency semiconductor element 11, a plurality of composite electronic components 12A to 12D each including a capacitor and a connection conductor for a ground path are mounted. A metal pattern is applied.
[0017]
The high-frequency semiconductor element 11 is, for example, a semiconductor chip having a chip size of about 1 to 3 mm square, and includes a microwave band or a millimeter such as a HEMT (high electron mobility transistor), an HBT (hetero bipolar transistor), and a MESFET (metal silicon FET). Includes one or more active elements operable in the waveband. In the present embodiment, an example will be described in which an MMIC type semiconductor chip made of, for example, gallium arsenide is used as the high-frequency semiconductor element 11.
[0018]
FIG. 3 is a block diagram illustrating a specific circuit example of the high-frequency semiconductor element 11. In this example, a two-stage amplifier is configured using HEMTs as active elements. The high-frequency signal input to the high-frequency input electrode 21 is supplied to the gate terminal of the first-stage HEMT 23 via the input matching circuit 22. The high-frequency signal extracted from the drain terminal of the first-stage HEMT 23 is supplied to the gate terminal of the second-stage HEMT 25 via the inter-stage matching circuit 24. The high-frequency signal extracted from the drain terminal of the second-stage HEMT 25 is output to the high-frequency output electrode 27 via the output matching circuit 26. Bias electrodes 28A and 28B are connected to the drain terminals of the HEMTs 23 and 25, and bias electrodes 29A and 29B are connected to the gate terminals.
[0019]
The metal pattern on the module substrate 10 is formed on the module substrate 10 using, for example, a metal conductor material such as gold, copper, tungsten, silver, or a silver-palladium alloy. The metal pattern includes an input line 13, an output line 14, bias lines 15A to 15D, rectangular ground patterns 16A to 16D, and strip-shaped ground patterns 17A and 17B. The input line 13 and the output line 14 are connected to the high-frequency input electrode 21 and the high-frequency output electrode 27 of the high-frequency semiconductor device 11 shown in FIG. 3, respectively, and are provided for inputting and outputting high-frequency signals.
[0020]
The bias lines 15A to 15D are lines for supplying a bias voltage to the high-frequency semiconductor element 11, and one ends thereof are connected to the bias electrodes 28A, 28B, 29A, 29B of the high-frequency semiconductor element 11 shown in FIG. The lead terminals at the other ends are connected to a bias voltage source (not shown) outside the high-frequency integrated circuit device. In this example, a set of bias lines 15A and 15B and a set of bias lines 15C and 15D are arranged in parallel, the former set being on the upper side of the high-frequency semiconductor device 11 in FIG. 1 are arranged opposite to the lower side.
[0021]
The rectangular ground patterns 16 </ b> A to 16 </ b> D are arranged at four corners on the module substrate 10. The strip-shaped ground patterns 17A and 17B are arranged between the bias lines 15A and 15B and between the bias lines 15C and 15D, respectively. Therefore, each of the bias lines 15A to 15D is sandwiched between two ground patterns.
[0022]
In this example, the high-frequency semiconductor element 11 is mounted on the module substrate 10 by face-down flip-lip connection, and provided on a surface corresponding to the substrate 10, a high-frequency input electrode indicated by a dotted circle in FIG. The high-frequency output electrode, the bias electrode, and the ground electrode are connected to one end of each of the input line 13, the output line 14, the bias lines 15A to 15D, and the ground patterns 16A to 16D and 17A, 17B. The other ends of the input line 13, the output line 14, the bias lines 15A to 15D, the ground patterns 16A to 16D, and 17A and 17B are lead electrodes as shown by small rectangles. On the other hand, the composite electronic components 12A to 12D are mounted on the module substrate 10 using, for example, a normal solder reflow process.
[0023]
Next, the composite electronic components 12A to 12D will be described.
Each of the composite electronic components 12A to 12D has one bias electrode and two ground electrodes provided so as to sandwich the bias electrode on the same plane. It has a structure in which a capacitor is formed between the electrodes and a ground path is formed between the ground electrodes. Capacitors formed between the bias electrode and each of the ground electrodes are electrically connected in parallel and function as one capacitor.
[0024]
With such a structure, the composite electronic components 12A to 12D ground the bias lines 15A to 15D at a high frequency and function as ground decoupling capacitors for preventing the fluctuation of the bias voltage. It has a function as a ground path for electrically connecting the ground patterns on both sides of the 15D. That is, the ground path in the component 12A connects between the ground patterns 16A and 17A, the ground path in the component 12B connects between the ground patterns 16B and 17A, and the ground path in the component 12C connects between the ground patterns 16C and 17B. The ground path in the component 12D connects between the ground patterns 16D and 17B.
[0025]
FIG. 4 shows a configuration example of the composite electronic components 12A to 12D. FIG. 4 shows only one composite electronic component 12. The composite electronic component of this example has the same basic structure as a known multilayer ceramic capacitor, and includes a first electrode layer 31 and a second electrode layer in a dielectric block 30 made of a material having a high dielectric constant such as ceramics. The layers 32 are laminated with a dielectric layer 33 therebetween. Here, the point that the connection conductor 34 is arranged on the uppermost layer is different from the ordinary multilayer ceramic capacitor.
[0026]
Through holes 35 and 36A, 36B penetrate through the central part and both sides in the longitudinal direction of the dielectric block 30, and the ends of the through holes 35, 36A, 36B are formed on the bottom surface of the dielectric block 30, respectively. Electrode 37 and ground electrodes 38A and 38B.
[0027]
The first electrode layer 31 has the pattern shown in FIG. 5A. The center portion is connected to the bias electrode 37 via the through hole 35, and both ends are not connected to the through holes 36A and 36B. Contact. On the other hand, the second electrode layer 32 has a pattern divided into two regions as shown in FIG. 5B, and both ends are ground electrodes 38A, 38B via through holes 36A, 36B, respectively. , And the central portion is not in contact with the through hole 35. Therefore, between the bias electrode 37 and the ground electrode 38A and between the bias electrode 37 and the ground electrode 38B, the individual capacitors formed by the first and second electrode layers 31, 32 and the dielectric layer 33 are provided. Are formed in parallel.
[0028]
Unlike the electrode layers 31 and 32, the uppermost connection conductor 34 is a so-called solid electrode, that is, a conductor formed continuously between the through holes 36A and 36B, and both ends of the connection conductor 34 are provided through the through holes 36A and 36B, respectively. Connected to ground electrodes 38A and 38B. Accordingly, the connection electrodes 34 short-circuit the ground electrodes 38A and 38B.
[0029]
When the composite electronic components 12A to 12D having such a structure are mounted as shown in FIG. 1, the ground electrodes 38A and 38B are connected to the ground patterns 16A and 17A in the component 12A, and to the ground patterns 16B and 17A in the component 12B. The component 12C is connected to the ground patterns 16C and 17B, and the component 12D is connected to the ground patterns 16D and 17B. At this time, a ground path formed by the connection conductors 34 in the composite electronic components 12A to 12D causes a connection between the ground patterns 16A and 17A, between the ground patterns 16B and 17A, between the ground patterns 16C and 17B, and between the ground patterns 16D and 17B. Connected respectively.
[0030]
That is, the ground patterns 16A, 16B, 17A and 16C, 16D, 17B on the module substrate 10 are electrically connected to each other by a ground path formed by the connection conductor 34, and have a common ground potential. Therefore, the operation of the high-frequency semiconductor element 11 can be stabilized even in an ultra-high frequency region such as a quasi-millimeter wave band or a millimeter wave band.
[0031]
FIG. 6 shows another configuration example of the composite electronic components 12A to 12D. The composite electronic component of the example shown in FIG. 4 has a multilayer ceramic capacitor structure, whereas the composite electronic component of the example of FIG. 6 uses a single dielectric layer generally used as a high-frequency capacitor. Has the same structure as a so-called MIM capacitor.
[0032]
That is, in FIG. 6, the bias electrode 47 and the ground electrodes 48A and 48B are attached on the lower surface of the dielectric substrate 40 in the figure, and the connection conductor is provided on the upper surface of the dielectric layer 40 in the figure. 44 are uniformly applied. The connection conductor 44 and the ground electrodes 48A, 48B are connected via through holes 46A, 46B provided through the dielectric layer 40, respectively. Two capacitors are formed by the dielectric layer 40, the bias electrode 47, and the ground electrodes 48A and 48B. The capacitance of each capacitor is given by combining the capacitance between the bias electrode 47 and the ground electrodes 48A and 48B and the capacitance between the bias electrode 47 and the connection conductor 44.
[0033]
The composite electronic component of FIG. 6 has the same advantages as the composite electronic component shown in FIG. 4 because the connection conductors 44 short-circuit the ground electrodes 48A and 48B.
That is, when the composite electronic components 12A to 12D having the structure of FIG. 6 are mounted as shown in FIG. 1, the ground electrodes 48A and 48B are connected to the ground patterns 16A and 17A, the ground patterns 16B and 17A, By contacting the patterns 16C and 17B and the ground patterns 16D and 17B, and by the ground paths formed by the connection conductors 44 in the components 12A to 12D, the ground patterns 16A and 17A, the ground patterns 16B and 17A, and the ground patterns 16C and 17B Between the ground patterns 16D and 17B.
[0034]
Accordingly, the ground patterns 16A, 16B and 17A or 16C, 16D and 17B on the module substrate 10 are electrically connected to each other by a ground path formed by the connection conductor 44, and have a common ground potential. The operation of the high-frequency semiconductor element 11 can be stabilized even in the waveband to the millimeter waveband.
[0035]
When the composite electronic components 12A to 12D shown in FIG. 4 or FIG. 6 are used, the connection conductor 34 or 44 that forms the ground path is provided in the composite electronic components 12A to 12D together with the decoupling capacitor. The cost is lower than the path forming method.
[0036]
That is, conventionally, as described above, (1) a method in which a ground pattern provided on the substrate surface is connected to a ground pattern formed on the entire back surface of the substrate by through holes, and (2) a bridge using a wire. A method of connecting adjacent ground patterns separated on a substrate by a member is used. On the other hand, in the present embodiment, the ground path can be easily formed only by preparing the composite electronic components 12A to 12D in which the connection conductor 34 or 44 is added to the capacitor component.
[0037]
As described above, according to the present embodiment, a carrier substrate having a double-sided metal pattern and a through hole or a bridge member for connecting between independent adjacent ground metal patterns is unnecessary, so that the number of components is small and the mounting cost is low. Thus, a low-cost high-frequency integrated circuit device using an inexpensive module substrate having a metal pattern only on the main surface can be realized.
[0038]
FIG. 7 is a plan view of a high-frequency integrated circuit device according to another embodiment of the present invention, which has two composite electronic components 12E and 12F. The composite electronic component 12E has a configuration in which the composite electronic components 12A and 12B in FIG. 1 are integrated, and the composite electronic component 12F has a configuration in which the composite electronic components 12C and 12D in FIG. 1 are integrated.
[0039]
Each of the composite electronic components 12C and 12D has two bias electrodes and a total of three ground electrodes provided so as to sandwich the bias electrodes on the same plane. , And a capacitor is formed between them, and a ground path is formed between the ground electrodes. Capacitors formed between one bias electrode and each ground electrode are electrically connected in parallel and function as one capacitor, so that one composite electronic component has two capacitors.
[0040]
FIG. 8 shows a configuration example of the composite electronic components 12E and 12F.
FIG. 8 shows only one composite electronic component. The composite electronic component shown in FIG. 8 has a structure in which two composite electronic components shown in FIG. 4 are integrated, and a first electrode layer 31A and a second electrode layer 32A are disposed on the left side of the dielectric block 30 in the drawing. Are stacked on each other with a dielectric layer 33A interposed therebetween, and a connection conductor 34A is disposed on the uppermost layer. Similarly, also on the right side in the figure, the first electrode layer 31B and the second electrode layer 32B are similarly arranged with the dielectric layer 33B interposed therebetween. The connection conductor 34B is arranged on the uppermost layer.
[0041]
Through holes 35A, 35B and 36C, 36D, 36E penetrate through the dielectric block 30, and ends of the through holes 35A, 35B and 36C, 36D, 36E are formed on the bottom surface of the dielectric block 30, respectively. The electrodes are connected to the bias electrodes 37A, 37B and 38C, 38D, 38E.
[0042]
The first electrode layers 31A and 31B have the pattern shown in FIG. 5A, and the central portions are connected to the bias electrodes 37A and 37B via through holes 35A and 35B, respectively. The second electrode layers 32A, 32B have the pattern shown in FIG. 5B, and both ends are connected to ground electrodes 38C, 38D and 38D, 38E via through holes 36C, 36D and 36D, 36E, respectively. Is done.
[0043]
Therefore, the first and second electrode layers 31A, 31B, 32A, 32B and the dielectric material are provided between the bias electrode 37A and the ground electrodes 38C and 38D and between the bias electrode 37B and the ground electrodes 38D and 38E. Capacitors formed by parallel connection of the individual capacitors constituted by the layers 33A and 33B are formed.
[0044]
The uppermost connection conductors 34A and 34B are conductors formed continuously between the through holes 36C, 36D and 36E, and are connected to the ground electrodes 38A and 38B via the through holes 36A and 36B, respectively. Accordingly, the grounding electrodes 38C, 38D, 38E are short-circuited by the connection conductors 34A, 34B.
[0045]
FIG. 9 shows another configuration example of the composite electronic components 12E and 12F.
FIG. 9 shows only one composite electronic component. The composite electronic component of this example has a structure in which the two composite electronic components shown in FIG. 6 are integrated, and a layer of the connection conductor 44 is uniformly applied to one surface of the dielectric layer 40, and Bias electrodes 47A and 47B and ground electrodes 48C, 48D and 48E are attached. The connection conductor 44 and the ground electrodes 48C, 48D, 48E are connected via through holes 46C, 46D, 46E provided through the dielectric layer 40, respectively.
[0046]
Two capacitors are formed by the dielectric layer 40, the bias electrodes 47A and 47B, and the ground electrodes 48C, 48D and 48E. The capacitance of each capacitor is given by combining the capacitance between the bias electrodes 47A, 47B and the ground electrodes 48C, 48D, 48E and the capacitance between the bias electrodes 47A, 47B and the connection conductor 44. Can be
[0047]
As described above, according to the present embodiment, the ground path can be easily formed only by preparing the composite electronic components 12E and 12F in which the connection conductors 34A, 34B or 44 are added to the capacitor component. Similar effects can be obtained. Furthermore, in the present embodiment, the number of composite electronic components is halved compared to the previous embodiment, so that mounting is further facilitated.
[0048]
Next, a more specific implementation example of the high-frequency integrated circuit device will be described with reference to FIGS.
FIG. 10 shows an example in which the high-frequency integrated circuit device shown in FIG. 1 is mounted on a motherboard. The high-frequency integrated circuit device is mounted on the motherboard 50 in a BGA (ball grid array) type I / O system using an extraction electrode 18 provided on the main surface of the module substrate 10 as an I / O (input / output) electrode. Implemented. That is, the extraction electrodes 18 are connected to the electrodes 53 on the motherboard 50 via the solder balls 52, respectively. Here, the extraction electrode 18 is, for example, an electrode indicated by a small rectangle provided at the other end of each of the input line 13, the output line 14, the bias lines 15A to 15D, and the ground patterns 16A to 16D and 17A and 17B in FIG. is there.
[0049]
FIG. 11 shows another example in which the high-frequency integrated circuit device shown in FIG. 1 is mounted on a motherboard. The high-frequency integrated circuit device is mounted on the motherboard 50 in an LGA (land grid array) type I / O system using electrodes provided on the back surface of the module substrate 10 as I / O electrodes. That is, on the back surface of the module substrate 10, there are provided LGA electrodes 55 connected to the lead electrodes 18 on the main surface via the through holes 54, and these LGC electrodes 55 are connected to the electrodes 53 on the motherboard 50. And are connected by solder or the like.
[0050]
FIG. 12 shows an example in which a plurality of high-frequency integrated circuit devices shown in FIG. 1 are mounted on a motherboard. For the I / O electrodes between the high-frequency integrated circuit device and the motherboard 50, electrodes provided on the main surface of the module substrate 10 are used. The motherboards 50 are connected by bonding wires 56.
[0051]
【The invention's effect】
As described above, according to the present invention, in a high-frequency integrated circuit device having a plurality of capacitors connected between a bias line for supplying a bias to a high-frequency semiconductor element and a ground pattern, an independent ground pattern connection By connecting ground patterns on a substrate without using a bridge component or a substrate having a double-sided metal pattern and a through hole, a low-cost high-frequency integrated circuit device can be provided.
[Brief description of the drawings]
FIG. 1 is a plan view showing a configuration of a high-frequency integrated circuit device according to an embodiment of the present invention.
FIG. 2 is a sectional view taken along the line AA 'of FIG.
FIG. 3 is a block diagram showing a specific circuit configuration example of the high-frequency semiconductor device according to the embodiment;
FIG. 4 is an exemplary sectional view showing a configuration example of the composite electronic component according to the embodiment;
FIG. 5 is a sectional view taken along lines BB ′ and CC ′ in FIG. 3;
FIG. 6 is an exemplary sectional view showing another configuration example of the composite electronic component according to the embodiment;
FIG. 7 is a plan view showing a configuration of a high-frequency integrated circuit device according to another embodiment of the present invention.
FIG. 8 is an exemplary sectional view showing a configuration example of the composite electronic component according to the embodiment;
FIG. 9 is an exemplary sectional view showing another configuration example of the composite electronic component according to the embodiment;
FIG. 10 is a sectional view showing a first mounting example of the high-frequency integrated circuit device according to the embodiment of the present invention;
FIG. 11 is a sectional view showing a second mounting example of the high-frequency integrated circuit device according to the embodiment of the present invention;
FIG. 12 is a sectional view showing a third mounting example of the high-frequency integrated circuit device according to the embodiment of the present invention;
[Explanation of symbols]
10 Module board
11 High frequency semiconductor device
12A to 12D, 12E, 12F ... composite electronic components
13. Input line
14 ... Output line
15A-15D: bias line
16A-16D, 17A, 17B ... ground pattern
30 ... Dielectric block
31: first electrode layer
32: second electrode layer
33: dielectric layer
34 connection conductor layer
35, 36A, 36B, 36C to 36E ... Through-hole
37, 37A, 37B ... bias electrode
38A, 38B, 38C to 38E: ground electrode
40 ... dielectric substrate
46A, 46B, 46C to 46E: Through-hole
47, 47A, 47B ... bias electrode
48A, 48B, 48C to 48E: ground electrode

Claims (6)

A substrate having a main surface;
A high-frequency semiconductor element provided on the main surface of the substrate;
A bias line provided on the main surface of the substrate for supplying a bias to the high-frequency semiconductor element;
First and second ground patterns provided on the main surface of the substrate so as to sandwich the bias line from both sides;
First and second capacitors connected between the bias line and the first and second ground patterns, respectively, and connection conductors connecting the first and second ground patterns are provided. A high-frequency integrated circuit device comprising a composite electronic component. The composite electronic component includes: a bias electrode connected to the bias line; first and second ground electrodes connected to the first and second ground patterns, respectively; At least one dielectric layer is provided to form a capacitance between the first and second ground electrodes, and the connection conductor is provided between the first ground electrode and the second ground electrode. 2. The high-frequency integrated circuit device according to claim 1, wherein the high-frequency integrated circuit device is arranged to short-circuit between the electrodes. The composite electronic component has a structure in which a first electrode layer and a second electrode layer and a dielectric layer, which are separated into two regions in an in-plane direction, are alternately stacked, and the first electrode layer is shared. A bias electrode connected to the bias line and a first ground electrode commonly connected to one of the divided regions of the second electrode layer and connected to the first ground pattern; An electrode, and a second ground electrode connected to the other divided area of the second electrode layer in common and connected to the second ground pattern, wherein the connection conductor is the first ground electrode; The high-frequency integrated circuit device according to claim 1, wherein the high-frequency integrated circuit device is disposed on the stacked body so as to short-circuit between a ground electrode and a second ground electrode. The composite electronic component includes a dielectric substrate having the connection conductor layer uniformly provided on one surface, and a bias connected to the bias line provided on one surface of the dielectric substrate. Electrodes, first and second ground electrodes provided on one surface of the dielectric substrate and connected to the first and second ground patterns, respectively, the connection conductor, and the first and second ground electrodes. 2. The high-frequency integrated circuit device according to claim 1, further comprising: first and second through holes provided through the dielectric substrate so as to connect the first and second ground electrodes. A substrate having a main surface;
A high-frequency semiconductor element provided on the main surface of the substrate;
First and second bias lines provided in parallel on the main surface of the substrate for supplying different biases to the high-frequency semiconductor device;
A first ground pattern provided between the first and second bias lines on the main surface of the substrate;
A second ground pattern provided so as to sandwich the first bias line between the first bias line and the first ground pattern;
A third ground pattern provided so as to sandwich the second bias line between the second bias line and the first ground pattern;
First to fourth capacitors connected between the first and second bias lines and the first to third ground patterns, respectively, and a first to connect between the first and second ground patterns. And a composite electronic component having a second connection conductor connecting between the second and third ground patterns. The composite electronic component includes first and second electrodes connected to the first and second bias lines, third to fifth electrodes respectively connected to the first to third ground patterns, and At least one dielectric layer provided so as to form a capacitance between the first and second electrodes and the third to fifth electrodes, and the first connection conductor is provided in the third connection layer. 6. The high-frequency integrated circuit device according to claim 5, wherein the second connection conductor is arranged to short-circuit between the fourth and fifth electrodes, and the second connection conductor is arranged to short-circuit between the fourth and fifth electrodes.

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