JP2004200582A - Resin sealed semiconductor device - Google Patents

Resin sealed semiconductor device Download PDF

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Publication number
JP2004200582A
JP2004200582A JP2002370142A JP2002370142A JP2004200582A JP 2004200582 A JP2004200582 A JP 2004200582A JP 2002370142 A JP2002370142 A JP 2002370142A JP 2002370142 A JP2002370142 A JP 2002370142A JP 2004200582 A JP2004200582 A JP 2004200582A
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JP
Japan
Prior art keywords
chip
semiconductor device
resin
semiconductor
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002370142A
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Japanese (ja)
Inventor
Yoshio Yokota
芳夫 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP2002370142A priority Critical patent/JP2004200582A/en
Publication of JP2004200582A publication Critical patent/JP2004200582A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resin sealed semiconductor device capable of efficiently discharging the heat of the semiconductor chips, made thin and eliminating the bending process of the lead frame. <P>SOLUTION: Semiconductor chips are mounted on a recessed part of the thick lead frame on which the recessed part is formed. In a claim 3, stacked stack chips are dropped into the recessed part. In a claim 4, one of the stack chips is a controlling semiconductor chip and the other is an output semiconductor chip. In a claim 5, the thickness of the lead frame having the recessed part is ≥25% the thickness of the resin sealed type semiconductor device. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、樹脂封止型半導体装置の放熱構造に関するものである。
【０００２】
【従来の技術】
従来の樹脂封止型半導体装置はリードフレームに半導体チップを搭載し、所望箇所を電気的に接続後、樹脂封止する構造になっていた。この構造は、半導体チップからの放熱を良くするために、パッケージをとりつけた部分からの熱を効率良く逃がすため、できるだけ基板取り付け接触部分とリードフレーム間の樹脂厚をうすくして、放熱性を高めている。一方、端子は取り付け場所がヒートシンク等の導電性のものである場合も多々あるため、端子が取りつけ部に近いと沿面距離が小さくなり、沿面放電をおこす恐れがあった。そこで、通常リードフレームを折り曲げ、端子を取りつけ面から離れるような構造にしている。また厚いヒートシンク状のリードフレームに半導体チップを搭載する方法も考えられたが、装置全体の厚さが厚くなりすぎてしまい実用に適しなかった。特に、スタックチップのようにチップの上にチップを重ねるような構造は厚くなりやすいので、問題があった。よって通常は、図５のように半導体チップが複数の場合はチップを横に並べて、搭載していた。更に図６より明らかなようにリードフレームを折り曲げなければならないといった問題点もあった。
【０００３】
【特許文献１】
特開6-244336号 代表図 これは、一般的な樹脂封止型半導体装置である。樹脂は図示されていないが、リードフレームに半導体チップが搭載されている。リードフレームが折り曲げられているのは装置を取り付けたときに沿面距離がかせげるからである。しかしこれらの構造は放熱性が悪い、リードフレームを折り曲げる必要性があるといった問題点があった。
【０００４】
【発明が解決しようとする課題】
本願は、半導体チップの熱を効率良く放出し、装置を薄型化し、更にはリードフレームを折り曲げないですむようにする樹脂封止型半導体装置を供給するものである。
【０００５】
【課題を解決するための手段】
本願は、凹部が設けられた厚型のリードフレームの凹部に半導体チップを搭載することによって、薄型化し、リードフレームの折り曲げを不要とした。
【０００６】
請求項２は半導体チップは複数個であり、少なくとも１つの半導体チップが前記凹部に落としこまれていることを特徴とする。請求項３は複数の半導体チップは、少なくとも１つが半導体チップを縦方向に積んだ段積みのスタックチップであり、段積みのスタックチップが凹部に落としこまれていることを特徴とする。請求項４は半導体チップを縦方向に積んだ段積みのスタックチップは一方が制御用半導体チップであり、他方が出力用半導体チップであることを特徴とする。請求項５は前記凹部を持つリードフレーム厚さは樹脂封止型半導体装置厚さの２５％以上であることを特徴とし、リードフレームにヒートシンクのように厚型のものを用いたことを特徴とする。
【０００７】
【発明の実施の形態】
以下、本発明の実施の形態について図面を参照して説明する。
図１は本願の発明の一実施例図である。図１は搭載する半導体チップは，出力用半導体チップであるＭＯＳチップ３と制御用半導体であるＩＣチップをスタックチップとして使用し、下側にＭＯＳチップ３、上側にＩＣチップを搭載した一例である。本願装置の製造方法を簡単に説明する。本願樹脂封止型半導体装置を製造するには、凹部２を持つリードフレーム１がいくつか連結されたものをダイボンダー装置により凹部2にはんだを自動供給し溶融させ、その上にＭＯＳチップ３をダイボンドし、更にその上に予めダイアタッチ用絶縁テープを具備したＩＣチップ４を搭載し熱圧着して固着させる。次にワイヤーボンダー装置を用いＩＣチップ４の任意電極とＭＯＳチップ３のゲート、ソース電極と端子6等をワイヤーにて電気的に接続する。その後トランスファーモールドを用いてリードフレームを樹脂で封止して、最後に不要箇所を切断して本発明装置を完成する。
【０００８】
本実施例は、ＭＯＳチップ３、ＩＣチップ４をスタックチップとして搭載した例を示したがさまざまなバリエーションが展開できる。例えば、凹部２に搭載するチップが、ＭＯＳチップ３、ＩＣチップ４のいずれか一方の場合や、更にダイオードチップをリードフレーム１上に搭載する場合である。また端子の本数は今回は７本の例を示したが、特に発明には関係なく、端子の数は何本でも使用可能である。また、凹部の形状も本実施例に限らず、もっと縦長や横長にすることも可能であるし、凹部の個数も一箇所に限らず、複数にすることもできる。
【０００９】
【発明の効果】
このように本発明は、半導体チップの熱を効率良く逃がすことを達成し、装置の信頼性を高くし、装置を薄型化し、更にはリードフレームを折り曲げないですみ、製造工程を簡略化した樹脂封止型半導体装置を供給するものである産業上利用可能性大なるものである。
【図面の簡単な説明】
【図１】本発明の実施の形態に係る樹脂封止型半導体装置の一実施例平面図。
【図２】本発明の実施の形態に係る樹脂封止型半導体装置の一実施例側面図
【図３】本発明樹脂封止型半導体装置の樹脂をはがした斜視図
【図４】本発明樹脂封止型半導体装置の樹脂封止後斜視図
【図５】従来の樹脂封止型半導体装置の一実施例平面図
【図６】従来の樹脂封止型半導体装置の一実施例平面図
【符号の説明】
１…リードフレーム
２…凹部
３…ＭＯＳチップ
４…ＩＣチップ
５…樹脂
６…端子
７…はんだ
８…モールドパッケージ[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a heat dissipation structure of a resin-encapsulated semiconductor device.
[0002]
[Prior art]
A conventional resin-encapsulated semiconductor device has a structure in which a semiconductor chip is mounted on a lead frame, a desired portion is electrically connected, and then resin encapsulation is performed. This structure improves the heat dissipation by improving the heat dissipation from the semiconductor chip and efficiently dissipating the heat from the part where the package is mounted. ing. On the other hand, since the terminal is often mounted on a conductive material such as a heat sink, if the terminal is close to the mounting portion, the creepage distance is reduced, and there is a possibility that creepage discharge may occur. Therefore, the lead frame is usually bent so that the terminal is separated from the mounting surface. A method of mounting a semiconductor chip on a thick heat-sink-shaped lead frame was also considered, but the thickness of the entire device became too thick and was not suitable for practical use. In particular, there is a problem because a structure in which a chip is stacked on a chip, such as a stack chip, tends to be thick. Therefore, usually, when there are a plurality of semiconductor chips as shown in FIG. 5, the chips are mounted side by side. Further, as is apparent from FIG. 6, there is another problem that the lead frame must be bent.
[0003]
[Patent Document 1]
This is a general resin-sealed semiconductor device. Although a resin is not shown, a semiconductor chip is mounted on a lead frame. The lead frame is bent because the creepage distance is increased when the device is mounted. However, these structures have problems such as poor heat dissipation and the necessity of bending the lead frame.
[0004]
[Problems to be solved by the invention]
The present application is to provide a resin-encapsulated semiconductor device that efficiently radiates heat of a semiconductor chip, makes the device thinner, and furthermore does not need to bend a lead frame.
[0005]
[Means for Solving the Problems]
In the present application, a semiconductor chip is mounted in a concave portion of a thick lead frame provided with a concave portion, thereby reducing the thickness and eliminating the need for bending the lead frame.
[0006]
A second aspect of the present invention is characterized in that a plurality of semiconductor chips are provided, and at least one semiconductor chip is dropped into the recess. A third aspect of the present invention is characterized in that at least one of the plurality of semiconductor chips is a stacked stack chip in which semiconductor chips are stacked in a vertical direction, and the stacked stack chips are dropped into recesses. According to a fourth aspect of the present invention, one of the stacked stack chips in which semiconductor chips are stacked in the vertical direction is a control semiconductor chip and the other is an output semiconductor chip. According to a fifth aspect of the present invention, the thickness of the lead frame having the concave portion is 25% or more of the thickness of the resin-encapsulated semiconductor device, and the lead frame is made of a thick type such as a heat sink. I do.
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing an embodiment of the present invention. FIG. 1 shows an example in which a MOS chip 3 serving as an output semiconductor chip and an IC chip serving as a control semiconductor are used as stack chips, a MOS chip 3 is mounted on a lower side, and an IC chip is mounted on an upper side. . A brief description will be given of a method of manufacturing the present apparatus. In order to manufacture the resin-encapsulated semiconductor device of the present invention, a device in which several lead frames 1 each having a concave portion 2 are connected is automatically supplied with solder to the concave portion 2 by a die bonder device and melted, and a MOS chip 3 is die-bonded thereon. Then, an IC chip 4 having a die-attaching insulating tape is mounted thereon and bonded by thermocompression. Next, using a wire bonder device, an arbitrary electrode of the IC chip 4 is electrically connected to a gate, a source electrode and the terminal 6 of the MOS chip 3 by wires. Thereafter, the lead frame is sealed with resin using transfer molding, and finally, unnecessary portions are cut to complete the device of the present invention.
[0008]
In this embodiment, an example is shown in which the MOS chip 3 and the IC chip 4 are mounted as a stack chip, but various variations can be developed. For example, a case where the chip mounted on the concave portion 2 is either the MOS chip 3 or the IC chip 4 or a case where a diode chip is further mounted on the lead frame 1. Although the number of terminals is seven in this example, any number of terminals can be used regardless of the invention. Further, the shape of the concave portion is not limited to the present embodiment, but may be longer or shorter. The number of concave portions is not limited to one, but may be plural.
[0009]
【The invention's effect】
As described above, the present invention achieves the efficient dissipation of heat from the semiconductor chip, increases the reliability of the device, makes the device thinner, furthermore, does not need to bend the lead frame, and simplifies the manufacturing process. The present invention has great industrial applicability for supplying a sealed semiconductor device.
[Brief description of the drawings]
FIG. 1 is a plan view of one example of a resin-sealed semiconductor device according to an embodiment of the present invention.
FIG. 2 is a side view of one example of a resin-sealed semiconductor device according to an embodiment of the present invention; FIG. 3 is a perspective view of the resin-sealed semiconductor device of the present invention with the resin removed; FIG. FIG. 5 is a perspective view of a resin-encapsulated semiconductor device after resin encapsulation. FIG. 5 is a plan view of one embodiment of a conventional resin-encapsulated semiconductor device. Explanation of reference numerals]
DESCRIPTION OF SYMBOLS 1 ... Lead frame 2 ... Concave part 3 ... MOS chip 4 ... IC chip 5 ... Resin 6 ... Terminal 7 ... Solder 8 ... Mold package

Claims (5)

リードフレームに半導体チップを搭載し、樹脂で封止した樹脂封止型半導体装置において、前記リードフレームには凹部が設けられ、前記半導体チップが前記凹部に落としまれていることを特徴とした樹脂封止型半導体装置。In a resin-sealed semiconductor device in which a semiconductor chip is mounted on a lead frame and sealed with a resin, a concave portion is provided in the lead frame, and the semiconductor chip is dropped in the concave portion. Stop type semiconductor device. 前記半導体チップは複数個であり、少なくとも１つの半導体チップが前記凹部に落としこまれていることを特徴とした請求項１の樹脂封止型半導体装置。2. The resin-encapsulated semiconductor device according to claim 1, wherein there are a plurality of said semiconductor chips, and at least one semiconductor chip is dropped into said recess. 前記複数の半導体チップは、少なくとも１つが半導体チップを縦方向に積んだ段積みのスタックチップであり、前記段積みのスタックチップが前記凹部に落としこまれていることを特徴とした請求項２の樹脂封止型半導体装置。3. The plurality of semiconductor chips according to claim 2, wherein at least one of the plurality of semiconductor chips is a stacked stack chip in which semiconductor chips are stacked in a vertical direction, and the stacked stack chips are dropped into the recess. Resin-sealed semiconductor device. 前記半導体チップを縦方向に積んだ段積みのスタックチップは一方が制御用半導体チップであり、他方が出力用半導体チップであることを特徴とした請求項３の樹脂封止型半導体装置。4. The resin-encapsulated semiconductor device according to claim 3, wherein one of the stacked stack chips in which the semiconductor chips are stacked in the vertical direction is a control semiconductor chip and the other is an output semiconductor chip. 前記凹部を持つリードフレーム厚さは樹脂封止型半導体装置厚さの２５％以上であることを特徴とした請求項１〜請求項４の樹脂封止型半導体装置。5. The resin-encapsulated semiconductor device according to claim 1, wherein the thickness of the lead frame having the concave portion is 25% or more of the thickness of the resin-encapsulated semiconductor device.
JP2002370142A 2002-12-20 2002-12-20 Resin sealed semiconductor device Pending JP2004200582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002370142A JP2004200582A (en) 2002-12-20 2002-12-20 Resin sealed semiconductor device

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Application Number Priority Date Filing Date Title
JP2002370142A JP2004200582A (en) 2002-12-20 2002-12-20 Resin sealed semiconductor device

Publications (1)

Publication Number Publication Date
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Family

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Family Applications (1)

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Country Status (1)

Country Link
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