JP2004184489A - Method for driving electronic circuit, electronic circuit, electrooptical device, method for controlling electrooptical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for driving an electronic circuit with which both high-speed display and sufficient display quality can be realized, the electronic circuit, an electrooptical device, a method for driving the electrooptical device, and electronic apparatus. <P>SOLUTION: A data current Idata corresponding to gradations of image data is supplied to a hold capacitor C1 and the capacitor C1 holds the amount of electric charges corresponding to the data current Idata. At this point, when the image data have high gradations, the data current Idata corresponding to the gradations are supplied to the hold capacitor C1. When the image data has low gradations, on the other hand, not a data current Idata corresponding to the low gradations, but a predetermined data current Idata for high gradations is supplied to the hold capacitor C1. Further, when the image data has the low gradations, the light emission period of an organic EL element emitting light with a driving current corresponding to the data current Idata is made shorter than its normal light emission period. Even when the data current Idata for the high gradations is supplied, display of low gradations is possible. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for driving an electronic circuit, an electronic circuit, an electro-optical device, a control method for an electro-optical device, and an electronic apparatus.
[0002]
[Prior art]
In recent years, in a display device as an electro-optical device, an electro-optical device using an organic EL element has attracted attention. Since the organic EL element is a self-luminous element that can be driven with low power, it is expected that an electro-optical device with low power consumption, a high viewing angle, and a high contrast ratio can be realized. In an electro-optical device using such an organic EL element, a pixel circuit for controlling the luminance of the organic EL element is provided for each organic EL element.
[0003]
The electro-optical device is provided with a data line drive circuit for generating and supplying a data current corresponding to a luminance gradation to each of the pixel circuits. The data line driving circuit generates a data current of a large current in the case of luminance of a high gradation, generates a data current of a small current in the case of luminance of a low gradation, and outputs a pixel data through a data line. Supply to the circuit.
[0004]
The electro-optical device includes an analog gray scale method (for example, Patent Document 1) and a digital gray scale method (for example, Patent Document 2) as a driving method for controlling the halftone of the organic EL element. As one of the analog gray scale methods, a threshold voltage of a drive transistor for supplying a drive current to an organic EL element is set to a threshold voltage of the transistor. Then, there is a method in which a voltage corresponding to the data current is applied to the driving transistor from that state to drive the driving transistor.
[0005]
According to the above method, the amount of charge corresponding to the data current supplied to the pixel circuit from the data line driving circuit via the data line is held in the holding capacitor in accordance with the luminance gradation of the organic EL element. Then, by applying a voltage corresponding to the amount of charge held in the holding capacitor to the gate terminal, the conduction state of the driving transistor is controlled, and the amount of current supplied to the organic EL element is controlled.
[0006]
[Patent Document 1]
Pamphlet of International Publication No. WO98 / 3640
[Patent Document 2]
JP-A-2002-175047
[0007]
[Problems to be solved by the invention]
By the way, in the case of an electro-optical device or the like having a large display area, the data line becomes long. As a result, with a small current for displaying a low gray scale, a delay in display time and a deterioration in display accuracy due to the influence of wiring capacitance and the like are remarkable. This hinders the improvement of moving image characteristics.
[0008]
Thus, as one of the digital gradation methods, a time division gradation method for expressing a gradation by dividing one frame, which is the light emission time of one organic EL element, into a plurality of subframes is considered. However, in the case of expressing a high gradation in the time division gradation, the number of subframes increases. For this reason, the frequency of the transistor rises, and the display of high gradation often flickers due to the influence of the mobility and the like. This is the same for a liquid crystal display, which is a problem in improving moving image characteristics.
[0009]
The present invention has been made to solve the above problems. An object of the present invention is to provide a driving method of an electronic circuit, an electronic circuit, an electro-optical device, a driving method of an electro-optical device, and an electronic apparatus which can achieve both high-speed display and sufficient display quality and have excellent moving image characteristics. is there.
[0010]
[Means for Solving the Problems]
A method for driving an electronic circuit according to the present invention includes a first transistor, a capacitor that holds a charge amount according to a multi-level data signal supplied from a data line via the first transistor, and the capacitor. A second transistor for controlling the conduction state based on the amount of electric charge held in the second transistor and supplying a drive amount corresponding to the conduction state to the electronic element, and an electronic element having a drive amount based on the conduction state of the second transistor And a third transistor for supplying and shutting off the current to the electronic circuit, comprising: changing a shutoff timing of the third transistor to change a drive amount relative to a conduction state of the second transistor. The supply period to the electronic device is changed.
In the present invention, the above-mentioned driving amount means, for example, a voltage value applied to the electronic element or a current amount or current value to be supplied.
[0011]
According to this, the cutoff timing of the third transistor is changed to change the period of supplying the electronic element with the drive amount corresponding to the conduction state of the second transistor. When supplying a large amount of driving amount to the electronic element in a short period of time when supplying the driving amount to the electronic element, it can be equivalent. As a result, the operation delay of the electronic element due to the influence of the wiring capacitance of the data line and the like is reduced.
[0012]
In this electronic circuit driving method, the change of the cutoff timing by the third transistor is made shorter than a predetermined supply period for the multivalued data signal of the predetermined value.
[0013]
According to this, for example, when the drive amount is controlled to be supplied to the electronic element by a multi-value data signal equal to or less than a predetermined value, the multi-value data signal having a large value is not used instead of the multi-value data signal having a small value. Is supplied to the first capacitive element. At the same time, the supply period of the drive amount supplied to the electronic element via the third transistor is shortened. As a result, even if the drive amount corresponding to the large-valued multi-valued data signal is supplied to the electronic element, the supply period is shortened. It can be made equivalent to that supplied to the element. As a result, the operation delay of the electronic element due to the influence of the wiring capacitance of the data line and the like is reduced.
[0014]
The electronic circuit according to the present invention includes: a first transistor; a first capacitor that holds a charge amount according to a multi-level data signal supplied from a data line via the first transistor; The conductive state is controlled based on the amount of charge held in the capacitive element, and a second transistor that supplies a drive amount corresponding to the conductive state to the electronic element, and supplies or shuts off the drive amount to the electronic element. An electronic circuit including a third transistor for performing the operation, wherein a second capacitor for holding either conduction or non-conduction of the third transistor at a gate of the third transistor; And a fourth transistor for supplying a control signal for keeping the third transistor conductive or non-conductive to the second capacitive element.
[0015]
According to this, for example, in a case where the drive amount is controlled to be supplied to the electronic element by a multi-valued data signal equal to or less than a predetermined value, the multi-valued data signal having a large value is not used instead of the small-valued data signal having a small value. A data signal is supplied to the first capacitor through the first transistor. The conduction state of the second transistor is controlled based on the amount of charge held in the first capacitor, and the second transistor supplies a drive amount corresponding to the conduction state to the electronic element. On the other hand, a control signal is supplied to the second capacitor through the fourth transistor. The third transistor becomes non-conductive based on the control signal held in the second capacitor, and stops the supply of the drive amount to the electronic element by the second transistor. Therefore, by increasing the timing at which the third transistor is turned off, it is possible to make the driving amount corresponding to a multi-valued data signal equal to or less than a predetermined value equivalent to supplying a driving amount to the electronic element. As a result, the operation delay of the electronic element due to the influence of the wiring capacitance of the data line and the like is reduced.
[0016]
In this electronic circuit, the control signal is supplied from the data line via the fourth transistor.
According to this, the data line supplies two types of signals, a data signal and a control signal. As a result, a dedicated wiring for supplying a control signal becomes unnecessary.
[0017]
An electro-optical device according to an aspect of the invention is an electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, and each of the plurality of unit circuits includes a plurality of unit circuits via the plurality of data lines. A data signal generating circuit that outputs a multi-valued data signal, and a control signal that controls start and stop of the operation of the unit circuit that operates based on the multi-valued data signal, for each of the plurality of unit circuits. A control signal generating circuit for outputting the control signal, and the unit circuit includes a holding unit for holding a control signal from the control signal generating circuit.
[0018]
According to this, for example, in a case where the drive amount is controlled to be supplied to the electronic element by a multi-valued data signal that is equal to or less than a predetermined value, the large-valued multi-valued data signal is not used instead of the small-valued multi-valued data signal. A data signal is generated by a data signal generation circuit. Then, the generated large-valued multi-valued data signal is supplied to the unit circuit. On the other hand, the control signal generation circuit supplies a control signal for controlling the start and stop of the operation of the unit circuit to the unit circuit based on the multi-valued data signal. Then, the control signal from the control signal generation circuit is held by the holding means provided in the unit circuit. Therefore, by outputting a control signal for shortening the operation period of the unit circuit from the control signal generation circuit, it can be equivalent to operating the unit circuit according to a multi-valued data signal of a predetermined value or less. it can. As a result, the operation delay of the unit circuit due to the influence of the wiring capacity of the data line and the like can be reduced, and the moving image characteristics can be improved.
[0019]
In this electro-optical device, the control signal is supplied via the same data line as the multi-level data signal.
According to this, the data line supplies two types of signals, a data signal and a control signal. As a result, a dedicated wiring for supplying a control signal becomes unnecessary.
[0020]
In this electro-optical device, the control signal is supplied via a signal line different from a data line to which the multi-level data signal is supplied.
According to this, the control signal and the multi-value data signal are supplied to the unit circuit through separate lines.
[0021]
In this electro-optical device, the unit circuit includes a first transistor that is turned on when the scanning line is selected, and a charge corresponding to a multi-level data signal supplied from a data line via the first transistor. A first capacitor that holds a quantity, a second transistor whose conduction state is controlled based on the amount of charge held in the capacitance element, and supplies a driving amount corresponding to the conduction state to the electronic element; A third transistor for supplying or interrupting a drive amount to the electronic element based on the conduction state of the second transistor; and connecting the gate of the third transistor to either the conduction or non-conduction of the third transistor. A second capacitor for holding, and a control signal for causing the second capacitor to hold the third transistor conductive or non-conductive. Consisting of the fourth transistor.
[0022]
According to this, for example, in a case where the drive amount is controlled to be supplied to the electronic element by a multi-valued data signal equal to or less than a predetermined value, the multi-valued data signal having a large value is not used instead of the small-valued data signal having a small value. A data signal is supplied to the first capacitor through the first transistor. The conduction state of the second transistor is controlled based on the amount of charge held in the first capacitor, and the second transistor supplies a drive amount corresponding to the conduction state to the electronic element. On the other hand, a control signal is supplied to the second capacitor through the fourth transistor. The third transistor becomes non-conductive based on the control signal held in the second capacitor, and stops the supply of the drive amount to the electronic element by the second transistor. Therefore, by increasing the timing at which the third transistor is turned off, it is possible to make the driving amount corresponding to a multi-valued data signal equal to or less than a predetermined value equivalent to supplying a driving amount to the electronic element. As a result, the operation delay of the electronic element due to the influence of the wiring capacitance of the data line and the like can be reduced, and the moving image characteristics can be improved.
[0023]
In this electro-optical device, the electronic element is an EL element.
According to this, the EL element emits light in response to the conduction state of the second transistor, and stops emitting light when the third transistor is off.
[0024]
In this electro-optical device, the EL element has a light-emitting layer made of an organic material.
According to this, the EL element is an organic EL element in which the light emitting layer is formed of an organic material.
[0025]
The control method of the electro-optical device according to the present invention includes a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits, sequentially selects a plurality of scanning lines, and selects each unit on the selected scanning line. A method of controlling an electro-optical device, wherein a multi-valued data signal is supplied from a data signal generation circuit to a circuit via a data line, and the next new scanning line is selected after the selection of the scanning line is completed. Is selected at predetermined intervals, and control is performed such that each unit circuit on each scanning line is started or stopped during each period.
[0026]
According to this, between the end of the selection of the previous scanning line and the start of the selection of the next new scanning line, control is performed to start or stop the operation of each unit circuit on each scanning line. Therefore, for example, when a unit circuit is driven with a small drive amount, a large drive amount can be equivalent by driving the unit circuit only for a short period. As a result, the operation delay of the unit circuit due to the influence of the wiring capacity of the data line and the like can be reduced, and the moving image characteristics can be improved.
[0027]
The electronic apparatus according to the present invention has the electro-optical device described above mounted thereon.
According to this, high-speed display and sufficient display quality can be achieved at the same time, and display with excellent moving image characteristics can be realized.
[0028]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
[0029]
FIG. 1 is a block circuit diagram showing a circuit configuration of an organic EL display 10 as an electro-optical device. FIG. 2 is a block circuit diagram showing an internal circuit configuration of the display panel unit and the data line driving circuit. FIG. 3 is a circuit diagram showing an internal circuit configuration of the pixel circuit.
[0030]
As shown in FIG. 1, the organic EL display 10 includes a display panel unit 11, a data line driving circuit 12, a scanning line driving circuit 13, an oscillation circuit 14, a control circuit 15, a memory circuit 16, and a power supply circuit 17.
[0031]
The display panel section 11 and the circuits 12 to 17 of the organic EL display 10 may be configured by independent electronic components, respectively. For example, each of the circuits 12 to 17 may be configured by a one-chip semiconductor integrated circuit. Further, the display panel unit 11 and all or a part of each of the circuits 12 to 17 may be configured as an integrated electronic component. For example, the data line driving circuit 12 and the scanning line driving circuit 13 may be formed integrally with the display panel unit 11. All or a part of each of the circuits 12 to 17 may be configured by a programmable IC chip, and the functions thereof may be realized in software by a program written in the IC chip.
[0032]
As shown in FIG. 2, the display panel unit 11 includes a plurality of data lines X1 to Xm (m is an integer) extending in a column direction and a plurality of scanning lines Y1 to Yn (n is an integer) extending in a row direction. Has a plurality of unit circuits or a pixel circuit 20 as an electronic circuit arranged at a position corresponding to the intersection with. In other words, each pixel circuit 20 is connected between a plurality of data lines X1 to Xm extending in the column direction and a plurality of scanning lines Y1 to Yn extending in the row direction, so that each pixel circuit 20 The circuits 20 are arranged in a matrix. Each pixel circuit 20 has an organic EL element 21 (see FIG. 3) as an electronic element whose light emitting layer is made of an organic material. Note that a later-described transistor formed in the pixel circuit 20 is usually configured by a thin film transistor (TFT).
[0033]
Next, the circuit configuration of the pixel circuit 20 will be described with reference to FIG. For convenience of description, the pixel circuit 20 that is arranged at the intersection of the m-th data line Xm and the n-th scanning line Yn and that is connected between the two data lines Xm and the scanning line Yn will be described.
[0034]
In FIG. 3, the pixel circuit 20 includes a driving transistor Qd, first and second switching transistors Qsw1, Qsw2, a starting transistor Qst, and a holding capacitor C1. Further, the pixel circuit 20 includes a gradation control transistor Qct and a gradation control capacitor C2. The drive transistor Qd, the first and second switching transistors Qsw1 and Qsw2, the start transistor Qst, and the gradation control transistor Qct are configured by P-channel FETs. In this embodiment, the first and second switching transistors Qsw1 and Qsw2 are the first transistor, the driving transistor Qd is the second transistor, the start transistor Qst is the third transistor, and the gradation control transistor Qct. Constitute the fourth transistor. Further, the holding capacitor C1 constitutes the first capacitance element, and the gradation control capacitor C2 constitutes the holding means or the second capacitance element.
[0035]
The drive transistor Qd has a drain connected to the anode of the organic EL element 21 and a source connected to the power supply line L1 via the start transistor Qst. The drive voltage Voel for driving the organic EL element 21 is supplied to the power supply line L1. A holding capacitor C1 is connected between the gate and the source of the driving transistor Qd.
[0036]
The first switching transistor Qsw1 is connected between the gate and the drain of the driving transistor Qd. The source of the driving transistor Qd is connected to the data line Xm via the second switching transistor Qsw2. The data line Xm is connected to the single line drive circuit 30 of the data line drive circuit 12. The first sub-scanning line Yn1 forming the scanning line Yn is connected to the gates of the first and second switching transistors Qsw1 and Qsw2. The first and second switching transistors Qsw1 and Qsw2 are turned on / off by the first scanning signal SCn1 output to the first sub-scanning line Yn1.
[0037]
Further, the gate of the start transistor Qst is connected to the data line Xm via the gradation control transistor Qct. The second sub-scanning line Yn2 forming the scanning line Yn is connected to the gate of the gradation control transistor Qct. The grayscale control transistor Qct is turned on / off by the second scanning signal SCn2 output to the second sub-scanning line Yn2. Further, a gradation control capacitor C2 is connected between the gate and the source of the start transistor Qst.
[0038]
When the first and second switching transistors Qsw1 and Qsw2 are turned on from the off state in response to the L-level (low-level) first scanning signal SCn1, a data current Idata described later is supplied to the holding capacitor C1 from the data line Xm. It has become. Then, the holding capacitor C1 has a charge amount based on the data current Idata, and a voltage corresponding to the data current Idata is applied to the gate of the driving transistor Qd.
[0039]
Further, when the gradation control transistor Qct is turned on from the off state in response to the second scan signal SCn2 at the L level, a control voltage Xgp described later is supplied from the data line Xm to the gradation control capacitor C2. Has become. The control voltage Xgp from the data line Xm is a voltage signal for turning on / off the start transistor Qst. When the start transistor Qst is turned on, the voltage is at the L level, and when the start transistor Qst is turned off, The voltage is an H level (high level) voltage signal.
[0040]
Therefore, when the gradation control transistor Qct is turned on and the L-level control voltage Xgp is applied to the gradation control capacitor C2 from the data line Xm, the start transistor Qst is turned on. Even if the gradation control transistor Qct is turned off after the L-level control voltage Xgp is applied to the gradation control capacitor C2, the L-level control voltage Xgp is held in the gradation control capacitor C2. The start transistor Qst holds the ON state.
[0041]
On the other hand, when the gradation control transistor Qct is turned on and the H-level control voltage Xgp is applied to the gradation control capacitor C2 from the data line Xm, the start transistor Qst is turned off. Even if the gradation control transistor Qct is turned off after the H level control voltage Xgp is applied to the gradation control capacitor C2, the H level control voltage Xgp is held in the gradation control capacitor C2. The start transistor Qst holds the off state.
[0042]
That is, the start transistor Qst is turned on based on the L-level control voltage Xgp in a state where a voltage corresponding to the data current Idata is applied to the gate of the drive transistor Qd. As a result, the drive voltage Voel is applied to the drive transistor Qd, and the drive transistor Qd supplies a current corresponding to the data current Idata to the organic EL element 21. As a result, the organic EL element 21 emits light at a luminance corresponding to the data current Idata.
[0043]
Further, in a state where the organic EL element 21 emits light at a luminance corresponding to the data current Idata, the start transistor Qst is turned off based on the control voltage Xgp at the H level. As a result, the supply of the drive voltage Voel to the drive transistor Qd is cut off, and the drive transistor Qd is turned off. As a result, the supply of the current corresponding to the data current Idata is cut off, and the organic EL element 21 stops emitting light.
[0044]
The data line drive circuit 12 includes a single line drive circuit 30 for each of the data lines X1 to Xm. Each single line driving circuit 30 supplies the data current Idata and the control voltage Xgp to the corresponding pixel circuit 20 in the column direction via each of the data lines X1 to Xm. As shown in FIG. 3, each single line drive circuit 30 includes a data current generation circuit 30a as a data signal generation circuit and a control voltage generation circuit 30b as a control signal generation circuit. The data current generation circuit 30a supplies the respective data currents Idata to the pixel circuits 20 connected to the corresponding data lines X1 to Xm via the first switch Q11. Note that the data current Idata generated by the data current generating circuit 30a is multi-valued, and in the present embodiment, 64 current values are generated.
[0045]
The control voltage generation circuit 30b supplies the H level or L level control voltage Xgp to the pixel circuits 20 connected to the corresponding data lines X1 to Xm via the second switch Q12. Whether the control voltage generation circuit 30b generates or outputs the H level control voltage Xgp or the L level control voltage Xgp is controlled by a data line control signal CTD of the control circuit 15 described later. .
[0046]
The first switch Q11 is composed of a P-channel FET, and is turned on / off by a first gate signal G1. The second switch Q12 is composed of a P-channel FET, and is turned on / off by a second gate signal G2. The first switch Q11 and the second switch Q12 are controlled such that when one of them is on, the other is always off.
[0047]
In the present embodiment, the first switch Q11 is set to the L level while the first scanning signals SCn1 to SCn1 of the L level are output to the first sub-scanning lines Y11 to Yn1 constituting the scanning lines Y1 to Yn. Is turned on by the first gate signal G1. At this time, the second switch Q12 is off. Accordingly, while the first scanning signals SCn1 to SCn1 at the L level are being output, the corresponding pixel circuits 20 of the selected scanning lines Y1 to Yn receive the corresponding data current Idata via the data lines X1 to Xm. Supplied.
[0048]
On the other hand, while the second scanning signal SCn2 to SCn2 at L level is being output to the second sub-scanning lines Y12 to Yn2 constituting the scanning lines Y1 to Yn, the second switch Q12 is connected to the second gate at L level. It is turned on by the signal G2. At this time, the first switch Q11 is off. Therefore, while the L-level second scanning signals SCn2 to SCn2 are being output, the control voltage Xgp is supplied to the pixel circuits 20 of the scanning lines Y1 to Yn selected at that time via the data lines X1 to Xm. You.
[0049]
The scanning line driving circuit 13 selectively drives one of the plurality of scanning lines Y1 to Yn to select a pixel circuit group for one row. Each of the scanning lines Y1 to Yn includes a first sub-scanning line Y11 to Yn1 and a second sub-scanning line Y12 to Yn2. Then, the scanning line driving circuit 13 supplies the first scanning signals SC11 to SCn1 to the pixel circuit 20 via the first sub-scanning lines Y11 to Yn1, respectively. More specifically, as shown in FIG. 5, the scanning line drive circuit 13 sequentially outputs the L-level first scanning signals SC11 to SCn1 for the scanning lines Y1 to Yn only during the period Ta. Further, after selecting one scanning line, the scanning line driving circuit 13 outputs an L-level first scanning signal for selecting the next scanning line after a predetermined period Tb has elapsed. Therefore, in the selection operation of the scanning lines Y1 to Yn, one scanning line is selected for the period Ta, and when the selection ends and the period Tb elapses, the next scanning line is selected.
[0050]
Further, the scanning line driving circuit 13 supplies the second scanning signals SC12 to SCn2 to the pixel circuit 20 via the second sub-scanning lines Y12 to Yn2. The timing at which the scanning line drive circuit 13 outputs the second scanning signals SC12 to SCn2 is the above-described period Tb, and is output during the pre-assigned period of the period Tb. That is, during the period Ta, the second scanning signals SC12 to SCn2 of all the second sub-scanning lines Y12 to Yn2 are output in a predetermined order without overlapping each other.
[0051]
The predetermined order is different in each period Tb shown in FIG. In the present embodiment, the second scanning signal immediately after completing the selection (the second scanning signal output first) is the second scanning signal to be output to the second sub-scanning line constituting the scanning line for which the selection has been completed. It is to be. This is because the control voltage Xgp at the L level is supplied to start the light emitting operation immediately after supplying the data current Idata. Further, the second scan signal (last output second scan signal) immediately before selecting the next selected scan line is output to the second sub-scan line constituting the next selected scan line. The second scanning signal. This is because the H-level control voltage Xgp is supplied to temporarily stop the light emitting operation before supplying the new data current Idata.
[0052]
Then, when the second scanning signals of the scanning lines (second sub-scanning lines) to be output first and last are determined, the second sub-scanning lines are sequentially selected in the meantime, and the second sub-scanning lines are sequentially selected. A scanning signal is output. Incidentally, the period Tb between the first scanning signal SC21 and the first scanning signal SC31 is the second scanning signal SC22 of the second sub-scanning line Y22 → the second scanning signal SC12 of the second sub-scanning line Y12 → the second sub-scanning line Y12. The second scanning signal SCn2 of the scanning line Yn2 →... → the second scanning signal SC52 of the second sub-scanning line Y52 → the second scanning signal SC42 of the second sub-scanning line Y42 → the second of the second sub-scanning line Y32. This becomes the scanning signal SC32.
[0053]
The oscillation circuit 14 supplies the reference operation signal to other components of the organic EL display 10. The memory circuit 16 stores image data supplied from the computer 18. The power supply circuit 17 supplies driving power for each component of the organic EL display 10.
[0054]
The control circuit 15 controls the display panel unit 11 and the circuits 12 to 14, 16, and 17 as a whole. The control circuit 15 converts the image data stored in the memory circuit 16 representing the display state of the display panel unit 11 into matrix data representing the luminance gradation of each organic EL element 21 according to a judgment circuit provided therein. .
[0055]
The matrix data includes scanning lines Y1 to Yn (first and second sub-scanning lines) that output the first and second scanning signals SC11 to SCn1 and SC12 to SCn2 in order to select a pixel circuit group for one row. Includes a scanning line control signal CTS for designating.
[0056]
The matrix data includes a data line control signal CTD for determining the data current Idata for setting the luminance of the organic EL element 21 of the selected pixel circuit group. At this time, the control circuit 15 includes, among the pixel circuits 20 on the scanning line selected based on the image data, the pixel circuit 20 that causes the organic EL element 21 to emit light at gradations of “4” to “64”; It is determined which pixel circuit 20 causes the EL element 21 to emit light at gradations of “1” to “3”.
[0057]
In the case of the pixel circuit 20 that causes the organic EL element 21 to emit light with a gradation of “4” to “64”, the control circuit 15 determines the pixel circuit 20 as a data current Idata based on image data. The signal CTD is output. Therefore, the data current generation circuit 30a of the single line drive circuit 30 that supplies the data current Idata to the pixel circuit 20 that emits light at gradations of “4” to “64” generates the data current Idata corresponding to each gradation. The output is controlled by the control circuit 15. Further, at this time, the control circuit 15 supplies the data current Idata corresponding to each gray scale, from the first sub-scanning signal output first in the period Tb to the last second sub-scanning signal output in the period Tb. The control voltage generation circuit 30b is controlled so that the period becomes the light emission period TH. The control circuit 15 generates and outputs the H-level control voltage Xgp in synchronization with the second scanning signal output immediately before supplying the data current Idata to the pixel circuit 20, and otherwise generates the L-level control voltage Xgp. Is generated and output.
[0058]
On the other hand, in the case of the pixel circuit 20 that causes the organic EL element 21 to emit light at gradations of “1” to “3” (low gradation), the control circuit 15 controls the pixel circuit 20 with a data current Idata based on image data. Instead, a data line control signal CTD that determines a predetermined fixed value as the data current Idata is output. In the present embodiment, a predetermined fixed value is set to the same value as the data current Idata when the data current Idata is caused to emit light at the gradation of “4”. Accordingly, the data current generation circuit 30a of the single line drive circuit 30 that supplies the data current Idata to the pixel circuit 20 that emits light at the gradations of “1” to “3” (the low gradation) has the gradation “4”. Is controlled by the control circuit 15 so as to generate and output the data current Idata when emitting light. Further, at this time, the control circuit 15 supplies the data current Idata to emit light at the gradation of “4”, and emits light at the gradations of “1” to “3” (low gradation). The control voltage generation circuit 30b is controlled to change the period. That is, each period Tb is appropriately selected until the data current Idata based on the next image data (frame) is supplied, and the H-level control voltage Xgp is synchronized with the second scanning signal in the selected period Tb. By supplying the light, the light emission period is changed.
[0059]
In the present embodiment, when the gradation is “3”, the light emission is started (3/4) TH period after the light emission is started, and when the gradation is “2”, the light emission is started (2 / 4) In the case of the gradation of “1” during the TH period, the light emission period is shortened according to the gradation, such as a (（) TH period after light emission is started.
[0060]
By the way, in the case of the gradation of “2”, it is a (2/4) TH period from the start of light emission. Accordingly, the control circuit 15 supplies the control voltage generation circuit 30b with a second sub-scanning signal that is output in the entire period Tb after the period Tb that occurs at the time when half of the scanning lines are selected after the start of light emission. The control is performed so that the control voltage Xgp at the H level is output in synchronization. As described above, in the case of the low gradation mode in which the gradation of “1” to “3” is expressed, the data current Idata of the gradation of “4”, which is a relatively large value, flows through the data lines X1 to Xm to emit light. It can be expressed by controlling the period to be short.
[0061]
Then, the scanning line control signal CTS is supplied to the scanning line driving circuit 13, and the data line control signal CTD is supplied to the data line driving circuit 12.
Further, the control circuit 15 controls the driving timing of the scanning lines Y1 to Yn and the data lines X1 to Xm, and controls the on / off of the first and second switches Q11 and Q12 of the single line driving circuit 30. The first and second gate signals G1 and G2 are output. That is, the control circuit 15 outputs the first gate signal G1 in synchronization with the first scanning signals SC11 to SCn1. Further, the control circuit 15 outputs the second gate signal G2 in synchronization with the second scanning signals SC12 to SCn2.
[0062]
Next, the operation of the organic EL display 10 configured as described above will be described according to the scanning line selection operation of the control circuit 15. For ease of description, an organic EL display 10 including four scanning lines Y1 to Y4 and three data lines X1 to X3 as shown in FIG. 4 will be described as an example. Accordingly, the series of pixel circuits 20 connected to each scanning line is three each. In order to further facilitate understanding, the pixel circuit 20 connected to the scanning line Y1 and the data line X2 is set to a gray scale of “1” and the pixel connected to the scanning line Y2 and the data line X1 based on image data. A case will be described in which the circuit 20 is controlled to have a gray scale of “2” and the pixel circuit 20 connected to the scanning line Y3 and the data line X3 is controlled to have a gray scale of “3”. It is assumed that the other pixel circuits 20 are controlled with a gradation of “4” or more.
[0063]
FIG. 5 shows the first scan signals SC11 to SC41, the second scan signals SC12 to SC42, the first and second scan signals output to four scan lines Y1 to Y4 (first and second sub-scan lines). 4 shows a timing chart of the gate signals G1 and G2.
[0064]
[Operation Based on First Scanning Signals SC11 to SC41]
First, the operation when the L-level first scanning signals SC11 to SC41 are output at the respective timings for the period Ta will be described.
[0065]
1. Period Ta during which first scan signal SC11 is output
An L-level first scanning signal SC11 is output from the scanning line driving circuit 13 to the scanning line Y1 (first sub-scanning line Y11) during a period Ta. The first and second switching transistors Qsw1 and Qsw2 of the three pixel circuits 20 connected to the scanning line Y1 (first sub-scanning line Y11) are turned on. At the same time, the first gate signal G1 is output from the control circuit 15 to each single line drive circuit 30 of the data line drive circuit 12, and the first switch Q11 is turned on. In response to the turning on of the first switch Q11, each single line drive circuit 30 outputs a data current Idata from the data current generation circuit 30a based on the data line control signal CTD from the control circuit 15, respectively.
[0066]
At this time, of the three pixel circuits 20 connected to the scanning line Y1, the pixel circuit 20 connected to the data line X2 has a gradation of “1” and the other two pixel circuits 20 have “4” or more. Is controlled by the gray scale of. Then, the data current generating circuits 30a for the data lines X1 and X3 generate the data current Idata corresponding to the gray scale based on the data line control signal CTD and output the data current Idata to the respective data lines X1 and X3. On the other hand, the data current generation circuit 30a of the data line X2 generates the data current Idata corresponding to the gradation of "4" and outputs the data current Idata to the data line X2 because the gradation is "1" which is the low gradation.
[0067]
Therefore, among the three pixel circuits 20 connected to the scanning line Y1, the pixel circuit 20 connected to the data lines X1 and X3 is supplied with the data current Idata corresponding to the gradation, and connected to the data line X2. The supplied pixel circuit 20 is supplied with the data current Idata corresponding to the gradation of “4”. As a result, a charge corresponding to the data current Idata is supplied to the holding capacitor C1 of each pixel circuit 20, and a voltage corresponding to the charge is applied to the gate of the drive transistor Qd.
[0068]
When the period Ta elapses and the first scanning signal SC11 and the first gate signal G1 become H level, the supply of the data current Idata from the data current generation circuit 30a of each single line drive circuit 30 is cut off. At this time, since the first and second switching transistors Qsw1 and Qsw2 are turned off, each holding capacitor C1 holds a charge amount corresponding to the data current Idata, and a voltage corresponding to the charge amount is applied to the driving transistor Qd. Keep applying to the gate.
[0069]
2. Period Ta during which first scan signal SC21 is output
When the first scanning signal SC11 goes to the H level on the first sub-scanning line Y11 of the scanning line Y1 and the period Tb elapses, the first scanning signal SC21 is output to the first sub-scanning line Y21 of the scanning line Y2 for the period Ta. . The three pixel circuits 20 connected to the scanning line Y2 (first sub-scanning line Y21) are controlled in the same manner as the pixel circuit 20 for the scanning line Y1.
[0070]
At this time, among the three pixel circuits 20 connected to the scanning line Y2, only the pixel circuit 20 connected to the data line X1 has a gray scale of “2”, and thus the data current generation circuit 30a has a “4” gray scale. A data current Idata corresponding to the tone is generated and output to each data line X2. Since the other two pixel circuits 20 have gradations of “4” or more, the data current generation circuit 30a generates a data current Idata corresponding to the gradation and outputs the data current Idata to each of the data lines X2 and X3.
[0071]
Therefore, of the three pixel circuits 20 connected to the scanning line Y2, the pixel circuit 20 connected to the data lines X2 and X3 is supplied with the data current Idata corresponding to the gradation, and connected to the data line X1. The supplied pixel circuit 20 is supplied with the data current Idata corresponding to the “4” gradation. Then, a charge amount corresponding to the data current Idata is supplied to the holding capacitor C1 of each pixel circuit 20, and a voltage corresponding to the charge amount is applied to the gate of the driving transistor Qd.
[0072]
When the period Ta elapses and the first scanning signal SC21 and the first gate signal become H level, the supply of the data current Idata from each data current generating circuit 30a is cut off. At this time, similarly to the above, each holding capacitor C1 holds a charge amount corresponding to the data current Idata, and continues to apply a voltage corresponding to the charge amount to the gate of the driving transistor Qd.
[0073]
3. Period Ta during which first scan signal SC31 is output
When the first scanning signal SC21 goes to the H level on the first sub-scanning line Y21 of the scanning line Y2 and the period Tb elapses, the first scanning signal SC31 is output for the period Ta on the first sub-scanning line Y31 of the scanning line Y3. . The three pixel circuits 20 connected to the scanning line Y3 (first sub-scanning line Y31) are controlled in the same manner as the pixel circuits 20 for the scanning lines Y1 and Y2.
[0074]
At this time, among the three pixel circuits 20 connected to the scanning line Y3, only the pixel circuit 20 connected to the data line X3 has a gray scale of “3”, so that the data current generation circuit 30a has a gray scale of “4”. A data current Idata corresponding to the tone is generated and output to each data line X3. Since the other two pixel circuits 20 have the gradation of “4” or more, the data current generation circuit 30a generates the data current Idata corresponding to the gradation and outputs the data current Idata to the respective data lines X1 and X2.
[0075]
Therefore, of the three pixel circuits 20 connected to the scanning line Y3, the pixel circuit 20 connected to the data lines X1 and X2 is supplied with the data current Idata corresponding to the gradation, and is connected to the data line X3. The supplied pixel circuit 20 is supplied with the data current Idata corresponding to the “4” gradation. Then, a charge amount corresponding to the data current Idata is supplied to the holding capacitor C1 of each pixel circuit 20, and a voltage corresponding to the charge amount is applied to the gate of the driving transistor Qd.
[0076]
When the period Ta elapses and the first scanning signal SC21 and the first gate signal G1 become H level, the supply of the data current Idata from each data current generating circuit 30a is cut off. At this time, similarly to the above, each holding capacitor C1 holds a charge amount corresponding to the data current Idata, and continues to apply a voltage corresponding to the charge amount to the gate of the driving transistor Qd.
[0077]
4. Period Ta during which first scan signal SC41 is output
When the period Tb elapses after the first scanning signal SC31 attains the H level on the first sub-scanning line Y31 of the scanning line Y3, the first scanning signal SC41 is output during the period Ta on the first sub-scanning line Y41 of the scanning line Y4. . The three pixel circuits 20 connected to the scanning line Y3 (first sub-scanning line Y31) are controlled in the same manner as the pixel circuits 20 for the scanning lines Y1 and Y2.
[0078]
At this time, since the three pixel circuits 20 connected to the scanning line Y4 have a gray scale of “4” or more, the data current generating circuit 30a generates a data current Idata corresponding to the gray scale and outputs the data lines X1 to X3. Output to
[0079]
Therefore, the three pixel circuits 20 connected to the scanning line Y3 are supplied with the data current Idata corresponding to the gray scale via the data lines X1 to X3, respectively. Then, a charge amount corresponding to the data current Idata is supplied to the holding capacitor C1 of each pixel circuit 20, and a voltage corresponding to the charge amount is applied to the gate of the driving transistor Qd.
[0080]
When the period Ta elapses and the first scanning signal SC21 and the first gate signal G1 become H level, the supply of the data current Idata from each data current generating circuit 30a is cut off. At this time, similarly to the above, each holding capacitor C1 holds a charge amount corresponding to the data current Idata, and continues to apply a voltage corresponding to the charge amount to the gate of the driving transistor Qd.
[0081]
[Operation Based on Second Scanning Signals SC12 to SC42]
Next, when the first scan signals SC11 to SC41 are sequentially output, the operation based on the second scan signals SC12 to SC42 output during each period Tb until the next signal is output will be described.
[0082]
1. Period Tb between first scan signal SC11 and scan signal SC21
When the first scanning signal SC11 goes high, the first gate signal G1 also goes high. Then, during the period Tb during which the L-level first scanning signal SC21 is output to the next scanning line Y2 (first sub-scanning line Y21), the second sub-scanning lines Y12 to Y42 of the scanning lines Y1 to Y4 are output. Thus, the second scanning signals SC12 to SC42 are output in a predetermined order. That is, in this case, the second scanning signal SC12 → the second scanning signal SC42 → the second scanning signal SC32 → the second scanning signal SC22 are output in this order.
[0083]
(1) Second scan signal SC12 of scan line Y1
First, an L-level second scanning signal SC12 is output to the scanning line Y1 (second sub-scanning line Y12) during the period Tc. At the same time, the L-level second gate signal G2 is output for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y1 are turned on by the second scanning signal SC12 at the L level. At this time, in response to the L-level second gate signal G2, the control voltage Xgp from the control voltage generation circuit 30b of each single line drive circuit 30 is applied to the selected pixel via the data lines X1 to X3, respectively. It is supplied to the circuit 20. Then, these control voltages Xgp are supplied to the gradation control capacitor C2 via the gradation control transistor Qct. At this time, since the L-level second scanning signal SC12 for the scanning line Y1 (second sub-scanning line Y12) is for starting light emission, the control voltage generation circuit 30b outputs the L-level control voltage Xgp. I do. Accordingly, the start transistor Qst is turned on by the L-level control voltage Xgp accumulated in the gradation control capacitor C2. When the start transistor Qst is turned on, the drive transistor Qd turns on and supplies a current corresponding to the voltage applied to the gate of the transistor Qd to the organic EL element 21. Thereby, the organic EL element 21 driven by the three pixel circuits 20 connected to the scanning line Y1 starts emitting light. At this time, the organic EL element 21 of the pixel circuit 20 connected to the data line X2 needs to emit light with a luminance of “1”, but emits light with a luminance corresponding to “4”. I have.
[0084]
When the second scanning signal SC12 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC12 becomes H level and the grayscale control transistor Qct is turned off, the grayscale control capacitor C2 holds the low level control voltage Xgp, so that the start transistor Qst keeps on. That is, the organic EL element 21 continues to emit light.
[0085]
(2) Second scanning signal SC42 of scanning line Y4
After the second scanning signal SC12 goes high, the second scanning signal SC42 of low level is output to the scanning line Y4 (second sub-scanning line Y42) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The grayscale control transistors Qct of the three pixel circuits 20 connected to the scanning line Y4 are turned on by the second scanning signal SC42 at the L level.
[0086]
At this time, in response to the L-level second gate signal G2, the control voltage Xgp from the control voltage generation circuit 30b of each single line drive circuit 30 is applied to the selected pixel via the data lines X1 to X3, respectively. It is supplied to the circuit 20. Then, these control voltages Xgp are supplied to the gradation control capacitor C2 via the gradation control transistor Qct. At this time, since the data current Idata is not supplied to each pixel circuit 20 connected to the scanning line Y4 and does not emit light, the control voltage generation circuit 30b outputs the control voltage Xgp at the H level. Therefore, the start transistor Qst is turned off by the H-level control voltage Xgp accumulated in the gradation control capacitor C2. When the start transistor Qst is turned off, the drive transistor Qd is in an off state and does not cause the organic EL element 21 to emit light.
[0087]
When the second scanning signal SC42 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC42 becomes H level and the grayscale control transistor Qct is turned off, the grayscale control capacitor C2 holds the H level control voltage Xgp, so that the start transistor Qst continues to be turned off.
[0088]
(3) Second scan signal SC32 of scan line Y3
Next, when the second scanning signal SC32 of the scanning line Y3 is output, each pixel circuit 20 of the scanning line Y3 similarly does not supply the data current Idata to each pixel circuit 20 and does not emit light. Therefore, control is performed in the same manner as in each pixel circuit 20 of the scanning line Y4.
[0089]
(4) Second scan signal SC22 of scan line Y2
When the second scanning signal SC22 of the scanning line Y2 is output, the pixel circuits 20 of the scanning line Y2 are not supplied with the data current Idata to the pixel circuits 20 and do not emit light. Therefore, control is performed in the same manner as in each pixel circuit 20 of the scanning line Y4.
[0090]
2. Period Tb between first scan signal SC21 and scan signal SC31
When the first scanning signal SC21 goes high, the first gate signal G1 also goes high. Then, during a period Tb during which the L-level first scan signal SC31 is output to the next scan line Y3 (first sub-scan line Y31), the second sub-scan lines Y12 to Y42 of the scan lines Y1 to Y4 are output. Thus, the second scanning signals SC12 to SC42 are output in a predetermined order. That is, in this case, the second scanning signal SC22 → the second scanning signal SC12 → the second scanning signal SC42 → the second scanning signal SC32 are output in this order.
[0091]
(1) Second scan signal SC22 of scan line Y2
First, an L-level second scanning signal SC22 is output to the scanning line Y2 (second sub-scanning line Y22) during the period Tc. At the same time, the L-level second gate signal G2 is output for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y2 are turned on by the second scanning signal SC22 of L level. At this time, the control voltage Xgp from each control voltage generation circuit 30b is supplied to the selected pixel circuit 20 via the data lines X1 to X3 in response to the L-level second gate signal G2. Then, these control voltages Xgp are supplied to the gradation control capacitor C2 via the gradation control transistor Qct.
[0092]
At this time, since the L-level second scanning signal SC22 for the scanning line Y2 (second sub-scanning line Y22) is for starting light emission, the control voltage generation circuit 30b outputs the L-level control voltage Xgp. I do. Accordingly, the start transistor Qst is turned on by the L-level control voltage Xgp accumulated in the gradation control capacitor C2. When the start transistor Qst is turned on, the drive transistor Qd turns on and supplies a current corresponding to the voltage applied to the gate of the transistor Qd to the organic EL element 21. Thereby, the organic EL element 21 driven by the three pixel circuits 20 connected to the scanning line Y2 starts emitting light. At this time, the organic EL element 21 of the pixel circuit 20 connected to the data line X1 needs to emit light with a luminance of “2”, but emits light with a luminance corresponding to the gradation of “4”. I have.
[0093]
When the second scanning signal SC22 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC22 becomes H level and the grayscale control transistor Qct is turned off, the grayscale control capacitor C2 holds the L level control voltage Xgp, so that the start transistor Qst keeps on. That is, the organic EL element 21 continues to emit light.
[0094]
(2) Second scan signal SC12 of scan line Y1
After the second scanning signal SC22 goes to L level, the L level second scanning signal SC12 is output to the scanning line Y1 (second sub-scanning line Y12) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y1 are turned on by the second scanning signal SC12 at the L level.
[0095]
At this time, the control voltage Xgp from each control voltage generation circuit 30b is supplied to the selected pixel circuit 20 via the data lines X1 to X3 in response to the L-level second gate signal G2. Then, these control voltages Xgp are supplied to the gradation control capacitor C2 via the gradation control transistor Qct. At this time, among the pixel circuits 20 connected to the scanning line Y1, the pixel circuits 20 connected to the data lines X1 and X3 have a gradation of “4” or more. Therefore, the control voltage generation circuit 30b connected to the data lines X1 and X3 outputs the L-level control voltage Xgp. Therefore, since the gradation control capacitor C2 accumulates and holds the L-level control voltage Xgp, the start transistor Qst remains on. Accordingly, the driving transistor Qd maintains the ON state and supplies a current to the organic EL element 21, so that the organic EL element 21 maintains light emission.
[0096]
On the other hand, among the pixel circuits 20 connected to the scanning line Y1, the pixel circuit 20 connected to the data line X2 has a gradation of “1”. Therefore, the control voltage generation circuit 30b connected to the data line X2 outputs an H level control voltage Xgp. Therefore, since the gradation control capacitor C2 stores and holds the H-level control voltage Xgp, the start transistor Qst is turned off from the on state. Therefore, the drive transistor Qd is turned off from the on state, and stops the light emission of the organic EL element 21.
[0097]
Therefore, among the pixel circuits 20 connected to the scanning line Y1, the organic EL element 21 of the pixel circuit 20 connected to the data line X2 stops emitting light at this time. That is, the organic EL element 21 of the pixel circuit 20 that expresses the gradation of “1” and emits light based on the data current Idata corresponding to the gradation of “4” for a short time ( = Tb + Ta).
[0098]
When the second scanning signal SC12 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. The second scanning signal SC12 becomes H level, and the gradation control transistor Qct turns off. At this time, since the H-level control voltage Xgp is held in the gradation control capacitor C2 of the pixel circuit 20 in which the organic EL element 21 has stopped emitting light, the start transistor Qst continues to be turned off, and the organic EL element 21 emits light. Keep stopping. On the other hand, since the control voltage Xgp at the L level is held in the gradation control capacitor C2 of the pixel circuit 20 that continuously emits light from the organic EL element 21, the start transistor Qst keeps on and the organic EL element 21 keeps emitting light. .
[0099]
(3) Second scanning signal SC42 of scanning line Y4
After the second scanning signal SC12 goes high, the second scanning signal SC42 of low level is output to the scanning line Y4 (second sub-scanning line Y42) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The grayscale control transistors Qct of the three pixel circuits 20 connected to the scanning line Y4 are turned on by the second scanning signal SC42 at the L level.
[0100]
At this time, since the data current Idata is not supplied to each pixel circuit 20 connected to the scanning line Y4 and does not emit light, the control voltage generation circuit 30b outputs the control voltage Xgp at the H level. Therefore, the start transistor Qst is turned off by the H-level control voltage Xgp accumulated in the gradation control capacitor C2. When the start transistor Qst is turned off, the drive transistor Qd is in an off state and does not cause the organic EL element 21 to emit light.
[0101]
When the second scanning signal SC42 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC42 becomes H level and the grayscale control transistor Qct is turned off, the grayscale control capacitor C2 holds the H level control voltage Xgp, so that the start transistor Qst continues to be turned off.
[0102]
(4) The second scanning signal SC32 of the scanning line Y3
Next, when the second scanning signal SC32 of the scanning line Y3 is output, each pixel circuit 20 of the scanning line Y3 similarly does not supply the data current Idata to each pixel circuit 20 and does not emit light. Therefore, control is performed in the same manner as in each pixel circuit 20 of the scanning line Y4.
[0103]
3. Period Tb between first scan signal SC31 and scan signal SC41
When the first scanning signal SC31 goes high, the first gate signal also goes high. Then, during a period Tb during which the L-level first scanning signal SC41 is output to the next scanning line Y4 (first sub-scanning line Y41), the second sub-scanning lines Y12 to Y42 of the scanning lines Y1 to Y4 are displayed. On the other hand, the second scanning signals SC12 to SC42 are output in a predetermined order. That is, in this case, the second scanning signal SC32 → the second scanning signal SC22 → the second scanning signal SC12 → the second scanning signal SC42 are output in this order.
[0104]
(1) Second scanning signal SC32 of scanning line Y3
An L-level second scanning signal SC32 is output to the scanning line Y3 (second sub-scanning line Y32) during the period Tc. At the same time, the L-level second gate signal G2 is output for the period Tc. At this time, since the L-level second scanning signal SC32 for the scanning line Y3 (second sub-scanning line Y32) is for starting light emission, the control voltage generation circuit 30b outputs the L-level signal in the same manner as described above. The control voltage Xgp is output. Then, as described above, the organic EL element 21 driven by the three pixel circuits 20 connected to the scanning line Y3 starts emitting light. At this time, the organic EL element 21 of the pixel circuit 20 connected to the data line X3 needs to emit light with a luminance of “3”, but emits light with a luminance corresponding to “4”. I have.
[0105]
When the second scanning signal SC32 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC32 goes high to turn off the grayscale control transistor Qct, the grayscale control capacitor C2 holds the low level control voltage Xgp. 21 keeps emitting light.
[0106]
(2) Second scan signal SC22 of scan line Y2
After the second scanning signal SC32 becomes H level, the L level second scanning signal SC22 is output to the scanning line Y2 (second sub-scanning line Y22) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y2 are turned on by the second scanning signal SC22 of L level.
[0107]
At this time, among the pixel circuits 20 connected to the scanning line Y2, the pixel circuits 20 connected to the data lines X2 and X3 have a gradation of “4” or more. Therefore, the control voltage generation circuit 30b connected to the data lines X2 and X3 outputs the L-level control voltage Xgp. Accordingly, as described above, the organic EL element 21 maintains light emission.
[0108]
On the other hand, among the pixel circuits 20 connected to the scanning line Y2, the pixel circuit 20 connected to the data line X1 has a gradation of “2”, and the organic EL element 21 still needs to emit light. The control voltage generation circuit 30b connected to the data line X1 outputs an L level control voltage Xgp. Therefore, the organic EL element 21 of the pixel circuit 20 connected to the data line X1 keeps emitting light.
[0109]
(3) The second scanning signal SC12 of the scanning line Y1
After the second scanning signal SC22 goes to the H level, the second scanning signal SC12 at the L level is output to the scanning line Y1 (second sub-scanning line Y12) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y1 are turned on by the second scanning signal SC12 at the L level.
[0110]
At this time, among the pixel circuits 20 connected to the scanning line Y1, the pixel circuits 20 connected to the data lines X1 and X3 have a gradation of “4” or more. Therefore, the control voltage generation circuit 30b connected to the data lines X1 and X3 outputs the L-level control voltage Xgp. Accordingly, as described above, the organic EL element 21 maintains light emission.
[0111]
On the other hand, among the pixel circuits 20 connected to the scanning line Y1, the organic EL element 21 of the pixel circuit 20 connected to the data line X2 stops emitting light, so that the control voltage generation connected to the data line X2 is stopped. The circuit 30b outputs an H level control voltage Xgp. Therefore, the organic EL element 21 continues to stop emitting light.
[0112]
When the second scanning signal SC12 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. At this time, since the control voltage Xgp at the H level is held in the gradation control capacitor C2 of the pixel circuit 20 in which the organic EL element 21 has stopped emitting light, the organic EL element 21 continues to stop emitting light. On the other hand, since the control voltage Xgp at the L level is held in the gradation control capacitor C2 of the pixel circuit 20 that continuously emits light from the organic EL element 21, the organic EL element 21 continues to emit light.
[0113]
(4) Second scan signal SC42 of scan line Y4
After the second scanning signal SC12 goes high, the second scanning signal SC42 of low level is output to the scanning line Y4 (second sub-scanning line Y42) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The grayscale control transistors Qct of the three pixel circuits 20 connected to the scanning line Y4 are turned on by the second scanning signal SC42 at the L level.
[0114]
At this time, since the data current Idata is not supplied to each pixel circuit 20 connected to the scanning line Y4 and does not emit light, the pixel circuit 20 does not perform the light emission operation as described above.
[0115]
4. In a period Tb between the first scanning signal SC41 and the scanning signal SC11 of the next one frame, when the first scanning signal SC41 becomes H level, the first gate signal G1 also becomes H level. Then, during the period Tb during which the L-level first scanning signal SC11 is output to the scanning line Y1 (first sub-scanning line Y11) in order to display an image of the next new image data, each of the scanning lines Y1 to Y1 is output. The second scanning signals SC12 to SC42 are output in a predetermined order to the second sub-scanning lines Y12 to Y42 of Y4. That is, in this case, the second scanning signal SC42 → the second scanning signal SC32 → the second scanning signal SC22 → the second scanning signal SC12 are output in this order.
[0116]
(1) Second scanning signal SC42 of scanning line Y4
An L-level second scanning signal SC42 is output to the scanning line Y4 (second sub-scanning line Y42) during the period Tc. At the same time, the L-level second gate signal G2 is output for the period Tc. At this time, since the L-level second scanning signal SC42 for the scanning line Y4 (second sub-scanning line Y42) is for starting light emission, similarly to the above, the control voltage generating circuit 30b outputs the L-level second scanning signal SC42. The control voltage Xgp is output. Then, as described above, the organic EL element 21 driven by the three pixel circuits 20 connected to the scanning line Y4 starts emitting light. At this time, the organic EL element 21 of the pixel circuit 20 connected to the data lines X1 to X3 emits light with a luminance of “4” or more, and thus emits light with a luminance corresponding to the data current Idata corresponding to the gradation. I do.
[0117]
When the second scanning signal SC42 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. When the second scanning signal SC32 goes high to turn off the grayscale control transistor Qct, the grayscale control capacitor C2 holds the low level control voltage Xgp. 21 keeps emitting light.
[0118]
(2) Second scan signal SC32 of scan line Y3
After the second scanning signal SC42 becomes H level, the L level second scanning signal SC32 is output to the scanning line Y3 (second sub-scanning line Y32) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The grayscale control transistors Qct of the three pixel circuits 20 connected to the scan line Y3 are turned on by the second scan signal SC32 at L level.
[0119]
At this time, among the pixel circuits 20 connected to the scanning line Y3, the pixel circuits 20 connected to the data lines X1 and X2 have a gradation of “4” or more. Therefore, the control voltage generation circuit 30b connected to the data lines X1 and X2 outputs the L-level control voltage Xgp. Accordingly, as described above, the organic EL element 21 maintains light emission.
[0120]
On the other hand, among the pixel circuits 20 connected to the scanning line Y2, the pixel circuit 20 connected to the data line X3 has a gray scale of “3”, and the organic EL element 21 still needs to emit light. The control voltage generation circuit 30b connected to the data line X3 outputs an L level control voltage Xgp. Therefore, the organic EL element 21 of the pixel circuit 20 connected to the data line X1 keeps emitting light.
[0121]
(3) Second scan signal SC22 of scan line Y2
After the second scanning signal SC32 becomes H level, the L level second scanning signal SC22 is output to the scanning line Y2 (second sub-scanning line Y22) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y2 are turned on by the second scanning signal SC22 of L level.
[0122]
At this time, the control voltage Xgp from each control voltage generation circuit 30b is supplied to the selected pixel circuit 20 via the data lines X1 to X3 in response to the L-level second gate signal G2. At this time, among the pixel circuits 20 connected to the scanning line Y3, the pixel circuits 20 connected to the data lines X2 and X3 have a gradation of “4” or more. Therefore, the control voltage generation circuit 30b connected to the data lines X2 and X3 outputs the L-level control voltage Xgp. Accordingly, as described above, the organic EL element 21 maintains light emission.
[0123]
On the other hand, among the pixel circuits 20 connected to the scanning line Y3, the pixel circuit 20 connected to the data line X1 has a gradation of “2”. Therefore, the control voltage generation circuit 30b connected to the data line X1 outputs the H-level control voltage Xgp. Therefore, the drive transistor Qd is turned off from the on state, and stops the light emission of the organic EL element 21.
[0124]
Therefore, among the pixel circuits 20 connected to the scanning line Y2, the organic EL element 21 of the pixel circuit 20 connected to the data line X1 stops emitting light at this time. That is, the organic EL element 21 of the pixel circuit 20 that expresses the gradation of “2” and emits light based on the data current Idata corresponding to the gradation of “4” for a short time ( = 2Tb + 2Ta).
[0125]
When the second scanning signal SC22 changes from L level to H level, the second gate signal G2 also temporarily changes from L level to H level. The second scanning signal SC22 becomes H level, and the gradation control transistor Qct turns off. At this time, the pixel circuit 20 in which the organic EL element 21 has stopped emitting light keeps stopping the organic EL element 21 from emitting light. On the other hand, the pixel circuit 20 that continues to emit light from the organic EL element 21 keeps the organic EL element 21 emitting light.
[0126]
(4) The second scan signal SC12 of the scan line Y1
After the second scanning signal SC22 goes to the H level, the second scanning signal SC12 at the L level is output to the scanning line Y1 (second sub-scanning line Y12) during the period Tc. At the same time, the L-level second gate signal G2 is output again for the period Tc. The gradation control transistors Qct of the three pixel circuits 20 connected to the scanning line Y1 are turned on by the second scanning signal SC12 at the L level. At this time, the control voltage generation circuit 30b connected to the data lines X1 to X3 outputs an H level control voltage Xgp in order to stop the organic EL element 21 of each pixel circuit 20 connected to the scanning line Y1 from emitting light. . Accordingly, as described above, the organic EL element 21 maintains light emission.
[0127]
Therefore, the organic EL elements 21 of the other two pixel circuits 20 except the pixel circuit 20 connected to the data line X2 which has already stopped emitting light stop. That is, the organic EL element 21 that emits light in accordance with the data current Idata at the gray level of “4” or more, and the pixel circuit 20 that emits light in the predetermined light emission period TH (= 4Tb + 3Ta) Stops the light emission operation of.
[0128]
Therefore, the light emission time of the organic EL element 21 of the pixel circuit 20 connected to the data line X2 whose light emission has been stopped in a short period of time is approximately one fourth of the light emission period TH. Accordingly, the organic EL element 21 emits light with the data current Idata corresponding to the gradation of “4” during the light emission time that is one-fourth of the light emission period TH. It is equivalent to luminance.
[0129]
As a result, when displaying a low gradation luminance, a small value data current Idata corresponding to the low gradation is not supplied, but a large value data current Idata corresponding to the large gradation is supplied, and the light emission time is reduced. Can be displayed only by shortening the pixel circuit 20 by the pixel circuit 20. The organic EL element 21 has a light emission time of two-fourths of the light emission period TH at the gradation of “2” of the pixel circuit 20 connected to the scanning line Y2 and the data line X1, and the light emission time is “4”. Since the light is emitted with the data current Idata corresponding to the gray scale of “2”, the luminance is equivalent to the luminance of the gray scale of “2”.
[0130]
By the way, the organic EL element 21 at the gray scale of "3" of the pixel circuit 20 connected to the scanning line Y3 and the data line X3 is set to the H level during the next period Tb between the first scanning signal SC11 and the scanning signal SC21. When the level second scanning signal SC32 is output, light emission is stopped. Accordingly, the organic EL element 21 emits light with the data current Idata corresponding to the gradation of “4” when the light emission time is three-quarters of the light emission period TH, and the luminance of the gradation of “3” is obtained. Is equivalent to
[0131]
Hereinafter, similarly, the operation of the pixel circuit 20 connected to each of the scanning lines Y1 to Y3 is controlled based on the next new image data, and the data current corresponding to the gradation of “4” is obtained for the low gradation pixel. An image is displayed by controlling the pixel circuit so as to supply Idata and change the light emission period.
[0132]
Next, features of the organic EL display 10 configured as described above will be described below.
(1) In the present embodiment, when displaying the brightness of the low gradation, the data current Idata of the small value corresponding to the low gradation is not supplied to the pixel circuit 20, and the large value corresponding to the large gradation is displayed. Is supplied, and the organic EL element 21 emits light at a luminance corresponding to the data current data. Then, by merely shortening the light emission time of the light emitting organic EL element 21 as compared with the organic EL element 21 of the pixel circuit that displays other high gradation luminance, a low gradation luminance can be displayed.
[0133]
That is, even in the case of displaying the luminance of the low gradation, the data current Idata of the large value corresponding to the large gradation can be supplied to the pixel circuit 20 via the data lines X1 to Xm. Therefore, it is possible to prevent a delay in display time and a deterioration in display accuracy due to the influence of the wiring capacity of the data lines X1 to Xm, and to improve the moving image characteristics.
[0134]
(2) In the present embodiment, when displaying low-gradation luminance, only the pixel circuit 20 for low-gradation display changes the light emission period in one frame, so that the dynamic range is smaller than that of the time-division gradation. Can be wider.
[0135]
(3) In the present embodiment, since the data current Idata and the control voltage Xgp are both supplied to the respective pixel circuits 20 via the same data lines X1 to Xm, the aperture ratio may be reduced by increasing the number of wirings. There is no increase in circuit scale.
[0136]
(2nd Embodiment)
Next, application of the electronic apparatus of the organic EL display 10 as the electro-optical device described in the first embodiment will be described with reference to FIG. The organic EL display 10 can be applied to various electronic devices such as a mobile personal computer, a mobile phone, and a digital camera.
[0137]
FIG. 6 is a perspective view showing a configuration of a mobile personal computer. 6, a personal computer 60 includes a main body 62 having a keyboard 61 and a display unit 63 using the organic EL display 10. Also in this case, the display unit 63 using the organic EL display 10 exhibits the same effects as the above embodiments. As a result, the personal computer 60 can achieve both high-speed display and sufficient display quality.
[0138]
Note that the embodiment of the present invention may be modified as follows.
In the first embodiment, in order to hold the gate voltage of the start transistor Qst, the gradation control capacitor C2 is used as the holding means. However, as shown in FIG. May be implemented. In FIG. 7, when the start transistor Qst is turned on, an H level control voltage Xgp needs to be output from the control voltage generation circuit 30b to the latch circuit 70 when the start transistor Qst is turned off.
[0139]
In the first embodiment, the order in which the second scanning signals SC12 to SCn2 are output in each period Tb is determined in advance, but may be changed as appropriate.
[0140]
In the first embodiment, in each period Tb, the second scanning signals SC12 to SCn2 are sequentially output to select all the second sub-scanning lines Y12 to Yn2, that is, to select all the second sub-scanning lines Y12 to Yn2. The pixel circuit 20 was selected. This prevents one or more predetermined second scanning signals from being output in each period Tb. That is, in each period Tb, instead of selecting all of the second sub-scanning lines Y12 to Yn2, a predetermined second scanning line may be thinned out to perform selective scanning.
[0141]
For example, in one vertical period, a plurality of periods Tb to be selected are previously determined for each of the second sub-scanning lines Y12 to Yn2, and the second sub-scanning line is selected during the predetermined period Tb. In this case, the plurality of predetermined periods Tb may be implemented by selecting a period in which the light emission period can be weighted with the light emission period being 1, 2, 4,. As a result, the number of second sub-scanning lines to be selected can be reduced in each period Tb.
[0142]
In the first embodiment, the data current Idata and the control voltage Xgp are both supplied to the respective pixel circuits 20 via the same data lines X1 to Xm. In this case, the data current Idata and the control voltage Xgp may be supplied to the pixel circuit 20 using separate wirings.
[0143]
In each of the above embodiments, the pixel circuit 20 is embodied as a unit circuit or an electronic circuit to obtain a suitable effect. The present invention may be embodied in an electronic circuit that drives such a current driving element. It may be embodied in a storage device such as a RAM.
[0144]
In each of the above embodiments, the organic EL element 21 is embodied as an electronic element of the pixel circuit 20, but may be embodied as an inorganic EL element. That is, the present invention may be applied to an inorganic EL display including an inorganic EL element. Furthermore, the present invention may be applied to a liquid crystal display, and the moving image characteristics of the liquid crystal display can be improved.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a circuit configuration of an organic EL display for explaining a first embodiment.
FIG. 2 is a block circuit diagram showing an internal circuit configuration of the display panel unit.
FIG. 3 is a circuit diagram showing a circuit configuration of a pixel circuit and a data line driving circuit.
FIG. 4 is a block circuit diagram showing the configuration of each pixel circuit for explaining the operation of the organic EL display.
FIG. 5 is a timing chart for explaining the operation of each pixel circuit.
FIG. 6 is an exemplary perspective view showing the configuration of a mobile personal computer on which the organic EL display according to the first embodiment is mounted;
FIG. 7 is a circuit diagram illustrating another example of a pixel circuit.
[Explanation of symbols]
10. Organic EL display as electro-optical device
11 Display panel
12 Data line drive circuit
13 Scan line drive circuit
15 Control circuit
16 Memory circuit
20 Pixel circuit as unit circuit or electronic circuit
21 Organic EL devices as electronic devices
30 Single line drive circuit
30a Data current generation circuit as data signal generation circuit
30b Control voltage generation circuit as control signal generation circuit
60 Personal Computer as Electronic Equipment
C1 Holding capacitor as first capacitive element
C2 Gradation control capacitor as holding means or second capacitive element
Qsw1 First switching transistor as first transistor
Qsw2 Second switching transistor as first transistor
Qd Driving transistor as second transistor
Qst Starting transistor as third transistor
Qct Gray scale control transistor as fourth transistor
SC11 to SCn1 First scan signal
SC12 to SCn2 Second scan signal
Y1 to Yn scanning line
X1 to Xm data line
Yn1 first sub-scanning line
Yn2 second sub-scanning line
G1 First gate signal
G2 Second gate signal
Data current as Idata data signal
Control voltage as Xgp control signal
L1 power line
Voel drive voltage

Claims (12)

A first transistor;
A capacitor for holding a charge amount according to a multi-valued data signal supplied from the data line via the first transistor;
A second transistor whose conduction state is controlled based on the amount of charge held in the capacitance element, and which supplies a drive amount corresponding to the conduction state to the electronic element;
A third transistor that supplies and cuts off a drive amount to the electronic element based on a conduction state of the second transistor;
An electronic circuit driving method comprising:
A method of driving an electronic circuit, comprising: changing a cutoff timing of the third transistor to change a period of supplying a drive amount to the electronic element corresponding to a conduction state of the second transistor. The method for driving an electronic circuit according to claim 1,
The method of driving an electronic circuit according to claim 1, wherein the change of the cutoff timing by the third transistor is shorter than a predetermined supply period for the multivalued data signal having the predetermined value. A first transistor;
A first capacitor that holds a charge amount according to a multi-valued data signal supplied from a data line via the first transistor;
A second transistor whose conduction state is controlled based on the amount of charge held in the first capacitance element, and which supplies a drive amount corresponding to the conduction state to the electronic element;
A third transistor that supplies or shuts off the driving amount to the electronic element,
A second capacitor for holding either conduction or non-conduction of the third transistor at a gate of the third transistor;
An electronic circuit, comprising: a fourth transistor for supplying a control signal for keeping the third transistor conductive or non-conductive to the second capacitor. The electronic circuit according to claim 3,
The electronic circuit according to claim 1, wherein the control signal is supplied from the data line via the fourth transistor. An electro-optical device including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits,
A data signal generation circuit that outputs a multi-level data signal to each of the plurality of unit circuits via the plurality of data lines;
Each of the plurality of unit circuits includes a control signal generation circuit that outputs a control signal that controls start and stop of the operation of the same unit circuit that operates based on the multi-valued data signal,
The electro-optical device according to claim 1, wherein the unit circuit includes a holding unit that holds a control signal from the control signal generation circuit. The electro-optical device according to claim 5,
The electro-optical device according to claim 1, wherein the control signal is supplied via the same data line as the multi-level data signal. The electro-optical device according to claim 5,
The electro-optical device according to claim 1, wherein the control signal is supplied via a signal line different from a data line to which the multi-level data signal is supplied. The electro-optical device according to claim 5,
The unit circuit includes:
A first transistor that conducts when the scan line is selected;
A first capacitor that holds a charge amount according to a multi-valued data signal supplied from a data line via the first transistor;
A second transistor whose conduction state is controlled based on the amount of charge held in the capacitance element, and which supplies a drive amount corresponding to the conduction state to the electronic element;
A third transistor for supplying or blocking a drive amount to the electronic element based on the conduction state of the second transistor and a gate of the third transistor are provided with either conduction or non-conduction of the third transistor. A second capacitive element for holding;
An electro-optical device, comprising: a fourth transistor for supplying a control signal for keeping the third transistor conductive or non-conductive to the second capacitor. The electro-optical device according to claim 8,
An electro-optical device, wherein the electronic element is an EL element. The electro-optical device according to claim 9,
The electro-optical device according to claim 1, wherein the EL element has a light-emitting layer made of an organic material. Including a plurality of scanning lines, a plurality of data lines, and a plurality of unit circuits,
An electro-optical device in which a plurality of scanning lines are sequentially selected, and a multi-valued data signal is supplied from a data signal generation circuit to each unit circuit on the selected scanning line via a data line. A control method,
When the next new scanning line is selected from the end of the selection of the scanning line, the new scanning line is selected with a predetermined period in between, and the operation is started or stopped for each unit circuit on each scanning line in each period. A method for controlling an electro-optical device. An electronic apparatus on which the electro-optical device according to claim 5 is mounted.

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