JP2004172617A - Photon inhibition layer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of reducing light-induced etching and redeposition of metal used to make mutually connected wires during a semiconductor manufacturing process, e.g., copper. <P>SOLUTION: The light-induced etching and redeposition of metal is caused by exposure to light for pn joint that produces a photovoltaic cell effect. The photon inhibition layer 13 is used to reduce an amount of exposure for the pn joint. The photon inhibition layer 13 is a direct band gap having a band gap energy smaller than the low end of an energy spectrum of a common light source used for a semiconductor manufacturing facility (generally, smaller than 1.7eV). Accordingly, it is possible to reduce the etching and redeposition of light induction of the metal. <P>COPYRIGHT: (C)2004,JPO

Description

  The present invention relates to photon-induced metal corrosion and redeposition on semiconductor wafers.

  The use of photon (photon) blocking layers located in semiconductor wafers can minimize photon-induced metal corrosion and redeposition. Various features of the invention will be described with reference to application examples. For a full understanding of the present invention, numerous specific details, relationships, and methods are set forth. However, one of ordinary skill in the art will readily appreciate that the present invention may be practiced without one or more of the specific details or in other ways. In other instances, well-known structures or operations have not been shown in detail in order to avoid obscuring the present invention.

  Referring to the drawings, FIG. 1 shows a portion 2 of a typical integrated circuit formed on a silicon wafer. Wafer portion 2 includes a number of doped semiconductor regions. These doped regions include the N-type 3 and 17 and P-type 4 and 18 regions that define the source 3 or 4, the drain 3 or 4, and the wells 17 and 18 of the device. As a result of this structure, there are many PN junctions located on the wafer portion 2. The region of the wafer portion 2 called “STI (Shallow Trench Isolation: Trench Isolation)” 5 indicates an electrically insulating region. Furthermore, the area of the wafer portion 2 called "gate" 6 indicates the gate of a field effect transistor (FET).

  The contacts of the wafer portion 2 and the interconnection of the first layer of metal are also shown in FIG. In particular, "W" and "Cu" indicate conductive materials made from tungsten and copper, respectively. This conductive material provides a plurality of contacts and first layer metal interconnects used to connect the exemplary device to other devices (not shown) of the wafer portion 2.

  Wafer portion 2 is generally exposed to light at various stages in the manufacturing process. Exposure of the PN junction to light induces photovoltaic events that result in light induced metal corrosion and redeposition.

  A schematic of light induced metal corrosion and deposition is shown in FIG. For this example, copper is used as the metal interconnect formed in dielectric 1. When a photon, especially a photon present in light 9, strikes the PN junction, an electron / hole pair is formed. These electrons and holes are swept across the PN junction in various directions by the electric field formed in the depletion region 11. The separation of the positive charges (holes) and the negative charges (electrons) causes a voltage drop across the junction 10 causing a photovoltaic phenomenon at the PN junction 10.

  When the PN junction is connected to copper used as the interconnect metal, a potential difference is created in the copper interconnect. If the electrolyte 12 (ie, the slurry used for chemical mechanical polishing) is present on the surface of the copper, the exposed PN junction acts as a battery, causing the electrochemical reaction of the copper. For the copper wiring 8 connected to the P- type region, the oxidizing action is accelerated and the copper is dissolved in the electrolyte, thereby causing photon induced copper corrosion. A reduction action occurs on the copper interconnect connected to the N-type region, and the copper is redeposited, thereby causing photon-induced copper redeposition. In summary, photon-induced dissolution (corrosion, perforation) on one side of the circuit and photon-induced deposition (redeposition) on the other side of the circuit occur simultaneously.

  During the manufacture of semiconductor devices, there are many stages in which photon-induced metal corrosion and redeposition occurs. For example, photon-induced metal corrosion and redeposition during cupper chemical mechanical polishing (CuCMP), post-CMP cleaning, post-probe cleaning processes, and storage of wafers in air after CuCMP. Get up. The chemical solution used during the process described above and even atmospheric moisture can act as an electrolyte and provide a conductive path. Typical light present in semiconductor manufacturing facilities has a spectrum centered in the visible region having a range of 1.7-4.0 eV. Thus, the light can easily generate a photovoltaic effect on a silicon wafer with a band gap of ~ 1.12 eV at room temperature.

  It should be noted that light-induced copper redeposition also occurs on wafers with device structures that are quite different from the example shown in FIG. Further, the problem of light induced corrosion and redeposition is expected to exist for other metals or alloys that may replace copper in the future, but are also sensitive to corrosion.

  Accordingly, it is an object of the present invention to reduce or eliminate light induced metal corrosion and redeposition.

  The problem of light induced metal corrosion and redeposition can be reduced or eliminated by forming a photon blocking layer between the PN junction and the metal interconnect. It is within the scope of the present invention to place a photon blocking layer everywhere between the PN junction and the metal interconnect.

  According to one embodiment of the present invention, light induced copper deposition can be reduced or eliminated by forming a photon blocking layer 13 on a semiconductor wafer 14, as shown in FIG. The photon blocking layer 13 is deposited on a silicon nitride contact etch stop layer 15 but below a poly-metal dielectric (PMD) layer 16. (The contact etch stop layer also serves to reduce leakage current caused by contact and active area misalignment during the patterning process, with a lower contact etch layer compared to the PMD etch rate. Is.)

To effectively prevent light induced copper corrosion and redeposition, the photon blocking layer 13 must be formed of a material that absorbs photon energy greater than the silicon band gap (1.12 eV). It is within the scope of the present invention to use all substances or combinations thereof having an acceptable bandgap energy. For example, a material having a photon blocking layer can be any of the following: a-SiGe: H, a-SiGe, SiGe, SiC, GaAs, C60, a-Si, Ge, InP, CdSe, CdTe, PbS, PbTe, B, Se, AlSb, Bi 2 S 3, Zn 3 As 2, GaTe, GaN, ZnS, and C. It should be noted that materials having a direct bandgap absorb photons more efficiently than the counterpart of the indirect bandgap.

  It should also be noted that typical light sources used in semiconductor manufacturing facilities have an energy spectrum of about 1.7-4.0 eV. Therefore, to effectively block the photons of the light source, the photon blocking layer should have an energy gap of less than 1.7 eV (which is the low end of the energy spectrum of typical light sources used in semiconductor manufacturing facilities). It is necessary to have.

  In the preferred embodiment shown in FIG. 4, the etch stop layer of the plasma enhanced nitride contact is replaced by a photon blocking layer 13. In this example, the photon blocking layer 13 is made from a-SiGe: H. The a-SiGe: H photon blocking layer not only can absorb light, but also acts as a contact etch stop layer. Because it gives good selectivity during the contact etching process. The photon blocking layer 13 effectively blocks transmission of light to the PN junction during manufacturing. As a result, light induced copper redeposition is reduced or eliminated.

  As noted above, various modifications of the invention are within the scope of the invention as set forth in the appended claims. By way of example, instead of using the invention for a silicon-based semiconductor device, the invention is equally applicable to devices made of other semiconductor materials, for example gallium arsenide. In addition, the present invention is applicable to a variety of insulating technologies, well and substrate technologies, dopant types, and semiconductor wafers and metal types or arrangements with transistors. Further, the invention is applicable to structures using other semiconductor technologies, such as BiCMOS, bipolar, SOI, strained silicon, microelectrical mechanical systems (MEMS), SiGe, or other diodes. It is.

  While various embodiments of the present invention have been described, it should be understood that they have been presented by way of example only, and not limitation. The present invention may be modified in many ways in accordance with the disclosure herein without departing from the spirit or scope of the invention. The scope of the invention should be determined according to the claims and their equivalents.

In connection with the above disclosure, the following items are disclosed.
(1) A method for causing light induced corrosion and redeposition of metal features of a semiconductor material,
Limiting the exposure of the semiconductor material to light having an energy equal to or greater than the bandgap energy of the semiconductor material by incorporating a photon blocking layer in the semiconductor material.
(2) The method according to the above (1), wherein the photon blocking layer is discontinuous.
(3) The method according to the above (1), wherein the photon blocking layer is made of a material having a direct band gap.
(4) The method according to the above (1), wherein the photon blocking layer is made of SiGe.
(5) The method according to the above (1), wherein the photon blocking layer is a-SiGe.
(6) The method according to the above (1), wherein the photon blocking layer is made of a-SiGe: H.
(7) The method according to the above (1), wherein the photon blocking layer is a contact etching stop layer.
(8) The photon blocking layer is made of a-SiGe: H, a-SiGe, SiGe, SiC, GaAs, C60, a-Si, Ge, InP, CdSe, CdTe, PbS, PbTe, B, Se, AlSb, Bi. The method according to (1), wherein the method is selected from the group consisting of ₂ S ₃ , Zn ₃ As ₂ , GaTe, GaN, ZnS, and C.
(9) The method according to (1), wherein the metal feature includes copper.
(10) The method according to the above (1), wherein a CMP process is performed on the semiconductor material.
(11) The method according to the above (1), wherein a CMP cleaning process is performed on the semiconductor material.
(12) The method according to (1), wherein the photon blocking layer is made of a material having a band gap energy smaller than a low end value of an energy spectrum of a light source used in a semiconductor manufacturing facility.

(13) A semiconductor wafer,
A first region including a diode and a transistor;
A photon blocking layer formed on the first region;
A second region formed on the photon blocking layer including a metal interconnect;
A semiconductor wafer having:
(14) The semiconductor wafer according to (13), wherein the photon blocking layer is discontinuous.
(15) The semiconductor wafer according to (13), wherein the photon blocking layer is made of a material having a direct band gap.
(16) The semiconductor wafer according to the above (13), wherein the photon blocking layer is made of SiGe.
(17) The semiconductor wafer according to the above (13), wherein the photon blocking layer is made of a-SiGe.
(18) The semiconductor wafer according to the above (13), wherein the photon blocking layer is made of a-SiGe: H.
(19) The semiconductor wafer according to the above (13), wherein the photon blocking layer is a contact etching stop layer.
(20) The photon blocking layer is made of a-SiGe: H, a-SiGe, SiGe, SiC, GaAs, C60, a-Si, Ge, InP, CdSe, CdTe, PbS, PbTe, B, Se, AlSb, Bi. The semiconductor wafer according to item (13), wherein the semiconductor wafer is selected from the group consisting of ₂ S ₃ , Zn ₃ As ₂ GaTe, GaN, ZnS, and C.
(21) The method of (13), wherein the metal interconnect comprises copper.
(22) The semiconductor wafer according to the above (13), wherein the metal interconnection is manufactured by using CMP.
(23) The semiconductor wafer according to the above (13), wherein the metal interconnection is manufactured by using a process including a CMP cleaning process.
(24) The semiconductor wafer according to (1), wherein the photon blocking layer is made of a material having a band gap energy smaller than a low end value of an energy spectrum of a light source used in a semiconductor manufacturing facility.

(25) a semiconductor wafer,
A first region including a diode and a transistor;
A photon blocking layer formed on the first region;
A second region formed on the photon blocking layer including a copper interconnect;
With
A semiconductor wafer, wherein the photon blocking layer has a direct bandgap and a bandgap energy equal to or less than 1.7 eV.
(26) The semiconductor wafer according to (25), wherein the photon blocking layer is also a contact etching stop layer.

(27) The present invention is a method for reducing light-induced corrosion and redeposition of metals, such as copper, used to make interconnect wiring during a semiconductor manufacturing process. Light-induced corrosion and redeposition is caused by exposure of the PN junction to light, which produces a photovoltaic effect. In the present invention, a photon blocking layer 13 is used to reduce the amount of light exposure of the PN junction. This photon blocking layer 13 of the present invention is a direct bandgap having a bandgap energy smaller than the low end of the energy spectrum of a typical light source used in semiconductor manufacturing equipment (generally less than 1.7 eV).

1 illustrates a portion of a typical integrated circuit formed on a silicon wafer according to the prior art. 2 illustrates the phenomenon of light induced metal corrosion and redeposition occurring during the manufacturing process according to the prior art. 3 shows a portion of a silicon wafer according to an embodiment of the present invention. 6 shows a part of a silicon wafer according to another embodiment of the present invention.

Claims (2)

A method for reducing light induced corrosion and redeposition of metal features of a semiconductor material, comprising:
Limiting the exposure of the semiconductor material to light having an energy equal to or greater than the bandgap energy of the semiconductor material by including a photon blocking layer in the semiconductor material. A semiconductor wafer,
A first region including a diode and a transistor;
A photon blocking layer formed on the first region;
A second region formed on the photon blocking layer including a metal interconnect;
A semiconductor wafer having:

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