JP2004165534A - Semiconductor device and its fabricating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a fabricating method of a via hole in which polymers containing a great deal of Ti can be eliminated and besides cleaning liquid making and waste liquid treatment are easily performed. <P>SOLUTION: The semiconductor device fabricating method includes processes as follows: An Al interconnection film 1, a Ti antireflection film 2 and an interlayer insulative film 3 are stacked to form a laminate; photoresist patterns 4 are formed on the interlayer insulative film 3 and a via hole 7 reaching the Al interconnection film 1 or the Ti antireflection film 2 is formed in the interlayer insulative film 3 by performing etching defining these patterns as a mask (step S1); the photoresist patterns 4 are eliminated by ashing (step S2); and cleaning is performed by an acidic solution containing a carboxylic acid and aqueous hydrogen peroxide (step S3). <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, and more particularly to a method of forming a via hole reaching a conductive layer in an insulating layer formed on a conductive layer containing Al and a conductive layer containing Ti, and a via thereof. The present invention relates to a semiconductor device having a hole.
[0002]
[Prior art]
In a semiconductor device having a multilayer wiring, a conductive path for electrically connecting upper and lower wirings is called a via hole. Usually, a via hole is formed as follows.
[0003]
That is, a Ti (titanium) antireflection film is formed on an Al (aluminum) wiring film, and an insulating film is formed thereon. Then, the insulating film and the Ti antireflection film are etched using the resist film selectively formed on the insulating film as a mask. At the time of etching, a sidewall protective film is formed in the via hole in order to prevent the sidewall of the insulating film from being etched. Thereafter, the resist film and the side wall protective film are removed by ashing.
[0004]
The resist film and the sidewall protective film after the etching are polymers containing Al, Ti, and the like. Therefore, when ordinary ashing is performed after the etching, this polymer becomes a polymer residue containing oxidized Al and Ti, and is difficult to remove. For this reason, various methods have been conventionally proposed for removing polymer residues containing oxidized Al and Ti.
[0005]
JP-A-6-37188 discloses a method in which the surface of a resist film is removed by half-ashing, and the remaining resist film and the residue containing Al are removed by fuming nitric acid.
[0006]
Japanese Patent Application Laid-Open No. 5-102108 discloses O. ₂ A method is described in which ashing is performed with a mixed gas of an (oxygen) gas and a gas containing F (fluorine), and then a cleaning treatment is performed using an organic resist stripper to remove Al residues.
[0007]
In addition, Japanese Patent Application Laid-Open No. 2001-7093 discloses that after a flash step using a high-velocity oxygen-based plasma, O ₂ Plasma treatment is performed using a gas, a gas containing N (nitrogen), and a reactive gas containing H (hydrogen), C (carbon), and F, and then performing a cleaning step using a medium-flow-rate oxygen-based plasma to remove Al. A method for removing residues is described.
[0008]
Further, JP-A-6-266119 describes a resist cleaning solution containing hydroxylamine, alkanolamine, and catechol, which can remove a polymer residue containing Ti.
[0009]
[Patent Document 1]
JP-A-6-37188
[0010]
[Patent Document 2]
JP-A-5-102108
[0011]
[Patent Document 3]
JP 2001-7093 A
[0012]
[Patent Document 4]
JP-A-6-266119
[0013]
[Problems to be solved by the invention]
2. Description of the Related Art In recent years, a system LSI (Large Scale Integrated circuit) incorporating various functions on a single chip has been used in many fields, and some include a memory and a logic circuit, and some include a power device. Power devices are devices that convert between direct current and alternating current or convert voltage. Particularly, in system LSIs incorporating power devices, durability to large currents and high voltages is required along with miniaturization. It is getting. Specifically, the voltage handled by the conventional system LSI is about several volts, but a system LSI incorporating a power device capable of handling a high voltage of several tens of volts to hundreds of tens of volts in the future will be used. It is being sought. In order to improve the durability of the power device to a high voltage, it is necessary to increase the opening of the via hole in the power device and increase the current that can flow.
[0014]
However, if the opening of the via hole is made large, the area of the via hole to be etched becomes ten times or more the conventional size. As a result, the area of the Ti anti-reflection film to be etched becomes large, so that the photoresist and the sidewall protective film after the etching are polymers containing a large amount of Ti. In particular, when the area to be etched is 1% or more of the wafer area, there is a problem that any of the above methods cannot completely remove the polymer containing a large amount of Ti for the following reasons.
[0015]
That is, it is considered that the removal method described in JP-A-6-37188 is intended only to remove the residue containing Al. When the removal method described in the above publication is applied to the removal of a polymer containing a large amount of Ti, fuming nitric acid has a problem that it has an ignitability for Ti, and therefore, contains a large amount of Ti. It is not considered suitable for removing waste residues.
[0016]
The organic resist stripping agent used as a cleaning solution in the removal method described in JP-A-5-102108 has a property of hardly dissolving a metal oxide. On the other hand, in the removal method described in the above publication, Ti after ashing is oxidized, and it is considered that Ti oxide cannot be removed by an organic resist stripping agent. In the publication, the residue containing Al oxide was removable under the condition that the ratio of Al oxide was very small. Therefore, when the photoresist was removed, the Al oxide was lifted off. It is presumed that removal was possible.
[0017]
In the removal method described in JP-A-2001-7093, a polymer containing a metal is decomposed by a reactive gas containing H, C, and F, and the residue is removed by volatilizing the metal. However, when removing a polymer containing a large amount of Ti, the metal reaction hardly occurs in the portion deeper than the via hole surface because it is not in contact with the plasma, so it is difficult to remove the polymer containing a large amount of Ti. Is not considered suitable.
[0018]
Further, the cleaning liquid described in JP-A-6-266119 is commercially available as a resist stripping agent capable of removing Ti, but is difficult to prepare because of an unstable compound, and it is difficult to perform a drainage treatment. There was a problem.
[0019]
Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device and a semiconductor device that can remove a polymer containing a large amount of Ti and that can easily prepare and drain a cleaning solution.
[0020]
[Means for Solving the Problems]
The method of manufacturing a semiconductor device according to the present invention includes the following steps. A conductive layer containing Al is formed. A conductive layer containing Ti is formed over the conductive layer containing Al. An insulating layer is formed over the conductive layer containing Ti. A photoresist pattern is formed on the insulating layer. By etching using the photoresist pattern as a mask, holes reaching the conductive layer containing Al or the conductive layer containing Ti are formed in the insulating layer. The photoresist pattern is removed by ashing. Wash with an acidic solution containing carboxylic acid and aqueous hydrogen peroxide.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
1 to 4 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the first embodiment of the present invention in the order of steps. FIG. 5 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.
[0022]
Referring to FIG. 1, in a method of manufacturing semiconductor device 10, Al wiring film 1 which is a first conductive layer containing Al is formed, and a second conductive layer containing Ti is formed on Al wiring film 1. A certain Ti antireflection film 2 is formed. Then, an interlayer insulating film 3 as an insulating layer is formed on the Ti antireflection film 2. Then, a pattern of photoresist 4 is selectively formed on interlayer insulating film 3 to form a via hole reaching Al wiring film 1.
[0023]
Referring to FIG. 2, interlayer insulating film 3 and Ti antireflection film 2 are etched using photoresist 4 as a mask (step S1: FIG. 5). As a result, via holes 7 reaching the Al wiring film 1 are formed in the interlayer insulating film 3 and the Ti antireflection film 2. At the same time as the formation of the via hole 7, a side wall protective film 5a is formed on the side wall of the via hole 7. The sidewall protective film 5a is formed as a polymer containing Ti, and a polymer 5b containing Ti is also formed on the upper surface of the photoresist 4 with the formation of the sidewall protective film 5a.
[0024]
Here, the Ti antireflection film 2 is for preventing reflection of the Al wiring film 1 at the time of photolithography and facilitating the formation of a pattern. As the Al wiring film 1, for example, an Al—Si (silicon) —Cu (copper) film, an Al—Cu film, or an Al—Si film is used. As the Ti antireflection film 2, a TiN film, a TiW film, or the like is used. As the interlayer insulating film 3, for example, SiO ₂ A film or the like is used.
[0025]
In order to realize the miniaturization of the power device, it is preferable to use a narrow gap type parallel plate type etching apparatus capable of sub-micron to quarter-micron fine processing for etching the via hole 7. Specific etching methods and conditions are, for example, as follows.
[0026]
CF for supplying etchant ₄ Gas 50 ccm (cubic centimeter per minute) and CHF for forming the side wall protective film 5 a ₃ A mixture of 50 ccm of gas and 500 ccm of Ar (argon) gas for diluting these gases is filled in a narrow gap type parallel plate type etching apparatus. Then, a high frequency of 380 kHz is applied to the parallel plate electrodes to generate plasma. The reaction between the interlayer insulating film 3 and the Ti antireflection film 2 and the etchant is promoted by the ions in the plasma, and the interlayer insulating film 3 and the Ti antireflection film 2 are anisotropically etched. Other etching conditions are a pressure of 67 Pa, an RF (high frequency) power of 700 W, and a substrate temperature of −10 ° C.
[0027]
Next, the reason for forming the sidewall protective film at the time of etching will be described.
The interlayer insulating film 3 has a sandwich-like structure in which an SOG (Spin On Glass) film is sandwiched between silicon oxide films formed by plasma CVD (Chemical Vapor Deposition) in order to flatten unevenness due to the Al wiring film. There are many. The SOG film is more easily etched than the silicon oxide film. Therefore, in order to prevent the side wall of the via hole 7 from being etched, CHF is formed on the side wall of the via hole 7. ₃ The sidewall protective film 5a is formed with the gas. The side wall protective film 5a is formed on the side wall surface in the via hole 7.
[0028]
In order to form the sidewall protective film 5a firmly, the substrate temperature is kept low (0 ° C. or lower, preferably −5 ° C. or lower, more preferably −10 ° C. or lower) during etching. For this reason, the vapor pressure of the etched Ti reaction product also becomes low, and Ti that cannot be evaporated enters the sidewall protective film 5 a and the photoresist 4. As a result, the side wall protective film 5a and the upper surface 5b of the photoresist 4 become the polymer 5 containing Ti.
[0029]
After the above-described etching (Step S1: FIG. 5), ashing, which is a step of removing the photoresist, is performed (Step S2: FIG. 5). The specific ashing condition is O ₂ The gas was 200 ccm, the pressure was 67 Pa, the power was 500 W, and the substrate temperature was 200 ° C.
[0030]
Referring to FIG. 3, photoresist 4 and polymer 5 are removed by the ashing described above, and polymer residue 6 containing Ti and Ti oxide remains in via hole 7 and on interlayer insulating film 3.
[0031]
Next, a cleaning process is performed (step S3: FIG. 5). This cleaning treatment is performed using an acidic solution in which acetic acid: aqueous hydrogen peroxide is mixed at a volume ratio of 1: 170. The temperature of the solution is preferably from 50 ° C to 60 ° C. More preferably, 53 ° C. is desirable. Thereafter, washing and drying are performed. By this washing treatment, the polymer residue 6 is removed.
[0032]
Referring to FIG. 4, after the above-described cleaning process, barrier metal film 8 and Al wiring film 11 are formed so as to be electrically connected to Al wiring film 1 through via hole 7.
[0033]
In this embodiment, the etching conditions and the ashing conditions do not have to be the above conditions. Further, in the cleaning treatment, an acidic solution containing acetic acid and hydrogen peroxide was used, but any acidic solution containing carboxylic acid and hydrogen peroxide may be used, and the mixing ratio of the solution and the temperature range are as described above. Not limited.
[0034]
According to the method for manufacturing a semiconductor device of the present embodiment, the acidic solution containing acetic acid and hydrogen peroxide used in the cleaning treatment can dissolve the polymer residue 6 containing Ti and Ti oxide. The polymer containing Ti is removable. The fact that the acidic solution containing acetic acid and hydrogen peroxide can dissolve Ti and Ti oxide means that Ti is oxidized by hydrogen peroxide and Ti is dissolved by the solution made acidic by acetic acid. This is explained by a model along the potential-pH diagram. Further, by mixing acetic acid and aqueous hydrogen peroxide, a cleaning solution can be easily prepared, and the drainage process is also easy.
[0035]
Since the acidic solution containing acetic acid and hydrogen peroxide can dissolve Ti and Ti oxide, it also dissolves and etches the Ti antireflection film 2. Since the etching rate at this time is about 8 nm / min, it is preferable that the cleaning time with an acidic solution containing acetic acid and hydrogen peroxide is as short as possible. Therefore, the present embodiment is particularly suitable when the amount of Ti to be removed is relatively small, such as when the ratio of the area to be etched to the wafer area is about 1%.
(Embodiment 2)
FIG. 6 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment of the present invention.
[0036]
Referring to FIG. 6, the steps up to the etching (step S1) of the present embodiment are almost the same as the steps of the first embodiment shown in FIGS. 1 and 2, and therefore description thereof will be omitted.
[0037]
In the present embodiment, half-ashing is performed after etching (step S2). The half ashing is an ashing that is performed in a time shorter than a normal ashing time and in which only a part (a predetermined film thickness) of the photoresist 4 is removed. The specific conditions for half ashing are O ₂ The gas is 350 ccm, the pressure is 67 Pa, and the power is 500 W. Note that the substrate temperature is preferably 100 ° C. in order to perform efficient half ashing. Also, O ₂ Gas and CF ₄ When a mixed gas with a fluorine-containing gas is used, efficient half-ashing can be performed even at a lower temperature of 60 ° C.
[0038]
7 and 8 are sectional views showing a method of manufacturing a semiconductor device after half ashing according to the second embodiment of the present invention in the order of steps.
[0039]
Referring to FIG. 7, only a part of photoresist 4 on interlayer insulating film 3 is removed by the above-described half ashing, so that sidewall protective film 5a containing Ti and Ti oxide in via hole 7 remains, The polymer residue 6 and a part of the photoresist 4 exist on the interlayer insulating film 3.
[0040]
Next, cleaning processing 1 is performed (step S3: FIG. 6). The cleaning treatment 1 is a step of cleaning with an organic resist stripping agent. Examples of the organic resist stripping agent include an amine-based organic solvent, a stripping agent 105 (manufactured by Tokyo Ohka), a stripping agent 106 (manufactured by Tokyo Ohka), and MS2001 ( Fuji Hunt), Remover 100 (Hoechst Japan), N370 (Nagase Sangyo), N380 (Nagase Sangyo) and the like are used.
[0041]
Referring to FIG. 8, by the above-described cleaning treatment 1, side wall protective film 5 a in via hole 7, photoresist 4 on interlayer insulating film 3, and part of polymer residue 6 are removed.
[0042]
Next, a cleaning process 2 is performed (step S4: FIG. 6). The cleaning treatment 2 is a step of cleaning with an acidic solution containing acetic acid and hydrogen peroxide solution. The cleaning process 2 is performed under the same conditions as the cleaning process of the first embodiment, for example. Thereafter, washing and drying are performed.
[0043]
After the above processing, a barrier metal film 8 and an Al wiring film 11 are formed so as to be electrically connected to the Al wiring film 1 through the via holes 7 as shown in FIG.
[0044]
In the present embodiment, the etching conditions need not be the above conditions. For half ashing, at least O ₂ It is sufficient that a gas containing is used. Further, the organic resist stripping agent may be other than those exemplified above. In the cleaning treatment 2, an acidic solution containing acetic acid and hydrogen peroxide was used, but any acidic solution containing carboxylic acid and hydrogen peroxide may be used. The mixing ratio of the solution and the temperature range are as described above. It is not limited to.
[0045]
According to the method of manufacturing a semiconductor device of the present embodiment, after half ashing, sidewall protective film 5a containing Ti and Ti oxide in via hole 7 remains, and polymer residue 6 and a part of photoresist 4 are removed. It exists on the interlayer insulating film 3. Then, in the subsequent cleaning process 1, the photoresist 4 and the sidewall protective film 5a containing Ti are dissolved and removed by the organic resist stripping agent. Usually, the sidewall protective film 5a containing Ti oxide and the polymer residue 6 do not dissolve in the organic resist stripping agent, but are lifted off together with the photoresist 4, so that the sidewall protective film 5a containing Ti oxide and the polymer residue 6 are removed. It can be removed. Therefore, due to the effect of removing Ti oxide by the lift-off, it is possible to remove a larger amount of Ti polymer than in Embodiment 1 without increasing the cleaning time with an acidic solution containing acetic acid and hydrogen peroxide solution in cleaning treatment 2. Can be. This embodiment is particularly suitable when the ratio of the area to be etched to the area of the wafer is 1% to 10%.
(Embodiment 3)
FIG. 9 is a flowchart showing a method for manufacturing a semiconductor device according to the third embodiment of the present invention.
[0046]
Referring to FIG. 9, the steps up to the etching (step S1) of the present embodiment are almost the same as the steps of the first embodiment shown in FIGS. 1 and 2, and therefore description thereof will be omitted.
[0047]
In the present embodiment, the semiconductor device 10 is kept in a vacuum between the etching (step S1) and the half ashing (step S2). Then, half ashing is performed with the semiconductor device 10 kept in a vacuum. Specific half-ashing methods and conditions are, for example, as follows.
[0048]
CF ₄ / (O ₂ + CF ₄ ) = 0.1 so that O ₂ 1125 ccm of gas and CF ₄ The mixture of 125 ccm is filled in the ashing device. The pressure is maintained at 166 Pa and the power at 200 W. Further, the substrate temperature is set at 25 ° C. or higher and 100 ° C. or lower, preferably at 30 ° C. or higher and 70 ° C. or lower.
[0049]
Referring to FIG. 7, in the present embodiment, since semiconductor device 10 is kept in a vacuum between etching and half ashing, polymer 5 (that is, sidewall protective film 5a and upper surface 5b of photoresist 4) is kept. ) Is different from that of the second embodiment in that Ti included in the second embodiment is not oxidized. After the half ashing, the sidewall protective film 5a containing Ti in the via hole 7 remains, and the polymer residue 6 and a part of the photoresist 4 exist on the interlayer insulating film 3.
[0050]
Next, a cleaning process is performed (step S3: FIG. 9). The cleaning treatment is a step of cleaning with an organic resist stripping agent. As the organic resist stripping agent, for example, the same one as in the second embodiment is used. By this cleaning treatment, the side wall protective film 5a in the via hole 7, the photoresist 4 on the interlayer insulating film 3, and the polymer residue 6 are removed.
[0051]
After the above processing, a barrier metal film 8 and an Al wiring film 11 are formed so as to be electrically connected to the Al wiring film 1 through the via holes 7 as shown in FIG.
[0052]
In the half ashing in the present embodiment, the gas flow rate is CF ₄ / (O ₂ + CF ₄ ) = 0.05 to 0.15, more preferably 0.1. The electric power is preferably set to 100 W to 500 W, and more preferably set to 200 W. However, the conditions for half ashing in the present embodiment are not limited to the above, and ₂ It is performed using a mixed gas of a gas and a gas containing F, and the substrate temperature may be within the above range.
[0053]
According to the method for manufacturing a semiconductor device of the present embodiment, semiconductor device 10 is kept in a vacuum between etching and ashing. This prevents Ti contained in the polymer 5 from being oxidized between etching and ashing.
[0054]
Further, in the half ashing in the present embodiment, oxidation of Ti contained in the polymer 5 is suppressed, and a part of the photoresist 4 is removed. The reason is as follows. That is, O ₂ In an atmosphere of a mixed gas of a gas and a gas containing F, at a substrate temperature of 25 ° C. or higher, the photoresist 4 reacts with F and is removed. In particular, when the substrate temperature is in the range of 30 ° C. or more and 70 ° C. or less, Ti contained in the polymer 5 further reacts with F and volatilizes, thereby removing Ti. It is considered that Ti is not oxidized at a substrate temperature of 100 ° C. or lower. This is more O than Ti ₂ C in the photoresist 4, which has high reactivity with O, ₂ Because it does not react with, it is inferred from this.
[0055]
Therefore, according to the method for manufacturing a semiconductor device of the present embodiment, Ti included in sidewall protective film 5a and polymer residue 6 is not oxidized even after ashing. Thereby, it can be easily removed by the organic resist stripping agent. Also, Ti can be removed by lift-off when the photoresist 4 is removed by the organic resist stripping agent. From the above, a polymer containing a large amount of Ti can be removed.
[0056]
Further, according to the method of manufacturing a semiconductor device in the present embodiment, since the acidic solution containing carboxylic acid and hydrogen peroxide solution is not used during the cleaning process, even the Ti antireflection film 2 is etched. Is deterred. This embodiment is particularly suitable when the ratio of the area to be etched to the area of the wafer is 1% to 15%.
(Embodiment 4)
FIG. 10 is a flowchart showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.
[0057]
Referring to FIG. 10, the steps up to cleaning process 1 (step S3) according to the present embodiment are substantially the same as the steps according to the third embodiment shown in FIGS. Is omitted.
[0058]
Referring to FIG. 8, especially when the ratio of the area to be etched to the wafer area is 15% or more, even after cleaning process 1 (step 3: FIG. 9) in the third embodiment, polymer residue 6 and The sidewall protective film 5a may remain. Therefore, in the present embodiment, when the polymer residue 6 and the side wall protective film 5a remain as described above, the cleaning process 2 (step S4) is subsequently performed. The cleaning treatment 2 is a step of cleaning with an acidic solution containing acetic acid and hydrogen peroxide solution. The cleaning process 2 is performed under the same conditions as the cleaning process of the first embodiment, for example. Thereafter, washing and drying are performed.
[0059]
After the above processing, a barrier metal film 8 and an Al wiring film 11 are formed so as to be electrically connected to the Al wiring film 1 through the via holes 7 as shown in FIG.
[0060]
Although an acidic solution containing acetic acid and aqueous hydrogen peroxide was used in the cleaning treatment, any acidic solution containing carboxylic acid and aqueous hydrogen peroxide may be used, and the mixing ratio of the solution and the temperature range are as described above. It is not limited to.
[0061]
According to the method of manufacturing a semiconductor device of the present embodiment, after cleaning with an organic resist stripper, the semiconductor device 10 is further cleaned with an acidic solution containing acetic acid and hydrogen peroxide solution. Can also remove polymers containing large amounts of Ti. This embodiment is particularly suitable when the ratio of the area to be etched to the wafer area is 15% or more.
(Embodiment 5)
FIG. 11 is a cross-sectional view of the semiconductor device according to the fifth embodiment of the present invention, showing a state in which the Ti antireflection film has been largely side-etched by the cleaning process.
[0062]
Referring to FIG. 11, a Ti anti-reflection film 2 is formed on Al wiring film 1, and an interlayer insulating film 3 is formed to cover Al wiring film 1 and Ti anti-reflection film 2. Via holes 7 are opened in Ti antireflection film 2 and interlayer insulating film 3 so that the surface of Al wiring film 1 is exposed. The aspect ratio (length / width) of the via hole 7 is 0.9. The Ti antireflection film 2 has a space portion 9 in which the peripheral portion of the via hole 7 is largely side-etched during the cleaning treatment with an acidic solution containing a carboxylic acid and a hydrogen peroxide solution. A barrier metal film 8 and an upper Al wiring film 11 are stacked on the via holes 7 and the interlayer insulating film 3. The height h1 is the height from the bottom surface of the via hole 7 to the upper surface of the Al wiring film 11 deposited on the bottom of the via hole 7. In addition, the barrier metal film 8 is broken at the space portion 9 of the Ti antireflection film 2 which is side-etched. The height h2 is a height from the bottom surface of the via hole 7 to the upper surface of the space portion 9. A barrier metal film is a metal thin film sandwiched between a semiconductor and a metal, and has a role of preventing interdiffusion between different substances and a chemical reaction. As the barrier metal film 8, for example, nitride, carbide, boride, silicide, or the like of Ti-W or a transition metal is used, but other materials may be used.
[0063]
Since the acidic solution containing carboxylic acid and aqueous hydrogen peroxide can dissolve Ti and Ti oxide, if the cleaning treatment with the acidic solution containing carboxylic acid and aqueous hydrogen peroxide is performed for a long time, The Ti antireflection film 2 is largely side-etched. When the Ti anti-reflection film 2 is largely etched, the electrical connection between the lower Al wiring film 1 and the upper Al wiring film 11 cannot be maintained due to disconnection of the barrier metal film 8. For this reason, there has been a problem that it is difficult to control etching when performing a cleaning treatment with an acidic solution containing carboxylic acid and aqueous hydrogen peroxide.
[0064]
Here, if the height h1 is greater than the height h2, the electrical connection between the lower Al wiring film 1 and the upper Al wiring film 11 is ensured even when the barrier metal film 8 is disconnected. You.
[0065]
The present inventors can deposit Al so that the height h1 is larger than the height h2 without blocking the opening of the via hole 7 if the aspect ratio of the via hole 7 is 0.9 or less. I found something.
[0066]
That is, the Al wiring film 11 is usually formed by depositing Al by a sputtering method. However, when the deposition amount of Al is increased, the height h1 increases and the opening of the via hole 7 decreases. I do. When the aspect ratio of the via hole 7 is larger than 0.9, the opening of the via hole 7 is closed by Al before the height h1 becomes larger than the height h2. On the other hand, if the aspect ratio of the via hole 7 is 0.9 or less, the height h1 can be made larger than the height h2 before the opening of the via hole 7 is closed by Al.
[0067]
Therefore, when the aspect ratio of the via hole 7 is 0.9 or less, etching control when performing a cleaning treatment with an acidic solution containing carboxylic acid and hydrogen peroxide solution in forming the via hole 7 becomes easy.
[0068]
In the first to fifth embodiments, the Al wiring film 1 is not limited to the one having the above-described composition, but may include Al. Further, the Ti antireflection film 2 is not limited to the above composition, but may contain Ti. The interlayer insulating film 3 is not limited to the above composition, but may be any insulating layer.
[0069]
Further, in the first to fifth embodiments, the case where the via hole 7 reaching the Al wiring film 1 is formed has been described. However, the present invention is not limited to such a case. For example, as shown in FIG. In addition, the present invention can be applied to a case where the Ti anti-reflection film 2 is formed thickly and the via hole 7 does not reach the Al wiring film 1 but is formed partway through the Ti anti-reflection film 2.
[0070]
The embodiments disclosed above are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the embodiments described above, and is intended to include any modifications or variations within the meaning and range equivalent to the terms of the claims.
[0071]
【The invention's effect】
As described above, according to the method for manufacturing a semiconductor device of the present invention, the acidic solution containing carboxylic acid and hydrogen peroxide used in the cleaning treatment can dissolve the polymer residue containing Ti and Ti oxide. The polymer containing a large amount of Ti can be removed. The fact that the acidic solution containing carboxylic acid and hydrogen peroxide solution can dissolve Ti and Ti oxide means that Ti is oxidized by hydrogen peroxide solution and Ti is dissolved by the solution acidified by carboxylic acid. , Ti potential-pH diagram. Further, by mixing the carboxylic acid and the hydrogen peroxide solution, a cleaning liquid can be easily prepared, and the drainage processing is also easy.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a first step of a method for manufacturing a semiconductor device according to first to fourth embodiments of the present invention.
FIG. 2 is a cross-sectional view showing a second step of the method for manufacturing a semiconductor device in Embodiments 1 to 4 of the present invention.
FIG. 3 is a cross-sectional view showing a third step of the method for manufacturing a semiconductor device in the first embodiment of the present invention.
FIG. 4 is a cross-sectional view of the semiconductor device according to the first to fourth embodiments of the present invention.
FIG. 5 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.
FIG. 6 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 7 is a cross-sectional view showing a third step of the method for manufacturing a semiconductor device in Embodiments 2 to 4 of the present invention.
FIG. 8 is a cross-sectional view showing a fourth step of the method for manufacturing a semiconductor device in Embodiments 2 and 4 of the present invention.
FIG. 9 is a flowchart showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 10 is a flowchart illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.
FIG. 11 is a sectional view of a semiconductor device according to a fifth embodiment of the present invention.
FIG. 12 is a cross-sectional view showing a case where a via hole is formed halfway in a Ti antireflection film in the semiconductor device according to the first to fourth embodiments of the present invention.
[Explanation of symbols]
1,11 Al wiring film, 2 Ti antireflection film, 3 interlayer insulating film, 4,5b photoresist, 5 polymer, 5a sidewall protective film, 6 polymer residue, 7 via hole, 8 barrier metal film, 9 space portion, 10 Semiconductor device.

Claims (7)

Forming a first conductive layer containing aluminum;
Forming a second conductive layer containing titanium on the first conductive layer;
Forming an insulating layer on the second conductive layer;
Forming a photoresist pattern on the insulating layer;
Forming a hole in the insulating layer to reach the first conductive layer or the second conductive layer by etching using the photoresist pattern as a mask;
Removing the photoresist pattern by ashing;
Cleaning with an acidic solution containing carboxylic acid and aqueous hydrogen peroxide. The ashing is half ashing,
2. The method according to claim 1, further comprising a step of removing the photoresist pattern remaining after the ashing by washing with an organic resist stripper. Forming a first conductive layer containing aluminum;
Forming a second conductive layer containing titanium on the first conductive layer;
Forming an insulating layer on the second conductive layer;
Forming a photoresist pattern on the insulating layer;
Forming a hole in the insulating layer to reach the first conductive layer or the second conductive layer by etching using the photoresist pattern as a mask;
Removing the photoresist pattern by half ashing using a mixed gas containing oxygen and fluorine at a substrate temperature of 25 ° C. or more and 100 ° C. or less;
Removing the photoresist pattern remaining after the half ashing by washing with an organic resist stripping agent,
A method for manufacturing a semiconductor device, wherein the semiconductor device is kept in a vacuum between the etching and the half ashing. 4. The method of manufacturing a semiconductor device according to claim 3, further comprising a step of washing with an acidic solution containing carboxylic acid and hydrogen peroxide solution after washing with the organic resist stripping agent. The method according to claim 3, wherein the substrate temperature during the half ashing is 30 ° C. or more and 70 ° C. or less. A semiconductor device manufactured by the method according to claim 1. The semiconductor device according to claim 6, wherein the aspect ratio of the hole is 0.9 or less.

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