JP2004146444A - Wiring board - Google Patents

Wiring board Download PDF

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Publication number
JP2004146444A
JP2004146444A JP2002307127A JP2002307127A JP2004146444A JP 2004146444 A JP2004146444 A JP 2004146444A JP 2002307127 A JP2002307127 A JP 2002307127A JP 2002307127 A JP2002307127 A JP 2002307127A JP 2004146444 A JP2004146444 A JP 2004146444A
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Japan
Prior art keywords
layer
wiring layer
bonding wire
wiring
board
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JP2002307127A
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Japanese (ja)
Inventor
Koichi Nakahara
中原　光一
Hiroshi Tsukamoto
塚本　弘志
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Kyocera Corp
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Kyocera Corp
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Priority to JP2002307127A priority Critical patent/JP2004146444A/en
Publication of JP2004146444A publication Critical patent/JP2004146444A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board which is capable of firmly connecting a thick bonding wire having a diameter of 100 μm or above to a wiring layer without causing cracking in the coating layer deposited on the surface of the wiring layer. <P>SOLUTION: The wiring board 4 is composed of a board 1 formed of electric insulating material, a wiring layer 2 which is formed on the board 1 at the same time with the board 1 by baking by the use of, at least, one element selected out of Au, Ag, Cu, Pd, and Pt and provided with a region where the bonding wire 5 having a diameter of 100 to 500 μm is bonded, an Ni layer which is formed of particles having a size of 5 to 30 μm and deposited on the region of the wiring layer 2 where the bonding wire 5 is bonded, a Pd layer having a thickness of 0.03 to 0.3 μm, and an Au layer having a thickness of 005 to 0.3 μm. The wiring layer 2 is formed of, at least, an element selected out of Au (gold), Cu (copper), Pd (palladium), and Pt (platinum), has a low electric resistance, and is capable of transmitting electrical signals accurately without causing a large voltage drop to electric signals. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は半導体素子や容量素子、抵抗器等の電子部品が搭載される配線基板に関し、より詳細には大きな電流の流れを許容する直径の大きなボンディングワイヤが配線層に接続される配線基板に関するものである。
【０００２】
【従来の技術】
従来、半導体素子や容量素子、抵抗器等の電子部品が搭載される配線基板は酸化アルミニウム質焼結体等の電気絶縁材料から成り、表面に電子部品搭載部を有する基板と、該基板に形成されたタングステン、モリブデン等の高融点金属材料から成る配線層とで形成されており、基板の搭載部に半導体素子や容量素子、抵抗器等の電子部品を搭載するとともに各電子部品の電極を配線層にボンディングワイヤを介して電気的に接続するようになっている。
【０００３】
かかる配線基板は、配線層の一部を外部電気回路基板の配線導体に錫−鉛半田等の低融点ろう材を介し接続することによって外部電気回路基板上に実装され、同時に配線基板に搭載されている電子部品の各電極が所定の外部電気回路に電気的に接続されることとなる。
【０００４】
なお、前記電子部品の各電極を配線層に接続するボンディングワイヤの材料としては、一般にアルミニウム、金が使用されており、特に大電流を流すためにボンディングワイヤの径を大きくする必要があるような場合には経済性を重視してアルミニウム製のボンディングワイヤが多用され、また、ボンディング速度を重視するような場合には金製のボンディングワイヤが多用される。
【０００５】
また前記配線層と電子部品の電極とのボンディングワイヤを介しての接続は、一般に超音波ボンダーを使用することによって行われており、具体的には配線層の表面にボンディングワイヤの一端を当接摺動させ、ボンディングワイヤと配線層表面との間に摩擦エネルギーを発生させるとともに該摩擦エネルギーでボンディングワイヤと配線層表面部分との間に金属拡散を行わせることによってボンディングワイヤは配線層に接続される。
【０００６】
この場合、従来のボンディングワイヤの直径は約３０μｍ程度であり、ボンディングワイヤは配線層の表面に対して約３０ｇｆ〜５０ｇｆ（０．２９４Ｎ〜０．４９Ｎ）の荷重で押し付けられ、摺動により摩擦エネルギーが効率よく発生するようにされている。
【０００７】
更に前記配線基板の配線層は、通常、その表面に平均の厚さが約３μｍのＮｉ層および平均の厚さが約１．５μｍ強のＡｕ層から成る被覆層がめっき法等により順次被着されており、超音波ボンダーを使用してのボンディングワイヤの接続性を良好としている。なお、前記Ｎｉ層は、一般に、次亜リン酸ナトリウム等のリン系還元剤やジメチルアミンボラン等のホウ素系還元剤を用いる無電解Ｎｉめっき液を用いることによって形成され、Ｎｉ層は、Ｎｉ粒子の大きさが、通常、約０．１μｍ乃至４μｍ程度である。
【０００８】
しかしながら、この従来の配線基板においては、タングステンやモリブデン等で形成されている配線層の電気抵抗値が高く、配線層を伝わる電気信号に電圧降下を招来させて配線層に接続されている半導体素子等の電子部品に電気信号を正確に入出力させることができないという欠点があった。特に配線層を伝わる電気信号の電流値が大きくなるほど、この欠点が顕著となる。
【０００９】
そこで上記欠点を解消するために、配線層をＣｕ（銅）やＡｇ（銀）、Ａｕ（金）等の電気抵抗値が低い金属材料で形成し、表面にＮｉ層およびＡｕ層から成る被覆層を被着させた配線基板が提案されている。
【００１０】
かかる配線基板によれば、配線層が電気抵抗値の低いＣｕやＡｇ、Ａｕ等で形成されていることから配線層に電気信号を伝搬させた場合、配線層で電気信号に大きな電圧降下を招来することはなく電子部品に電気信号を正確に伝えることが可能となる。
【００１１】
【特許文献１】
特開２００２−１２４５９０号公報
【００１２】
【発明が解決しようとする課題】
しかしながら、近年、配線基板はＥＣＵ（Ｅｌｅｃｔｒｏｎｉｃ　Ｃｏｎｔｒｏｌ　Ｕｎｉｔ）用の基板等、約５Ａ以上という大電流の電気信号を流す必要のある用途での使用が増加しつつあり、この場合、配線基板上に搭載されている電子部品に大電流を流すために配線層と電子部品とを接続させるボンディングワイヤの直径を１００μｍ以上と非常に大きくする必要があり、このような直径の大きなボンディングワイヤを超音波ボンダーにより配線層に接続させようとすると、配線層の表面に被着されているＮｉ層中やＮｉ層とＰｄ層との接合界面等の被覆層中にクラックが発生し、ボンディングワイヤの配線層への接続信頼性が大きく低下するという欠点を有していた。
【００１３】
このようなＮｉ層中やＮｉ層とＰｄ層との接合界面等の被覆層中にクラックが発生する原因としては、Ｎｉ層が次亜リン酸ナトリウム等のリン系還元剤やジメチルアミンボラン等のホウ素系還元剤を用いた無電解Ｎｉめっき液により形成されており、還元剤の作用によりＮｉの結晶成長が抑制されて粒子径は小さく、粒界が極めて多いものとなっているのに対し、直径が１００μｍ以上と大きなボンディングワイヤを配線層に接続する場合、ボンディングワイヤと配線層との間に大きな摩擦エネルギーを発生させる必要があり、この大きな摩擦エネルギーを発生させるためにボンディングワイヤを配線層表面に対して約９０ｇｆ〜６００ｇｆ（０．８８２Ｎ〜５．８８Ｎ）という非常に大きな荷重をかけなければならず、大きな荷重によってＮｉ粒子間の粒界に破壊が発生するためであると考えられる。
【００１４】
また、配線層の表面を被覆するＡｕ層の厚さが平均で約１．５μｍ強と厚いため配線層に直径が１００μｍ以上という大きな径のアルミニウム製のボンディングワイヤを接続させる際、Ａｕ層とボンディングワイヤとの接合部分またはその周辺に脆弱なアルミニウムと金の金属間化合物が多量に形成され、その結果、ボンディングワイヤ等に外力が印加されるとボンディングワイヤが配線層より容易に外れ、電子部品と配線層との電気的接続の信頼性が低いものとなる欠点も誘発してしまう。
【００１５】
本発明は、上記諸欠点に鑑み案出されたもので、その目的は、配線層表面に被着されている被覆層にクラックを発生させることなく直径が１００μｍ以上と大きな径のボンディングワイヤを配線層に強固に接続させることができる配線基板を提供することにある。
【００１６】
【課題を解決するための手段】
本発明の配線基板は、電気絶縁材料から成る基板と、Ａｕ、Ａｇ、Ｃｕ、Ｐｄ、Ｐｔの少なくとも１種より成り、前記基板に同時焼成により形成され、かつ直径が１００μｍ以上のボンディングワイヤが接合される領域を有する配線層と、前記配線層の少なくともボンディングワイヤが接合される領域に被着され、粒子の大きさが５μｍ乃至３０μｍのＮｉ層と、厚さが０．０３μｍ乃至０．３μｍのＰｄ層と、厚さが０．０５μｍ乃至０．３μｍのＡｕ層とから成る被覆層とで形成されたことを特徴とするものである。
【００１７】
また本発明の配線基板は、前記Ｎｉ層の厚みが４μｍ乃至１３μｍであることを特徴とするものである。
【００１８】
更に本発明の配線基板は、前記Ｎｉ層の硬さがビッカース硬度で２００Ｈｖ以上であることを特徴とするものである。
【００１９】
また更に本発明の配線基板は、前記Ａｕ層の表面粗さが算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍであることを特徴とするものである。
【００２０】
本発明の配線基板によれば、配線層がＡｕ（金）、Ａｇ（銀）、Ｃｕ（銅）、Ｐｄ（パラジウム）、Ｐｔ（白金）の少なくとも１種より成り、低電気抵抗であることから配線層に電気信号を伝搬させた際、配線層で電気信号に大きな電圧降下を招来することはなく電気信号を正確に伝えることができる。
【００２１】
また本発明の配線基板によれば、前記配線層のボンディングワイヤが接続される領域に粒子の大きさが５μｍ乃至３０μｍのＮｉ層と、厚さが０．０３μｍ乃至０．３μｍのＰｄ層と、厚さが０．０５μｍ乃至０．３μｍのＡｕ層とから成る被覆層を被着させ、Ｎｉ層のＮｉ粒子の大きさを、５μｍ乃至３０μｍの適度な大きさとしたことから、Ｎｉ粒子の粒界が少ないものとなり、直径が１００μｍ以上と大きなボンディングワイヤを配線層に接続する際、ボンディングワイヤと配線層との間に大きな摩擦エネルギーを発生させるためにボンディングワイヤを配線層表面に対して約９０ｇｆ〜６００ｇｆ（０．８８２Ｎ〜５．８８Ｎ）という非常に大きな荷重をかけたとしてもＮｉ粒子間の粒界に破壊を発生させることは有効に防止され、その結果、直径が１００μｍ以上の大きなボンディングワイヤを配線層に確実強固に接続させることができる。
【００２２】
更に本発明の配線基板によれば、Ｎｉ層とＡｕ層との間にＮｉ層、Ａｕ層に対し接合強度が強いＰｄ層を介在させ、かつこのＰｄ層にＮｉ層の酸化を防止するとともにボンディングワイヤの接続性を補助する作用をさせることからＡｕ層の厚さを０．０５μｍ乃至０．３μｍと薄くすることができ、その結果、配線層に直径が１００μｍ以上という大きな径のアルミニウム製のボンディングワイヤを接続させる際、Ａｕ層とボンディングワイヤとの接合部分またはその周辺に脆弱なアルミニウムと金の金属間化合物が多量に生成されることはなく、これによってボンディングワイヤ等に外力が印加されてもボンディングワイヤが配線層より容易に外れることはなく、電子部品と配線層との電気的接続の信頼性を高いものとなすことができる。
【００２３】
更に本発明の配線基板によれば、前記配線層のボンディングワイヤが接続される領域に被着される被覆層のＮｉ層の厚みを４μｍ乃至１３μｍと厚くしておくと、配線層に直径が１００μｍ以上と大きなボンディングワイヤを接続させる場合、ボンディングワイヤを配線層表面に押し付ける荷重、ボンディングワイヤと配線層との摺動にともなって発生する機械的応力はＮｉ層で吸収・緩和されて小さくなり、その結果、配線層と基板との界面に大きな応力が作用することはなく、配線層と基板との間で亀裂やハガレ等の不具合が発生するのを有効に防止して配線層を基板に強固に接合させておくことが可能となる。
【００２４】
また更に本発明の配線基板によれば、配線層の表面に被着されている被覆層のうち最上層のＡｕ層の表面の粗さを算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍとし、適度に平滑にしておくと、配線層に直径が１００μｍ以上と大きなボンディングワイヤを超音波ボンダーで接続する場合、被覆層とボンディングワイヤとを接合面の全面で良好に密着させ、両者間の全面にわたって均一に大きな摩擦エネルギーを発生させてボンディングワイヤと配線層との間に十分な金属拡散を行わせることができ、これによって配線層へのボンディングワイヤの接続信頼性を高いものとなすことができる。
【００２５】
【発明の実施の形態】
次に本発明を添付図面に基づき詳細に説明する。
【００２６】
図１及び図２は本発明の配線基板をＥＣＵ（Ｅｌｅｃｔｒｏｎｉｃ　Ｃｏｎｔｒｏｌ　Ｕｎｉｔ）基板等の半導体素子搭載用の基板に適用した場合の一実施例を示し、１は基板、２は配線層である。この基板１と配線層２とで半導体素子３を搭載するための配線基板４が形成される。
【００２７】
前記配線基板４の基板１は半導体素子３を支持する支持部材として作用し、上面の略中央部に半導体素子３がガラス、ロウ材、樹脂等の接着材を介して取着固定される。
【００２８】
前記基板１は、ガラスセラミック焼結体や結晶性ガラス、マンガン化合物を添加すること等により１２００℃の低温焼成を可能とした酸化アルミニウム質焼結体等の電気絶縁材料から成り、例えば、ガラスセラミック焼結体から成る場合であれば、酸化珪素、酸化ホウ素、酸化カルシウム等のガラス粉末と、酸化アルミニウム、ムライト等のセラミック粉末とから成るガラスセラミック原料粉末に適当な有機バインダ、溶剤等を添加混合して泥漿物を作るとともに該泥漿物をドクターブレード法やカレンダーロール法を採用することによってガラスセラミックグリーンシート（ガラスセラミック生シート）と成し、しかる後、前記ガラスセラミックグリーンシートに適当な打ち抜き加工を施すとともに必要に応じてこれを複数枚積層し、約９００℃の温度で焼成することによって製作される。
【００２９】
また前記基板１はその上面で半導体素子３が搭載実装される領域周辺から下面にかけて複数の配線層２が形成してあり、該配線層２の基板１上面に露出する部位には半導体素子３の電極がボンディングワイヤ５を介して接続され、また基板１の下面に導出する部位は外部の電気回路基板に半田等の導電性接続材を介して接続される。
【００３０】
前記配線層２は半導体素子３の各電極を外部電気回路に接続するための導電路として作用し、半導体素子３の各電極をボンディングワイヤ５を介し配線層２に接続することによって半導体素子３の各電極は配線層２を介して外部電気回路に接続されることとなる。
【００３１】
前記配線層２は、Ａｕ、Ａｇ、Ｃｕ、Ｐｄ、Ｐｔの少なくとも１種より成り、このようなＡｕ、Ａｇ、Ｃｕ、Ｐｄ、Ｐｔ等から成る配線層２は電気抵抗値が小さいことから配線層２に電気信号を伝搬させた場合、配線層２で電気信号に大きな電圧降下を招来することはなく半導体素子３に電気信号を正確に伝えることが可能となる。
【００３２】
前記配線層２は、例えば、Ａｇから成る場合であれば、Ａｇ粉末に適当な有機バインダ及び溶剤を添加混合して金属ペーストを作成し、この金属ペーストを基板１となるガラスセラミックグリーンシートの表面に所定パターンに印刷塗布することによって基板１の上面から下面にかけて所定パターンに形成される。
【００３３】
また前記配線層２は、基板１の上面に露出する領域に半導体素子３の電極が、直径が１００μｍ以上のボンディングワイヤ５を介して接続され、これによって半導体素子３の各電極がボンディングワイヤ５を介して配線層２に電気的に接続されることとなる。
【００３４】
前記ボンディングワイヤ５はその直径が１００μｍ以上と大きいことからボンディングワイヤ５を介して配線層２から半導体素子３に約５Ａ以上という大電流の電気信号を流した場合、大電流の電気信号は何ら支障をきたすことなく半導体素子３に伝搬させることができる。
【００３５】
前記ボンディングワイヤ５はその直径が１００μｍ未満となると５Ａ以上の大電流の電気信号を伝搬させることが困難となる。従って、前記ボンディングワイヤ５はその直径が１００μｍ以上に特定される。
【００３６】
なお、前記配線層２へのボンディングワイヤ５の接続は、配線層２の表面にボンディングワイヤ５の一端を約９０ｇｆ〜６００ｇｆ（０．８８２Ｎ〜５．８８Ｎ）という大きな荷重で押し付けて摺動させ、ボンディングワイヤ５と配線層２表面との間に摩擦エネルギーを発生させるとともに該摩擦エネルギーでボンディングワイヤ５と配線層２表面部分との間に金属拡散を行わせることによって行われる。
【００３７】
また前記配線層２は更に少なくともボンディングワイヤ５が接続される領域に、図２に示す如く、粒子の大きさが５μｍ乃至３０μｍのＮｉ層と、厚さが０．０３μｍ乃至０．３μｍのＰｄ層と、厚さが０．０５μｍ乃至０．３μｍのＡｕ層とから成る被覆層９が被着されており、該被覆層９は配線層２の酸化等を有効に防止するとともにボンディングワイヤ５を配線層に強固に接続させる作用を為す。
【００３８】
前記Ｎｉ層６は、Ａｕ、Ａｇ、Ｃｕ、Ｐｄ、Ｐｔの少なくとも１種より成る配線層２と後述するＰｄ層７との密着性、被着強度がともに良好であり、Ｐｄ層７を配線層２に強固に被着させる下地層として作用するとともに応力を吸収・緩和させる作用をなす。
【００３９】
また前記Ｎｉ層６はＮｉ粒子の大きさが５μｍ乃至３０μｍとなっている。
【００４０】
前記Ｎｉ層はそのＮｉ粒子の大きさが５μｍ乃至３０μｍであり適度な大きさであることから、Ｎｉ粒子の粒界が少ないものとなり、直径が１００μｍ以上と大きなボンディングワイヤ５を配線層２に接続する際、ボンディングワイヤ５と配線層２との間に大きな摩擦エネルギーを発生させるためにボンディングワイヤ５を配線層２表面に対して約９０ｇｆ〜６００ｇｆ（０．８８２Ｎ〜５．８８Ｎ）という非常に大きな荷重をかけたとしてもＮｉ粒子間の粒界に破壊を発生することは有効に防止され、その結果、直径が１００μｍ以上の大きなボンディングワイヤを配線層２に確実強固に接続させることができる。
【００４１】
前記Ｎｉ粒子の大きさが５μｍ乃至３０μｍであるＮｉ層６は、例えば、次亜リン酸ナトリウム等のリン系還元剤やジメチルアミンボラン等のホウ素系還元剤を用いる無電解Ｎｉめっき液中に配線層２を所定時間浸漬して配線層２の表面にＮｉ粒子を被着させ、しかる後、約３００℃の温度で１２０分乃至１８０分程度加熱処理を行なうことによって形成される。
【００４２】
なお、前記Ｎｉから成る被覆層６はＮｉ粒子の大きさが５μｍ未満であるとＮｉ粒子間の粒界が多いものとなって配線層２に直径が１００μｍ以上の大きなボンディングワイヤ５を接続する際の荷重のよってＮｉから成る被覆層６にクラックが発生してしまい、また３０μｍを超えると、Ｎｉ粒子間の粒界の化学的、物理的結合力が極めて小さいことから、直径が１００μｍ以上の大きなボンディングワイヤ５を大きな荷重で押し付け摺動させた際に、Ｎｉ粒子そのものがＮｉから成る被覆層６から脱離してしまい、ボンディングワイヤ５を配線層２に確実強固に接続させることができなくなってしまう。従って、前記Ｎｉ層６はＮｉ粒子の大きさが５μｍ乃至３０μｍの範囲に特定される。
【００４３】
また、前記Ｎｉ層６はその厚みを４μｍ乃至１３μｍと厚くしておくと、配線層２を完全に被覆して配線層２の酸化等を有効に防止することができるとともに配線層２に直径が１００μｍ以上と大きなボンディングワイヤ５を接続させる場合、ボンディングワイヤ５を配線層２表面に押し付ける荷重、ボンディングワイヤ５と配線層２との摺動にともなって発生する機械的応力は被覆層６で吸収・緩和されて小さな値となり、その結果、配線層２と基板１との界面に大きな力が作用することはなく、配線層２と基板１との間で亀裂やハガレ等の不具合が発生するのを有効に防止して配線層２を基板１に強固に接合させておくことが可能となる。
【００４４】
前記Ｎｉ層６は、その厚さが４μｍ未満では、ボンディングワイヤ５を配線層２表面に押し付ける荷重、ボンディングワイヤ５と配線層２との摺動にともなって発生する機械的応力を十分に吸収緩和することが困難となり、配線層２と基板１との界面に亀裂やハガレ等の不具合が生じてしまう危険性があり、また、１３μｍを超えると、その皮膜内部応力が非常に大きくなりＮｉ層６と配線層２との間や、配線層２と基板１との間での接合強度が劣化し、Ｎｉ層６が配線層２より剥離したり、配線層２が基板１より剥離したりしてしまう危険性がある。従って、前記Ｎｉ層６は、その厚さを４μｍ乃至１３μｍの範囲としておくことが好ましい。
【００４５】
また、前記Ｎｉ層６は、その厚みを５μｍ乃至１０μｍの範囲としておくと、ボンディングワイヤ５を配線層２により一層確実、強固に接続させることができるできるとともにＮｉ層６が配線層２より剥離したり、配線層２が基板１より剥離したりしてしまうのを完全に防止して配線基板としての信頼性をより一層良好となすことができる。したがって、前記Ｎｉ層６は、その厚さを５μｍ乃至１０μｍの範囲としておくことがより一層好ましい。
【００４６】
更に前記Ｎｉ層６は、その硬さをビッカース硬度で２００Ｈｖ以上としておくと、ボンディングワイヤ５を配線層２表面に押し付ける荷重で大きく変形することはなく、これによって前記荷重は配線層２と基板１との界面に伝わることが効果的に遮断され、その結果、配線層２と基板１との界面に大きな力が作用することはなく、配線層２と基板１との間で亀裂やハガレ等の不具合が発生するのをより一層有効に防止し配線層２を基板１により強固に接合させておくことが可能となる。したがって、前記Ｎｉ層６は、その硬さをビッカース硬度で２００Ｈｖ以上としておくことが好ましい。
【００４７】
前記Ｎｉ層６の硬さをビッカース硬度で２００Ｈｖ以上と硬くするには、厚さが４μｍ乃至１３μｍとなるようにしてＮｉ層をめっき法等で配線層２の表面に被着させた後、熱処理を加え、Ｎｉ３ＰやＮｉ３Ｂなどの金属間化合物を析出させることによる析出硬化を行なったり、Ｎｉの結晶を緻密化させて、硬さが２００Ｈｖ以上となるようにする方法や、無電解めっき法でＮｉ層を形成する過程で、めっき時間を長くすることによりＮｉの結晶の緻密化を図り硬さを２００Ｈｖ以上と硬くする等の方法を用いることができる。
【００４８】
なお、めっき法等でＮｉを配線層２の表面に被着させ、Ｎｉ層６を形成する場合、その硬さをビッカース硬度で５００Ｈｖを超えるようなものとしようとすると、必要以上にめっき時間を長くしたり、高温でＮｉを熱処理したりする必要が生じ、生産性や経済性を低下させるおそれがある。したがって、前記Ｎｉ層６は、その硬さを、ビッカース硬度で２００Ｈｖ乃至５００Ｈｖの範囲とすることがより一層好ましい。
【００４９】
更に前記Ｎｉ層６の表面にはＰｄ層７が被着されており、該Ｐｄ層７はＮｉ層６の酸化腐蝕を防止し、かつＡｕ層８をＮｉ層６に強固に被着させる作用をなすとともにＡｕ層８の厚さを薄くしてもボンディングワイヤ５が強固に接続されるように補助する作用をなす。
【００５０】
前記Ｐｄ層７は、電解法や無電解法等のめっき法により形成することができ、例えば、次亜リン酸ナトリウム等のリン系還元剤やジメチルアミンボラン等のホウ素系の還元剤を用いる無電解Ｐｄめっき液中に、Ｎｉ層６を被着させた配線層２を所定時間浸漬することにより形成される。
【００５１】
前記Ｐｄ層７はまたその厚さが０．０３μｍ未満ではＮｉ層６の酸化腐蝕を効果的に防止することができず、０．３μｍを超えるとめっき皮膜応力により配線層２に対する被覆層９の被着強度を劣化させてしまう。従って、前記Ｐｄ層７の厚さは０．０３μｍ乃至０．３μｍの範囲に特定される。
【００５２】
更に前記Ｐｄ層７はその表面にＡｕ層８が被着されており、該Ａｕ層８はＮｉ層６およびＰｄ層７の酸化腐蝕を防止するとともに、ボンディングワイヤ５との間で金属拡散してボンディングワイヤ５を配線層２に強固に接合させる作用をなす。
【００５３】
前記Ａｕ層８は、無電解法や電解法等のめっき法により形成することができ、例えば、無電解法により形成する場合であれば、シアン化金カリウムを主成分とし、ＥＤＴＡ（エチレンジアミン四酢酸）等の還元剤やｐＨ調整剤等を添加して成る置換型の無電解Ａｕめっき液や、水素化ホウ素カリウムやジメチルアミンボラン等の還元剤を用いる還元型の無電解Ａｕめっき液等の周知の無電解Ａｕめっき液中に、Ｎｉ層６およびＰｄ層７を被着させた配線層２を所定時間浸漬することにより形成される。
【００５４】
前記Ａｕ層８は、その下部にボンディングワイヤ５の接続を補助させるＰｄ層７が配されていることから厚さを０．０５μｍ乃至０．３μｍと薄くすることができ、その結果、配線層２に直径が１００μｍ以上という大きな径のアルミニウム製のボンディングワイヤ５を接続させる際、Ａｕ層８とボンディングワイヤ５との接合部分またはその周辺に脆弱なアルミニウムと金の金属間化合物が多量に生成されることはなく、これによってボンディングワイヤ５等に外力が印加されてもボンディングワイヤ５が配線層２より容易に外れることはなく、半導体素子３と配線層２との電気的接続の信頼性を高いものとなすことができる。
【００５５】
前記Ａｕ層８は、その厚さが０．０５μｍ未満ではＮｉ層６等の酸化腐蝕を効果的に防止することができずＮｉの酸化物が形成されるとこれがＡｕ層８表面に析出して酸化物層を形成しボンディングワイヤ５の接続が弱くなったり、ボンディングワイヤ５とＡｕ層８との間での金属拡散が不十分となってボンディングワイヤ５の接続が弱くなってしまったりし、また０．３μｍを超えるとＡｕ層８とボンディングワイヤ８との接合部分またはその周辺に脆弱なアルミニウムと金の金属間化合物が多量に生成され、その結果、ボンディングワイヤ５等に外力が印加されるとボンディングワイヤ５が配線層２より容易に外れ、半導体素子３と配線層２との電気的接続の信頼性が低いものとなってしまう。従って、前記Ａｕ層８の厚さは０．０５μｍ乃至０．３μｍの範囲に特定される。
【００５６】
また前記Ａｕ層８は、その表面の粗さを算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍの範囲としておくことが好ましい。
【００５７】
前記Ａｕ層８の表面粗さを算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍとし適度に平滑にしておくと、配線層２に直径が１００μｍ以上と大きなボンディングワイヤ５を超音波ボンダーで接続する場合、Ａｕ層８とボンディングワイヤ５とを接合面の全面にわたって良好に密着させることができ、両者間の全面で大きな摩擦エネルギーを発生させてボンディングワイヤ５と配線層２との間に十分な金属拡散を行わせることができ、これによって配線層２へのボンディングワイヤ５の接続信頼性をより一層高いものとなすことができる。
【００５８】
前記Ａｕ層８はその表面の粗さが算術平均粗さ（Ｒａ）で０．１μｍ未満となると、平滑になるため、Ａｕ層８とボンディングワイヤ５との間で発生する摩擦エネルギーが低下する傾向があり、ボンディングワイヤ５と配線層２との間での金属拡散が減少して、配線層２とボンディングワイヤ５との接続信頼性が低下するおそれがある。また表面の粗さが算術平均粗さ（Ｒａ）で０．３μｍを超えると、配線層２に直径が１００μｍ以上と大きなボンディングワイヤ５を超音波ボンダーで接続する場合、Ａｕ層８とボンディングワイヤ５との広い接合面の全面にわたって良好かつ均一に両者を密着させることが困難となり、部分的に摩擦エネルギーが不十分となって、ボンディングワイヤ５とＡｕ層８との間での金属拡散が部分的に不十分となり、配線層２に対するボンディングワイヤ５の接続強度が低下するおそれがある。従って、前記Ａｕ層８はその表面の粗さが算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍの範囲としておくことが好ましい。
【００５９】
前記Ａｕ層８の表面を算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍの範囲とするには、例えば、上述のように配線層２に無電解めっき法によりＮｉ層６を形成する場合、無電解Ｎｉめっき液中に結晶調整剤（光沢剤）として硫黄化合物等やＢｉ、Ｓｅ、Ｔｅ等を適量添加したり、ＮｉおよびＮｉと共析するリンやボロンとの安定度定数（錯化力）が異なる錯化剤を２〜３種類組み合わせたり、ｐＨ，液温，撹拌スピード等のめっき条件を、配線層２の表面状態等に応じて調整したりすることによって、配線層２表面の凹凸を埋めて平滑化させるようにしてＮｉを析出・被着させ、これによりＮｉ層６の表面の粗さを算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍの範囲としておき、このＮｉ層６の表面に順次被着されるＰｄ層７およびＡｕ層８の表面の粗さをそれぞれ算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍの範囲とする等の方法を用いることができる。
【００６０】
かくして半導体素子３が搭載された配線基板４は、半導体素子３を蓋体や封止樹脂等の封止材（不図示）を用いて封止するとともに、ＭＯＳ−ＦＥＴ、コンデンサー等の電子部品（不図示）を搭載し、その電極を配線層２に接続することにより製品としてのＥＣＵ（Ｅｌｅｃｔｒｏｎｉｃ　Ｃｏｎｔｒｏｌ　Ｕｎｉｔ）基板が完成する。
【００６１】
なお本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能であり、例えば、上述の実施例において前記配線層２の外周上端の角（稜線）部分を円弧状に面取りしておくと、この角部分で、配線層２と被覆層６との被着界面に応力が集中し、被覆層６に亀裂等の機械的な破壊が生じることを効果的に防止することができる。したがって、前記配線層２は、その外周上端の角（稜線）部分を円弧状に面取りしておくことが好ましい。
【００６２】
【発明の効果】
本発明の配線基板によれば、配線層がＡｕ（金）、Ａｇ（銀）、Ｃｕ（銅）、Ｐｄ（パラジウム）、Ｐｔ（白金）の少なくとも１種より成り、低電気抵抗であることから配線層に電気信号を伝搬させた際、配線層で電気信号に大きな電圧降下を招来することはなく電気信号を正確に伝えることができる。
【００６３】
また本発明の配線基板によれば、前記配線層のボンディングワイヤが接続される領域に粒子の大きさが５μｍ乃至３０μｍのＮｉ層と、厚さが０．０３μｍ乃至０．３μｍのＰｄ層と、厚さが０．０５μｍ乃至０．３μｍのＡｕ層とから成る被覆層を被着させ、Ｎｉ層のＮｉ粒子の大きさを、５μｍ乃至３０μｍの適度な大きさとしたことから、Ｎｉ粒子の粒界が少ないものとなり、直径が１００μｍ以上と大きなボンディングワイヤを配線層に接続する際、ボンディングワイヤと配線層との間に大きな摩擦エネルギーを発生させるためにボンディングワイヤを配線層表面に対して約９０ｇｆ〜６００ｇｆ（０．８８２Ｎ〜５．８８Ｎ）という非常に大きな荷重をかけたとしてもＮｉ粒子間の粒界に破壊を発生させることは有効に防止され、その結果、直径が１００μｍ以上の大きなボンディングワイヤを配線層に確実強固に接続させることができる。
【００６４】
更に本発明の配線基板によれば、Ｎｉ層とＡｕ層との間にＮｉ層、Ａｕ層に対し接合強度が強いＰｄ層を介在させ、かつこのＰｄ層にＮｉ層の酸化を防止するとともにボンディングワイヤの接続性を補助する作用をさせることからＡｕ層の厚さを０．０５μｍ乃至０．３μｍと薄くすることができ、その結果、配線層に直径が１００μｍ以上という大きな径のアルミニウム製のボンディングワイヤを接続させる際、Ａｕ層とボンディングワイヤとの接合部分またはその周辺に脆弱なアルミニウムと金の金属間化合物が多量に生成されることはなく、これによってボンディングワイヤ等に外力が印加されてもボンディングワイヤが配線層より容易に外れることはなく、電子部品と配線層との電気的接続の信頼性を高いものとなすことができる。
【００６５】
更に本発明の配線基板によれば、前記配線層のボンディングワイヤが接続される領域に被着される被覆層のＮｉ層の厚みを４μｍ乃至１３μｍと厚くしておくと、配線層に直径が１００μｍ以上と大きなボンディングワイヤを接続させる場合、ボンディングワイヤを配線層表面に押し付ける荷重、ボンディングワイヤと配線層との摺動にともなって発生する機械的応力はＮｉ層で吸収・緩和されて小さくなり、その結果、配線層と基板との界面に大きな応力が作用することはなく、配線層と基板との間で亀裂やハガレ等の不具合が発生するのを有効に防止して配線層を基板に強固に接合させておくことが可能となる。
【００６６】
また更に本発明の配線基板によれば、配線層の表面に被着されている被覆層のうち最上層のＡｕ層の表面の粗さを算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍとし、適度に平滑にしておくと、配線層に直径が１００μｍ以上と大きなボンディングワイヤを超音波ボンダーで接続する場合、被覆層とボンディングワイヤとを接合面の全面で良好に密着させ、両者間の全面にわたって均一に大きな摩擦エネルギーを発生させてボンディングワイヤと配線層との間に十分な金属拡散を行わせることができ、これによって配線層へのボンディングワイヤの接続信頼性を高いものとなすことができる。
【図面の簡単な説明】
【図１】本発明の配線基板の一実施例を示す断面図である。
【図２】本発明の配線基板の一実施例の要部拡大断面図である。
【符号の説明】
１・・・・基板
２・・・・配線層
３・・・・半導体素子
４・・・・配線基板
５・・・・ボンディングワイヤ
６・・・・Ｎｉ層
７・・・・Ｐｄ層
８・・・・Ａｕ層
９・・・・被覆層[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a wiring board on which electronic components such as a semiconductor element, a capacitance element, and a resistor are mounted, and more particularly, to a wiring board in which a large-diameter bonding wire allowing a large current flow is connected to a wiring layer. It is.
[0002]
[Prior art]
Conventionally, a wiring board on which electronic components such as a semiconductor element, a capacitance element, and a resistor are mounted is made of an electrically insulating material such as an aluminum oxide sintered body, and has a substrate having an electronic component mounting portion on a surface and a wiring board formed on the substrate. And a wiring layer made of a refractory metal material such as tungsten or molybdenum. The electronic parts such as semiconductor elements, capacitance elements, and resistors are mounted on the mounting portion of the substrate and the electrodes of each electronic part are wired. The layers are electrically connected via bonding wires.
[0003]
Such a wiring board is mounted on an external electric circuit board by connecting a part of a wiring layer to a wiring conductor of the external electric circuit board via a low melting point brazing material such as tin-lead solder, and is simultaneously mounted on the wiring board. Each of the electrodes of the electronic component is electrically connected to a predetermined external electric circuit.
[0004]
In addition, aluminum and gold are generally used as a material of a bonding wire for connecting each electrode of the electronic component to a wiring layer. In particular, it is necessary to increase the diameter of the bonding wire in order to flow a large current. In this case, an aluminum bonding wire is frequently used with an emphasis on economy, and a gold bonding wire is often used when a bonding speed is important.
[0005]
The connection between the wiring layer and the electrode of the electronic component via a bonding wire is generally performed by using an ultrasonic bonder. Specifically, one end of the bonding wire is brought into contact with the surface of the wiring layer. The bonding wire is connected to the wiring layer by sliding to generate frictional energy between the bonding wire and the wiring layer surface and to cause metal diffusion between the bonding wire and the wiring layer surface portion with the frictional energy. You.
[0006]
In this case, the diameter of the conventional bonding wire is about 30 μm, and the bonding wire is pressed against the surface of the wiring layer with a load of about 30 gf to 50 gf (0.294 N to 0.49 N), and the frictional energy is generated by sliding. Are generated efficiently.
[0007]
Further, the wiring layer of the wiring board is usually provided with a coating layer composed of a Ni layer having an average thickness of about 3 μm and an Au layer having an average thickness of slightly more than about 1.5 μm on the surface by plating or the like. Thus, the connectivity of the bonding wire using an ultrasonic bonder is improved. Note that the Ni layer is generally formed by using an electroless Ni plating solution using a phosphorus-based reducing agent such as sodium hypophosphite or a boron-based reducing agent such as dimethylamine borane. Is usually about 0.1 μm to 4 μm.
[0008]
However, in this conventional wiring board, a wiring layer formed of tungsten, molybdenum, or the like has a high electric resistance, and causes a voltage drop in an electric signal transmitted through the wiring layer, thereby causing a semiconductor element connected to the wiring layer to have a low voltage. There is a drawback that electric signals cannot be accurately input / output to / from such electronic components. In particular, the larger the current value of the electric signal transmitted through the wiring layer, the more remarkable this disadvantage.
[0009]
Therefore, in order to solve the above-mentioned disadvantage, the wiring layer is formed of a metal material having a low electric resistance such as Cu (copper), Ag (silver), or Au (gold), and a coating layer composed of a Ni layer and an Au layer is formed on the surface. Has been proposed.
[0010]
According to such a wiring board, since the wiring layer is formed of Cu, Ag, Au, or the like having a low electric resistance, when an electric signal is transmitted to the wiring layer, a large voltage drop occurs in the electric signal in the wiring layer. It is possible to accurately transmit the electric signal to the electronic component without performing the operation.
[0011]
[Patent Document 1]
JP, 2002-124590, A
[Problems to be solved by the invention]
However, in recent years, the use of wiring boards for applications requiring a large current of about 5 A or more, such as a board for an ECU (Electronic Control Unit), is increasing. In this case, the wiring board is mounted on the wiring board. In order to allow a large current to flow through the electronic component, the diameter of the bonding wire connecting the wiring layer and the electronic component needs to be very large, such as 100 μm or more. The bonding wire having such a large diameter is formed by an ultrasonic bonder. If an attempt is made to connect to the wiring layer, cracks occur in the Ni layer adhered to the surface of the wiring layer or in the coating layer such as the joint interface between the Ni layer and the Pd layer, and the bonding wire is not connected to the wiring layer. There is a disadvantage that connection reliability is greatly reduced.
[0013]
The cause of the cracks in the Ni layer or in the coating layer such as the bonding interface between the Ni layer and the Pd layer is that the Ni layer is caused by a phosphorus-based reducing agent such as sodium hypophosphite or dimethylamine borane. It is formed by an electroless Ni plating solution using a boron-based reducing agent, and the action of the reducing agent suppresses the crystal growth of Ni, resulting in a small particle diameter and an extremely large number of grain boundaries. When a bonding wire having a diameter as large as 100 μm or more is connected to the wiring layer, it is necessary to generate a large frictional energy between the bonding wire and the wiring layer. , A very large load of about 90 gf to 600 gf (0.882 N to 5.88 N) must be applied. Destruction in the grain boundary between the i-particle is considered to be due to occur.
[0014]
Also, since the thickness of the Au layer covering the surface of the wiring layer is as thick as about 1.5 μm on average, when connecting a large-diameter aluminum bonding wire having a diameter of 100 μm or more to the wiring layer, the Au layer is bonded to the Au layer. A large amount of fragile intermetallic compound of aluminum and gold is formed at or around the junction with the wire, and as a result, when an external force is applied to the bonding wire or the like, the bonding wire is easily detached from the wiring layer, and the electronic component and A disadvantage that the reliability of the electrical connection with the wiring layer is low is also induced.
[0015]
The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to wire a bonding wire having a diameter as large as 100 μm or more without generating a crack in a coating layer applied to the surface of a wiring layer. An object of the present invention is to provide a wiring board that can be firmly connected to a layer.
[0016]
[Means for Solving the Problems]
The wiring board of the present invention is made of a board made of an electrically insulating material and at least one of Au, Ag, Cu, Pd, and Pt, and bonded to the board by bonding wires having a diameter of 100 μm or more formed by simultaneous firing. A wiring layer having a region to be bonded, a Ni layer having a particle size of 5 μm to 30 μm, and a Ni layer having a particle size of 5 μm to 30 μm and a thickness of 0.03 μm to 0.3 μm. It is characterized by being formed of a Pd layer and a coating layer composed of an Au layer having a thickness of 0.05 μm to 0.3 μm.
[0017]
In the wiring board according to the present invention, the Ni layer has a thickness of 4 μm to 13 μm.
[0018]
Further, the wiring board of the present invention is characterized in that the hardness of the Ni layer is not less than 200 Hv in Vickers hardness.
[0019]
Still further, in the wiring substrate according to the present invention, the Au layer has an arithmetic average roughness (Ra) of 0.1 μm to 0.3 μm.
[0020]
According to the wiring board of the present invention, the wiring layer is made of at least one of Au (gold), Ag (silver), Cu (copper), Pd (palladium), and Pt (platinum) and has a low electric resistance. When the electric signal is propagated to the wiring layer, the electric signal can be accurately transmitted without causing a large voltage drop in the electric signal in the wiring layer.
[0021]
Further, according to the wiring board of the present invention, a Ni layer having a particle size of 5 μm to 30 μm, a Pd layer having a thickness of 0.03 μm to 0.3 μm in a region of the wiring layer to which the bonding wire is connected; A coating layer consisting of an Au layer having a thickness of 0.05 μm to 0.3 μm was deposited, and the size of the Ni particles in the Ni layer was adjusted to an appropriate size of 5 μm to 30 μm. When connecting a bonding wire having a diameter as large as 100 μm or more to the wiring layer, a large amount of frictional energy is generated between the bonding wire and the wiring layer. Even if a very large load of 600 gf (0.882 N to 5.88 N) is applied, it is possible to effectively prevent the fracture at the grain boundary between the Ni particles, and as a result, It can be connected reliably firmly large bonding wire 100μm or more in diameter to the wiring layer.
[0022]
Further, according to the wiring board of the present invention, a Ni layer and a Au layer are interposed between the Ni layer and the Au layer, and a Pd layer having a high bonding strength to the Au layer is interposed between the Ni layer and the Au layer. Since the function of assisting the connection of the wires is provided, the thickness of the Au layer can be reduced to 0.05 μm to 0.3 μm, and as a result, a large-diameter aluminum bonding having a diameter of 100 μm or more is formed on the wiring layer. When connecting the wires, a large amount of fragile intermetallic compound of aluminum and gold is not generated at or around the bonding portion between the Au layer and the bonding wire, so that even if an external force is applied to the bonding wire or the like. The bonding wire does not easily come off the wiring layer, and the reliability of the electrical connection between the electronic component and the wiring layer can be increased.
[0023]
Further, according to the wiring board of the present invention, when the thickness of the Ni layer of the coating layer applied to the region of the wiring layer to which the bonding wire is connected is made as thick as 4 μm to 13 μm, the diameter of the wiring layer becomes 100 μm. When connecting a bonding wire as large as above, the load for pressing the bonding wire against the wiring layer surface, and the mechanical stress generated due to the sliding between the bonding wire and the wiring layer are absorbed and relaxed by the Ni layer, and become small. As a result, a large stress does not act on the interface between the wiring layer and the substrate, and the occurrence of defects such as cracks and peeling between the wiring layer and the substrate is effectively prevented, and the wiring layer is firmly attached to the substrate. It is possible to keep them joined.
[0024]
Further, according to the wiring board of the present invention, the surface roughness of the uppermost Au layer among the coating layers adhered to the surface of the wiring layer is calculated as an arithmetic average roughness (Ra) of 0.1 μm to 0.1 μm. 3 μm, if it is moderately smooth, when a bonding wire having a diameter of 100 μm or more is connected to the wiring layer with an ultrasonic bonder, the covering layer and the bonding wire are brought into good contact with the entire surface of the bonding surface. A large amount of frictional energy is generated uniformly over the entire surface of the bonding wire to allow sufficient metal diffusion between the bonding wire and the wiring layer, thereby increasing the reliability of connection of the bonding wire to the wiring layer. Can be.
[0025]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the present invention will be described in detail with reference to the accompanying drawings.
[0026]
1 and 2 show an embodiment in which the wiring board of the present invention is applied to a board for mounting a semiconductor element such as an ECU (Electronic Control Unit) board, and 1 is a board and 2 is a wiring layer. The substrate 1 and the wiring layer 2 form a wiring substrate 4 on which the semiconductor element 3 is mounted.
[0027]
The substrate 1 of the wiring board 4 functions as a support member for supporting the semiconductor element 3, and the semiconductor element 3 is attached and fixed to a substantially central portion of the upper surface via an adhesive such as glass, brazing material, resin, or the like.
[0028]
The substrate 1 is made of an electrically insulating material such as a glass ceramic sintered body, crystalline glass, or an aluminum oxide sintered body that can be fired at a low temperature of 1200 ° C. by adding a manganese compound. In the case of a sintered body, an appropriate organic binder, a solvent, etc. are added to a glass-ceramic raw material powder composed of glass powder of silicon oxide, boron oxide, calcium oxide, etc. and ceramic powder of aluminum oxide, mullite, etc., and mixed. To form a glass ceramic green sheet (glass ceramic green sheet) by employing a doctor blade method or a calender roll method, and then appropriately punching the glass ceramic green sheet. And, if necessary, laminating a plurality of the It is manufactured by firing at a temperature of 0 ° C..
[0029]
On the upper surface of the substrate 1, a plurality of wiring layers 2 are formed from the periphery of the area where the semiconductor element 3 is mounted and mounted to the lower surface. The electrodes are connected via bonding wires 5, and a portion extending to the lower surface of the board 1 is connected to an external electric circuit board via a conductive connecting material such as solder.
[0030]
The wiring layer 2 functions as a conductive path for connecting each electrode of the semiconductor element 3 to an external electric circuit, and connects each electrode of the semiconductor element 3 to the wiring layer 2 via a bonding wire 5 to thereby form the semiconductor element 3. Each electrode is connected to an external electric circuit via the wiring layer 2.
[0031]
The wiring layer 2 is made of at least one of Au, Ag, Cu, Pd, and Pt. Since the wiring layer 2 made of such Au, Ag, Cu, Pd, and Pt has a small electric resistance value, When the electric signal is propagated to the semiconductor element 3, the electric signal can be accurately transmitted to the semiconductor element 3 without causing a large voltage drop in the electric signal in the wiring layer 2.
[0032]
When the wiring layer 2 is made of, for example, Ag, an appropriate organic binder and a solvent are added to and mixed with Ag powder to form a metal paste, and the metal paste is applied to the surface of the glass ceramic green sheet to be the substrate 1. Is formed in a predetermined pattern from the upper surface to the lower surface of the substrate 1 by printing and applying a predetermined pattern.
[0033]
In the wiring layer 2, the electrodes of the semiconductor element 3 are connected to the regions exposed on the upper surface of the substrate 1 via bonding wires 5 having a diameter of 100 μm or more, whereby each electrode of the semiconductor element 3 connects the bonding wires 5. The wiring is electrically connected to the wiring layer 2 through the wiring.
[0034]
Since the bonding wire 5 has a diameter as large as 100 μm or more, when an electric signal of a large current of about 5 A or more flows from the wiring layer 2 to the semiconductor element 3 through the bonding wire 5, the electric signal of the large current does not cause any problem. Can be propagated to the semiconductor element 3 without causing the problem.
[0035]
When the diameter of the bonding wire 5 is less than 100 μm, it becomes difficult to transmit a large-current electric signal of 5 A or more. Therefore, the diameter of the bonding wire 5 is specified to be 100 μm or more.
[0036]
The connection of the bonding wire 5 to the wiring layer 2 is performed by pressing one end of the bonding wire 5 against the surface of the wiring layer 2 with a large load of about 90 gf to 600 gf (0.882 N to 5.88 N). This is performed by generating frictional energy between the bonding wire 5 and the surface of the wiring layer 2 and diffusing the metal between the bonding wire 5 and the surface of the wiring layer 2 by the frictional energy.
[0037]
As shown in FIG. 2, the wiring layer 2 further includes a Ni layer having a particle size of 5 μm to 30 μm and a Pd layer having a thickness of 0.03 μm to 0.3 μm, at least in a region where the bonding wire 5 is connected. And an Au layer having a thickness of 0.05 μm to 0.3 μm, and the coating layer 9 effectively prevents oxidation of the wiring layer 2 and connects the bonding wires 5. It acts to firmly connect to the layer.
[0038]
The Ni layer 6 has good adhesion and adhesion strength between the wiring layer 2 made of at least one of Au, Ag, Cu, Pd, and Pt and a Pd layer 7 described later. 2 acts as an underlayer to be firmly adhered to, and acts to absorb and relax stress.
[0039]
The Ni layer 6 has a Ni particle size of 5 μm to 30 μm.
[0040]
Since the Ni layer has an appropriate size of Ni particles having a size of 5 μm to 30 μm, the grain boundaries of the Ni particles are small, and the bonding wire 5 having a diameter as large as 100 μm or more is connected to the wiring layer 2. At this time, in order to generate a large frictional energy between the bonding wire 5 and the wiring layer 2, the bonding wire 5 is very large, about 90 gf to 600 gf (0.882 N to 5.88 N) with respect to the surface of the wiring layer 2. Even when a load is applied, it is possible to effectively prevent the breakage at the grain boundaries between the Ni particles, and as a result, a large bonding wire having a diameter of 100 μm or more can be securely and firmly connected to the wiring layer 2.
[0041]
The Ni layer 6 in which the size of the Ni particles is 5 μm to 30 μm is formed, for example, by wiring in an electroless Ni plating solution using a phosphorus-based reducing agent such as sodium hypophosphite or a boron-based reducing agent such as dimethylamine borane. The layer 2 is formed by immersing the layer 2 for a predetermined time to deposit Ni particles on the surface of the wiring layer 2 and then performing a heat treatment at a temperature of about 300 ° C. for about 120 to 180 minutes.
[0042]
When the size of the Ni particles is less than 5 μm, the coating layer 6 made of Ni has a large number of grain boundaries between the Ni particles, so that the large bonding wire 5 having a diameter of 100 μm or more is connected to the wiring layer 2. Cracks occur in the coating layer 6 made of Ni due to the load described above, and when the thickness exceeds 30 μm, the chemical and physical bonding force at the grain boundaries between Ni particles is extremely small. When the bonding wire 5 is pressed and slid with a large load, the Ni particles themselves are detached from the coating layer 6 made of Ni, and the bonding wire 5 cannot be securely and firmly connected to the wiring layer 2. . Therefore, the size of the Ni particles in the Ni layer 6 is specified in the range of 5 μm to 30 μm.
[0043]
When the thickness of the Ni layer 6 is set to 4 μm to 13 μm, it is possible to completely cover the wiring layer 2 and effectively prevent oxidation and the like of the wiring layer 2 and to reduce the diameter of the wiring layer 2. When a bonding wire 5 as large as 100 μm or more is connected, a load for pressing the bonding wire 5 against the surface of the wiring layer 2 and a mechanical stress generated due to sliding between the bonding wire 5 and the wiring layer 2 are absorbed and absorbed by the coating layer 6. As a result, a large force does not act on the interface between the wiring layer 2 and the substrate 1, and a problem such as cracking or peeling occurs between the wiring layer 2 and the substrate 1. It is possible to effectively prevent the wiring layer 2 from being firmly joined to the substrate 1 in advance.
[0044]
When the thickness of the Ni layer 6 is less than 4 μm, the load for pressing the bonding wire 5 against the surface of the wiring layer 2 and the mechanical stress generated due to the sliding between the bonding wire 5 and the wiring layer 2 are sufficiently absorbed and relaxed. There is a risk that defects such as cracks and peeling may occur at the interface between the wiring layer 2 and the substrate 1. If the thickness exceeds 13 μm, the internal stress of the film becomes extremely large and the Ni layer 6 The bonding strength between the wiring layer 2 and the wiring layer 2 or between the wiring layer 2 and the substrate 1 is deteriorated, and the Ni layer 6 is separated from the wiring layer 2 or the wiring layer 2 is separated from the substrate 1. There is a danger that it will. Therefore, it is preferable that the Ni layer 6 has a thickness in the range of 4 μm to 13 μm.
[0045]
When the thickness of the Ni layer 6 is in the range of 5 μm to 10 μm, the bonding wire 5 can be more securely and firmly connected to the wiring layer 2, and the Ni layer 6 is separated from the wiring layer 2. Also, it is possible to completely prevent the wiring layer 2 from being peeled off from the substrate 1 and to further improve the reliability as a wiring substrate. Therefore, it is more preferable that the thickness of the Ni layer 6 be in the range of 5 μm to 10 μm.
[0046]
Further, if the hardness of the Ni layer 6 is set to Vickers hardness of 200 Hv or more, the Ni layer 6 is not greatly deformed by the load pressing the bonding wire 5 against the surface of the wiring layer 2. The transmission to the interface between the wiring layer 2 and the substrate 1 is effectively blocked, and as a result, a large force does not act on the interface between the wiring layer 2 and the substrate 1. It is possible to prevent the occurrence of a defect more effectively, and to bond the wiring layer 2 to the substrate 1 more firmly. Therefore, it is preferable that the Ni layer 6 has a hardness of 200 Hv or more in Vickers hardness.
[0047]
In order to increase the hardness of the Ni layer 6 to 200 Hv or more in Vickers hardness, the Ni layer is applied to the surface of the wiring layer 2 by plating or the like so as to have a thickness of 4 μm to 13 μm. A precipitation hardening by precipitating an intermetallic compound such as Ni 3 P or Ni 3 B, a method of densifying a crystal of Ni so that the hardness becomes 200 Hv or more, an electroless method. In the process of forming the Ni layer by the plating method, it is possible to use a method of increasing the plating time to increase the density of the Ni crystal and increase the hardness to 200 Hv or more.
[0048]
In the case where Ni is deposited on the surface of the wiring layer 2 by plating or the like to form the Ni layer 6, if the hardness is to exceed 500 Hv in Vickers hardness, the plating time will be longer than necessary. It is necessary to lengthen or heat-treat Ni at a high temperature, which may reduce productivity and economic efficiency. Therefore, the hardness of the Ni layer 6 is more preferably in the range of 200 to 500 Hv in Vickers hardness.
[0049]
Further, a Pd layer 7 is adhered on the surface of the Ni layer 6, and the Pd layer 7 has a function of preventing oxidation corrosion of the Ni layer 6 and a function of firmly adhering the Au layer 8 to the Ni layer 6. In addition, even if the thickness of the Au layer 8 is reduced, the function of assisting the bonding wire 5 to be firmly connected is achieved.
[0050]
The Pd layer 7 can be formed by a plating method such as an electrolytic method or an electroless method. For example, the Pd layer 7 can be formed by using a phosphorus-based reducing agent such as sodium hypophosphite or a boron-based reducing agent such as dimethylamine borane. The wiring layer 2 on which the Ni layer 6 is adhered is immersed in an electrolytic Pd plating solution for a predetermined period of time.
[0051]
If the thickness of the Pd layer 7 is less than 0.03 μm, the oxidative corrosion of the Ni layer 6 cannot be effectively prevented, and if the thickness exceeds 0.3 μm, the coating layer 9 with respect to the wiring layer 2 due to plating film stress. The adhesion strength is degraded. Therefore, the thickness of the Pd layer 7 is specified in the range of 0.03 μm to 0.3 μm.
[0052]
Further, the Pd layer 7 has an Au layer 8 adhered to the surface thereof. The Au layer 8 prevents the Ni layer 6 and the Pd layer 7 from being oxidized and corroded, and diffuses metal between the Ni layer 6 and the bonding wire 5. The bonding wire 5 functions to firmly join the wiring layer 2 to the wiring layer 2.
[0053]
The Au layer 8 can be formed by a plating method such as an electroless method or an electrolytic method. For example, when the Au layer 8 is formed by an electroless method, it is mainly composed of potassium potassium cyanide and EDTA (ethylenediaminetetraacetic acid). ), And a substitution type electroless Au plating solution obtained by adding a reducing agent such as a pH adjuster, and a reduction type electroless Au plating solution using a reducing agent such as potassium borohydride or dimethylamine borane. The wiring layer 2 on which the Ni layer 6 and the Pd layer 7 are adhered is immersed in the electroless Au plating solution for a predetermined time.
[0054]
The Au layer 8 can be reduced to a thickness of 0.05 μm to 0.3 μm since the Pd layer 7 for assisting the connection of the bonding wire 5 is provided below the Au layer 8. When a large diameter aluminum bonding wire 5 having a diameter of 100 μm or more is connected to the substrate, a large amount of fragile aluminum and gold intermetallic compounds are generated at or near the junction between the Au layer 8 and the bonding wire 5. Therefore, even when an external force is applied to the bonding wire 5 or the like, the bonding wire 5 does not easily come off the wiring layer 2, and the reliability of the electrical connection between the semiconductor element 3 and the wiring layer 2 is high. Can be made.
[0055]
If the thickness of the Au layer 8 is less than 0.05 μm, the oxidative corrosion of the Ni layer 6 or the like cannot be effectively prevented, and when an oxide of Ni is formed, this deposits on the surface of the Au layer 8. An oxide layer is formed to weaken the connection of the bonding wire 5, or the metal diffusion between the bonding wire 5 and the Au layer 8 becomes insufficient to weaken the connection of the bonding wire 5. If the thickness exceeds 0.3 μm, a large amount of fragile intermetallic compound of aluminum and gold is generated at or around the junction between the Au layer 8 and the bonding wire 8. As a result, when an external force is applied to the bonding wire 5 or the like. The bonding wire 5 is easily detached from the wiring layer 2, and the reliability of the electrical connection between the semiconductor element 3 and the wiring layer 2 becomes low. Therefore, the thickness of the Au layer 8 is specified in the range of 0.05 μm to 0.3 μm.
[0056]
The Au layer 8 preferably has a surface roughness in the range of 0.1 μm to 0.3 μm in arithmetic average roughness (Ra).
[0057]
When the surface roughness of the Au layer 8 is set to be 0.1 μm to 0.3 μm in terms of arithmetic average roughness (Ra) and is appropriately smooth, the bonding wire 5 having a diameter of 100 μm or more is formed on the wiring layer 2 by an ultrasonic bonder. In the case of connection by Au, the Au layer 8 and the bonding wire 5 can be satisfactorily adhered over the entire surface of the bonding surface, and a large frictional energy is generated on the entire surface between them, so that the bonding wire 5 and the wiring layer 2 Sufficient metal diffusion can be performed, whereby the connection reliability of the bonding wire 5 to the wiring layer 2 can be further improved.
[0058]
When the surface roughness of the Au layer 8 is less than 0.1 μm in arithmetic average roughness (Ra), the Au layer 8 becomes smooth, so that the friction energy generated between the Au layer 8 and the bonding wire 5 tends to decrease. There is a possibility that metal diffusion between the bonding wire 5 and the wiring layer 2 is reduced, and the connection reliability between the wiring layer 2 and the bonding wire 5 is reduced. When the surface roughness exceeds 0.3 μm in arithmetic average roughness (Ra), when the bonding wire 5 having a large diameter of 100 μm or more is connected to the wiring layer 2 by an ultrasonic bonder, the Au layer 8 and the bonding wire 5 It is difficult to make good and uniform contact between the bonding wire 5 and the Au layer 8 over the entire surface of the wide bonding surface, and the frictional energy becomes partially insufficient. And the connection strength of the bonding wire 5 to the wiring layer 2 may be reduced. Therefore, it is preferable that the surface roughness of the Au layer 8 be in the range of 0.1 μm to 0.3 μm in terms of arithmetic average roughness (Ra).
[0059]
To make the surface of the Au layer 8 have an arithmetic mean roughness (Ra) in the range of 0.1 μm to 0.3 μm, for example, the Ni layer 6 is formed on the wiring layer 2 by the electroless plating method as described above. In this case, an appropriate amount of a sulfur compound or the like, Bi, Se, Te, or the like is added as a crystal modifier (brightening agent) to the electroless Ni plating solution, or a stability constant (complexity with Ni and phosphorus or boron coeutecting with Ni) is added. By combining two or three types of complexing agents having different chemical conversion powers, or by adjusting plating conditions such as pH, solution temperature, and stirring speed according to the surface condition of the wiring layer 2, the surface of the wiring layer 2 is formed. Ni is deposited and deposited in such a manner as to fill and smooth the irregularities of the Ni layer 6 so that the surface roughness of the Ni layer 6 is in the range of 0.1 μm to 0.3 μm in arithmetic average roughness (Ra). A Pd layer 7 and a Pd layer 7 sequentially deposited on the surface of the Ni layer 6 It is possible to use a method such as in the range of 0.1μm to 0.3μm roughness of the surface of the Au layer 8 at respective arithmetic average roughness (Ra).
[0060]
Thus, the wiring board 4 on which the semiconductor element 3 is mounted seals the semiconductor element 3 using a sealing material (not shown) such as a lid or a sealing resin, and also includes electronic components such as a MOS-FET and a capacitor. (Not shown) and connecting the electrodes to the wiring layer 2 to complete an ECU (Electronic Control Unit) substrate as a product.
[0061]
It should be noted that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the spirit of the present invention. If the corners (ridges) are chamfered in an arc shape, stress concentrates on the adhered interface between the wiring layer 2 and the coating layer 6 at the corners, and mechanical destruction such as cracks occurs in the coating layer 6. This can be effectively prevented. Therefore, it is preferable that the corners (ridges) of the upper end of the outer periphery of the wiring layer 2 be chamfered in an arc shape.
[0062]
【The invention's effect】
According to the wiring board of the present invention, the wiring layer is made of at least one of Au (gold), Ag (silver), Cu (copper), Pd (palladium), and Pt (platinum) and has a low electric resistance. When the electric signal is propagated to the wiring layer, the electric signal can be accurately transmitted without causing a large voltage drop in the electric signal in the wiring layer.
[0063]
Further, according to the wiring board of the present invention, a Ni layer having a particle size of 5 μm to 30 μm, a Pd layer having a thickness of 0.03 μm to 0.3 μm in a region of the wiring layer to which the bonding wire is connected; A coating layer consisting of an Au layer having a thickness of 0.05 μm to 0.3 μm was deposited, and the size of the Ni particles in the Ni layer was adjusted to an appropriate size of 5 μm to 30 μm. When connecting a bonding wire having a diameter as large as 100 μm or more to the wiring layer, a large amount of frictional energy is generated between the bonding wire and the wiring layer. Even if a very large load of 600 gf (0.882 N to 5.88 N) is applied, it is possible to effectively prevent the fracture at the grain boundary between the Ni particles, and as a result, It can be connected reliably firmly large bonding wire 100μm or more in diameter to the wiring layer.
[0064]
Further, according to the wiring board of the present invention, a Ni layer and a Au layer are interposed between the Ni layer and the Au layer, and a Pd layer having a high bonding strength to the Au layer is interposed between the Ni layer and the Au layer. Since the function of assisting the connection of the wires is provided, the thickness of the Au layer can be reduced to 0.05 μm to 0.3 μm, and as a result, a large-diameter aluminum bonding having a diameter of 100 μm or more is formed on the wiring layer. When connecting the wires, a large amount of fragile intermetallic compound of aluminum and gold is not generated at or around the bonding portion between the Au layer and the bonding wire, so that even if an external force is applied to the bonding wire or the like. The bonding wire does not easily come off the wiring layer, and the reliability of the electrical connection between the electronic component and the wiring layer can be increased.
[0065]
Further, according to the wiring board of the present invention, when the thickness of the Ni layer of the coating layer applied to the region of the wiring layer to which the bonding wire is connected is made as thick as 4 μm to 13 μm, the diameter of the wiring layer becomes 100 μm. When connecting a bonding wire as large as above, the load for pressing the bonding wire against the wiring layer surface, and the mechanical stress generated due to the sliding between the bonding wire and the wiring layer are absorbed and relaxed by the Ni layer, and become small. As a result, a large stress does not act on the interface between the wiring layer and the substrate, and the occurrence of defects such as cracks and peeling between the wiring layer and the substrate is effectively prevented, and the wiring layer is firmly attached to the substrate. It is possible to keep them joined.
[0066]
Further, according to the wiring board of the present invention, the surface roughness of the uppermost Au layer among the coating layers adhered to the surface of the wiring layer is calculated as an arithmetic average roughness (Ra) of 0.1 μm to 0.1 μm. 3 μm, if it is moderately smooth, when a bonding wire having a diameter of 100 μm or more is connected to the wiring layer with an ultrasonic bonder, the covering layer and the bonding wire are brought into good contact with the entire surface of the bonding surface. A large amount of frictional energy is generated uniformly over the entire surface of the bonding wire to allow sufficient metal diffusion between the bonding wire and the wiring layer, thereby increasing the reliability of connection of the bonding wire to the wiring layer. Can be.
[Brief description of the drawings]
FIG. 1 is a sectional view showing one embodiment of a wiring board of the present invention.
FIG. 2 is an enlarged sectional view of a main part of an embodiment of the wiring board of the present invention.
[Explanation of symbols]
1, a substrate 2, a wiring layer 3, a semiconductor element 4, a wiring board 5, a bonding wire 6, a Ni layer 7, a Pd layer 8, ... Au layer 9 ... Coating layer

Claims (4)

電気絶縁材料から成る基板と、Ａｕ、Ａｇ、Ｃｕ、Ｐｄ、Ｐｔの少なくとも１種より成り、前記基板に同時焼成により形成され、かつ直径が１００μｍ以上のボンディングワイヤが接合される領域を有する配線層と、前記配線層の少なくともボンディングワイヤが接合される領域に被着され、粒子の大きさが５μｍ乃至３０μｍのＮｉ層と、厚さが０．０３μｍ乃至０．３μｍのＰｄ層と、厚さが０．０５μｍ乃至０．３μｍのＡｕ層とから成る被覆層とで形成された配線基板。A wiring layer comprising a substrate made of an electrically insulating material and at least one of Au, Ag, Cu, Pd, and Pt, formed on the substrate by co-firing, and having a region to which a bonding wire having a diameter of 100 μm or more is bonded. A Ni layer having a particle size of 5 μm to 30 μm, a Pd layer having a thickness of 0.03 μm to 0.3 μm, and a Pd layer having a thickness of 0.03 μm to 0.3 μm. A wiring board formed of a covering layer made of a 0.05 μm to 0.3 μm Au layer; 前記Ｎｉ層の厚みが４μｍ乃至１３μｍであることを特徴とする請求項１に記載の配線基板。2. The wiring board according to claim 1, wherein the thickness of the Ni layer is 4 μm to 13 μm. 前記Ｎｉ層の硬さがビッカース硬度で２００Ｈｖ以上であることを特徴とする請求項１または２に記載の配線基板。The wiring board according to claim 1, wherein the hardness of the Ni layer is 200 Hv or more in Vickers hardness. 前記Ａｕ層の表面粗さが算術平均粗さ（Ｒａ）で０．１μｍ乃至０．３μｍであることを特徴とする請求項１乃至３に記載の配線基板。4. The wiring substrate according to claim 1, wherein the surface roughness of the Au layer is 0.1 to 0.3 [mu] m in arithmetic average roughness (Ra).
JP2002307127A 2002-10-22 2002-10-22 Wiring board Withdrawn JP2004146444A (en)

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