JP2004145186A - Display driving method and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To substantially prevent noise voltage generated at the time of rising (or falling) of a signal voltage from affecting a screen display when PWM-controlling a simple matrix display. <P>SOLUTION: The number of signal electrodes, to which a forward-shifted PWM signal voltage is applied respectively, and the number of signal electrodes, to which a backward-shifted PWM signal voltage is applied respectively, are set to be almost equal to each other. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a display driving method for performing PWM control on a simple matrix display using a liquid crystal display element or an organic EL display element, and a display device thereof.
[0002]
[Prior art]
The matrix type display device has an active matrix type having a non-linear element such as a transistor at each pixel at the intersection of a scanning electrode and a signal electrode, and a simple matrix in which each pixel at the intersection is directly connected to a display element without passing through a non-linear element. They are roughly divided into types. As shown in FIG. 6, the simple matrix display 60 has a plurality of signal electrodes X (X1 to X4) and a plurality of scanning electrodes Y (Y1 to Y4) on two opposing substrates so as to be orthogonal to each other. Is provided. The signal electrode and the scanning electrode are usually composed of a large number of electrodes, respectively, but here, four cases will be described as an example.
[0003]
In the simple matrix display, as shown in the timing chart of FIG. 7, the scanning voltage is sequentially applied to the scanning electrodes Y1 to Y4 in synchronization with the scanning clock of the scanning driving circuit 61, that is, the latch pulse LP for taking in the signal. A signal voltage is applied from the side drive circuit 62 to the signal electrodes X1 to X4. At this time, a crosstalk phenomenon occurs between each scanning electrode and each signal electrode due to capacitive coupling by a display element (for example, a liquid crystal display element or an organic EL display element), and the selected pixel is A low voltage is also applied to the other pixels. Due to the structure of the simple matrix display, this crosstalk phenomenon is inevitable, but usually this does not greatly affect the display characteristics.
[0004]
An image is displayed on a display by repeating the application of the scanning voltage and the signal voltage for each frame representing image data for one screen.
[0005]
[Problems to be solved by the invention]
In order to control the display gradation of the simple matrix display, the signal voltage applied to the signal electrodes X1 to X4 is controlled by PWM (Pulse Width Modulation). In this case, as shown in (ii), (iv), (vi), and (viii) in FIG. 7, the signal electrodes X1 to X4 have a signal voltage of a width controlled according to each pixel. Is applied. In this example, each signal voltage is applied to the rear portion with a predetermined width from a certain position in the middle of the interval period Ti of the scan clock LP to the end, and shows a case of backward shifting.
[0006]
In the PWM control, at the changing points (in this case, the rising points) of the respective signal voltages, as shown in (iii), (v), (vii), and (ix) of FIG. Vnz-x1 to Vnz-x4 are generated, and the noise voltages Vnz-x1 to Vnz-x4 fluctuate the potential of the scan electrodes Y1 to Y4 (mainly, the scan electrode Y selected at that time). In addition, noise is generated as indicated by (1) to (4) in the drawing every time the interval period Ti of the scan clock LP ends. These noise voltages Vnz-x1 to Vnz-x4 increase the influence of crosstalk.
[0007]
Since these noise voltages Vnz are all generated in the same direction in each scanning period (for example, the scanning period in which the scanning electrode Y1 is selected) for each frame, the display density and the display unevenness are displayed on the display screen. This is easy to cause and deteriorates display quality. The same applies to the case where the signal voltage of the PWM control is shifted to the front by a predetermined width from the first portion of the interval period Ti of the scan clock LP to the preceding portion, only the polarity of the noise is changed. .
[0008]
Therefore, the present invention provides a display driving method and a display device for a simple matrix display that can substantially eliminate the influence on the screen display of a noise voltage generated when a signal voltage rises or falls in PWM control. The purpose is to provide.
[0009]
[Means for Solving the Problems]
The display driving method according to claim 1, wherein in the display driving method of the simple matrix display controlled by PWM, the signal electrode to which the leading PWM signal voltage is applied and the trailing PWM signal voltage are applied during each scanning period in which the scanning electrodes are sequentially scanned. The number of signal electrodes to which the PWM signal voltage is applied is set to be substantially equal.
[0010]
According to a second aspect of the present invention, in the display driving method according to the first aspect, the signal electrodes to which the leading PWM signal voltage is applied and the signal electrodes to which the trailing PWM signal voltage is applied are alternately set. It is characterized by that.
[0011]
According to a third aspect of the present invention, in the display driving method according to the first or second aspect, the PWM signal voltage is a PWM signal voltage shifted backward with respect to the odd-numbered scan electrodes and is shifted forward with respect to the even-numbered scan electrodes. Either a rear / front combination which is a shift PWM signal voltage or a front / rear combination which is a front PWM signal voltage for odd scan electrodes and a rear PWM signal voltage for even scan electrodes. It is characterized by being applied so that
[0012]
According to a fourth aspect of the present invention, in the display driving method according to the first to third aspects, the PWM signal voltage and the scanning voltage applied to the scanning electrodes are AC-synchronized in a predetermined relationship with a frame period. It is characterized by the following.
[0013]
6. The display device according to claim 5, wherein a plurality of signal electrodes and a plurality of scanning electrodes are provided so as to be orthogonal to each other with a capacitively coupled display element interposed therebetween, and the plurality of scanning electrodes. And a scanning-side driving unit that sequentially scans and supplies a scanning voltage, and one of a leading PWM signal voltage and a trailing PWM signal voltage applied to each of the signal electrodes in synchronization with scanning by the scanning-side driving unit. A signal-side drive unit for supplying a PWM signal voltage,
The signal side driving unit applies a leading PWM signal voltage to almost half of all signal electrodes during each scanning period in which the scanning electrodes are sequentially scanned, and applies a trailing PWM signal to the remaining signal electrodes. It is characterized by applying a voltage.
[0014]
7. The display device according to claim 6, wherein in the display device according to claim 5, the signal-side drive section includes a signal electrode to which the leading PWM signal voltage is applied and a signal electrode to which the trailing PWM signal voltage is applied. Are set so as to be alternated.
[0015]
According to a seventh aspect of the present invention, in the display device according to the fifth or sixth aspect, the signal-side driving section shifts the PWM signal voltage to an odd-numbered scan electrode by a PWM signal voltage shifted backward to an even-numbered scan electrode. A combination of a rear / front alignment of a PWM signal voltage which is a forward alignment signal with respect to an electrode and a front / rear alignment of a PWM signal voltage which is a forward alignment PWM signal voltage for an odd-numbered scanning electrode and a rearward adjustment PWM signal voltage for an even-numbered scanning electrode. It is characterized in that it is applied so as to be any one of combinations.
[0016]
The display device according to claim 8, wherein the signal-side driving unit and the scanning-side driving unit are configured to control the PWM signal voltage and the scanning voltage applied to the scanning electrode to each other in a frame cycle. And the AC is synchronized in a predetermined relationship.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a display driving method and a display device according to the present invention will be described with reference to the drawings.
[0018]
FIG. 1 is a diagram showing a schematic configuration of a display device according to an embodiment of the present invention, which includes a simple matrix display 10, a scanning side driving circuit 20, a signal side driving circuit 30, a power supply circuit 40, and a control circuit 50. ing.
[0019]
In FIG. 1, a display 10 is provided with a plurality of signal electrodes X (X1 to X4) and a plurality of scanning electrodes Y (Y1 to Y4) on two opposing substrates so as to be orthogonal to each other. Each of the signal electrode X and the scanning electrode Y is generally composed of a large number of electrodes, each of which is about several hundreds. However, in order to facilitate understanding, four cases are exemplified here. A liquid crystal display element or an organic EL display element is sandwiched between the signal electrode X and the scanning electrode Y, and each intersection thereof becomes a display pixel. Each of these intersections has a structure coupled by capacitance, and constitutes a simple matrix display.
[0020]
The power supply circuit 40 generates six types of voltages V0 to V5 necessary for performing the AC control on the display device, and supplies them to the scanning side driving circuit 20 and the signal side driving circuit 30, respectively. Each of these voltages is set to a predetermined value so as to sequentially increase (or decrease) from the voltage V0 to the voltage V5. When the AC control is not performed, the number of required voltages may be small.
[0021]
The control circuit 50 forms display data, a clock, and various control signals, and supplies them to the scanning side driving circuit 20 and the signal side driving circuit 30, respectively. The display data D is PWM data for a signal voltage applied to the signal electrodes X1 to X4 to control the display gradation of the display 10.
[0022]
In the present invention, the signal voltage is referred to as a "rearranged PWM signal voltage (hereinafter, referred to as a posterior signal voltage)" which is applied to a rear portion with a predetermined width from a certain position in the interval period of the scan clock LP to the end. It is possible to arbitrarily select whether to use a “forward-adjusted PWM signal voltage (hereinafter referred to as“ advance-adjusted signal voltage ”)” which is applied to the preceding portion by a predetermined width from the first portion of the scanning clock interval period. For this reason, the display data D for each pixel is either PWM data (hereinafter referred to as “post-adjustment data”) D1 for a post-adjustment signal voltage or PWM data (hereinafter referred to as “advance data”) D2 for a pre-adjustment signal voltage. Supplied in either form. This display data D is supplied to the signal side drive circuit 30.
[0023]
The data shift clock CK is a clock for shifting the display data D and is supplied to the signal side drive circuit 30. The scan clock LP is supplied to the scan side drive circuit 20 to be a scan signal for scanning the scan electrode Y, and is also supplied to the signal side drive circuit 30 to be a latch signal for latching one line of display data D. The AC signal FR is an inverted signal for AC driving, and is unnecessary when AC is not performed.
[0024]
The start signal ST is a signal for starting scanning, and is supplied to the scanning side drive circuit 20.
[0025]
The scan side drive circuit 20 receives the start signal ST, the scan clock LP, and the AC conversion signal FR, and sequentially scans at scan clock intervals while generating a predetermined scan voltage on the scan electrodes Y1 to Y4.
[0026]
FIG. 2 shows the internal configuration of the signal side drive circuit 30. The shift register 31 sequentially captures and shifts the display data D (D1 or D2) by the shift clock CK. When the shift register 31 stores the display data D for one line, the data latch circuit operates by the scan clock LP. The display data D is latched.
[0027]
The level shifter 33 converts the level of the display data D latched by the data latch 32 and supplies it to the driver. The driver 34 generates a backward signal voltage or a forward signal voltage with the voltages V0, V2, V3, and V5 from the power supply circuit 40 according to the level-shifted display data D (D1 or D2), respectively. It is supplied to the electrodes X1 to X4.
[0028]
FIG. 3 is a timing chart for explaining the operation of the display device according to the first embodiment of the present invention.
[0029]
In FIG. 3, the scan clock LP is output at every scan interval Ti as shown in (i), and the scan electrode Y sequentially scans the scan electrodes Y1 to Y4 every frame in synchronization with the scan clock LP as shown in (x). Select repeatedly.
[0030]
On the other hand, the trailing signal voltage is supplied to the signal electrode X1, so that the trailing signal voltage rises in the middle of each scanning interval Ti and continues to the end. The leading electrode voltage is supplied to the signal electrode X2. Therefore, the leading signal voltage is supplied from the beginning of each scanning interval Ti and falls in the middle. A rearward signal voltage is supplied to the signal electrode X3, and a frontward signal voltage is supplied to the signal electrode X4. These signal voltages have different widths and rising / falling timings depending on the display data D for each scanning interval and for each of the signal electrodes X1 to X4.
[0031]
As shown in FIGS. 3 (iii) and (vii), positive noise voltages Vnz-x1 and Vnz-x3 are generated at the signal electrodes X1 and X3 to which the backward signal voltage is supplied, when the signal voltage rises. The noise voltages Vnz-x1 and Vnz-x3 change the potential of the scan electrodes Y1 to Y4 (mainly, the selected scan electrode Y).
[0032]
As shown in FIGS. 3 (v) and (ix), negative noise voltages Vnz-x2 and Vnz-x4 are generated on the signal electrodes X2 and X4 to which the leading signal voltage is supplied, when the signal voltage falls. The noise voltages Vnz-x2 and Vnz-x4 also change the potentials of the scan electrodes Y1 to Y4 (mainly, the selected scan electrode Y).
[0033]
Looking at the scanning period Y1, at the time of rising of the backward signal voltage (signal electrodes X1 and X3), positive noise voltages Vnz-x1 and Vnz-x3 are generated as shown in FIGS. 3 (iii) and (vii). When the leading signal voltage (signal electrodes X2 and X4) falls, negative noise voltages Vnz-x2 and Vnz-x4 are generated as shown in FIGS.
[0034]
As described above, although the noise voltages Vnz-x1 to Vnz-x4 are generated at the transition points of the rise or fall of the signal voltage, the polarity of the noise voltage is reversed for each signal electrode. Therefore, during the scanning period in which the scanning electrode Y1 is selected, the respective noise voltages Vnz-x1 to Vnz-x4 cancel each other out. Similarly, in the scanning period in which the scanning electrodes Y2 to Y4 are selected, the influence of the noise voltage is similarly eliminated. As a result, it is possible to substantially eliminate the shading and unevenness of the display which have conventionally occurred due to the noise voltage.
[0035]
At the end of the interval period Ti of the scanning clock LP, the number of rises and the number of fall of the signal voltage become substantially equal, so that the interval period Ti as shown by (1) to (4) in FIG. The noise voltages at the end of are canceled out each other.
[0036]
In addition, adjacent pixels often have the same color tone, and therefore, the pulse widths of the PWM signal voltages are almost equal. Therefore, in the related art, noise voltages are simultaneously generated in the same direction, which greatly affects image quality. By alternately shifting the signal electrodes X1 to X4 forward and backward as in the embodiment of the present invention, noise of adjacent pixels, which often have the same signal width, is positively and negatively and temporally dispersed. Therefore, the effect of suppressing noise can be more expected.
[0037]
Further, in FIG. 3, the signal electrodes X1 and X3 are set to the trailing signal voltage in the first frame and are set to the leading signal voltage in the second frame, while the signal electrodes X3 and X4 are set to the leading signal voltage in the first frame. The voltage can be used as a backward signal voltage in the second frame. By doing so, the effect of the noise voltage Vnz generated at each signal electrode (for example, the signal electrode X1) can be canceled even between frames (for example, between the first frame and the second frame). The elimination of the influence of the noise voltage Vnz on each signal electrode may be performed at an arbitrary number of frames (that is, at every one frame, every two frames, etc.), and within a predetermined period, the backward signal voltage and the forward signal voltage may be eliminated. The number of signal voltages may be substantially equal. This concept can be similarly applied to other embodiments of the present invention.
[0038]
FIG. 4 is a timing chart illustrating an operation of the display device according to the second embodiment of the present invention.
[0039]
In FIG. 4, the PWM signal voltages applied to the signal electrodes X1 and X3 are shifted backward with respect to the scanning period in which the scan electrodes Y1 and Y3, that is, the odd-numbered scan electrodes are selected. A signal voltage of a rearward / frontward combination (hereinafter, referred to as a rearward / frontward signal voltage) which is a forward shift is generated for the scan period in which the number-th scan electrode is selected. Further, the PWM signal voltage to the signal electrodes X2 and X4 is shifted forward with respect to the scanning period in which the scan electrodes Y1 and Y3, that is, the odd-numbered scan electrodes are selected, and the scan electrodes Y2 and Y4, that is, the even-numbered scan electrodes. A signal voltage of a combination of front and rear shifts (hereinafter referred to as a front / rearward signal voltage) which is rearward shift during a scanning period in which an electrode is selected is generated.
[0040]
In this case, as shown with respect to the signal electrodes X1 and X3 in FIGS. 4 (iii) and (vii), the noise voltage Vnz in each frame is a positive-negative-positive-negative noise voltage Vnz-x1 and Vnz- in accordance with scanning. x3 occurs. As shown in FIG. 4 (v) (ix) with respect to the signal electrodes X2 and X4, in each frame, negative-positive-negative-positive noise voltages Vnz-x2 and Vnz-x4 are generated according to scanning.
[0041]
As described above, although the noise voltages Vnz-x1 to Vnz-x4 are generated at the transition points of the rise or fall of the signal voltage, the noise voltages Vnz-x1 to Vnz-x4 correspond to the scan electrodes Y1 to Y4 for each signal electrode. Are reversed in polarity. Therefore, during the scanning period in which the scanning electrodes Y1 to Y4 are selected, the noise voltages Vnz-x1 to Vnz-x4 cancel each other out. The same applies to the second and subsequent frames.
[0042]
In the second embodiment, as in the first embodiment, the influence of the noise voltage Vnz can be eliminated. Further, since the rear / front shift signal voltage and the front / back shift signal voltage are selected according to the signal electrode, the signal voltage of the signal electrode does not change at each end of the interval period Ti of the scan clock LP. Therefore, the number of changing points of the PWM signal voltage is reduced, so that the influence of noise based on the change of the signal voltage on the power supply voltage and the ground voltage can be reduced.
[0043]
FIG. 5 is a timing chart for explaining the operation of the display device according to the third embodiment of the present invention.
[0044]
In FIG. 5, a control using an alternating signal is added to the second embodiment in FIG.
[0045]
In FIG. 5, as shown in (i), the alternating signal FR is switched between positive and negative for each frame to perform the alternating. Therefore, during the period when the AC signal FR is positive, the signal voltage to the signal electrode X is the lighting voltage V0 and the light-off voltage V2, and the scanning electrode Y is applied with the voltage V5 when selected and the voltage V1 when not selected. You. On the other hand, during the negative period of the AC conversion signal FR, the signal voltage to the signal electrode X is the lighting voltage V5 and the light-off voltage V3, and the scanning electrode Y is applied with the voltage V0 when selected and the voltage V4 when not selected.
[0046]
In this example, the cycle of the alternating signal FR is synchronized with the rear / forward signal voltage or the front / back signal voltage. Accordingly, the PWM signal voltage applied to the signal electrodes X1 and X3 (however, the signal electrode X3 is not shown) is applied later to the scanning period in which the scanning electrodes Y1 and Y3, that is, the odd scanning electrodes are selected. The scan electrodes Y2 and Y4, that is, the rear / front shift signal voltages that are shifted forward during the scanning period in which the even-numbered scan electrodes are selected are generated. Further, the PWM signal voltage to the signal electrodes X2 and X4 (however, the signal electrode X4 is not shown in the figure) is set to be higher than the scanning period in which the scanning electrodes Y1 and Y3, that is, the scanning period in which the odd-numbered scanning electrode is selected. In this case, the scanning electrodes Y2 and Y4, that is, the front / backward signal voltage that is the rearward shifting during the scanning period in which the even-numbered scanning electrode is selected are generated.
[0047]
As shown in FIG. 5 (iv) with respect to the signal electrode X1, the noise voltage Vnz in this case is a positive-negative-positive-negative noise voltage Vnz-x1 in each frame. Further, as shown with respect to the signal electrode X2 in FIG. 5 (vi), a negative-positive-negative-positive noise voltage Vnz-x2 is generated in each frame. Note that, for example, in the first and second frames, the voltage polarities are inverted with the alternating current, so that the noise voltages Vnz-x1 and Vnz-x2 have the same direction on the screen display.
[0048]
Therefore, the polarity of the noise voltages Vnz-x1 to Vnz-x4 is reversed for each scanning electrode Y1 to Y4 for each signal electrode. FIGS. 5 (iv) and 5 (vi) show the influence of noise on the scanning electrode Y. Since the scanning voltage is different depending on the above-mentioned selection / non-selection with the AC control, the understanding is easy. It is shown as an image diagram to make
[0049]
Thereby, as shown by the broken line in FIG. 5, in the scanning period in which the scanning electrode Y1 is selected, the noise voltages Vnz-X1 to Vnz-X4 of the first electrodes X1 to X4 cancel out the influence thereof.
[0050]
The cycle of the AC signal FR and the rear / forward signal voltage or the front / rear signal voltage are not limited to the example of FIG. 5, and an appropriate cycle can be selected.
[0051]
In the third embodiment, the same effects as those of the second embodiment can be obtained. Further, even in the display of the AC drive, the influence of the noise voltage is reduced regardless of the change in the polarity of the drive voltage. can do.
[0052]
【The invention's effect】
According to the present invention, in each scanning period in which the scanning electrodes are sequentially scanned, the number of signal electrodes to which the leading PWM signal voltage is applied and the number of signal electrodes to which the trailing PWM signal voltage is applied are set to be substantially equal. Therefore, the influence on the screen display due to the noise voltage generated at the rise (or fall) of the signal voltage in the PWM control is mutually canceled. As a result, it is possible to substantially eliminate the shading and unevenness of the display which have conventionally occurred due to the noise voltage.
[0053]
In addition, the setting of the front shift and the rear shift is performed so that the signal electrode to which the front shift signal voltage is applied and the signal electrode to which the rear shift signal voltage is applied are alternately arranged. In many cases, noise of adjacent pixels is positively and negatively and temporally dispersed. Therefore, the effect of suppressing noise can be more expected.
[0054]
Further, by setting the rearward / forward shifting signal voltage and the forward / backward shifting signal voltage, the change point of the PWM signal voltage is reduced, so that the influence on the power supply voltage and the ground voltage can be reduced. Further, even in the display of the alternating drive, the influence of the noise voltage can be similarly reduced regardless of the change in the polarity of the drive voltage.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a display device according to the present invention.
FIG. 2 is a configuration diagram of a signal side driving circuit of FIG. 1;
FIG. 3 is a timing chart of the display device according to the first embodiment.
FIG. 4 is a timing chart of a display device according to a second embodiment.
FIG. 5 is a timing chart of the display device according to the third embodiment.
FIG. 6 is a diagram showing a basic structure of a conventional simple matrix display.
FIG. 7 is a timing chart of FIG.
[Explanation of symbols]
Reference Signs List 10 simple matrix display 20 scanning side drive circuit 30 signal side drive circuit 31 shift register 32 data latch circuit 33 level shifter 34 driver 40 power supply circuit 50 control circuit LP scan clock (latch pulse)
D (D1, D2) Display data X (X1 to X4) Signal electrode Y (Y1 to Y4) Scan electrode Vnz Noise voltage FR Alternating signal

Claims (8)

In a display driving method of a PWM controlled simple matrix display,
In each scanning period in which the scanning electrodes are sequentially scanned, the number of signal electrodes to which the leading PWM signal voltage is applied and the number of signal electrodes to which the trailing PWM signal voltage is applied are set to substantially equal numbers. Display driving method. 2. The display driving method according to claim 1, wherein the signal electrode to which the leading PWM signal voltage is applied and the signal electrode to which the trailing PWM signal voltage is applied are alternately set. The PWM signal voltage is a PWM signal voltage shifted rearward with respect to the odd-numbered scan electrodes and a post / forward shift combination which is a PWM signal voltage shifted forward with respect to the even-numbered scan electrodes, and is shifted forward with respect to the odd-numbered scan electrodes. 3. The display drive according to claim 1, wherein the PWM signal voltage is applied to the even-numbered scan electrodes so as to be one of a forward / backward combination which is a backward-shifted PWM signal voltage. Method. 4. The display driving method according to claim 1, wherein the PWM signal voltage and the scanning voltage applied to the scanning electrode are AC-synchronized with each other in synchronization with a frame period in a predetermined relationship. A simple matrix display in which a plurality of signal electrodes and a plurality of scanning electrodes are provided so as to be orthogonal to each other with a capacitive coupling display element interposed therebetween,
A scanning-side driving unit that sequentially scans the plurality of scanning electrodes and supplies a scanning voltage;
A signal-side driving unit that supplies a PWM signal voltage, which is one of a leading PWM signal voltage and a trailing PWM signal voltage, to each of the signal electrodes in synchronization with scanning of the scanning-side driving unit;
The signal side driving unit applies a leading PWM signal voltage to almost half of all signal electrodes during each scanning period in which the scanning electrodes are sequentially scanned, and applies a trailing PWM signal to the remaining signal electrodes. A display device to which a voltage is applied. The signal-side drive unit may set the signal electrode to which the leading PWM signal voltage is applied and the signal electrode to which the trailing PWM signal voltage is applied alternately. 5. The display device according to 5. The signal-side drive unit converts the PWM signal voltage into a rearward / forwardward combination that is a backward PWM signal voltage for odd-numbered scan electrodes and a forward PWM signal voltage for even-numbered scan electrodes, and an odd-numbered 6. The method according to claim 5, wherein the voltage is applied so as to be one of a forward / backward combination which is a PWM signal voltage shifted forward to the scan electrode and a PWM signal voltage shifted backward to the even-numbered scan electrode. 7. The display device according to claim 6, wherein 6. The signal-side driving unit and the scanning-side driving unit, wherein the PWM signal voltage and the scanning voltage applied to the scanning electrode are AC-synchronized in a predetermined relationship with a frame period. The display device according to any one of claims 1 to 7.

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