JP2004128521A - Semiconductor light emitting device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device which has superior luminous properties, is very reliable, and has a long service life. <P>SOLUTION: A method of manufacturing the semiconductor light emitting device includes a step of enabling a nitride III-V compound semiconductor layer forming a light emitting device structure to grow on a nitride III-V compound semiconductor substrate where a plurality of second regions having a second average dislocation density higher than a first average dislocation density possessed by a first crystal region and extending rectilinearly are regularly arranged in parallel with each other in the first crystal region. In the above manufacturing method, the second regions are arranged at an interval of 50 μm or above, one or more rows of the second regions are included, and a device region is demarcated on the nitride III-V compound semiconductor substrate so as not to enable the second regions to be included in the light emitting region of the semiconductor light emitting device. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a semiconductor light emitting device and a method for manufacturing the same, and is suitably applied, for example, to the manufacture of a semiconductor laser or a light emitting diode using a nitride III-V compound semiconductor.

Conventionally, in manufacturing a semiconductor element, a method of processing a semiconductor layer after growing a desired semiconductor layer on an appropriate substrate has been widely used. Generally, the characteristics of the semiconductor layer are very sensitively changed according to information on the substrate such as the lattice constant. Therefore, it is most preferable to employ a substrate of the same quality as the semiconductor layer to be grown and epitaxially grow the semiconductor layer. Is the way.

Therefore, the substrate of the semiconductor element is required to be formed of the same material as the semiconductor used for the element and to have a low defect density such as dislocation. This is because defects of the substrate often propagate as it is to the semiconductor layer thereon, which often leads to deterioration of device characteristics.

By the way, nitride-based III-V compound semiconductors represented by GaN have a large band gap, and are used as light-emitting elements in a wavelength range that is difficult to obtain with other semiconductors, such as ultraviolet to violet, and blue and green. Has been developed, and light emitting diodes (LEDs) and semiconductor lasers (LDs) have already been put to practical use.

However, nitride-based III-V compound semiconductors have difficulty in bulk growth, and it has been difficult to obtain a substrate with few defects that can be used as a substrate for a semiconductor device. Therefore, in most cases, the crystal growth of a nitride III-V compound semiconductor such as sapphire or SiC must be performed on a substrate that is not the same as the nitride III-V compound semiconductor. Such a method is required. However, even in a nitride-based III-V compound semiconductor obtained by growing by employing such a method, the defect density becomes extremely high, and the effect on the device characteristics cannot be ignored. Become.

Therefore, as a substrate for manufacturing a nitride-based III-V compound semiconductor device having good characteristics, a substrate of the same quality, that is, a substrate made of a nitride-based III-V compound semiconductor and having a low defect density is desired. ing.

Heretofore, as a method of manufacturing a nitride-based III-V compound semiconductor substrate having a low defect density, a growth surface of vapor phase growth has a three-dimensional facet structure instead of a planar state, and has a facet structure. A method of manufacturing a single-crystal GaN substrate has been proposed in which a dislocation is reduced by growing a facet structure without embedding it (Patent Document 1).
JP 2001-102307 A

However, the technique disclosed in Patent Document 1 reduces threading dislocations in other regions, particularly by concentrating threading dislocations in a certain region of the growth layer. A region having a low defect density and a region having a high defect density are mixed, and the position where the region having a high defect density occurs cannot be controlled, and occurs at random. Therefore, when a nitride-based III-V compound semiconductor layer is grown on this single-crystal GaN substrate to manufacture a semiconductor device, for example, a semiconductor laser, a region having a high defect density is not formed in the light-emitting region. This cannot be avoided, and has led to a decrease in the emission characteristics and reliability of the semiconductor laser.

Therefore, the problem to be solved by the present invention is to provide a semiconductor light emitting device having good characteristics such as light emitting characteristics, high reliability and long life, and a method of manufacturing such a semiconductor light emitting device that can easily manufacture such a semiconductor light emitting device. It is to provide a method.

The present inventors have conducted intensive studies to solve the above-mentioned problems. The outline is as follows.

The inventor has succeeded in controlling the position of the high defect density region generated in the low defect density region as a result of repeatedly improving the technology disclosed in Patent Document 1. According to this, it is possible to obtain a substrate in which the high defect density regions are arranged regularly, for example, periodically, in the low defect density regions, and the arrangement pattern of the high defect density regions can be freely changed.

When manufacturing a semiconductor light emitting device such as a semiconductor laser using such a substrate, and more generally a semiconductor device, the adverse effect of the high defect density region existing on the substrate on the device is eliminated or reduced. Need to be done. As a result of various studies on the techniques for this purpose, the following techniques were found to be effective.

That is, in the above-described substrate, the high defect density regions can be regularly arranged. Therefore, according to this arrangement, the size of the element, the arrangement of the element, or the active region of the element (for example, in the case of a light emitting element, The position of the light-emitting region can be designed. With this design, it is possible to prevent a high defect density region from being included in a region (hereinafter, referred to as an "element region") or an active region of an element which is finally formed by scribing the substrate. In this way, even if a defect propagates from the high defect density region of the underlying substrate to the semiconductor layer grown on the substrate, the adverse effect caused by the defect can be prevented from affecting the element region or the active region. It is possible to prevent the deterioration of the characteristics of the element and the decrease in the reliability due to the defect.

The above method is also effective for manufacturing a semiconductor device using a semiconductor other than a nitride III-V compound semiconductor when it is difficult to obtain a substrate of the same quality as the semiconductor used for the device and a low defect density. is there. More generally, when it is difficult to obtain a substrate having the same quality as the material used for the device and a low defect density, it is effective for manufacturing such a device.

This invention was devised as a result of further studies based on the above studies by the present inventors.

That is, in order to solve the above problems, the first invention of the present invention is:
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate so that the second region is not substantially contained.

Here, “the second region is not substantially included” means that not only the case where the outline of the element region completely covers the second region, but also that the outline of the second region is not included. This means that the second region remains on the end face or corner of the chip obtained after the substrate has been scribed (the same applies hereinafter).

Specifically, the size and arrangement of the element region are determined so that the second region is not substantially included. The plurality of second regions are typically provided periodically, and specifically, are provided, for example, in a hexagonal lattice, a rectangular lattice, or a square lattice. These two or more types of array patterns may be mixed. Furthermore, a portion where the second region is provided in a periodic array and a portion where the second region is provided in a regular but non-periodic array may be mixed.

The element region is typically rectangular or square, and from the viewpoint of performing good cleavage, preferably, a pair of opposing sides thereof are parallel to the <1-100> direction, and the other A pair of opposing sides are parallel to the <11-20> direction.

(4) The interval between two adjacent second regions or the arrangement period of the second regions is selected according to the size of the element or the like, but is generally 20 μm or more, 50 μm or more, or 100 μm or more. The interval between the second regions or the upper limit of the arrangement period of the second regions is not necessarily clear, but is generally about 1000 μm. This second region typically penetrates the nitride III-V compound semiconductor substrate. The second region typically has an irregular polygonal column shape. A third region having a third average dislocation density higher than the first average dislocation density and lower than the second average dislocation density exists as a transition region between the first region and the second region. In this case, the element region is most preferably defined so that the second region and the third region are not substantially included.

直径 The diameter of the second region is typically from 10 μm to 100 μm, more typically from 20 μm to 50 μm. Also, if a third region is present, its diameter is typically greater than or equal to 20 μm and less than or equal to 200 μm, more typically greater than or equal to 40 μm and less than or equal to 160 μm, and most typically greater than or equal to 60 μm, than the diameter of the second region. Larger than 140 μm.

The average dislocation density in the second region is generally at least five times the dislocation density in the first region. Typically, the average dislocation density in the first region is 2 × 10 ⁶ cm ⁻² or less, and the average dislocation density in the second region is 1 × 10 ⁸ cm ⁻² or more. If the third region is present, the average dislocation density that is typically less than 1 × 10 ⁸ cm ^-2, greater than 2 × 10 ⁶ cm ^-2.

(4) The light emitting region of the semiconductor light emitting element is separated from the second region by 1 μm or more, preferably 10 μm or more, more preferably 100 μm or more in order to prevent the second region having a high average dislocation density from being adversely affected. When the third region exists, most preferably, the light emitting region of the semiconductor light emitting element does not include the second region and the third region. More specifically, the semiconductor light emitting element is a semiconductor laser or a light emitting diode. In the case of the former semiconductor laser, the region through which the drive current flows through the stripe-shaped electrode is preferably at least 1 μm from the second region, It is more preferably at least 10 μm, even more preferably at least 100 μm. When the third region exists, most preferably, the region through which the drive current flows through the stripe-shaped electrode does not include the second region and the third region. One or more stripe-shaped electrodes, that is, laser stripes, may be provided, and the width thereof may be selected as needed.

The contour line of the element region uses the substrate area efficiently according to the arrangement pattern of the second regions, their intervals, or the arrangement period within a range where the second region is not substantially included in the element region. But is typically selected to include a straight line connecting at least two second regions adjacent to each other. In the scribing step for forming a chip, the nitride-based III-V compound semiconductor layer is preferably grown along a contour including a straight line connecting at least two second regions adjacent to each other. Scribing of a nitride III-V compound semiconductor substrate is performed. This scribing is typically performed by cleavage, but may be performed by another method, for example, using a diamond saw or a laser beam. In particular, when scribing is performed by cleavage, if the contour of the element region includes a straight line connecting at least two second regions adjacent to each other, the second region having a higher average dislocation density than the first region has a higher mechanical strength. Is lower than the first region, which has the advantage that cleavage can be performed easily and well. This is particularly advantageous for obtaining a good cavity facet in a semiconductor laser. The outline of the element region may be selected so as not to pass through any second region. In this case, the contour of the element region is preferably separated from the second region by 1 μm or more in order to minimize the adverse effect of the second region. Then, in the scribing step, the nitride-based III-V compound semiconductor substrate on which the nitride-based III-V compound semiconductor layer has been grown along the contour line separated from the second region by 1 μm or more inward. Perform scribing.

Nitride III-V compound semiconductor substrate or the nitride III-V compound semiconductor layer, most commonly _{Al X B y Ga 1-xyz} In z As u N 1-uv P v ( where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ u ≦ 1, 0 ≦ v ≦ 1, 0 ≦ x + y + z <1, 0 ≦ u + v <1), and more specifically, Al _{X B y Ga 1-xyz in} z N ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ x + y + z <1) consists, typically Al _X Ga _1-xz In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). The nitride-based III-V compound semiconductor substrate is most typically made of GaN.
What has been described in relation to the first invention of the present invention also holds for the following inventions, as long as it does not contradict its properties.

According to a second aspect of the present invention,
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a nitride-based III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate;
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor light emitting device characterized by being manufactured by:

According to a third aspect of the present invention,
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer for forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

According to a fourth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate so that the second region is not substantially contained.

According to a fifth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a nitride-based III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate;
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor light emitting device characterized by being manufactured by:

According to a sixth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer for forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

In the fourth, fifth and sixth aspects of the present invention, the “average defect density” means the average density of all lattice defects which have a bad influence on the characteristics and reliability of the element. Everything including defects and point defects is included (the same applies hereinafter).

According to a seventh aspect of the present invention,
A light emitting device structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer.
The device region is defined so that the second region is not substantially included.

According to an eighth aspect of the present invention,
A light emitting device structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. Growing a nitride-based III-V compound semiconductor layer,
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor light emitting device characterized by being manufactured by:

According to a ninth aspect of the present invention,
A light emitting device structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

In the seventh, eighth, and ninth aspects of the present invention, typically, the first region made of a crystal is a single crystal, and the second region having lower crystallinity than the first region is a single crystal. , Polycrystalline or amorphous, or a mixture of two or more of these (the same applies hereinafter). This corresponds to a case where the average dislocation density or the average defect density in the second region is higher than the average dislocation density or the average defect density in the first region.

According to a tenth aspect of the present invention,
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate so that the second region is not substantially contained.

According to an eleventh aspect of the present invention,
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate;
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor device characterized by being manufactured by:

According to a twelfth aspect of the present invention,
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

According to a thirteenth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate so that the second region is not substantially contained.

According to a fourteenth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate;
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor device characterized by being manufactured by:

According to a fifteenth aspect of the present invention,
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

According to a sixteenth aspect of the present invention,
An element structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal. A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer,
The device region is defined so that the second region is not substantially included.

According to a seventeenth aspect of the present invention,
An element structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal. Growing a nitride-based III-V compound semiconductor layer,
Scribing a nitride-based III-V compound semiconductor substrate on which a nitride-based III-V compound semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other; A semiconductor device characterized by being manufactured by:

An eighteenth aspect of the present invention provides:
An element structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal. A semiconductor device in which a nitride III-V compound semiconductor layer is grown,
At least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate.

In the tenth to eighteenth aspects of the present invention, the semiconductor element may be a light emitting element such as a light emitting diode or a semiconductor laser, a light receiving element, a field effect transistor (FET) such as a high electron mobility transistor, or a heterojunction. An electron transit element such as a junction bipolar transistor (HBT) is included (the same applies hereinafter).

In the tenth to eighteenth aspects of the present invention, the active region of the semiconductor element is preferably at least 1 μm, more preferably at least 1 μm from the second region, in order to prevent adverse effects due to the second region having a high average dislocation density. Is at least 10 μm, more preferably at least 100 μm. If a third region is present, most preferably, the active region of the semiconductor device does not include the second region and the third region. Here, the active region means a light emitting region in a semiconductor light emitting device, a light receiving region in a semiconductor light receiving device, and a region in which electrons travel in an electron transit device (the same applies hereinafter).

A nineteenth aspect of the present invention provides
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure,
An element region is defined on the semiconductor substrate such that the second region is not substantially included.

A twentieth aspect of the present invention provides
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a semiconductor layer forming a light emitting element structure on
A semiconductor light emitting device manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

According to a twenty-first aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
At least one second region exists on an end face or a corner of the semiconductor substrate.

A twenty-second invention of the present invention provides:
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure,
An element region is defined on the semiconductor substrate such that the second region is not substantially included.

According to a twenty-third aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a semiconductor layer forming a light emitting element structure on
A semiconductor light emitting device manufactured by scribing the semiconductor substrate on which a semiconductor layer has been grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A twenty-fourth aspect of the present invention provides:
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
At least one second region exists on an end face or a corner of the semiconductor substrate.

According to a twenty-fifth aspect of the present invention,
By growing a semiconductor layer forming a light emitting element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method for manufacturing a semiconductor light emitting device, which is configured to manufacture a semiconductor light emitting device,
The device region is defined so that the second region is not substantially included.

According to a twenty-sixth aspect of the present invention,
Growing a semiconductor layer forming a light emitting element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal;
A semiconductor light emitting device manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

According to a twenty-seventh aspect of the present invention,
A semiconductor in which a semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A light emitting element,
At least one second region exists on an end face or a corner of the semiconductor substrate.

According to a twenty-eighth aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure.
An element region is defined on the semiconductor substrate such that the second region is not substantially included.

According to a twenty-ninth aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a semiconductor layer forming an element structure on
A semiconductor element manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

According to a thirtieth aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor element in which a semiconductor layer forming an element structure is grown,
At least one second region exists on an end face or a corner of the semiconductor substrate.

According to a thirty-first aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure.
An element region is defined on the semiconductor substrate such that the second region is not substantially included.

A thirty-second invention of the present invention provides
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a semiconductor layer forming an element structure on
A semiconductor element manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A thirty-third aspect of the present invention provides:
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor element in which a semiconductor layer forming an element structure is grown,
A semiconductor element characterized in that at least one second region exists at an end face or a corner of a semiconductor substrate.

A thirty-fourth aspect of the present invention provides:
A semiconductor is formed by growing a semiconductor layer forming an element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method for manufacturing a semiconductor light emitting device so as to manufacture an element,
The device region is defined so that the second region is not substantially included.

A thirty-fifth invention of the present invention is:
Growing a semiconductor layer forming an element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal;
A semiconductor element manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A thirty-sixth aspect of the present invention provides:
A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal And
At least one second region exists on an end face or a corner of the semiconductor substrate.

In the nineteenth to thirty-sixth aspects of the present invention, the material of the semiconductor substrate or the semiconductor layer is a nitride-based III-V compound semiconductor, or a wurtzit structure, more generally a hexagonal system. Other semiconductors having a crystal structure, for example, ZnO, α-ZnS, α-CdS, α-CdSe, and the like, and various semiconductors having other crystal structures may be used.

A thirty-seventh aspect of the present invention provides:
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure,
The device region is defined on the substrate such that the second region is not substantially included.

A thirty-eighth aspect of the present invention provides:
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing the layers that form the device structure,
An element manufactured by scribing a substrate on which a layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A thirty-ninth aspect of the present invention provides:
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. An element in which a layer forming an element structure is grown,
At least one second region is present at an end face or a corner of the substrate.

A fortieth invention of the present invention is:
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure,
The device region is defined on the substrate such that the second region is not substantially included.

The forty-first invention of the present invention is
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing the layers that form the device structure,
An element manufactured by scribing a substrate on which a layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A forty-second invention of the present invention provides
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. An element in which a layer forming an element structure is grown,
At least one second region is present at an end face or a corner of the substrate.

Forty-third invention of the present invention
A device is manufactured by growing a layer forming an element structure on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method for manufacturing an element,
The device region is defined so that the second region is not substantially included.

A forty-fourth aspect of the present invention provides:
Growing a layer forming an element structure on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal;
An element manufactured by scribing a substrate on which a layer is grown along a contour including a straight line connecting at least two second regions adjacent to each other.

A forty-fifth invention of the present invention is:
An element in which a layer forming an element structure is grown on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. ,
At least one second region is present at an end face or a corner of the substrate.

In the thirty-seventh to forty-fifth aspects of the invention, the element may be a semiconductor element (light emitting element, light receiving element, electron transit element, etc.), a piezoelectric element, a pyroelectric element, or an optical element (secondary element using a nonlinear optical crystal). Harmonic generation elements), dielectric elements (including ferroelectric elements), superconducting elements, and the like. In this case, as the material of the substrate or the layer, various kinds of semiconductors as described above can be used in a semiconductor element, and in a piezoelectric element, a pyroelectric element, an optical element, a dielectric element, a superconducting element, etc., for example, an oxide or the like can be used. Various materials can be used. As for the oxide material, for example, many materials such as those disclosed in Journal of the Society of Japan Vol. 103, No. 11 (1995) pp. 1099-1111 and Materials Science and Engineering B41 (1996) 166-173. There is.

A forty-sixth aspect of the present invention provides:
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride III-V compound semiconductor substrate so that the second region is not included in a light emitting region of the semiconductor light emitting element.

A forty-seventh aspect of the present invention provides:
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer for forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in a light emitting region of the semiconductor light emitting device. Is what you do.

A forty-eighth aspect of the present invention provides:
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride III-V compound semiconductor substrate so that the second region is not included in a light emitting region of the semiconductor light emitting element.

A forty-ninth aspect of the present invention provides:
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer for forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in a light emitting region of the semiconductor light emitting device. Is what you do.

The fiftieth invention of the present invention
A light emitting device structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer.
The device region is defined so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The fifty-first invention of the present invention
A light emitting device structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in a light emitting region of the semiconductor light emitting device. Is what you do.

According to a fifty-second invention of the present invention,
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a structure,
A nitride III-V compound semiconductor substrate such that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device An element region is defined above.

According to a fifty-third invention of the present invention,
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor light emitting device in which a nitride-based III-V compound semiconductor layer forming a structure is grown,
The nitride III-V compound semiconductor substrate does not include substantially seven or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

The fifty-fourth invention of the present invention
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a structure,
A nitride III-V compound semiconductor substrate such that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device An element region is defined above.

A fifty-fifth aspect of the present invention provides:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor light emitting device in which a nitride-based III-V compound semiconductor layer forming a structure is grown,
The nitride III-V compound semiconductor substrate does not include substantially seven or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

A fifty-sixth aspect of the present invention provides:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 A method for manufacturing a semiconductor light emitting device by manufacturing a semiconductor light emitting device by growing
A nitride III-V compound semiconductor substrate such that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device An element region is defined above.

A fifty-seventh aspect of the present invention provides:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 Is a grown semiconductor light emitting device,
The nitride III-V compound semiconductor substrate does not include substantially seven or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

A fifty-eighth aspect of the present invention provides
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a structure,
A nitride-based material is used such that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. An element region is defined on a group III-V compound semiconductor substrate.

A fifty-ninth aspect of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor light emitting device in which a nitride-based III-V compound semiconductor layer forming a structure is grown,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting region.

A sixtieth aspect of the present invention provides:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a structure,
A nitride-based material is used such that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. An element region is defined on a group III-V compound semiconductor substrate.

A sixty-first invention of the present invention
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A light emitting element is provided on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor light emitting device in which a nitride-based III-V compound semiconductor layer forming a structure is grown,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting region.

The 62nd invention of the present invention
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 A method for manufacturing a semiconductor light emitting device by manufacturing a semiconductor light emitting device by growing
A nitride-based material is used such that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. An element region is defined on a group III-V compound semiconductor substrate.

A sixty-third invention of the present invention provides:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 Is a grown semiconductor light emitting device,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting region.

A sixty-fourth aspect of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. Semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged. A method for manufacturing an element,
An element region is defined on the nitride-based III-V compound semiconductor substrate such that substantially seven or more second regions are not included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

A sixty-fifth aspect of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer forming a light-emitting element structure on a nitride-based III-V compound semiconductor substrate that is arranged in a semiconductor light-emitting device,
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light-emitting region of a semiconductor light-emitting element. .

A sixty-sixth aspect of the present invention provides:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged. A method for manufacturing an element,
An element region is defined on the nitride-based III-V compound semiconductor substrate such that substantially seven or more second regions are not included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

A sixty-sixth aspect of the present invention provides:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A nitride-based III-V compound semiconductor layer forming a light-emitting element structure on a nitride-based III-V compound semiconductor substrate that is arranged in a semiconductor light-emitting device,
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light-emitting region of a semiconductor light-emitting element. .

A sixty-eighth aspect of the present invention provides
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate,
An element region is defined on the nitride-based III-V compound semiconductor substrate such that substantially seven or more second regions are not included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

A sixty-ninth aspect of the present invention provides:
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate is grown,
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light-emitting region of a semiconductor light-emitting element. .

The 70th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. Semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged. A method for manufacturing an element,
A nitride-based III-V compound such that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The present invention is characterized in that an element region is defined on a semiconductor substrate.

A seventy-first invention of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer forming a light-emitting element structure on a nitride-based III-V compound semiconductor substrate that is arranged in a semiconductor light-emitting device,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is included in a light emitting region of the semiconductor light emitting device. The feature is that there is not.

The 72nd invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged. A method for manufacturing an element,
A nitride-based III-V compound such that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The present invention is characterized in that an element region is defined on a semiconductor substrate.

A thirty-third aspect of the present invention provides:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A nitride-based III-V compound semiconductor layer forming a light-emitting element structure on a nitride-based III-V compound semiconductor substrate that is arranged in a semiconductor light-emitting device,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is included in a light emitting region of the semiconductor light emitting device. The feature is that there is not.

A seventy-fourth aspect of the present invention provides:
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate,
A nitride-based III-V compound such that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device The present invention is characterized in that an element region is defined on a semiconductor substrate.

The 75th invention of the present invention is a
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is included in a light emitting region of the semiconductor light emitting device. The feature is that there is not.

A seventy-sixth aspect of the present invention provides:
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate such that the second region is not included in an active region of the semiconductor device.

A seventy-seventh aspect of the present invention provides:
A nitride-based material in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in an active region of the semiconductor element. Things.

The 78th invention of the present invention is a
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate such that the second region is not included in an active region of the semiconductor device.

A seventy-ninth aspect of the present invention provides:
A nitride-based system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in an active region of the semiconductor element. Things.

The 80th invention of the present invention is a
An element structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal. A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer,
The device region is defined so that the second region is not included in the active region of the semiconductor device.

The eighty-first invention of the present invention
An element structure is formed on a nitride-based III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of a crystal. A semiconductor device in which a nitride III-V compound semiconductor layer is grown,
At least one second region is present inside, at an end face, or at a corner of the nitride-based III-V compound semiconductor substrate, and the second region is not included in an active region of the semiconductor element. Things.

The 82nd invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method of manufacturing a semiconductor device by growing a nitride-based III-V compound semiconductor layer forming
On the nitride III-V compound semiconductor substrate, substantially no more than seven columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor device. In this case, the element region is defined.

The 83rd invention of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming
That the nitride-based III-V compound semiconductor substrate does not substantially include seven or more columns of the second region in the second direction, and that the second region is not included in the active region of the semiconductor element. It is a feature.

An eighty-fourth aspect of the present invention provides:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method of manufacturing a semiconductor device by growing a nitride-based III-V compound semiconductor layer forming
On the nitride III-V compound semiconductor substrate, substantially no more than seven columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor device. In this case, the element region is defined.

The 85 th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming
That the nitride-based III-V compound semiconductor substrate does not substantially include seven or more columns of the second region in the second direction, and that the second region is not included in the active region of the semiconductor element. It is a feature.

An eighty-sixth aspect of the present invention provides:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. Forming a nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A method for manufacturing a semiconductor device, wherein the semiconductor device is manufactured by growing the semiconductor device.
On the nitride III-V compound semiconductor substrate, substantially no more than seven columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor device. In this case, the element region is defined.

The 87th invention of the present invention is a
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride III-V compound semiconductor layer forming an element structure is formed on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. A grown semiconductor device,
That the nitride-based III-V compound semiconductor substrate does not substantially include seven or more columns of the second region in the second direction, and that the second region is not included in the active region of the semiconductor element. It is a feature.

An eighty-eighth aspect of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method of manufacturing a semiconductor device by growing a nitride-based III-V compound semiconductor layer forming
The nitride-based III is used so that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the active region of the semiconductor device. -An element region is defined on a group V compound semiconductor substrate.

An eighty-ninth aspect of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming
The first interval is at least 50 μm, the nitride-based III-V compound semiconductor substrate includes at least one row of second regions in the second direction, and the second region has an activity of the semiconductor element. It is not included in the area.

The 90th invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method of manufacturing a semiconductor device by growing a nitride-based III-V compound semiconductor layer forming
The nitride-based III is used so that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the active region of the semiconductor device. -An element region is defined on a group V compound semiconductor substrate.

The ninety-first invention of the present invention
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. An element structure is formed on a nitride-based III-V compound semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A nitride-based III-V compound semiconductor layer forming
The first interval is at least 50 μm, the nitride-based III-V compound semiconductor substrate includes at least one row of second regions in the second direction, and the second region has an activity of the semiconductor element. It is not included in the area.

The 92nd invention of the present invention
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. Forming a nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A method for manufacturing a semiconductor device, wherein the semiconductor device is manufactured by growing the semiconductor device.
The nitride-based III is used so that the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the active region of the semiconductor device. -An element region is defined on a group V compound semiconductor substrate.

The 93rd invention of the present invention is:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A nitride III-V compound semiconductor layer forming an element structure is formed on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. A grown semiconductor device,
The first interval is at least 50 μm, the nitride-based III-V compound semiconductor substrate includes at least one row of second regions in the second direction, and the second region has an activity of the semiconductor element. It is not included in the area.

A ninety-fourth aspect of the present invention provides:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. Of a semiconductor device in which a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged The method,
An element region is defined on a nitride-based III-V compound semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is characterized by the following.

The 95th invention of the present invention is
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer forming a device structure on a regularly arranged nitride-based III-V compound semiconductor substrate;
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in an active region of a semiconductor element.

A ninety-sixth aspect of the present invention provides:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Of a semiconductor device in which a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged The method,
An element region is defined on a nitride-based III-V compound semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is characterized by the following.

The 97th invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A nitride-based III-V compound semiconductor layer forming a device structure on a regularly arranged nitride-based III-V compound semiconductor substrate;
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in an active region of a semiconductor element.

The 98th invention of the present invention is a
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a semiconductor substrate,
An element region is defined on a nitride-based III-V compound semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is characterized by the following.

A ninety-ninth aspect of the present invention provides:
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate is grown,
The nitride-based III-V compound semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in an active region of a semiconductor element.

The 100th invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. Of a semiconductor device in which a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged The method,
A nitride-based III-V compound semiconductor such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element; The present invention is characterized in that an element region is defined on a substrate.

The 101st invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer forming a device structure on a regularly arranged nitride-based III-V compound semiconductor substrate;
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by the following.

The 102nd invention of the present invention
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Of a semiconductor device in which a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a nitride-based III-V compound semiconductor substrate which is regularly arranged The method,
A nitride-based III-V compound semiconductor such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element; The present invention is characterized in that an element region is defined on a substrate.

The 103rd invention of the present invention is:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A nitride-based III-V compound semiconductor layer forming a device structure on a regularly arranged nitride-based III-V compound semiconductor substrate;
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by the following.

The 104th invention of the present invention is:
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride-based III-V compound semiconductor layer forming an element structure on a semiconductor substrate,
A nitride-based III-V compound semiconductor such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element; The present invention is characterized in that an element region is defined on a substrate.

The 105th invention of the present invention is:
A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by the following.

The 106th invention of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure,
The device region is defined on the semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 107th invention of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
At least one second region is present inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in a light emitting region of a semiconductor light emitting element.

The 108th invention of the present invention
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure,
The device region is defined on the semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 109th invention of the present invention is a
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
At least one second region is present inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in a light emitting region of a semiconductor light emitting element.

The 110th invention of the present invention is:
By growing a semiconductor layer forming a light emitting element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method for manufacturing a semiconductor light emitting device, which is configured to manufacture a semiconductor light emitting device,
The device region is defined so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The eleventh invention of the present invention is:
A semiconductor in which a semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A light emitting element,
At least one second region is present inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in a light emitting region of a semiconductor light emitting element.

The 112nd invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, which is to manufacture a semiconductor light emitting device by causing
The device region is defined on the semiconductor substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

The 113 th invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor light emitting device,
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 114th invention of the present invention
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, which is to manufacture a semiconductor light emitting device by causing
The device region is defined on the semiconductor substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

The 115th invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor light emitting device,
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 116 th invention of the present invention is a
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor light emitting device for manufacturing a semiconductor light emitting device by growing a semiconductor layer forming a light emitting device structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2; A method for manufacturing an element,
The device region is defined on the semiconductor substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by the following.

The eleventh invention of the present invention is:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor layer forming a light-emitting element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in a direction of 2;
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 118th invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, which is to manufacture a semiconductor light emitting device by causing
On the semiconductor substrate, the first interval is 50 μm or more, at least one row of the second region in the second direction is included, and the second region is not included in the light emitting region of the semiconductor light emitting element. In this case, the element region is defined.

A 119th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor light emitting device,
The first interval is 50 μm or more, the semiconductor substrate includes at least one row of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

The 120th invention of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, which is to manufacture a semiconductor light emitting device by causing
The first interval is equal to or greater than 50 μm, and the semiconductor substrate is arranged such that at least one row of the second region in the second direction is included and the second region is not included in the light emitting region of the semiconductor light emitting element. In this case, the element region is defined.

The 121st invention of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor light emitting device,
The first interval is 50 μm or more, the semiconductor substrate includes at least one row of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

The 122nd invention of the present invention provides:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor light-emitting device manufactured by growing a semiconductor layer forming a light-emitting device structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2; A method for manufacturing an element,
The first interval is equal to or greater than 50 μm, and the semiconductor substrate is arranged such that at least one row of the second region in the second direction is included and the second region is not included in the light emitting region of the semiconductor light emitting element. In this case, the element region is defined.

The 123rd invention of the present invention is:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor layer forming a light-emitting element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in a direction of 2;
The first interval is 50 μm or more, the semiconductor substrate includes at least one row of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

The 124th invention of the present invention is
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method for manufacturing a semiconductor light-emitting device, wherein a semiconductor light-emitting device is manufactured by growing a semiconductor layer forming a light-emitting device structure on a semiconductor substrate that is regularly arranged,
An element region is defined on the semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in a light emitting region of the semiconductor light emitting device. Things.

The 125th invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A semiconductor light-emitting element in which a semiconductor layer forming a light-emitting element structure is grown on a semiconductor substrate that is arranged in a symmetric manner,
The semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light emitting region of the semiconductor light emitting element.

The 126th invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light-emitting device, wherein a semiconductor light-emitting device is manufactured by growing a semiconductor layer forming a light-emitting device structure on a semiconductor substrate that is regularly arranged,
An element region is defined on the semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in a light emitting region of the semiconductor light emitting device. Things.

A 127th aspect of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light-emitting element in which a semiconductor layer forming a light-emitting element structure is grown on a semiconductor substrate that is arranged in a symmetric manner,
The semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light emitting region of the semiconductor light emitting element.

The 128th invention of the present invention is
A light emitting element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having poorer crystallinity than the first regions are regularly arranged in a first region made of crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer to be formed,
An element region is defined on the semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in a light emitting region of the semiconductor light emitting device. Things.

A 129th invention of the present invention is a
A light emitting element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having poorer crystallinity than the first regions are regularly arranged in a first region made of crystal. A semiconductor light emitting device in which a semiconductor layer to be formed is grown,
The semiconductor substrate does not substantially include seven or more second regions, and the second region is not included in a light emitting region of the semiconductor light emitting element.

The thirtieth invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method for manufacturing a semiconductor light-emitting device, wherein a semiconductor light-emitting device is manufactured by growing a semiconductor layer forming a light-emitting device structure on a semiconductor substrate that is regularly arranged,
An interval between the second regions is 50 μm or more, an element region is defined on the semiconductor substrate such that at least one second region is included, and the second region is not included in a light emitting region of the semiconductor light emitting element. It is characterized by doing so.

The 131st invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A semiconductor light-emitting element in which a semiconductor layer forming a light-emitting element structure is grown on a semiconductor substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the light emitting region of the semiconductor light emitting element. is there.

The 132nd invention of the present invention
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light-emitting device, wherein a semiconductor light-emitting device is manufactured by growing a semiconductor layer forming a light-emitting device structure on a semiconductor substrate that is regularly arranged,
An interval between the second regions is 50 μm or more, an element region is defined on the semiconductor substrate such that at least one second region is included, and the second region is not included in a light emitting region of the semiconductor light emitting element. It is characterized by doing so.

The 133rd invention of the present invention
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light-emitting element in which a semiconductor layer forming a light-emitting element structure is grown on a semiconductor substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the light emitting region of the semiconductor light emitting element. is there.

The 134th invention of the present invention is:
A light emitting element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having poorer crystallinity than the first regions are regularly arranged in a first region made of crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer to be formed,
An interval between the second regions is 50 μm or more, an element region is defined on the semiconductor substrate such that at least one second region is included, and the second region is not included in a light emitting region of the semiconductor light emitting element. It is characterized by doing so.

A thirty-first aspect of the present invention provides:
A light emitting element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having poorer crystallinity than the first regions are regularly arranged in a first region made of crystal. A semiconductor light emitting device in which a semiconductor layer to be formed is grown,
The distance between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the light emitting region of the semiconductor light emitting element. is there.

A thirty-sixth aspect of the present invention provides:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure.
An element region is defined on a semiconductor substrate so that the second region is not included in an active region of the semiconductor element.

A thirty-first aspect of the present invention provides:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor element in which a semiconductor layer forming an element structure is grown,
At least one second region exists inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in an active region of a semiconductor element.

The 138th invention of the present invention is a
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure.
An element region is defined on a semiconductor substrate so that the second region is not included in an active region of the semiconductor element.

The 139th invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor element in which a semiconductor layer forming an element structure is grown,
At least one second region exists inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in an active region of a semiconductor element.

The 140th invention of the present invention is:
A semiconductor is formed by growing a semiconductor layer forming an element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method of manufacturing a semiconductor device so as to manufacture a device,
The device region is defined so that the second region is not included in the active region of the semiconductor device.

The 141st invention of the present invention
A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal And
At least one second region exists inside, at an end face, or at a corner of a semiconductor substrate, and the second region is not included in an active region of a semiconductor element.

The 142nd invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor device by manufacturing a semiconductor device thereby,
The device region is defined on the semiconductor substrate such that substantially no more than seven columns of the second region in the second direction are included and the second region is not included in the active region of the semiconductor device. It is characterized by having done.

The 143rd invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor device,
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element.

A 144th invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor device by manufacturing a semiconductor device thereby,
The device region is defined on the semiconductor substrate such that substantially no more than seven columns of the second region in the second direction are included and the second region is not included in the active region of the semiconductor device. It is characterized by having done.

The 145th invention of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming an element structure is grown on a semiconductor substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor device,
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element.

The 146th invention of the present invention
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. Manufacturing a semiconductor device by growing a semiconductor layer forming an element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. The method,
The device region is defined on the semiconductor substrate such that substantially no more than seven columns of the second region in the second direction are included and the second region is not included in the active region of the semiconductor device. It is characterized by having done.

The 147th invention of the present invention is:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2,
The semiconductor substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element.

The 148th invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor device by manufacturing a semiconductor device thereby,
The first interval is not less than 50 μm, the row of the second region in the second direction is included in one or more rows, and the second region is formed on the semiconductor substrate so as not to be included in the active region of the semiconductor element. An element region is defined.

The 149th invention of the present invention is
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor device,
The first interval is at least 50 μm, the semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is assumed that.

The 150th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor device by manufacturing a semiconductor device thereby,
The first interval is not less than 50 μm, the row of the second region in the second direction is included in one or more rows, and the second region is not included in the active region of the semiconductor element. An element region is defined.

A fifty-first invention of the present invention provides:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A semiconductor layer forming an element structure is grown on a semiconductor substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. Semiconductor device,
The first interval is at least 50 μm, the semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is assumed that.

The 152nd invention of the present invention
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. Manufacturing a semiconductor device by growing a semiconductor layer forming an element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. The method,
The first interval is not less than 50 μm, the row of the second region in the second direction is included in one or more rows, and the second region is formed on the semiconductor substrate so as not to be included in the active region of the semiconductor element. An element region is defined.

A 153rd invention of the present invention is a
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2,
The first interval is at least 50 μm, the semiconductor substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is assumed that.

The 154th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a symmetric manner.
An element region is defined on a semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is.

The 155th invention of the present invention is
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate that is arranged in a matrix,
The semiconductor substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the semiconductor element.

The 156th invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a symmetric manner.
An element region is defined on a semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is.

The 157th invention of the present invention is:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate that is arranged in a matrix,
The semiconductor substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the semiconductor element.

The 158th invention of the present invention is a
An element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method of manufacturing a semiconductor device by growing a semiconductor layer to produce a semiconductor device,
An element region is defined on a semiconductor substrate such that substantially no more than seven second regions are included and the second region is not included in an active region of the semiconductor device. It is.

The 159th invention of the present invention is a
An element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor element having a semiconductor layer grown thereon,
The semiconductor substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the semiconductor element.

The 160th invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a symmetric manner.
An element region is defined on the semiconductor substrate such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element. It is characterized by doing so.

A 161st invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate that is arranged in a matrix,
The distance between the second regions is at least 50 μm, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

A 162nd invention of the present invention provides:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a symmetric manner.
An element region is defined on the semiconductor substrate such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element. It is characterized by doing so.

A 163rd invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate that is arranged in a matrix,
The distance between the second regions is at least 50 μm, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

A 164th invention of the present invention is a
An element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method of manufacturing a semiconductor device by growing a semiconductor layer to produce a semiconductor device,
An element region is defined on the semiconductor substrate such that an interval between the second regions is 50 μm or more, at least one second region is included, and the second region is not included in an active region of the semiconductor element. It is characterized by doing so.

A 165th invention of the present invention is a
An element structure is formed on a semiconductor substrate in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor element having a semiconductor layer grown thereon,
The distance between the second regions is at least 50 μm, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

A 166th invention of the present invention is a
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure,
An element region is defined on the substrate such that the second region is not included in an active region of the element.

The 167th invention of the present invention is a
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. An element in which a layer forming an element structure is grown,
At least one second region is present inside, at an end face, or at a corner of the substrate, and the second region is not included in an active region of the element.

The 168th invention of the present invention is a
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure,
An element region is defined on the substrate such that the second region is not included in an active region of the element.

The 169th invention of the present invention is a
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. An element in which a layer forming an element structure is grown,
At least one second region is present inside, at an end face, or at a corner of the substrate, and the second region is not included in an active region of the element.

The 170th invention of the present invention is a
A device is manufactured by growing a layer forming an element structure on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. A method for manufacturing an element,
The device region is defined so that the second region is not included in the active region of the device.

A seventeenth invention of the present invention is directed to
An element in which a layer forming an element structure is grown on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in a first region made of crystal. ,
At least one second region is present inside, at an end face, or at a corner of the substrate, and the second region is not included in an active region of the element.

The 172nd invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. By growing a layer forming an element structure on a substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing an element, wherein the element is manufactured.
The device region is defined on the substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the active region of the device. It is characterized by the following.

A 173rd invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A device in which layers forming a device structure are grown on a substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. And
The substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included in the substrate, and the second region is not included in the active region of the element.

The 174th invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. By growing a layer forming an element structure on a substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing an element, wherein the element is manufactured.
The device region is defined on the substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the active region of the device. It is characterized by the following.

A 175th invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A device in which layers forming a device structure are grown on a substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. And
The substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included in the substrate, and the second region is not included in the active region of the element.

The 176th invention of the present invention is a
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A device manufacturing method, comprising manufacturing a device by growing a layer forming an element structure on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. ,
The device region is defined on the substrate such that substantially no more than seven rows of the second region in the second direction are included and the second region is not included in the active region of the device. It is characterized by the following.

The 177th invention of the present invention is
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. 2. An element in which a layer forming an element structure is grown on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2.
The substrate is characterized in that substantially no more than seven rows of second regions in the second direction are included in the substrate, and the second region is not included in the active region of the element.

The 178th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. By growing a layer forming an element structure on a substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing an element, wherein the element is manufactured.
An element region is formed on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. Is characterized.

The 179th invention of the present invention
In a first region made of a crystal having a first average dislocation density, a plurality of second regions having a second average dislocation density higher than the first average dislocation density are arranged at first intervals in a first direction. A device in which layers forming a device structure are grown on a substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. And
The first interval is 50 μm or more, the substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the element. Things.

The 180th invention of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. By growing a layer forming an element structure on a substrate which is regularly arranged and is regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing an element, wherein the element is manufactured.
An element region is formed on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. Is characterized.

The 181st invention of the present invention is a
A plurality of second regions having a second average defect density higher than the first average defect density are arranged at first intervals in a first direction in a first region made of a crystal having a first average defect density. A device in which layers forming a device structure are grown on a substrate which is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. And
The first interval is 50 μm or more, the substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the element. Things.

The 182nd invention of the present invention is a
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. A device manufacturing method, comprising manufacturing a device by growing a layer forming an element structure on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. ,
An element region is formed on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. Is characterized.

The 183rd invention of the present invention is:
A plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region at a first interval in the first direction, and the second regions are orthogonal to the first direction. 2. An element in which a layer forming an element structure is grown on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2.
The first interval is 50 μm or more, the substrate includes one or more rows of second regions in the second direction, and the second region is not included in the active region of the element. Things.

The 184th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure on a substrate that is arranged in a symmetric manner,
An element region is defined on a substrate such that substantially no more than seven second regions are included, and the second region is not included in an active region of the element. .

The 185th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. An element in which a layer forming an element structure is grown on a substrate that is arranged in a symmetric manner,
The substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the device.

The 186 th invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure on a substrate that is arranged in a symmetric manner,
An element region is defined on a substrate such that substantially no more than seven second regions are included, and the second region is not included in an active region of the element. .

The 187th invention of the present invention is a
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. An element in which a layer forming an element structure is grown on a substrate that is arranged in a symmetric manner,
The substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the device.

The 188th invention of the present invention is a
An element structure is formed on a substrate in which a plurality of second regions extending linearly and having lower crystallinity than the first regions are regularly arranged in parallel in the first region made of crystal. A method of manufacturing a device, wherein the device is manufactured by growing a layer,
An element region is defined on a substrate such that substantially no more than seven second regions are included, and the second region is not included in an active region of the element. .

The 189th invention of the present invention
An element structure is formed on a substrate in which a plurality of second regions extending linearly and having lower crystallinity than the first regions are regularly arranged in parallel in the first region made of crystal. A device in which the layers are grown,
The substrate is characterized in that substantially no more than seven second regions are included, and the second region is not included in the active region of the device.

The 190th invention of the present invention is a
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure on a substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, and the device region is defined on the substrate such that at least one second region is included and the second region is not included in the active region of the device. It is characterized by having done.

The 191st invention of the present invention is:
In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are arranged in parallel with each other. An element in which a layer forming an element structure is grown on a substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

The 192nd invention of the present invention is:
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing an element, wherein the element is manufactured by growing a layer forming an element structure on a substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, and the device region is defined on the substrate such that at least one second region is included and the second region is not included in the active region of the device. It is characterized by having done.

The 193rd invention of the present invention
A plurality of linearly extending second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. An element in which a layer forming an element structure is grown on a substrate that is arranged in a symmetric manner,
The distance between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

The 194th invention of the present invention is a
An element structure is formed on a substrate in which a plurality of second regions extending linearly and having lower crystallinity than the first regions are regularly arranged in parallel in the first region made of crystal. A method of manufacturing a device, wherein the device is manufactured by growing a layer,
The distance between the second regions is 50 μm or more, and the device region is defined on the substrate such that at least one second region is included and the second region is not included in the active region of the device. It is characterized by having done.

A 195th invention of the present invention is a
An element structure is formed on a substrate in which a plurality of second regions extending linearly and having lower crystallinity than the first regions are regularly arranged in parallel in the first region made of crystal. A device in which the layers are grown,
The distance between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

In the 46th to 51st, 76th to 81st, 106th to 111th, 136th to 141st, and 166th to 171st inventions of the present invention, the first to ninth aspects of the present invention are described as long as they do not contradict their properties. What has been described in relation to the forty-fifth invention holds.

52nd to 57th, 64th to 69th, 82nd to 87th, 94th to 99th, 112th to 117th, 124th to 129th, 142th to 147th, 154th to 159th of the present invention. 172th to 177th and 184th to 189th inventions, the distance between the second regions in the first direction (first distance) or the distance between the second regions extending in a straight line is different from that of the present invention. This is the same as the interval between the second regions or the arrangement interval between the second regions described in relation to the first invention. 58th to 63rd, 70th to 75th, 88th to 93rd, 100th to 105th, 118th to 123rd, 130th to 135th, 148th to 153th, 160th to 165th of this invention 178th to 183rd inventions, except that the lower limit of the interval between the second regions in the first direction (first interval) or the interval between the second regions extending linearly is 50 μm. This is the same as the interval between the second regions or the arrangement interval between the second regions described in relation to the first invention of the present invention. In the 52nd to 63rd, 82nd to 93rd, 112th to 123rd, 142nd to 153rd, and 172th to 183rd inventions of the present invention, the interval between the second regions in the second direction is basically Typically, it can be freely selected within a range smaller than the first interval, and although it depends on the size of the second region, it is generally 10 μm or more and 1000 μm or less, typically 20 μm or more and 200 μm or less. It is.

52nd to 57th, 64th to 69th, 82nd to 87th, 94th to 99th, 112th to 117th, 124th to 129th, 142th to 147th, 154th to 159th of the present invention. In the 172nd to 177th and 184th to 189th inventions, the upper limit of the number of rows of second regions in the second direction or the number of second regions extending linearly is set to seven. Considering that the number of the second regions in the second direction or the distance between the second regions extending linearly may include about seven in the element region depending on the chip size of the element. It was done. The number of rows of the second regions in the second direction or the number of the second regions extending linearly is typically three or less in a semiconductor light emitting device having a small chip size.

In the forty-sixth to forty-ninth aspects of the present invention, what is described in relation to the forty-first to forty-fifth aspects of the present invention is established as long as other than the above does not contradict its properties.
In the present invention configured as described above, the second region having an average dislocation density higher than the first region, or having a higher average defect density, or having poor crystallinity is substantially not included, or Since the nitride-based III-V compound semiconductor substrate, or the semiconductor substrate, or the device region is defined on the substrate so that the second region is not included in the active region of the device, the light emitting device structure or the device Even if defects such as dislocations propagate from the second region to the nitride III-V compound semiconductor layer forming the structure, or the semiconductor layer, or the layer made of various materials, the chip obtained by scribing the substrate can be used. Can be made to have almost no defects such as dislocations.

The second region has a higher average dislocation density than the first region, or has a higher average defect density, or has poor crystallinity, or the second region is included in the active region of the element. Since the element region is defined on the nitride-based III-V compound semiconductor substrate, or the semiconductor substrate, or the substrate so as not to exist, defects such as dislocations hardly exist in the chip obtained by scribing the substrate. You can do so. For this reason, semiconductor light emitting devices with good characteristics such as light emission characteristics and high reliability and long life, or semiconductor devices with good characteristics and high reliability and long life or various devices with good characteristics and high reliability and long life Can be realized.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts are denoted by the same reference numerals.
In the following embodiments, as shown in FIG. 1A, a substrate in which a region B having a different crystallinity from a crystal is periodically arranged in an island shape in a region A made of a certain crystal is used as a substrate. A case where a semiconductor element is formed thereon will be described. Region B penetrates the substrate. Further, the region B has lower crystallinity than the region A and includes more crystal defects. FIG. 1B is a cross-sectional view of the region B in the closest direction. Here, the region B generally has an irregular polygonal column shape, but in FIG. 1A, the region B is simplified to have a cylindrical shape (the same applies hereinafter). To manufacture a semiconductor laser, semiconductor layers forming an element structure are sequentially grown on the substrate by, for example, metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxial growth, or halide vapor phase epitaxial growth (HVPE). . Thereafter, a necessary process such as formation of an electrode is performed, and further, scribing of the substrate and the semiconductor layer thereon is performed by cleavage or the like to form a chip, thereby manufacturing a semiconductor element.

At this time, since the crystal defect of the base substrate propagates to the semiconductor layer grown thereon, the semiconductor element formed in the element region including the region B has poor characteristics due to the defect. It will be. For example, in the case of a light emitting diode or a semiconductor laser, if a defect exists in a light emitting region, light emitting characteristics and reliability are significantly impaired. Therefore, the following method is employed so that the light emitting region, more generally, the active region is not adversely affected by the region B.

(1) The element size is designed in accordance with the period in which the region B exists.
For example, as shown in FIG. 2, when the regions B are periodically arranged at regular intervals in a hexagonal lattice pattern and the distance between the centers of the nearest regions B is 400 μm, the element region is 400 μm × 346 μm. Make a rectangle. Numerical that this 346μm is ^{400μm × (3 1/2 / 2)} .

(2) The arrangement of the element regions on the substrate is determined so that the element region is not substantially formed on the region B, in other words, the element region does not substantially include the region B. .
For example, by scribing the substrate along a broken line in FIG. 3, a 400 μm × 346 μm rectangular element region is separated into chips. By doing so, the region B exists only on each chip, that is, only on the end faces and corners of each semiconductor element.

(3) The position of the active region in the device is designed so that the active region inside the device is not formed on the region B.
For example, in the case of a semiconductor laser, the light-emitting region often has a stripe shape. Therefore, the structure of the semiconductor laser is designed so that the stripe is not formed on the region B. FIG. 4 shows an example of such a stripe position.

By the methods described in the above (1) to (3), each element region can be arranged so as to intentionally avoid the influence of the region B having many defects.
In addition to the above, especially in the case of a semiconductor laser, an element region and an element structure are designed so that the cavity end face of the light emitting region is not formed on the region B.
In a semiconductor laser, since the end face of a chip is used as a resonator end face, if a portion to be a mirror of the resonator is formed on a region B having many crystal defects as shown in FIG. 5, the characteristics of the laser are impaired. . Therefore, the position of the light emitting region and the arrangement of the element region on the substrate are designed so that the mirror portion of the resonator is not formed on the region B.
In the above (1), a rectangle of 400 μm × 346 μm is merely an example, and the size and shape of the element may be selected so as to satisfy the conditions described in (2) and (3).

Now, a first embodiment of the present invention will be described. In the first embodiment, a GaN-based semiconductor layer is formed on a GaN substrate on which a region B made of a crystal having a high average dislocation density is regularly arranged in a region A made of a crystal having a low average dislocation density. A case where a GaN-based semiconductor laser is formed by growth will be described.

FIG. 6 is a plan view showing a GaN substrate used in the first embodiment. The perspective view and cross-sectional view of the GaN substrate 1 are the same as those in FIGS. 1A and 1B. This GaN substrate 1 is n-type and has a (0001) plane (C plane) orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In the GaN substrate 1, a region B made of a crystal having a high average dislocation density is periodically arranged in a hexagonal lattice shape in a region A made of a crystal having a low average dislocation density. In this case, the straight line connecting the closest regions B coincides with the <1-100> direction of GaN and its equivalent direction. However, a straight line connecting the closest regions B may be made to coincide with the <11-20> direction of GaN and a direction equivalent thereto. Region B penetrates GaN substrate 1. The thickness of the GaN substrate 1 is, for example, 200 to 600 μm. Note that the dashed line in FIG. 6 merely shows the relative positional relationship of the region B, and is not an actual (having a physical meaning) line (the same applies hereinafter).

The arrangement cycle of the regions B (the interval between the centers of the closest regions B) is, for example, 400 μm, and the diameter thereof is, for example, 20 μm. The average dislocation density of the region A is, for example, 2 × 10 ⁶ cm ⁻² , and the average dislocation density of the region B is, for example, 1 × 10 ⁸ cm ⁻² . An example of the distribution of the dislocation density in the radial direction from the center of the region B is shown in FIG.
This GaN substrate 1 can be manufactured using the crystal growth technique, for example, as follows.
The basic crystal growth mechanism used in the manufacture of the GaN substrate 1 is to grow a crystal with a slope formed of a facet plane, propagate the dislocation by growing the facet plane while maintaining the slope, and assemble at a predetermined position. It is to let. The region grown by the facet surface becomes a low-density defect region due to the movement of the dislocation. At the lower part of the facet slope, growth is performed with a high-density defect region with a clear boundary, and dislocations gather at or within the boundary of the high-density defect region, where they disappear or accumulate. I do.
The shape of the facet surface differs depending on the shape of the high-density defect region. If the defect area is in the form of a dot, the facet surface surrounds the dot as the bottom to form a pit composed of the facet surface. In the case where the defect region is in the form of a stripe, the stripe is a valley bottom, has facet plane slopes on both sides thereof, and has a triangular prism-like facet surface turned sideways.
Thereafter, the surface of the growth layer is ground and polished, whereby the surface is flattened, so that the growth layer can be used as a substrate.
Also, the high-density defect region can have several states. For example, it may be made of polycrystal. In some cases, a single crystal is slightly inclined with respect to the surrounding low density defect region. In some cases, the C axis is inverted with respect to the surrounding low density defect region. Thus, this high-density defect region has a clear boundary and is distinguished from the surroundings.
By performing growth with this high-density defect region, growth can proceed while maintaining the facet surface without embedding the surrounding facet surface.
This high-density defect region can be generated by forming a seed in advance at a location where the high-density defect region is formed when GaN is grown on the base substrate. As the seed, an amorphous or polycrystalline layer is formed. By growing GaN thereon, a high-density defect region can be formed exactly in such a region.
The specific method of manufacturing the GaN substrate 1 is as follows. First, a base substrate is prepared. Various substrates can be used as the base substrate, and a general sapphire substrate may be used. However, in consideration of removal in a later step, it is preferable to use a GaAs substrate or the like that can be easily removed. Then, a seed made of, for example, an SiO ₂ film is formed on the base substrate. This type of shape can be, for example, a dot or stripe. Such species can be formed regularly and in large numbers. More specifically, in this case, the seeds are formed in an arrangement corresponding to the arrangement of the region B shown in FIG. Thereafter, GaN is grown in a thick film by, for example, hydride vapor phase epitaxy (HVPE). After growth, facets are formed on the surface of the GaN thick film layer in accordance with the kind of pattern shape. When the seed is a dot pattern as in the first embodiment, pits composed of facet surfaces are regularly formed. On the other hand, when the seed is a stripe-shaped pattern, a prism-shaped facet surface is formed.
Then, the base substrate is removed, and the GaN thick film layer is ground and polished to flatten the surface. Thereby, the GaN substrate 1 can be manufactured. Here, the thickness of the GaN substrate 1 can be freely set.
The GaN substrate 1 manufactured in this manner has a C-plane as a main surface, in which a dot-shaped (or stripe-shaped) high-density defect region of a predetermined size, that is, a region B is regularly formed. It has become. The single crystal region other than the region B, that is, the region A has a lower dislocation density than the region B.

In the first embodiment, an element region 2 (a section surrounded by a thick solid line) is defined on the GaN substrate 1 shown in FIG. 6 with the shape and arrangement shown in FIG. Then, a GaN-based semiconductor layer for forming a laser structure is grown on the GaN substrate 1, and a necessary process such as formation of a laser stripe and formation of an electrode is performed to form a laser structure. Then, the GaN substrate 1 on which the laser structure is formed is scribed to be separated into individual GaN-based semiconductor laser chips.

In FIG. 8, a gray rectangle represents one GaN-based semiconductor laser, and a straight line drawn near the center thereof is a laser stripe 3, which corresponds to the position of the light emitting region. Further, a rectangle drawn by a dashed line connecting them represents the laser bar 4, and a long side of the laser bar 4 corresponds to a cavity end face.

In the example shown in FIG. 8, the size of the GaN-based semiconductor laser is, for example, 600 μm × 346 μm, and the lateral direction (long side direction) is along a straight line connecting the regions B, and the vertical direction (short side direction) is along the region B. The substrate is scribed along a straight line that does not pass, thereby separating the GaN-based semiconductor laser of that size.

In this case, since the region B exists only at the end face of the long side of each GaN-based semiconductor laser, the design of the element is designed so that the laser stripe 3 is located near the straight line connecting the midpoints of the short sides. By doing so, it is possible to prevent the influence of the region B from affecting the light emitting region.
The mirror of the resonator is formed on the end face by scribing the substrate by cleavage or the like along a vertical straight line in FIG. 8, but the straight line does not pass through the region B. Is not affected. Therefore, it is possible to obtain a GaN-based semiconductor laser having good emission characteristics and high reliability.

An example of a specific structure and a manufacturing process of a GaN-based semiconductor laser is as follows. Here, a GaN-based semiconductor laser having a ridge structure and a SCH (Separate Confinement Heterostructure) structure will be described.

That is, as shown in FIG. 9, first, after the surface of the GaN substrate 1 is cleaned by thermal cleaning or the like, the n-type GaN buffer layer 5, the n-type AlGaN cladding layer 6, the n-type GaN optical waveguide layer 7, undoped _{Ga 1-x in x N /} Ga 1-y in y N active layer 8 of the multi-quantum well structure, undoped InGaN deterioration preventive layer 9, p-type AlGaN cap layer 10, p-type GaN optical guide The layer 11, the p-type AlGaN cladding layer 12, and the p-type GaN contact layer 13 are sequentially epitaxially grown.

Here, the n-type GaN buffer layer 5 has a thickness of, for example, 0.05 μm, and is doped with, for example, Si as an n-type impurity. The n-type AlGaN cladding layer 6 has a thickness of, for example, 1.0 μm, is doped with, for example, Si as an n-type impurity, and has an Al composition of, for example, 0.08. The n-type GaN optical waveguide layer 7 has a thickness of, for example, 0.1 μm, and is doped with, for example, Si as an n-type impurity. The active layer 8 having an undoped In _x Ga _1-x N / In _y Ga _1-y N multiple quantum well structure has, for example, a thickness of 3.5 nm for an In _x Ga _1-x N layer as a well layer and x = 0.14, the thickness of the In _y Ga _1-y N layer as a barrier layer is 7 nm, y = 0.02, and the number of wells is 3.

The undoped InGaN deterioration preventing layer 9 has a graded structure in which the In composition gradually decreases monotonously from the surface in contact with the active layer 8 toward the surface in contact with the p-type AlGaN cap layer 9. Is in agreement with the In composition y of the In _y Ga _1-y N layer as the barrier layer of the active layer 8, and the In composition on the surface contacting the p-type AlGaN cap layer 10 is It is 0. The thickness of the undoped InGaN deterioration preventing layer 9 is, for example, 20 nm.

The p-type AlGaN cap layer 10 has a thickness of, for example, 10 nm, and is doped with, for example, magnesium (Mg) as a p-type impurity. The Al composition of the p-type AlGaN cap layer 10 is, for example, 0.2. The p-type AlGaN cap layer 10 prevents In from being desorbed and deteriorated from the active layer 8 during the growth of the p-type GaN optical waveguide layer 11, the p-type AlGaN cladding layer 12, and the p-type GaN contact layer 13, This is for preventing carriers (electrons) from overflowing from the active layer 8. The p-type GaN optical waveguide layer 11 has a thickness of, for example, 0.1 μm, and is doped with, for example, Mg as a p-type impurity. The p-type AlGaN cladding layer 12 has a thickness of, for example, 0.5 μm, is doped with, for example, Mg as a p-type impurity, and has an Al composition of, for example, 0.08. The p-type GaN contact layer 13 has a thickness of, for example, 0.1 μm, and is doped with, for example, Mg as a p-type impurity.

Further, the n-type GaN buffer layer 5, the n-type AlGaN cladding layer 6, the n-type GaN optical waveguide layer 7, the p-type AlGaN cap layer 10, the p-type GaN optical waveguide layer 11, and the p-type AlGaN cladding which are layers containing no In The growth temperature of the layer 12 and the p-type GaN contact layer 13 is, for example, about 1000 ° C., and the growth of the active layer 8 having a Ga _1-x In _x N / Ga _1-y In _y N multiple quantum well structure which is a layer containing In. The temperature is, for example, 700 to 800 ° C., for example, 730 ° C. The growth temperature of the undoped InGaN deterioration preventing layer 9 is set to, for example, 730 ° C. at the start of growth, which is the same as the growth temperature of the active layer 8, and then, for example, is increased linearly. The temperature is set to, for example, 835 ° C. like the temperature.

The raw materials for growing these GaN-based semiconductor layers are, for example, trimethyl gallium ((CH ₃ ) ₃ Ga, TMG) as a Ga raw material, trimethyl aluminum ((CH ₃ ) ₃ Al, TMA), In as a raw material for Al. the raw materials trimethylindium _{((CH 3) 3 in,} TMI), as a raw material for N using NH _3. In addition, for example, H ₂ is used as the carrier gas. As for the dopant, for example, monosilane (SiH ₄ ) is used as the n-type dopant, and bis = methylcyclopentadienyl magnesium ((CH ₃ C ₅ H ₄ ) ₂ Mg) or bis = cyclopentadienyl is used as the p-type dopant. used magnesium _{((C 5 H 5) 2} Mg).

Next, the GaN substrate 1 on which the GaN-based semiconductor layer has been grown as described above is taken out of the MOCVD apparatus. Then, the entire surface, for example, the CVD method of the p-type GaN contact layer 13, a vacuum deposition method, after the example of thickness such as a sputtering method to form a 0.1 [mu] m SiO ₂ film (not shown), in the SiO ₂ film A resist pattern (not shown) having a predetermined shape corresponding to the shape of the ridge portion is formed by lithography, and using this resist pattern as a mask, for example, wet etching using a hydrofluoric acid-based etchant, or CF ₄ or CHF ₃ The SiO ₂ film is etched by an RIE method using an etching gas containing fluorine, such as, for example, to have a shape corresponding to the ridge portion.

Next, the p-type AlGaN cladding layer 12 is etched to a predetermined depth in the thickness direction by RIE using the SiO ₂ film as a mask, thereby extending in the <1-100> direction as shown in FIG. A ridge 14 is formed. The width of the ridge 14 is, for example, 3 μm. As the RIE etching gas, for example, a chlorine-based gas is used.

Next, after the SiO ₂ film used as the etching mask is removed by etching, an insulating film 15 such as a 0.3 μm thick SiO ₂ film is formed on the entire surface of the substrate by, for example, a CVD method, a vacuum evaporation method, a sputtering method, or the like. Form a film. This insulating film 15 is for electrical insulation and surface protection.

Next, a resist pattern (not shown) is formed by lithography to cover the surface of the insulating film 15 excluding the p-side electrode formation region.
Next, the opening 15a is formed by etching the insulating film 15 using this resist pattern as a mask.

Next, while the resist pattern is left, for example, a Pd film, a Pt film, and an Au film are sequentially formed on the entire surface of the substrate by, for example, a vacuum evaporation method, and then the resist pattern is formed on the Pd film and the Pt film. And with the Au film (lift-off). As a result, a p-side electrode 16 contacting the p-type GaN contact layer 13 through the opening 15a of the insulating film 15 is formed. Here, the thicknesses of the Pd film, the Pt film, and the Au film constituting the p-side electrode 16 are, for example, 10 nm, 100 nm, and 300 nm, respectively. Next, an alloy process for bringing the p-side electrode 16 into ohmic contact is performed.

Next, for example, a Ti film, a Pt film, and an Au film are sequentially formed on the back surface of the GaN substrate 1 by, for example, a vacuum evaporation method, and an n-side electrode 17 having a Ti / Pt / Au structure is formed. Here, the thicknesses of the Ti film, the Pt film, and the Au film constituting the n-side electrode 17 are, for example, 10 nm, 50 nm, and 100 nm, respectively. Next, an alloying process for bringing the n-side electrode 17 into ohmic contact is performed.

Next, the scribing of the GaN substrate 1 on which the laser structure is formed as described above is performed along the contour of the element region 2 by cleavage to form a laser bar 4 to form both resonator end faces. Next, after coating the end faces of these resonators, the laser bar 4 is scribed again by cleavage or the like to form chips.
As described above, as shown in FIG. 11, a GaN-based semiconductor laser having the intended ridge structure and SCH structure is manufactured.

As described above, according to the first embodiment, the region A on the GaN substrate 1 in which the region B having a high average dislocation density is periodically arranged in a hexagonal lattice shape in the region A having a low average dislocation density. Since the GaN-based semiconductor layer for forming the laser structure is grown on the GaN substrate 1 after defining the element region 2 so as not to substantially contain B, the GaN-based semiconductor layer Even if a defect such as a dislocation propagates from the region B, the GaN-based semiconductor layer on the element region 2 can be prevented from being affected. After the GaN-based semiconductor layer is grown, the ridge 14 is formed, the p-side electrode 16 and the n-side electrode 17 are formed, and the GaN with the laser structure formed along the contour of the element region 2. Since the GaN-based semiconductor laser chip is separated into individual GaN-based semiconductor laser chips by scribing, the dislocations inherited from the GaN substrate 1 hardly exist in this GaN-based semiconductor laser chip. Therefore, a GaN-based semiconductor laser having good emission characteristics, high reliability, and long life can be realized.

In addition, according to the first embodiment, the undoped InGaN deterioration preventing layer 9 is provided in contact with the active layer 8, and the p-type AlGaN cap layer 10 is provided in contact with the undoped InGaN deterioration preventing layer 9. Therefore, the stress generated in the active layer 8 by the p-type AlGaN cap layer 10 can be remarkably reduced by the undoped InGaN deterioration preventing layer 9, and Mg used as a p-type dopant of the p-type layer is added to the active layer 7. Spreading can be effectively suppressed.

Next, a second embodiment of the present invention will be described.
As shown in FIG. 12, in the second embodiment, unlike the first embodiment, the outline of the rectangular element region 2 has a straight line connecting the centers of the regions B on both long sides and short sides thereof. Consists of Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2. By doing so, it is possible to prevent the influence of the region B from affecting the light emitting region.

In the second embodiment, the mirror of the resonator is formed by performing scribing by cleavage along the contour of the element region 2, which is a straight line connecting the centers of the regions B, in the first embodiment. It is different from the form.
Here, since the region B has many dislocations, it is considered that the region B is more easily broken than the region A. Therefore, when scribing is performed along a straight line connecting the areas B, the area B plays a role as a perforation, so that the area A is also cleaved. At this time, the end face of the area B is not necessarily flat because there are many dislocations, but the end face of the area A between them is flat. FIG. 13 conceptually shows the shape of the end face.

The flatness is required at the end face portion of the laser stripe 2, but with the arrangement shown in FIG. 12, the end face of the region B does not adversely affect the light emission characteristics.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the second embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a third embodiment of the present invention will be described.
In the third embodiment, as shown in FIG. 14, in the GaN substrate 1, a region B made of a crystal having a high average dislocation density is periodically arranged in a region A made of a crystal having a low average dislocation density in a rectangular lattice shape. It is arranged in a way. Then, this one rectangle in which the region B is located at the four corners is defined as an element region 2. In this case, the straight line connecting the closest regions B in the long side direction of the rectangle coincides with the <1-100> direction of GaN, and the straight line connecting the closest regions B in the short side direction is <11- 20> direction.

The arrangement period of the regions B in the long side direction of the rectangular lattice is, for example, 600 μm, and the arrangement period of the regions B in the short side direction is, for example, 400 μm. In this case, the size of the element region 2 is 600 μm × 400 μm.
The laser stripe 3 in the element region 2 is on a straight line connecting the midpoints of the sides in the short side direction of the rectangular lattice.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the third embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a fourth embodiment of the present invention will be described.
In the fourth embodiment, as shown in FIG. 15, the regions B are periodically arranged in a hexagonal lattice in the region A of the GaN substrate 1 as in the first embodiment. In the first embodiment, a region C having an average dislocation density intermediate between the average dislocation density of the region A and the average dislocation density of the region B is formed as a transition region between the region A and the region B. Different from form. Specifically, the average dislocation density of the region A 2 × 10 ⁶ cm ^-2 or less, the average dislocation density of the regions B is 1 × 10 ⁸ cm ^-2 or more, the average dislocation density of the regions C is 1 × 10 ⁸ cm ^{- It} is smaller than ^{2 and} larger than 2 × 10 ⁶ cm ⁻² . The arrangement cycle of the regions B (the interval between the centers of the closest regions B) is, for example, 300 μm, and the diameter thereof is, for example, 20 μm. The diameter of the region C is, for example, 120 μm.

In this case, unlike the first embodiment, the outline of the rectangular element region 2 is composed of a straight line connecting the centers of the regions B, both long and short sides thereof. The size of the element region 2 is, for example, 600 μm × 260 μm. Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but this laser stripe 3 does not include the region B and the region C. By doing so, it is possible to prevent the influence of the region B and the region C from affecting the light emitting region.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the fourth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a fifth embodiment of the present invention will be described.
In the fifth embodiment, as shown in FIG. 16, the regions B are periodically arranged in a hexagonal lattice pattern in the region A of the GaN substrate 1 as in the first embodiment. In the first embodiment, a region C having an average dislocation density intermediate between the average dislocation density of the region A and the average dislocation density of the region B is formed as a transition region between the region A and the region B. Different from form. Specifically, the average dislocation density of the region A 2 × 10 ⁶ cm ^-2 or less, the average dislocation density of the regions B is 1 × 10 ⁸ cm ^-2 or more, the average dislocation density of the regions C is 1 × 10 ⁸ cm ^{- It} is smaller than ^{2 and} larger than 2 × 10 ⁶ cm ⁻² . The arrangement cycle of the regions B (the interval between the centers of the closest regions B) is, for example, 400 μm, and the diameter thereof is, for example, 20 μm. The diameter of the region C is, for example, 120 μm.

In this case, in the first example, unlike the first embodiment, the outline of the rectangular element region 2 in the short side direction is a straight line connecting the centers of the regions B, but the outline in the long side direction is The distance is, for example, 23 μm from a straight line connecting the centers of the closest regions B. In this case, the size of the element region 2 is, for example, 400 μm × 300 μm. Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but this laser stripe 3 does not include the region B and the region C. By doing so, it is possible to prevent the influence of the region B and the region C from affecting the light emitting region.

On the other hand, in the second example, the outline in the long side direction of the rectangular element region 2 is, for example, 23 μm away from the straight line connecting the centers of the closest regions B in the <1-100> direction, and Is, for example, 100 μm away from a straight line connecting the centers of the closest regions B in the <11-20> direction. Also in this case, the size of the element region 2 is, for example, 400 μm × 300 μm. The position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but this laser stripe 3 does not include the region B and the region C. By doing so, it is possible to prevent the influence of the region B and the region C from affecting the light emitting region.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the fifth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a sixth embodiment of the present invention will be described.
In the sixth embodiment, the regions B are periodically arranged in a hexagonal lattice in the region A of the GaN substrate 1 as in the first embodiment. As shown in (1), the interval connecting the centers of the closest regions B in the <1-100> direction is set to twice the length of the short side of the rectangular element region 2, specifically, for example, 700 μm. Is set to The contour in the short side direction of the element region 2 in the nearest region B in the <1-100> direction is a straight line connecting the centers of the nearest regions B in the <11-20> direction, The contour line is a straight line connecting the centers of the nearest region B in the <1-100> direction. In this case, the size of the element region 2 is, for example, 606 μm × 350 μm. Although the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, the laser stripe 3 does not include the region B. By doing so, it is possible to prevent the influence of the region B from affecting the light emitting region.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the sixth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a seventh embodiment of the present invention will be described.
As shown in FIG. 18, in the seventh embodiment, two laser stripes 3 are formed in the element region 2 in parallel with each other. FIG. 19 shows a GaN-based semiconductor laser chip obtained by scribing along the contour of the element region 2.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the seventh embodiment, the same advantages as the first embodiment can be obtained in a multi-beam GaN-based semiconductor laser.

Next, an eighth embodiment of the present invention will be described.
As shown in FIG. 20, in the eighth embodiment, the formation of the laser stripe 3 in the element region 2 is the same as in the first embodiment, but in this case, the width of the laser stripe 3 is It is much larger than in the first embodiment. Specifically, the width of the laser stripe 3 can be maximally ad, where a is the length of the short side of the rectangular element region 2 and d is the diameter of the region B. 3 is preferably at least 1 μm or more away from the region B, and taking this into account, the upper limit of the width of the laser stripe 3 is ad−2 μm. For example, when a = 346 μm and d = 20 μm, the upper limit of the width of the laser stripe 3 is 346-20-2 = 324 μm. In one example, the width of the laser stripe 3 is 200 μm. FIG. 21 shows a GaN-based semiconductor laser chip obtained by scribing along the contour of the element region 2 at this time.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the eighth embodiment, an advantage similar to that of the first embodiment can be obtained in an ultra-high-power GaN-based semiconductor laser in which the width of the laser stripe 3 is extremely large.

Next, a ninth embodiment of the present invention will be described.
FIG. 22 is a plan view showing a GaN substrate used in the ninth embodiment. As shown in FIG. 22, in the ninth embodiment, the element region 2 is defined so that the region B is not included in the laser stripe 3. Here, the laser stripe 3 is separated from the region B by 50 μm or more. In this case, the element region 2 includes two regions B.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the ninth embodiment, the same advantages as in the first embodiment can be obtained.

Next, a tenth embodiment of the present invention will be described.
FIG. 23 is a plan view showing a GaN substrate used in the tenth embodiment. This GaN substrate 1 is n-type and has a C-plane orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In this GaN substrate 1, regions B made of crystals having a high average dislocation density are periodically arranged in a <11-20> direction of GaN at intervals of, for example, 400 μm in a region A made of crystals having a low average dislocation density. In the <1-100> direction orthogonal to the <11-20> direction, they are periodically arranged at intervals of, for example, 20 to 100 μm. However, the <11-20> direction and the <1-100> direction may be interchanged.

In the tenth embodiment, as shown in FIG. 24, a pair of end faces parallel to the laser stripe 3 pass through the row of the region B in the <1-100> direction, and the laser stripe 3 An element region 2 is defined near the center of the region between the columns. In this case, the element region 2 does not substantially include the column of the region B.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the tenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, an eleventh embodiment of the present invention will be described.
As shown in FIG. 25, in the eleventh embodiment, a GaN substrate 1 similar to that of the tenth embodiment is used, but one end face parallel to the laser stripe 3 has a region B in the <1-100> direction. And that the other end face passes through a position distant from the row of the region B. In this case, the element region 2 does not substantially include the column of the region B.
The other points are the same as in the tenth and first embodiments, and the description is omitted.
According to the eleventh embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twelfth embodiment of the present invention will be described.
As shown in FIG. 26, in the twelfth embodiment, a GaN substrate 1 similar to that of the tenth embodiment is used, but a pair of end faces parallel to the laser stripe 3 are both in the <1-100> direction. It differs from the tenth embodiment in that the element region 2 is defined such that it is located between the columns of the region B and the laser stripe 3 is located near the center of the region between the columns of the region B. . In this case, the element region 2 does not substantially include the column of the region B.
The other points are the same as in the tenth and first embodiments, and the description is omitted.
According to the twelfth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a thirteenth embodiment of the present invention will be described.
As shown in FIG. 27, in the thirteenth embodiment, a GaN substrate 1 similar to that of the tenth embodiment is used, but one end face parallel to the laser stripe 3 has a region B in the <1-100> direction. , The other end face is located between the row of the area B immediately adjacent to the row of the area B and the row of the next area B, and the laser stripe 3 is at least 50 μm from the row of the area B. It differs from the tenth embodiment in that it passes through a distant position. In this case, the element region 2 includes one column of the region B.
The other points are the same as in the tenth and first embodiments, and the description is omitted.
According to the thirteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a fourteenth embodiment of the present invention will be described.
As shown in FIG. 28, in the fourteenth embodiment, a GaN substrate 1 similar to that of the tenth embodiment is used, but one end face parallel to the laser stripe 3 has a region B in the <1-100> direction. And the other end face is located between the row of the area B immediately adjacent to the row of the area B and the row of the next area B, and the laser stripe 3 It differs from the tenth embodiment in that it passes a position at least 50 μm away from the row. In this case, the element region 2 includes one column of the region B.
The other points are the same as in the tenth and first embodiments, and the description is omitted.
According to the fourteenth embodiment, the same advantages as in the first embodiment can be obtained.

Next, a fifteenth embodiment of the present invention will be described.
FIG. 29 is a plan view showing the GaN substrate 1 used in the fifteenth embodiment. This GaN substrate 1 is the same as the GaN substrate 1 used in the tenth embodiment, except that the regions B are periodically arranged at intervals of, for example, 200 μm in the <11-20> direction of GaN. In this case, the element region 2 includes two columns of the region B.

As shown in FIG. 29, in the fifteenth embodiment, a pair of end faces parallel to the laser stripe 3 are located near the center of the area between the adjacent rows of the area B where the laser stripe 3 is located. Are located near the center of the region between the column of the region B and the column of the region B immediately outside thereof.
The other points are the same as in the tenth and first embodiments, and the description is omitted.
According to the fifteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a sixteenth embodiment of the present invention will be described.
FIG. 30 is a plan view showing a GaN substrate used in the sixteenth embodiment. This GaN substrate 1 is n-type and has a C-plane orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In this GaN substrate 1, a region B made of a crystal having a high average dislocation density and a region B linearly extending in the <1-100> direction of GaN is included in a region A made of a crystal having a low average dislocation density. They are periodically arranged at an interval of, for example, 400 μm in a <11-20> direction orthogonal to the −100> direction. However, the <1-100> direction and the <11-20> direction may be interchanged.

In the sixteenth embodiment, as shown in FIG. 31, a pair of end faces parallel to the laser stripe 3 pass through the region B, and the laser stripe 3 is located near the center of the region between the regions B. Thus, the element region 2 is defined. In this case, the element region 2 does not substantially include the column of the region B.
Except for the above, the configuration is the same as that of the first embodiment, and the description is omitted.
According to the sixteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a seventeenth embodiment of the present invention will be described.
As shown in FIG. 32, in the seventeenth embodiment, the same GaN substrate 1 as in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through the region B, and the other end face is It differs from the sixteenth embodiment in that it passes through a position away from the row of the region B. In this case, the element region 2 does not substantially include the column of the region B.
The other points are the same as those of the sixteenth and first embodiments, and the description is omitted.
According to the seventeenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, an eighteenth embodiment of the present invention will be described.
As shown in FIG. 33, in the eighteenth embodiment, the same GaN substrate 1 as in the sixteenth embodiment is used, but a pair of end faces parallel to the laser stripe 3 are both located between the regions B. The present embodiment is different from the sixteenth embodiment in that the element region 2 is defined so that the laser stripe 3 is located near the center of the region between the regions B. In this case, the element region 2 does not substantially include the column of the region B.
The other points are the same as those of the sixteenth and first embodiments, and the description is omitted.
According to the eighteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a nineteenth embodiment of the present invention will be described.
As shown in FIG. 34, in the nineteenth embodiment, the same GaN substrate 1 as in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through the region B and the other end face is The difference from the sixteenth embodiment is that the laser stripe 3 is located between the region B immediately adjacent to the row of the region B and the next region B and the laser stripe 3 passes through a position at least 50 μm away from the region B. . In this case, the element region 2 includes one region B.
The other points are the same as those of the sixteenth and first embodiments, and the description is omitted.
According to the nineteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twentieth embodiment of the present invention will be described.
As shown in FIG. 35, in the twentieth embodiment, the same GaN substrate 1 as in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through a position away from the region B, The sixteenth embodiment is different from the sixteenth embodiment in that the other end face is located between a region B immediately adjacent to the region B and the next region B, and the laser stripe 3 passes a position at least 50 μm away from the region B. And different. In this case, the element region 2 includes one column of the region B.
The other points are the same as those of the sixteenth and first embodiments, and the description is omitted.
According to the twentieth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twenty-first embodiment of the present invention will be described.
FIG. 36 is a plan view showing the GaN substrate 1 used in the twenty-first embodiment. This GaN substrate 1 is the same as the GaN substrate 1 used in the sixteenth embodiment, except that the regions B are periodically arranged in the <11-20> direction of GaN at intervals of, for example, 200 μm. In this case, the element region 2 includes two columns of the region B.

As shown in FIG. 36, in the twenty-first embodiment, a pair of end faces parallel to the laser stripe 3 are located near the center of the region between the adjacent regions B in which the laser stripe 3 is located. B near the center of the region between B and the region B just outside thereof.
The other points are the same as those of the sixteenth and first embodiments, and the description is omitted.
According to the twenty-first embodiment, advantages similar to those of the first embodiment can be obtained.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, the numerical values, structures, substrates, raw materials, processes, and the like described in the above embodiments are merely examples, and different numerical values, structures, substrates, raw materials, processes, and the like may be used as necessary.

Specifically, for example, in the above embodiment, the n-type layer forming the laser structure is first laminated on the substrate, and the p-type layer is laminated thereon, but the lamination order is reversed. Alternatively, a structure in which a p-type layer is first stacked on a substrate and an n-type layer is stacked thereon may be adopted.

Further, in the above-described embodiment, a case has been described where the present invention is applied to the manufacture of a GaN-based semiconductor laser having an SCH structure. However, the present invention is applicable to, for example, the manufacture of a GaN-based semiconductor laser having a DH (Double Heterostructure) structure. Of course, the present invention may be applied to the manufacture of a GaN-based light-emitting diode. Further, a nitride-based III-V compound semiconductor such as a GaN-based FET or a GaN-based heterojunction bipolar transistor (HBT) may be used. The present invention may be applied to an electron traveling element that has been used.

Further, in the above-described embodiment, H ₂ gas is used as a carrier gas when growing by MOCVD. However, if necessary, another carrier gas, for example, H ₂ and N ₂ or He or Ar gas may be used. A mixed gas with the above may be used.
In the above-described embodiment, the cavity end face is formed by cleavage, but the cavity end face may be formed by dry etching such as RIE.

It is a perspective view and a sectional view for explaining the gist of the embodiment of the present invention. FIG. 2 is a plan view for explaining the gist of the embodiment of the present invention. FIG. 2 is a plan view for explaining the gist of the embodiment of the present invention. FIG. 2 is a plan view for explaining the gist of the embodiment of the present invention. FIG. 2 is a plan view for explaining the gist of the embodiment of the present invention. FIG. 3 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the first embodiment of the present invention. FIG. 3 is a schematic diagram illustrating an example of a distribution of dislocation density in the vicinity of a high defect region of a GaN substrate used in the first embodiment of the present invention. FIG. 3 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view for explaining the method for manufacturing the GaN-based semiconductor laser according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view for explaining the method for manufacturing the GaN-based semiconductor laser according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view for explaining the method for manufacturing the GaN-based semiconductor laser according to the first embodiment of the present invention. FIG. 7 is a cross-sectional view for explaining the method for manufacturing the GaN-based semiconductor laser according to the second embodiment of the present invention. FIG. 9 is a schematic diagram illustrating an end face of a chip obtained by scribing in the method for manufacturing a GaN-based semiconductor laser according to the second embodiment of the present invention. FIG. 13 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the third embodiment of the present invention. FIG. 13 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the fourth embodiment of the present invention. FIG. 14 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the fifth embodiment of the present invention. FIG. 16 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the sixth embodiment of the present invention. FIG. 16 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the seventh embodiment of the present invention. FIG. 14 is a sectional view showing a GaN-based semiconductor laser manufactured according to a seventh embodiment of the present invention. FIG. 15 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the eighth embodiment of the present invention. FIG. 16 is a sectional view showing a GaN-based semiconductor laser manufactured according to an eighth embodiment of the present invention. FIG. 16 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the ninth embodiment of the present invention. FIG. 29 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the tenth embodiment of the present invention. FIG. 29 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the tenth embodiment of the present invention. FIG. 29 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the eleventh embodiment of the present invention. FIG. 29 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the twelfth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the thirteenth embodiment of the present invention. FIG. 33 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the fourteenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the fifteenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the sixteenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the sixteenth embodiment of the present invention. FIG. 39 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the seventeenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the eighteenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the nineteenth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the twentieth embodiment of the present invention. FIG. 35 is a plan view for explaining the method for manufacturing the GaN-based semiconductor laser according to the twenty-first embodiment of the present invention.

Explanation of reference numerals

REFERENCE SIGNS LIST 1 GaN substrate, 2 element region, 3 laser stripe, 5 n-type GaN buffer layer, 6 n-type AlGaN cladding layer, 7 n-type GaN optical waveguide layer, 8 active layer, 9 undoped InGaN degradation Prevention layer, 10 ... p-type AlGaN cap layer, 11 ... p-type GaN optical waveguide layer, 12 ... p-type AlGaN cladding layer, 13 ... p-type GaN contact layer, 14 ... ridge, 15 ... insulating film, 16 ... n-side electrode , 17 ... p-side electrode

Claims (16)

In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are parallel to each other. A semiconductor in which a semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a regularly arranged nitride-based III-V compound semiconductor substrate. A method for manufacturing a light emitting device,
The nitride-based material is used so that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. A method for manufacturing a semiconductor light emitting device, wherein an element region is defined on a group III-V compound semiconductor substrate. In a first region made of a crystal having a first average dislocation density, a plurality of linearly extending second regions having a second average dislocation density higher than the first average dislocation density are parallel to each other. A semiconductor light-emitting device in which a nitride-based III-V compound semiconductor layer for forming a light-emitting device structure on a regularly arranged nitride-based III-V compound semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is a semiconductor light emitting device. A semiconductor light-emitting element that is not included in a light-emitting region. In a first region made of a crystal having a first average defect density, a plurality of linearly extending second regions having a second average defect density higher than the first average defect density are parallel to each other. A semiconductor in which a semiconductor light-emitting device is manufactured by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a regularly arranged nitride-based III-V compound semiconductor substrate. A method for manufacturing a light emitting device,
The nitride-based material is disposed such that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. A method for manufacturing a semiconductor light emitting device, wherein an element region is defined on a group III-V compound semiconductor substrate. In a first region made of a crystal having a first average defect density, a plurality of linearly extending second regions having a second average defect density higher than the first average defect density are parallel to each other. A semiconductor light-emitting device in which a nitride-based III-V compound semiconductor layer for forming a light-emitting device structure on a regularly arranged nitride-based III-V compound semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is a semiconductor light emitting device. A semiconductor light-emitting element that is not included in a light-emitting region. A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate,
The nitride-based material is used so that the interval between the second regions is 50 μm or more, the at least one second region is included, and the second region is not included in the light emitting region of the semiconductor light emitting device. A method for manufacturing a semiconductor light emitting device, wherein an element region is defined on a group III-V compound semiconductor substrate. A nitride III-V compound in which a plurality of linearly extending second regions having a lower crystallinity than the first regions are regularly arranged in a first region made of a crystal. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is a semiconductor light emitting device. A semiconductor light-emitting element that is not included in a light-emitting region. The method according to claim 1, wherein the nitride-based III-V compound semiconductor substrate is a GaN substrate. 7. The semiconductor light emitting device according to claim 2, wherein the nitride-based III-V compound semiconductor substrate is a GaN substrate. 6. The method according to claim 1, wherein the light emitting region of the semiconductor light emitting device is separated from the second region by 50 μm or more. 7. The semiconductor light emitting device according to claim 2, wherein the light emitting region of the semiconductor light emitting device is separated from the second region by 50 μm or more. The scribing of the nitride-based III-V compound semiconductor substrate is performed along a contour including a straight line included in at least one of the second regions. A method for manufacturing a semiconductor light-emitting device. The scribing of the nitride-based III-V compound semiconductor substrate is performed along a contour including two straight lines included in the two second regions. 6. The method for manufacturing a semiconductor light emitting device according to claim 5. 6. The method of manufacturing a semiconductor light emitting device according to claim 1, wherein the light emitting region is located at the center of two adjacent second regions. 7. The at least one end face of the nitride-based III-V compound semiconductor substrate parallel to the light emitting area is located in at least one of the second areas. Semiconductor light emitting device. 7. The semiconductor light emitting device according to claim 2, wherein two end surfaces of said nitride III-V compound semiconductor substrate parallel to said light emitting region are located in said two second regions. element. 7. The semiconductor light emitting device according to claim 2, wherein said light emitting region is located at the center of two adjacent second regions.

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