JP2004120262A - Image pickup device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem wherein a clock mode changes little by little and the luminance of images changes little by little accompanying it in the case that object illuminance is near the threshold of clock mode changeover in an image pickup device which copes with low illuminance photographing by switching the clock of a system and prolonging exposure time. <P>SOLUTION: The threshold Yth_L for judging whether to advance to a step S6 of switching the clock mode from a high clock mode to a low clock mode and the threshold Yth_H for judging whether to shift to a step S10 of switching it from the lock clock mode to the high clock mode on the contrary are respectively and separately set, and the threshold Yth_H is set larger than the threshold Yth_L. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an imaging device such as a digital camera device using a solid-state imaging device, and more particularly, to an imaging device capable of improving image quality at low illuminance by switching the frequency of a system clock. Equipment related.
[0002]
[Prior art]
In general, a digital camera device uses a charge coupled device (CCD: Charge Coupled Device) or a solid-state imaging device (hereinafter simply referred to as an imaging device) in which a plurality of pixels such as a C-MOS image sensor are arranged in a matrix. , A lens for forming an image on the imaging surface is arranged. The output of the image sensor is analog-amplified by an AGC amplifier serving as an amplifying unit, and is converted into digital data via an A / D converter.
[0003]
In such a digital camera device, normally, exposure adjustment, white balance adjustment, and the like are all performed by automatic control. In addition to the automatic control, a manual mode in which a user manually sets a shutter speed, an AGC amplifier gain, and a white balance, and performs shooting with a fixed shutter, a fixed AGC amplifier gain, and a fixed white balance. Some can be set.
[0004]
In the exposure adjustment by automatic control, the exposure is controlled so that the brightness (frame brightness) of the captured image obtained from the photoelectric conversion output becomes the target brightness. In the exposure control, an electronic shutter control for controlling an exposure time of the image sensor by controlling a speed of an electronic shutter provided in the image sensor, and / or an AGC amplifier gain control for controlling a gain (amplification factor) of the AGC amplifier. Is performed.
[0005]
For example, in shooting in a dark environment (low illuminance environment), when the illuminance of the subject is low and the photoelectric conversion output from the image sensor is reduced, the brightness is reduced. In order to increase the brightness to the target brightness, first, electronic shutter control for increasing the exposure time is performed. If the target luminance cannot be obtained even when the exposure time by the electronic shutter control is set to be long, then the AGC amplifier gain control is performed, and the AGC amplifier gain is gradually increased.
[0006]
Conversely, in a bright environment (high illuminance environment), when the illuminance of the subject is high and the photoelectric conversion output from the image sensor increases, the luminance increases. In this case, in order to reduce the luminance to the target luminance, first, the AGC amplifier gain control is performed, and the AGC amplifier gain is gradually reduced. If the target brightness cannot be obtained even when the AGC amplifier gain is set to the minimum value, electronic shutter control for increasing the exposure time is performed.
[0007]
By the way, in photographing in a low illuminance environment, the amount of incident light may still be insufficient even when the electronic shutter is fully opened by exposure control and the AGC amplifier gain is maximized. In such a case, the signal-to-noise ratio of the image sensor is reduced, and roughness and color noise are increased, and image quality is reduced.
[0008]
In view of this problem, there has been conventionally proposed a technique for improving a signal-to-noise ratio by lowering the frequency of a system clock (hereinafter referred to as a clock) in a dark environment to increase the exposure time (see, for example). For example, see Patent Document 1). In this case, when the illuminance of the subject decreases, the mode shifts from a high clock mode operating with a high clock of a high frequency (first frequency) to a low clock mode operating with a low clock of a lower frequency (second frequency). I do. By setting the clock frequency to, for example, １ ／, the shutter speed of the electronic shutter becomes と な り, and the exposure time can be doubled.
[0009]
[Patent Document 1]
JP-A-6-98227
[0010]
[Problems to be solved by the invention]
However, in the related art in which the exposure time is lengthened by employing the above-described low clock mode, there is one type of threshold for switching the clock mode according to the illuminance of the subject. Therefore, when the illuminance of the subject is near the threshold, the clock mode is switched in small increments. In the low clock mode, the image becomes brighter as the exposure time becomes longer, but in the high clock mode, the image becomes darker. Therefore, when the illuminance of the subject is near the threshold, there is a problem that a bright image and a dark image are alternately output in small increments.
[0011]
In order to alleviate this small change in brightness, the frequency difference between the low clock and the high clock may be reduced. However, the fact that the frequency difference is small means that the low illuminance range that can be handled in the low clock mode is used. And the effect of improving the image quality at low illuminance is reduced.
[0012]
Further, in the conventional technique, no luminance adjustment is performed when the clock mode is switched. Therefore, for example, when the clock frequency is changed to １ ／, the exposure time is doubled at the moment of the change, and the luminance changes greatly. That is, this also causes a large change in luminance.
[0013]
Furthermore, in the related art, the low clock mode is implemented only when the illuminance of the subject is low, even though the configuration has a low clock mode in which each unit functions at a low clock frequency lower than usual. I have. In such a configuration, the power consumption reduction effect, which is a further advantage at the time of low clock operation, cannot be sufficiently obtained.
[0014]
[Means to solve the problem]
In order to solve the above-described problems, a first imaging device of the present invention includes a solid-state imaging device, and operates in a high clock mode in which a clock of a first frequency operates according to illuminance of a subject. An image pickup apparatus having a clock mode switching means for switching between a low clock mode and a low clock mode operated by a clock of a second frequency, wherein the clock mode switching means includes a first threshold value for shifting from a high clock mode to a low clock mode; And a second threshold value for shifting to the high clock mode is set separately, and the second threshold value is larger than the first threshold value.
[0015]
In the above configuration, the first threshold for shifting from the high clock mode to the low clock mode and the second threshold for shifting from the low clock mode to the high clock mode are set separately, and the second threshold is set to the first threshold. Since it is set higher than this, the switching of the clock mode has a hysteresis.
[0016]
Hysteresis is provided for switching the clock mode, so that the illuminance of the subject changes from high to low, and when the first threshold is exceeded, the mode shifts from the high clock mode to the low clock mode, and then again. Even if the illuminance rises and becomes higher than the first threshold, the low clock mode is maintained until the illuminance exceeds the second threshold which is higher, and the mode does not shift to the high clock mode.
[0017]
Therefore, the threshold for shifting from the high clock mode to the low clock mode is the same as the threshold for shifting from the low clock mode to the high clock mode, and the switching of the clock mode has no hysteresis as in the case where there is no hysteresis. Even if the illuminance is close to the threshold, the clock mode does not change little by little, and the brightness (luminance) of the image does not change little by little according to the switching of the clock mode.
[0018]
According to another embodiment of the present invention, there is provided a second imaging device including a solid-state imaging device, a high-clock mode in which a first frequency clock is operated according to an illuminance of a subject, and a first clock mode. In an image pickup apparatus having a clock mode switching unit that switches between a low clock mode and a low clock mode that operates with a lower second frequency clock, a luminance change mitigation in which a luminance change of an image accompanying a switch of a clock mode is reduced to gradually change the luminance. Means are provided.
[0019]
In the above-described configuration, the luminance change alleviating means reduces the luminance change of the image accompanying the switching of the clock mode and gradually changes the luminance.
[0020]
Therefore, the luminance does not greatly change at the moment when the clock mode is switched. In addition, as described above, the brightness of the image can be reduced even if the illuminance of the subject becomes close to the threshold value and the clock mode is switched in small increments, as described above, by mitigating a sudden change in luminance accompanying the switching of the clock mode. It is possible to suppress a problem that changes little by little.
[0021]
Further, in the second imaging device, the exposure time of the solid-state imaging device and / or the amplification factor of the amplification unit that amplifies the output of the solid-state imaging device are controlled so that the brightness of the image becomes the target brightness. Exposure control means is provided, and the luminance change alleviating means adjusts the exposure time and / or the amplification factor so that the luminance of the image becomes equal before and after the switching of the clock mode. The brightness may be gradually changed by controlling the exposure time and / or the amplification factor by the control means.
[0022]
Normally, in an imaging apparatus, an exposure time for controlling an exposure time of a solid-state imaging device and / or an amplification factor of an amplifying means for amplifying an output of the solid-state imaging device so as to control exposure so that the brightness of an image becomes a target brightness. Control means is provided.
[0023]
In the above configuration, the luminance change reducing unit uses the exposure control unit to adjust the exposure time and / or the amplification factor so that the luminance of the image becomes equal before and after the switching of the clock mode. The brightness is gradually changed by controlling the exposure time and the amplification factor by the exposure control means.
[0024]
This makes it possible to easily configure the brightness change alleviating means using the normally provided exposure control means.
[0025]
In particular, in this case, the second frequency is 1 / N (N is a natural number) of the first frequency, and the brightness change mitigation means performs the above-described exposure at the time of switching from the high clock mode to the low clock mode. It is desirable that the time is set to 1 / N of the longest exposure time, and that the amplification factor is N times or the maximum when switching from the low clock mode to the high clock mode.
[0026]
When increasing the brightness, the exposure control means controls the exposure time to be the longest, then performs control to increase the amplification factor, and when decreasing the brightness, sets the amplification factor to a minimum value. In many cases, the control for shortening the exposure time is performed after the above control.
[0027]
Therefore, in the exposure control means of such a procedure, when switching from the high clock mode to the low clock mode as in the above configuration, the exposure time is set to 1 / N of the longest exposure time, and the low clock mode is set. When the mode is switched to the high clock mode, the amplification factor is set to N times or the maximum, so that the gain is in accordance with the control procedure.
[0028]
Further, by adjusting the second frequency which is the clock frequency in the low clock mode to 1 / N (N is a natural number) of the first frequency which is the clock frequency in the high clock mode, the exposure time or the amplification factor can be adjusted. Thus, the brightness of the image can be easily equalized before and after the switching of the clock mode.
[0029]
According to another embodiment of the present invention, there is provided a third imaging device including a solid-state imaging device, a high-clock mode in which a first frequency clock is operated in accordance with an illuminance of a subject, and a first clock mode. In an imaging apparatus having a clock mode switching means for switching between a low clock mode operating with a lower second frequency clock, a forced low clock mode setting means for forcibly performing the low clock mode by the clock mode switching means is provided. It is characterized by being done.
[0030]
The low clock mode in which each unit functions with a clock having a low frequency has a merit that, even when the illuminance of a subject is low, an image can be brightened and power consumption can be suppressed low.
[0031]
Therefore, in the above configuration, the forced low clock mode setting means is provided so that the low clock mode can be forcibly executed regardless of the illuminance of the subject.
[0032]
Thus, when the charge amount is small, the low clock mode is forcibly set by the forced low clock mode setting means, so that the remaining low power can be effectively used.
[0033]
In addition, the present invention can be rephrased as follows using different expressions. That is, the digital camera device of the present invention has a solid-state imaging device, an exposure time control unit, an amplification unit for an electrical output from the imaging device, and a frame for calculating an average brightness of one screen of the amplification unit output. Brightness calculation means, exposure control means for controlling a captured image to have a target brightness, and a synchronous clock generation means capable of outputting a plurality of clocks, the amount of light incident on the image sensor is large, When the frame luminance is high, a high frequency clock is output to the synchronous clock output generating means, and when the incident light amount is low, and when the frame luminance is low, a low frequency clock is output to the synchronous clock output means. And the threshold of the frame brightness when the low-frequency clock is oscillated by the synchronous clock output means when the amount of incident light gradually decreases from a high state. When the amount of incident light gradually increases, a certain difference is made between the threshold value of the frame luminance when the synchronous clock output means outputs a high frequency, and a hysteresis is provided for switching the synchronous clock, and the low clock The synchronous output frequency at the time can be set to 1 / N (N is a natural number) at the time of the high clock.
[0034]
Further, in addition to the above configuration, further comprising setting means for setting a shooting mode, when the automatic mode is set by the shooting mode setting means, the amount of light incident on the image sensor is large, When the frame luminance is high, a high frequency clock is output to the synchronous clock output generating means, and when the incident light amount is low, and when the frame luminance is low, a low frequency clock is output to the synchronous clock output means. And the incident light quantity gradually decreases from the high state, and the threshold value of the frame luminance when the low frequency clock is oscillated by the synchronous clock output means, and the incident light quantity gradually increases, and the synchronous clock output means Gives a certain difference to the frame luminance threshold when outputting high frequencies, and provides hysteresis for switching the synchronous clock. Myself understood, synchronous output frequency in the low clock 1 divided by N at high clock (N is a natural number) can also be characterized by their ability to set.
[0035]
Further, in addition to the above-mentioned configuration, it is possible to have a forced low clock mode setting means for forcibly causing the synchronous clock generating means to output a low clock.
[0036]
Further, in addition to the above configuration, in switching the synchronous clock, in switching from the high clock to the low clock, the shutter speed is set to 1 / N of the longest exposure time, the automatic control is continued, and the switching from the low clock is performed. When switching to a higher clock, the AGC amplifier gain (amplification factor of the amplifying means) may be set to N times or to the maximum, and a means for continuing automatic control may be provided.
[0037]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described below with reference to FIGS.
[0038]
FIG. 1 is a block diagram of a digital camera device that is an imaging device according to the present embodiment. Here, a C-MOS image sensor 1 is employed as a solid-state imaging device. The incident light passing through the lens 20 is photoelectrically converted by the C-MOS image sensor 1 after the long wavelength component is attenuated by the infrared cut filter 21.
[0039]
Reference numeral 3 denotes a control microcomputer (hereinafter, referred to as a control microcomputer) for controlling the entire camera system of the digital camera device. The control microcomputer 3 controls the electronic shutter control, the AGC amplifier gain control, the white balance automatic adjustment, and the synchronization clock generation unit 10 based on the average luminance value (Y) and the average color signal values (I, Q) of the input video signals. Set synchronous clock, etc.
[0040]
As will be described later in detail, the control microcomputer 3 is a means for switching the clock mode of the present invention, and has a function as an exposure control means and a luminance change reducing means. 23 together with compulsory low clock mode setting means.
[0041]
Further, the control microcomputer 3 has a role of reading various control data from the EE-PROM 19 directly connected to the control microcomputer 3 and setting the control data in each signal processing unit. The set value of the EE-PROM 19 can be rewritten from a host device such as a personal computer or a PDA via the external connector 16, the host interface 15, and the control microcomputer 3, and can be stored in the C-MOS image sensor 1 to be used. It is possible to tune accordingly.
[0042]
Reference numeral 2 denotes an AGC amplifier (amplifying means) for amplifying the photoelectrically converted analog video signal. The gain of the AGC amplifier 2 is controlled by the control microcomputer 3 so that the brightness becomes appropriate on the monitor screen of the host device connected to the external connector 16. Reference numeral 4 denotes an A / D converter for converting an analog video signal amplified by the AGC amplifier 2 into a digital value.
[0043]
Reference numeral 5 denotes an A / D-converted digital signal in the camera signal processing, an OB offset clamp, a luminance signal (Y), a YIQ value accumulator for accumulating color signals I and Q values, a white balance amplifier, and the like. Is a block composed of The OB offset clamp performs black level reproduction. The YIQ value accumulator calculates an integrated value of a luminance signal (Y) used for automatic exposure control, extracts a white component of the screen, and controls the R pixel gain and the B pixel gain such that a white portion on the screen is output as white. I value integration and Q value integration for performing white balance processing are performed. The white balance amplifier multiplies the video signal by the R pixel gain and the B pixel gain calculated by the control microcomputer 3 based on the integrated values of I and Q.
[0044]
Reference numeral 6 denotes a pixel interpolation block. On the C-MOS image sensor 1, a color filter of one color is provided for each pixel, and up to the preceding block 5, a pixel output corresponding to an R (red) color filter and a G (green) color filter are provided. Assuming that the corresponding pixel output and the pixel output corresponding to the B (blue) color filter are [R], [G], and [B], respectively, on a certain horizontal line, [R], [G], [R], [ G], [R], [G], [R], [G],..., And in the next line, [G], [B], [G], [B], [G], As shown in [B], [G], [B],..., The results of photoelectric conversion by light passing through one color filter are sequentially output. The output is interpolated by this interpolation block 6 to supplement two missing colors of RGB from surrounding pixels, and one set of RGB is generated for each pixel.
[0045]
Reference numeral 7 denotes a gradation correction block that corrects the gradation of an image and creates a bright and high-contrast image. In the gradation correction block 7, for example, by giving a correction curve for amplifying a halftone to an input signal, a bright output image as a whole is obtained without changing the maximum value and the minimum value of the pixel value distribution of the image. It is possible to get.
[0046]
Reference numeral 8 denotes a shading correction unit that corrects a decrease in luminance at a corner of a screen caused by a decrease in peripheral light amount of a lens, and a color unevenness in a peripheral part of an image caused by attenuating a red component by an infrared cut filter.
[0047]
Reference numeral 9 denotes an RGB → YUV conversion unit for converting RGB into a luminance component (Y) and a color component (U, V). Thus, the memory controller 14 compresses the color components and stores the image data in the frame memory 17, the C amplifier 11 adjusts only the color depth, and the edge enhancement block 12 Edge emphasis processing can be performed only on the luminance signal in order to enhance the sharpness. The C amplifier 11 and the edge enhancement block 12 are included in an image quality improvement block 18.
[0048]
Reference numeral 10 denotes a synchronous clock generator, which is shown in detail in FIG. Here, the source clock oscillated by the crystal oscillator 10a is supplied to the clock buffer 10e, the 1/2 frequency divider 10b, and the 1/3 frequency divider 10c. Each clock from the clock buffer 10e, the 1/2 frequency divider 10b, and the 1/3 frequency divider 10c is supplied to the timing generator 10d by selecting one of the frequency divider or the clock buffer according to the specification of the control microcomputer 3. Supplied.
[0049]
When the output of the clock buffer 10e is selected, the same frequency as the source clock is supplied to the timing generator 10d. When the 分 frequency divider 10b is selected, the frequency of 源 of the source clock is supplied to the timing generator 10d, and when the ３ frequency divider 10c is selected, The frequency of 1/3 of the clock is supplied to the timing generator 10d. The timing generator 10d generates various clocks used in the digital camera system based on the clocks selectively supplied and supplies the generated clocks to the system.
[0050]
The image reducing unit 13 performs an image size reduction process to obtain an arbitrary image size. For example, when a VGA (640 × 480 pixel) C-MOS image sensor 1 is used and a QVGA (320 × 240 pixel) is to be supplied to a host device (a personal computer, a PDA, or the like), an image reduction unit is required. Reference numeral 13 reduces the image size in both the vertical and horizontal directions based on a command from the control microcomputer 3.
[0051]
The memory controller 14 stores the digital image in the frame memory 17, and outputs the image from the frame memory by an image read command given via the host interface 15 from a host device such as a personal computer or a PDA connected to the external connector 16. An operation such as transfer to the read host interface 15 is performed.
[0052]
Reference numeral 15 denotes a host interface, which transfers image data to the host device in cooperation with the memory controller 14 in response to a request from the host device as described above. It is also used when writing parameters used for signal processing from the host device to the EE-PROM 19 via the control microcomputer 3.
[0053]
Reference numeral 22 denotes a shooting mode setting circuit for setting a shooting mode. The digital camera apparatus has, as shooting modes, an automatic mode in which exposure adjustment and white balance adjustment are all automatically performed, and a manual mode such as fixed shutter, fixed AGC amplifier gain, and fixed white balance.
[0054]
Reference numeral 23 denotes a forced low clock mode setting circuit that enables forced operation in the low clock mode regardless of the illuminance of the subject.
[0055]
Next, an operation procedure of switching the clock mode in the digital camera device will be described with reference to a flowchart of FIG. The clock mode is switched when the automatic mode is set by the above-described shooting mode setting circuit 22 and the forced low clock mode is set by the forced low clock mode setting circuit 23. If not. Therefore, the following description is based on the premise that the automatic mode is set and the forced low clock mode is not set. The subject of the operation is the control microcomputer 3.
[0056]
As shown in graph 1 at the top of FIG. 3, it is assumed that the subject illuminance gradually becomes darker and then gradually becomes brighter.
[0057]
First, a frame luminance Y, which is the luminance of one screen photographed in a state where the electronic shutter control and the AGC amplifier gain control are performed by the automatic control, is calculated (S1). Next, it is determined whether the current mode is the low clock mode (S2). If the current mode is the low clock mode, the process proceeds to S9.
[0058]
If it is determined in S2 that the mode is not the low clock mode, the process proceeds to S3. Here, when the subject illuminance gradually decreases, the control microcomputer 3 controls to gradually open the electronic shutter and increase the exposure amount until the target frame luminance is obtained (S12). If the exposure time by the electronic shutter reaches the longest while adjusting the frame luminance while repeating the steps S1 to S3 and S12, then the AGC amplifier gain is increased and control is performed so that the target frame luminance is obtained (S13). ).
[0059]
When the subject illuminance further decreases and the AGC amplifier gain becomes maximum (S4), it is impossible to obtain the target frame luminance by the electronic shutter control and the AGC amplifier gain control, and the frame luminance Y calculated in S1 is: It gradually decreases like the subject illuminance.
[0060]
Then, in S5, it is determined whether or not the frame luminance Y is equal to or less than a preset threshold value Yth_L (first threshold). Here, if it is determined that Y <Yth_L, the process proceeds to S6, and the mode shifts from the current clock mode, that is, the high clock mode to the low clock mode.
[0061]
In S6, when the mode shifts to the low clock mode, the control microcomputer 3 selects either the 1/2 frequency or the 1/3 frequency, which is the clock in the low clock mode. In the high clock mode, the frequency (first frequency) of the source clock without frequency division is selected. In the low clock mode, which one of 1/2 frequency division and 1/3 frequency division is selected as the low clock frequency (second frequency) is written in the EE-PROM 19, It is read by the control microcomputer 3 at startup. In the following, description will be made assuming that 1/2 frequency division is selected in the low clock mode.
[0062]
When the mode shifts to the low clock mode, 1/2 frequency division is set, so that the clock of the entire system is halved, and the maximum exposure time by the electronic shutter is doubled. As a result, twice the amount of light can be supplied to the C-MOS image sensor 1, and the signal charge due to photoelectric conversion is also doubled, so that the signal-to-noise ratio is improved. Also, shooting in a darker place becomes possible.
[0063]
By the way, when the exposure amount doubles momentarily when the system clock is doubled, if the camera image is monitored in real time by a host device connected via the external connector 16, the exposure may be abrupt. The problem that the image being monitored becomes brighter occurs.
[0064]
Therefore, in the present digital camera device, the shift to the low clock mode is performed in S6, and at the same time as the synchronous clock is switched to 分 frequency division, the exposure time by the electronic shutter is halved, and the frame luminance is switched to the synchronous clock. It does not change extremely before and after (S7). That is, when the clock in the high clock mode is divided by 1 / N (N is a natural number) as the low clock mode, the exposure time by the electronic shutter may be increased by 1 / N at almost the same time as the switching.
[0065]
Under the low illuminance, after the synchronous clock is switched, the electronic shutter control (exposure control) is performed by the automatic control (S8), and the exposure time of the electronic shutter gradually increases, so that the monitor screen is also smoothly brightened. It changes.
[0066]
Then, in the low illuminance shooting, if the incident light amount gradually increases after the low clock mode is switched in S6, the following operation is performed.
[0067]
First, the AGC amplifier gain is adjusted by automatic control so as to obtain a target frame luminance. When the incident light amount increases to some extent, the AGC amplifier gain becomes the minimum value, that is, 0 dB (in the flowchart of FIG. Automatic control steps are not shown).
[0068]
In such a state, in S2, it is determined that the low clock mode is set, and the process proceeds to S9, where it is determined that the amount of incident light has increased and the frame luminance Y has exceeded the threshold Yth_H (second threshold). Then, assuming that the amount of incident light is sufficient, the mode shifts from the low clock mode to the high clock mode in S10.
[0069]
At this time, since the frequency is changed from 1/2 frequency division to no frequency division and the frequency of the synchronous clock is doubled, the exposure time by the electronic shutter is halved and the amount of light incident on the C-MOS image sensor 1 is reduced to 1/2. Become. Therefore, as described above, when a camera image is monitored in real time by a host device connected via the external connector 16, a problem occurs in which the image being monitored suddenly becomes dark.
Therefore, here, in S11, almost simultaneously with switching from the low clock mode to the high clock mode in S10, if the AGC amplifier gain is 2 (N) times or the maximum gain is less than 2 (N) times, Is set to the maximum value to suppress sudden changes in brightness on the monitor screen.
[0070]
In order to adjust the brightness, it is possible to increase the exposure time by the electronic shutter to 2 (N) times in S11. However, under low-illuminance shooting, the shutter speed is set to the maximum exposure. After the adjustment, the AGC amplifier gain is increased. Therefore, when the illuminance of photography is increased, the AGC amplifier gain is decreased, and the AGC amplifier gain becomes the minimum 0 dB. Now, the procedure is to control the electronic shutter.
[0071]
In other words, even at the point of switching from the low clock mode to the high clock mode, the incident light amount gradually increases from the low illuminance state, so that the AGC amplifier gain is set to the maximum value and the minimum value of 0 dB by automatic control. And there is a period in which the electronic shutter is fully opened and the maximum exposure time is reached.
[0072]
Therefore, in S11, the AGC amplifier gain is operated to suppress a change in the brightness of the monitor screen. Thereafter, the AGC amplifier gain and the shutter speed (shutter exposure time) are automatically adjusted by automatic control so that the target frame luminance is obtained (S8).
[0073]
The relationship between the threshold value Yth_L for shifting from the high clock mode to the low clock mode and the threshold value Yth_H for shifting from the low clock mode to the high clock mode used in S5 and S9, where Yth_H is more than YthL. It is set to a large value.
[0074]
Accordingly, the switching of the clock mode has hysteresis, and the switching of the clock mode has hysteresis. As a result, when the illuminance of the subject changes from high to low and exceeds the threshold Yth_L, the high clock mode is set. To the low clock mode, and thereafter, even if the illuminance rises again and becomes higher than the threshold Yth_L, the low clock mode is maintained until the illuminance exceeds the larger threshold Yth_H, and the mode does not shift to the high clock mode. .
[0075]
Therefore, even when the illuminance of the subject is close to the threshold value, as in the case where there is no hysteresis in the clock mode switching, the clock mode does not switch little by little, and the monitor screen changes according to the clock mode switching. The brightness (luminance) does not change little by little.
[0076]
Next, with reference to FIG. 3, a description will be given of how the brightness of the monitor screen photographed by the present digital camera device changes when the subject illuminance gradually decreases and then increases again.
[0077]
Graph 1 shown in the upper part of FIG. 3 is a change in the illuminance of the subject, and shows that the illuminance of the subject gradually decreases and then increases again. Graph 3 shown in the lower part of FIG. 3 is a monitor output of the present digital camera device that suppresses a change in luminance due to switching of the synchronous clock when the clock mode is switched.
[0078]
Graph 2 shown in the center of FIG. 3 illustrates processing for suppressing a change in luminance due to switching of the synchronous clock when the clock mode is switched, that is, the processing of S7 and S11 in the flowchart of FIG. This is a monitor output of a digital camera device according to another embodiment of the present invention, which is different from the present digital camera device only in that it is not performed, and is otherwise the same in configuration. Hereinafter, the former digital camera device that performs the process of suppressing the luminance change is referred to as a first digital camera device, and the latter digital camera device that does not perform the process of suppressing the luminance change is referred to as a second digital camera device.
[0079]
In FIG. 3, during the time periods a and b, the illuminance of the subject is sufficiently high, the control microcomputer 3 automatically controls the shutter speed and the AGC amplifier gain, and the target frame luminance is obtained. Times b to c indicate a state where the subject illuminance is reduced and the target frame luminance cannot be obtained even with the longest exposure time based on the shutter speed and the maximum AGC amplifier gain.
[0080]
At time c, the frame luminance Y becomes equal to or less than the threshold Yth_L, and the mode switches to the low clock mode. At this time, in the second digital camera device shown in Graph 2, the system clock is halved and the exposure time is doubled, so that the frame luminance is doubled stepwise.
[0081]
On the other hand, in the first digital camera device, as shown in the graph 3, almost at the same time as the switching of the low clock mode, the exposure time by the shutter speed is halved, and the rapid change in the frame luminance is suppressed. , The shutter is gradually opened so as to approach the target luminance, and the frame luminance increases.
[0082]
Then, after that, when the subject illuminance starts to increase and the frame luminance exceeds the threshold Yth_H of the frame luminance at which the low clock mode is switched to the high clock mode at time d, the control microcomputer 3 returns the system clock to no frequency division. .
In the second digital camera device shown in graph 2, the frame switching is doubled by the clock switching, but in the first digital camera device shown in graph 3, the AGC amplifier gain is doubled almost simultaneously with the clock switching. Or less than twice, the maximum is set, so that a sudden change in frame luminance is suppressed.
[0083]
Here, the first digital camera device having the function of relaxing the change of the frame luminance immediately after the clock mode switching and gradually changing the frame luminance by the exposure control of the automatic control has the function. It has been described that the second digital camera device is superior in terms of luminance change compared to the second digital camera device. However, the second digital camera device also has a hysteresis for switching the clock mode, so that the illuminance of the subject is close to the threshold value. In this case, it is possible to prevent the brightness of the monitor screen from changing little by little.
[0084]
In addition, the first digital camera device has a configuration in which both a configuration in which the clock mode switching has hysteresis and a configuration in which the luminance change immediately after the clock mode switching is suppressed are provided. A digital camera device having only a configuration for suppressing a change in luminance immediately after switching may be used, and this is referred to as a third digital camera device.
[0085]
That is, in the third digital camera device, the threshold value Yth_L for shifting from the high clock mode to the low clock mode is the same as the threshold value Yth_H for shifting from the low clock mode to the high clock mode, and the switching of the clock mode is performed. The first digital camera device differs from the first digital camera device only in that it has no hysteresis, and all other components have the same configuration.
[0086]
In such a third digital camera device, the luminance is gradually changed by alleviating the luminance change of the image accompanying the switching of the clock mode. Therefore, the luminance becomes large at the moment when the clock mode is switched. It does not change. Therefore, as described above, even if the illuminance of the subject becomes close to the threshold value and the clock mode is switched in small increments, it is possible to suppress the problem that the brightness of the image is changed in small increments.
[0087]
Finally, the above-described forced low clock mode will be described. In this mode, since the operation is forcibly performed at a low clock, low power consumption driving is possible.
[0088]
The forced low clock mode is set by the forced low clock mode setting circuit 23 shown in FIG. When the forced low clock mode is set, the selection of the frequency divider or the clock buffer in the synchronous clock generation unit 10 by the control microcomputer 3 is changed to the frequency divider in the low clock mode, here, the 1/2 frequency divider. Fixed. As a result, regardless of the illuminance of the subject, the system is forcibly operated at the low clock, and the system is forced to divide the ク ロ ッ ク frequency clock until the forced low clock mode is canceled using the forced low clock mode setting circuit 23. Is supplied.
[0089]
The low clock mode in which each unit functions with a clock having a low frequency has an advantage that power consumption can be reduced. Therefore, when the amount of charge is small, by setting the forced low clock mode, the remaining low power can be used effectively.
[0090]
Note that such a configuration in which the low clock mode is forcibly implemented includes a configuration in which hysteresis is provided in the switching of the clock mode and / or a configuration in which the luminance change in the switching of the clock mode is gradually changed by relaxing the change. It is not always necessary to combine them, and for example, they may be combined with the configuration of the above-mentioned prior art publication.
[0091]
Further, here, the configuration in which the automatic mode and the manual mode can be selected as the photographing mode has been described as an example, but it is needless to say that the configuration may be such that the manual mode cannot be set.
[0092]
【The invention's effect】
As described above, the first imaging device of the present invention includes the solid-state imaging device, and operates in accordance with the illuminance of the subject with the high clock mode operating with the clock of the first frequency, and the second frequency lower than the first frequency. A first threshold for shifting from the high clock mode to the low clock mode in the clock mode switching means in the imaging device having the clock mode switching means for switching between the low clock mode and the low clock mode operated by the clock And a second threshold value to be shifted is set separately, and the second threshold value is larger than the first threshold value.
[0093]
In the above configuration, since the clock mode switching has a hysteresis, even if the illuminance of the subject is near the threshold value, the clock mode does not switch little by little, and the clock mode switching does not occur. This has the effect that the brightness (luminance) of the image does not change little by little.
[0094]
Further, as described above, the second imaging device of the present invention includes the solid-state imaging device, and operates in accordance with the illuminance of the subject with the high clock mode operating with the clock of the first frequency. In an imaging apparatus having a clock mode switching unit for switching between a low clock mode and a clock mode operating with two frequency clocks, a luminance change alleviating unit is provided for alleviating a luminance change of an image associated with switching between clock modes and gradually changing luminance. It is characterized by having.
[0095]
In the above-described configuration, the luminance change reducing unit reduces the luminance change of the image accompanying the switching of the clock mode and gradually changes the luminance, so that the luminance is increased at the moment when the clock mode is switched. It does not change. Therefore, by mitigating a sudden change in luminance due to the switching of the clock mode, as described above, even if the illuminance of the subject becomes close to the threshold and the clock mode is switched in small increments, the brightness of the image is reduced. This has the effect that the inconvenience that changes little by little can be suppressed.
[0096]
Further, in the second imaging device, the exposure time of the solid-state imaging device and / or the amplification factor of the amplification unit that amplifies the output of the solid-state imaging device are controlled so that the brightness of the image becomes the target brightness. Exposure control means is provided, and the luminance change alleviating means adjusts the exposure time and / or the amplification factor so that the luminance of the image becomes equal before and after the switching of the clock mode. The brightness may be gradually changed by controlling the exposure time and / or the amplification factor by the control means.
[0097]
Normally, in an imaging apparatus, an exposure time for controlling an exposure time of a solid-state imaging device and / or an amplification factor of an amplifying means for amplifying an output of the solid-state imaging device so as to control exposure so that an image has a target brightness is obtained. Since the control means is provided, this also has an effect that the luminance change alleviating means can be easily configured using the normally provided exposure control means.
[0098]
In particular, in this case, the second frequency is 1 / N (N is a natural number) of the first frequency, and the brightness change mitigation means performs the above-described exposure at the time of switching from the high clock mode to the low clock mode. It is desirable that the time is set to 1 / N of the longest exposure time, and that the amplification factor is N times or the maximum when switching from the low clock mode to the high clock mode.
[0099]
Thereby, when increasing the luminance, after controlling the exposure time to be the longest, control to increase the amplification rate was performed, and when decreasing the luminance, the amplification rate was controlled to be the minimum value. Thereafter, the control is performed in accordance with a conventional control procedure of exposure control, such as performing control for shortening the exposure time.
[0100]
Further, by adjusting the second frequency which is the clock frequency in the low clock mode to 1 / N (N is a natural number) of the first frequency which is the clock frequency in the high clock mode, the exposure time or the amplification factor can be adjusted. In addition, the brightness of the image can be easily equalized before and after the switching of the clock mode.
[0101]
Further, as described above, the third imaging device of the present invention includes the solid-state imaging device, and operates in accordance with the illuminance of the subject with the high clock mode operating with the clock of the first frequency. In an image pickup apparatus having a clock mode switching means for switching between a low clock mode operating with two frequency clocks, a forced low clock mode setting means for forcibly performing the low clock mode by the clock mode switching means is provided. It is characterized by.
[0102]
The low-clock mode in which each unit functions with a low-frequency clock has an advantage that power consumption can be suppressed low. Therefore, when the charge amount is small, the low-clock mode setting means uses the low-clock mode setting means. By forcibly setting the clock mode, there is an effect that the remaining power can be effectively used.
[Brief description of the drawings]
FIG. 1 illustrates an embodiment of the present invention, and is a system block diagram of a digital camera device using a C-MOS image sensor as a solid-state imaging device.
FIG. 2 is a block diagram showing a configuration of a synchronous clock generation circuit provided in the digital camera device.
FIG. 3 is an explanatory diagram showing a change in frame luminance in the digital camera device and a digital camera device according to another embodiment of the present invention, which are caused by a change in subject illuminance.
FIG. 4 is a flowchart showing an operation procedure for switching a clock mode in the digital camera device.
[Explanation of symbols]
1 C-MOS image sensor (solid-state imaging device)
2 AGC amplifier (amplification means)
3. Control microcomputer (clock mode switching means, luminance change mitigation means, exposure control means, forced clock mode setting means)
23 Forced low clock mode setting circuit (forced clock mode setting means)

Claims (5)

Clock mode switching means including a solid-state imaging device and switching between a high clock mode operating with a clock of a first frequency and a low clock mode operating with a clock of a second frequency lower than the first frequency according to the illuminance of a subject In the imaging device having
In the clock mode switching means, a first threshold for shifting from the high clock mode to the low clock mode and a second threshold for shifting from the low clock mode to the high clock mode are separately set, and the second threshold is set to the first threshold. An imaging device characterized by being larger than a threshold value. Clock mode switching means including a solid-state imaging device and switching between a high clock mode operating with a clock of a first frequency and a low clock mode operating with a clock of a second frequency lower than the first frequency according to the illuminance of a subject In the imaging device having
An image pickup apparatus, comprising: a luminance change alleviating unit configured to alleviate a luminance change of an image due to switching of a clock mode and gradually change luminance. Exposure control means for controlling the exposure time of the solid-state imaging device and / or the amplification factor of the amplification means for amplifying the output of the solid-state imaging device is provided so that the brightness of the image becomes the target brightness.
The brightness change reducing unit adjusts the exposure time and / or the amplification factor so that the brightness of the image becomes equal before and after the switching of the clock mode. The imaging apparatus according to claim 2, wherein the brightness is gradually changed by controlling the amplification factor. The second frequency is 1 / N of the first frequency (N is a natural number),
The brightness change mitigation means sets the exposure time to 1 / N of the longest exposure time when switching from the high clock mode to the low clock mode, and sets the amplification time when switching from the low clock mode to the high clock mode. The imaging apparatus according to claim 3, wherein the rate is set to be N times or the maximum. Clock mode switching means including a solid-state imaging device and switching between a high clock mode operating with a clock of a first frequency and a low clock mode operating with a clock of a second frequency lower than the first frequency according to the illuminance of a subject In the imaging device having
An image pickup apparatus comprising a forced low clock mode setting means for forcibly performing a low clock mode by the clock mode switching means.

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