JP2004119423A - Gallium nitride crystal substrate, its producing process, gallium nitride based semiconductor device, and light emitting diode - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for producing a large area gallium nitride crystal substrate having a low crystal defect density by utilizing silicon single crystal having a low dislocation density, excellent crystal quality and a large diameter as a substrate, depositing a gallium nitride seed crystal layer on the surface thereof and then forming a gallium nitride crystal layer thereon. <P>SOLUTION: An amorphous layer containing boron and phosphorus is formed on the surface of a silicon single crystal substrate, a boron phosphide crystal layer is formed on the amorphous layer, a gallium nitride seed crystal layer is grown epitaxially in vapor phase on the boron phosphide crystal layer at a temperature of 750-1200°C, and then a gallium nitride crystal layer is grown epitaxially in vapor phase on the gallium nitride seed crystal layer. Subsequently, the silicon single crystal substrate, the amorphous layer, and the boron phosphide crystal layer are removed thus producing a gallium nitride crystal substrate. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a gallium nitride crystal substrate formed of a gallium nitride crystal layer formed on a surface of a silicon (Si) single crystal substrate, and more particularly to a nitride formed on a surface of a silicon single crystal substrate via a boron phosphide crystal layer. The present invention relates to a gallium nitride crystal substrate composed of a gallium crystal layer, a method of manufacturing the same, and a gallium nitride-based semiconductor device manufactured using the same.
[0002]
[Prior art]
A crystal layer made of a Group III nitride semiconductor such as gallium nitride (GaN), gallium indium nitride (GaInN), or gallium aluminum nitride (GaAlN) emits short-wavelength light in the near ultraviolet, blue, or green band. It is used as a functional layer constituting a light emitting diode (LED) or a laser diode (LD). Alternatively, it is used for forming a high-frequency electronic device such as a Schottky junction field effect transistor (MESFET) or a hetero bipolar transistor (HBT).
[0003]
Conventionally, a group III nitride semiconductor crystal layer forming a laminated structure constituting a gallium nitride-based semiconductor device has been made entirely of sapphire (α-Al₂O₃A single crystal) or a silicon carbide (SiC) single crystal as a substrate, and a vapor phase such as a metal organic chemical vapor deposition (MOCVD) method, a hydride vapor phase epitaxy (VPE) method or a molecular beam epitaxial (MBE) method. It is formed by means of growth. However, for example, the degree of lattice mismatch between sapphire and gallium nitride is as large as about 14%. For this reason, a gallium nitride crystal layer grown on a sapphire substrate in a vapor phase is 1 × 10¹⁰cm^-2Alternatively, a crystal layer having a higher density and inferior crystal quality including dislocations is obtained.
[0004]
For this reason, recently, a gallium nitride crystal layer has been formed using a crystal material having excellent lattice matching with gallium nitride, for example, a gallium nitride single crystal as a substrate. As a technique for obtaining a gallium nitride single crystal having a thickness of several tens to several hundreds of μm that can be used as a substrate, for example, gallium (Ga) and ammonia (Ga) are used under a high-pressure environment of about 10 gigapascal (unit: GPa). NH₃) Is synthesized to synthesize gallium nitride (for example, see Non-Patent Document 1).
[0005]
A gallium nitride crystal layer grown by vapor phase growth on the surface of a sapphire substrate was used as an underlayer, and a thick gallium nitride film of about several tens of μm was grown thereon by hydride vapor phase epitaxy (hydride @VPE). Then, a technical means of removing the sapphire substrate and using the remaining gallium nitride crystal layer as a substrate is also disclosed (for example, see Non-Patent Document 2).
[0006]
[Non-Patent Document 1] Sylvester Porowski, "Journal of Crystal Growth", Netherlands, 1998, vol. 189/190, p. 153-158
[Non-Patent Document 2] JA Freitas, JR (J.A. Freitas, JR), 7 others, "Physica @ status @ solidi (a)", Germany, 2001, No. 188, No. 1, p. 457-461
[0007]
[Problems to be solved by the invention]
However, the conventional technology for obtaining a gallium nitride single crystal substrate, for example, the size of a gallium nitride single crystal obtained by the above-mentioned high-pressure synthesis method is a small particle of several millimeters (mm) to several centimeters (cm) at present. It is. Therefore, for example, it cannot contribute to inexpensive mass production of LEDs. A gallium nitride single crystal substrate obtained by a conventional hydride VPE method using a gallium nitride crystal layer grown on the surface of a sapphire substrate as a base layer is grown using sapphire having a large lattice mismatch as a base. Therefore, a large amount of crystal defects such as misfit dislocations are included, and improvement in crystal quality is desired.
[0008]
The present invention has been made to overcome these drawbacks of the prior art, and uses a large-diameter silicon (Si) single crystal as a substrate having a low dislocation density and excellent crystal quality as a substrate, and forming on a surface thereof. An object of the present invention is to provide a method for producing a gallium nitride crystal substrate having a small crystal defect density and a large area by forming a gallium nitride crystal layer thereon based on the filmed gallium nitride seed crystal layer.
[0009]
[Means for Solving the Problems]
That is, the present invention
(1) An amorphous layer containing boron (B) and phosphorus (P) is formed on the surface of a silicon (Si) single crystal substrate, and then a boron phosphide (BP) crystal layer is formed on the amorphous layer. Forming a gallium nitride (GaN) seed crystal layer on the boron phosphide crystal layer at a temperature of 750 ° C. or more and 1200 ° C. or less, and then growing gallium nitride on the gallium nitride seed crystal layer. A method for manufacturing a gallium nitride crystal substrate, comprising: growing a crystal layer in a vapor phase, and thereafter removing the silicon single crystal substrate, the amorphous layer, and the boron phosphide crystal layer to manufacture a gallium nitride crystal substrate. .
(2) The amorphous layer, the boron phosphide crystal layer, and the gallium nitride seed crystal layer are formed by metal organic chemical vapor deposition (MOCVD), and the gallium nitride crystal layer is formed in a hydride vapor phase. The method for manufacturing a gallium nitride crystal substrate according to the above (1), wherein the gallium nitride crystal substrate is formed by a growth method.
(3) The gallium nitride according to (1) or (2), wherein the amorphous layer containing boron (B) and phosphorus (P) is formed at a temperature of 250 ° C. or more and 1200 ° C. or less. A method for manufacturing a crystal substrate.
(4) The gallium nitride crystal substrate according to any one of (1) to (3), wherein the boron phosphide (BP) crystal layer is formed at a temperature of 750 ° C. or more and 1200 ° C. or less. Production method.
(5) The method for producing a gallium nitride crystal substrate according to any one of the above (1) to (4), wherein the surface of the silicon single crystal substrate is a {111} crystal plane.
(6) The silicon single crystal substrate according to any one of (1) to (5), wherein a groove is provided on a back surface opposite to a surface on which the gallium nitride crystal layer is provided. A method for manufacturing a gallium nitride crystal substrate.
(7) The method for manufacturing a gallium nitride crystal substrate according to the above (6), wherein the depth of the groove is in a range of 1/2 to 1/3 of the thickness of the silicon single crystal substrate.
(8) The method for manufacturing a gallium nitride crystal substrate according to any one of (1) to (7), wherein the thickness of the amorphous layer is 1 nm or more and 50 nm or less. It is.
[0010]
Also, the present invention
(9) A gallium nitride crystal substrate manufactured by the method according to any one of (1) to (8).
(10) A gallium nitride-based semiconductor device comprising the gallium nitride crystal substrate according to (9).
(11) The gallium nitride based semiconductor device according to (10), wherein an ohmic electrode is formed on a surface of the gallium nitride crystal substrate.
It is.
[0011]
Also, the present invention
(12) A functional layer including a light emitting layer made of a group III nitride semiconductor is formed on the gallium nitride crystal substrate manufactured by the method according to any one of the above (1) to (8). A light-emitting diode, wherein ohmic electrodes are formed on the surface of the layer and the back surface of the gallium nitride crystal substrate, respectively.
It is.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present invention, a thick gallium nitride crystal layer for use as a gallium nitride crystal substrate is grown on a silicon single crystal substrate. In particular, it is desirable to grow on a silicon single crystal substrate having a crystal plane of a low Miller index such as {100}, {110} or {111} as a surface. Alternatively, it can be grown on a silicon single crystal plane having a so-called off-cut crystal plane inclined at an angle of several degrees to several tens of degrees from those crystal planes. Since it is a single crystal of the diamond structure type, a silicon single crystal substrate having a {111} crystal face on which silicon atoms are most densely packed can be particularly preferably used. Prevents the elements constituting the layer (upper layer) provided on the silicon single crystal surface from penetrating and diffusing from the silicon single crystal surface into the inside, thereby preventing the regular crystal structure of the silicon single crystal from being disordered. This is because the effect can be improved. Further, it is advantageous in forming a flat bonding interface with the upper layer. In addition, a silicon single crystal substrate having a low dislocation density is effective for reducing dislocations penetrating and propagating to an upper layer. In particular, a dislocation density of 10²cm^-2Below, further 10cm^-2The silicon single crystal substrate having a low dislocation density described below is effective in obtaining an upper layer having a low density of threading dislocations.
[0013]
An undoped or impurity-doped silicon single crystal can be used as the substrate. A high-resistance substrate or a conductive substrate exhibiting n-type or p-type conductivity can be used as a silicon single crystal substrate. It is suitable that the thickness of the silicon single crystal substrate is about several hundred μm. The thickness of the silicon single crystal substrate can be appropriately selected according to the desired thickness of the gallium nitride crystal layer. However, in order to suppress the “warpage” of the silicon single crystal substrate due to the difference in the coefficient of thermal expansion from the upper layer during film formation of the upper layer, a silicon single crystal substrate having a diameter of 50 mm generally has a thickness of about 250 μm to 400 μm. Preferably, the thickness is set. For a silicon single crystal substrate having a diameter of 100 mm, the thickness is preferably about 400 μm to about 700 μm.
[0014]
In order to suppress "warping" of the silicon single crystal substrate, it is effective to provide a groove on the back surface of the substrate opposite to the surface on which the gallium nitride crystal layer is provided. For example, grooves are arranged on the back surface of a silicon single crystal substrate ({111} -silicon single crystal substrate) having a {111} crystal plane as a front surface, in parallel with the <110> crystal orientation, which is the cleavage direction of the silicon single crystal. Is effective. The groove can be formed by, for example, a general die method or a selective etching method using a mixed acid containing hydrofluoric acid. The depth of the groove is desirably in the range of 1/2 to 1/3 of the thickness of the silicon single crystal substrate. For example, the depth of a groove provided in a silicon single crystal substrate having a diameter of 2 inches (inch) and a thickness of 360 μm is suitably 120 μm to 180 μm. By forming a groove and providing a discontinuous portion in the silicon single crystal, thermal strain due to a difference in coefficient of thermal expansion is absorbed, so that a crack occurs in a thick gallium nitride crystal layer or the like. And a gallium nitride crystal layer with a low dislocation density can be obtained.
[0015]
In the present invention, the gallium nitride crystal layer is not directly bonded and grown on the silicon single crystal substrate. In growing a gallium nitride crystal layer on the surface of a silicon single crystal, in the present invention, an amorphous layer containing boron and phosphorus and a boron phosphide crystal layer are provided between the silicon single crystal and the gallium nitride crystal layer. The amorphous layer containing boron and phosphorus can be made of a boron phosphide-based material containing boron and phosphorus as constituent elements. Examples of boron phosphide-based materials include B_αAl_βGa_γIn_{1- α − β − γ}P_{1- δ}As_δ(0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1), B_αAl_βGa_γIn_{1- α − β − γ}P_{1- δ}N_δ(0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1) and the like. More specifically, monomeric boron phosphide (BP), boron phosphide / gallium (B_αGa_γP: 0 <α ≦ 1, 0 ≦ γ <1) or boron nitride phosphide (BP_{1- δ}N_δ: 0 ≦ δ <1), boron arsenide (B_αAs_{1- δ}N_δ)) And mixed crystals containing a plurality of group V elements.
[0016]
The amorphous layer made of a boron phosphide-based material is, for example, boron trichloride (BCl₃) And phosphorus trichloride (PCl₃) Can be vapor phase grown by a halogen method using a starting material. Borane (BH)₃) Or diborane (B₂H₆) And phosphine (PH₃) And the like as a raw material, and vapor phase growth can be performed by a molecular beam epitaxial method. In addition, vapor-phase growth can be performed by metal organic chemical vapor deposition (MOCVD) using an organic boron compound and a hydrogen compound of phosphorus as raw materials. In particular, the MOCVD method uses triethyl boron ((C₂H₅)₃Since a readily decomposable substance such as B) is used as a boron source, it is an advantageous growth means for vapor-phase growing an amorphous layer at a low temperature.
[0017]
In order not to form a silicon oxide film or a silicon nitride film that hinders the growth of the amorphous layer on the surface of the silicon single crystal substrate, the amorphous layer is grown in an atmosphere that does not contain a large amount of oxygen or nitrogen. For example, hydrogen (H₂It is preferable to grow in an atmosphere or a mixed atmosphere of hydrogen and a monoatomic inert gas such as argon (Ar). The amorphous layer is made of, for example, triethyl boron ((C₂H₅)₃B) / phosphine (PH₃) / Hydrogen (H₂The reaction system is grown at a normal temperature (substantially atmospheric pressure) or a low pressure MOCVD method with the temperature of the silicon single crystal substrate set at 250 ° C. or more and 1200 ° C. or less. At a high temperature exceeding 750 ° C., a polycrystalline layer containing boron and phosphorus tends to be easily formed. However, in such a high temperature region growth, the supply amount of the phosphorus source to the boron source, that is, the so-called V / III ratio is reduced. When it is lowered, an amorphous layer can be formed. For example, in the MOCVD method using the above reaction system, the V / III ratio (= PH₃/ (C₂H₅)₃If the (B supply concentration ratio) is a low ratio of 0.2 to 50, the amorphous layer can be formed stably even in the high temperature region described above. The thickness of the amorphous layer is preferably 1 nm or more and 50 nm or less, which is sufficient to cover the surface of the silicon single crystal sufficiently uniformly. Further, the layer thickness is preferably 5 nm to 20 nm. The thickness of the amorphous layer is controlled by adjusting the supply time of the boron source to the growth region. The thickness of the amorphous layer can be measured, for example, by a cross-sectional TEM technique using a transmission electron microscope (TEM). Further, an electron beam diffraction image from the amorphous layer using a TEM has a halo pattern.
[0018]
On the amorphous layer containing boron and phosphorus, a monomeric boron phosphide crystal layer is deposited. It is convenient to grow the boron phosphide crystal layer by the same growth method as in the case of the amorphous layer. The growth temperature is B_ThirteenP₂1200 ° C. or lower, which can suppress the generation of multimeric boron phosphide crystals such as Further, in order to obtain a single crystal boron phosphide crystal layer, it is appropriate to grow the silicon single crystal at a temperature of 750 ° C. or higher. Meanwhile, the lattice constant of a silicon single crystal is 0.543 nm, and the lattice constant of a cubic zinc blende-type boron phosphide single crystal is 0.454 nm. Therefore, the degree of lattice mismatch between silicon and boron phosphide is as large as about 16.5%. Here, the above-mentioned amorphous layer has an effect of relaxing this large lattice mismatch and providing a high-quality boron phosphide crystal layer having a low density of crystal defects such as misfit dislocations. Although each of the amorphous layer and the boron phosphide crystal layer can be formed by different growth means, the same growth equipment as that used to form the amorphous layer is used, and subsequent to the growth of the amorphous layer, the same layer is formed. The means for growing the boron phosphide crystal layer by the growth means is most effective for easily obtaining the boron phosphide crystal layer.
[0019]
The layer thickness of the boron phosphide crystal layer is several tens nm to several thousand nm. Generally, less than 3000 nm is preferred. The growth may be performed while adding an impurity imparting conductivity (doping). Examples of the impurity capable of imparting n-type conductivity include silicon (Si), which is a Group IV element of the periodic table, and sulfur (S) and selenium (Se) of Group VI. The p-type impurities include beryllium (Be) of Group II. Further, the boron phosphide crystal layer may be an undoped layer. An undoped p-type boron phosphide crystal layer can be obtained depending on the growth temperature without intentionally adding impurities. At growth temperatures below about 1000 ° C., an undoped boron phosphide crystal layer exhibiting n-type conduction is obtained. If these undoped boron phosphide crystal layers are used as the underlayer, the effect of suppressing the diffusion and penetration of impurities into the upper gallium nitride crystal layer can be enhanced. The concentration of impurities in the gallium nitride crystal layer can be quantified by an analysis means such as secondary ion mass spectrometry (SIMS).
[0020]
A gallium nitride seed crystal layer is grown on the boron phosphide crystal layer. The gallium nitride seed crystal layer is a layer serving as a seed crystal for promoting the growth of a thick gallium nitride crystal layer thereon. As a method for growing the gallium nitride seed crystal layer, for example, there is a vapor phase growth method such as a sublimation method, a hydride method or an MOCVD method. In particular, the MOCVD method is advantageous for growing a gallium nitride seed crystal layer having a relatively small thickness of about several nm to several hundred nm. Since the growth rate of the MOCVD method is generally lower than that of the hydride method, for example, the MOCVD method is suitable for forming a dense seed crystal layer having few voids or the like. The spacing between the {110} crystal planes of the boron phosphide single crystal is about 0.320 nm, which substantially matches the a-axis lattice constant of the hexagonal wurtzite crystal type gallium nitride single crystal. Therefore, if the MOCVD method is used, the {100} crystal plane, the {110} crystal plane, or the {111} crystal plane of the boron phosphide crystal layer where the {110} crystal plane intersects the surface. In particular, a dense {0001} -gallium nitride seed crystal layer can be efficiently deposited. The growth of the gallium nitride seed crystal layer by the MOCVD method is preferably performed at a temperature of 750 ° C. or more and 1200 ° C. or less in order to stably obtain a single crystal gallium nitride crystal layer with uniform orientation.
[0021]
A gallium nitride crystal layer is deposited on the gallium nitride seed crystal layer. A gallium nitride crystal layer without cracks can be obtained by employing a structure in which a gallium nitride crystal layer is provided by homo-joining the seed crystal layer. Further, a gallium nitride crystal layer having a low dislocation density can be obtained. In order to grow a thick gallium nitride crystal layer, a hydride vapor phase epitaxy method capable of securing a large growth rate of several μm to several tens of μm per hour can be suitably used. In growing a gallium nitride crystal layer by hydride vapor phase epitaxy, ammonia (NH) is used as a nitrogen source.₃) And dimethylhydrazine ((CH₃)₂N₂H₂) Can be used. Ammonia (NH₃In the hydride method using (1) as a nitrogen source, the temperature suitable for vapor-phase growth of the gallium nitride crystal layer is in the range of about 950 ° C. to about 1150 ° C. For growing the gallium nitride crystal layer at a lower temperature of about 800 ° C. to about 1000 ° C., it is suitable to use dimethylhydrazine having an asymmetric molecular structure which is easily decomposed by thermal decomposition as a nitrogen source. In order to obtain a cubic (cubic) gallium nitride crystal layer, a relatively low temperature vapor phase growth method using a nitrogen-containing compound such as dimethylhydrazine, which is easily decomposable, is suitable.
[0022]
The thickness of the gallium nitride crystal layer provided in contact with the gallium nitride seed crystal layer is determined by the difference in the coefficient of thermal expansion between the silicon single crystal substrate and the gallium nitride crystal layer. Less than the layer thickness that does not cause the generation of For example, the thickness of the gallium nitride crystal layer is desirably about 80 μm or more and about 450 μm or less in a silicon single crystal substrate having a diameter of 50 mm. In the case of a gallium nitride crystal layer on a boron phosphide crystal layer on a silicon single crystal substrate having a diameter of 100 mm, the thickness is desirably about 300 μm or more and about 700 μm or less. The thickness of the gallium nitride crystal layer can be adjusted by controlling the growth time in vapor phase growth by the hydride VPE method. In order to obtain a gallium nitride crystal layer having a desired conductivity or resistivity, an impurity imparting conductivity is doped at the time of growth. For example, an adjusted amount of silicon (Si) is added to grow an n-type conductive gallium nitride crystal layer. The carrier concentration and resistivity of the gallium nitride crystal layer can be measured by a general Hall (Hall) effect measuring method, an electrolytic CV (capacitance-voltage) method, or the like.
[0023]
After growing the gallium nitride crystal layer, the silicon single crystal substrate is removed, for example, by wet etching. To remove the silicon single crystal by etching, hydrofluoric acid (HF) and nitric acid (HNO)₃)) Can be suitably used. Hydrofluoric acid (HF)-nitric acid (HNO₃) The approximate etching rate of a silicon single crystal depending on the mixture is known from known examples. Further, it is removed by dry etching means or the like. For example, boron trichloride (BCl₃) Can be removed by plasma etching using halides. Alternatively, it can be removed by grinding by mechanical polishing using high-hardness abrasive grains made of diamond, silicon carbide (SiC), boron nitride (BN) or oxide. An amorphous layer or a boron phosphide crystal layer deposited as an upper layer may be removed together with the silicon single crystal of the substrate. Since the amorphous and boron phosphide crystal layers containing boron and phosphorus have high chemical stability, it is more convenient to remove them using plasma etching means or grinding means than wet etching means using chemicals. It is.
[0024]
When the gallium nitride crystal layer manufactured according to the present invention is used as a substrate, a compound semiconductor element having excellent electrical characteristics can be formed. For example, an ohmic electrode of one polarity is provided on the back surface of a conductive substrate made of a gallium nitride crystal layer, and the ohmic electrode of the other polarity is provided on the surface of the laminated structure having the light emitting portion on the surface. Are arranged to form an LED or an LD. Further, using a high-resistance gallium nitride crystal as a substrate, for example, a gallium nitride-indium mixed crystal layer (Ga_XIn_1-XN = 0 ≦ X ≦ 1) can be formed as a field effect transistor (FET) having an electron transit layer. The gallium nitride crystal layer according to the present invention provided with a buffer layer containing boron and phosphorus and a boron phosphide crystal layer interposed therebetween has excellent crystallinity such as low dislocation density. For this reason, if the gallium nitride crystal layer formed by the method according to the present invention is used as a substrate, a light emitting element such as an LED having a small local withstand voltage defect or an avalanche (dark dark current) having a reduced dark current is used. It can contribute to the formation of an avalanche type or PIN junction type light receiving element. Further, it has an effect of suppressing a leakage current of a Schottky-type gate electrode, has excellent gate pinch-off characteristics, and has a high mutual conductance (so-called g)._mThis is advantageous for forming a Schottky junction type FET.
[0025]
[Action]
The amorphous layer containing boron and phosphorus provided between the silicon single crystal substrate and the gallium nitride crystal layer has a lattice mismatch between the boron phosphide crystal layer and the gallium nitride crystal layer and the silicon single crystal substrate provided as an upper layer. It has an effect of relaxing to provide a gallium nitride crystal layer having few crystal defects such as dislocations.
[0026]
The silicon single crystal substrate provided with the groove on the back side has an effect of preventing "warping" and cracking of the upper layer including the gallium nitride crystal layer, thereby providing a gallium nitride crystal layer having a low dislocation density.
[0027]
【Example】
(First embodiment)
A gallium nitride seed crystal layer grown on a silicon (Si) single crystal substrate through an amorphous layer containing boron and phosphorus and a boron phosphide crystal layer of a monomer is used as a seed crystal. Further, the content of the present invention will be specifically described based on an example in which a thick gallium nitride crystal layer is grown thereon to manufacture a gallium nitride crystal substrate.
[0028]
FIG. 1 schematically shows a cross-sectional structure of a laminate 10 for manufacturing a gallium nitride crystal substrate. For the substrate 101, a p-type {111} -silicon single crystal with a diameter of 2 inches to which boron (B) was added was used. The specific resistance (resistivity) of this silicon single crystal substrate at room temperature is about 1 × 10^-3Ohm-centimeter (Ω · cm). The thickness of the silicon single crystal substrate whose front surface was polished to a mirror surface and whose back surface was in a rough polished state (as-lapping) was 350 μm.
[0029]
On the {111} -surface of the silicon single crystal substrate 101, an amorphous metal containing boron (B) and phosphorus (P) is formed by using atmospheric pressure (substantially atmospheric pressure) metal organic chemical vapor deposition (MOCVD) means. A quality layer 102 was deposited. The amorphous layer 102 is made of triethyl boron ((C₂H₅)₃B) as a boron source and phosphine (PH₃) Was deposited at 450 ° C. using a phosphorus source. The supply ratio of the phosphorus source to the boron source per unit time to the MOCVD reaction system (PH₃/ (C₂H₅)₃B concentration ratio, that is, V / III ratio) was set to about 30. The layer thickness of the amorphous layer 102 was 5 nm.
[0030]
On the amorphous layer 102, a boron phosphide (BP) crystal layer 103 was deposited by the same MOCVD means as described above. The boron phosphide crystal layer 103 is made of triethyl boron ((C₂H₅)₃B) as a boron source and phosphine (PH₃) Was deposited at 1050 ° C. using a phosphorus source. The supply ratio of the phosphorus source to the boron source (V / III ratio) was set to about 1300. The flow rate of the hydrogen gas used as the carrier gas was 16 liter / min. The layer thickness of the boron phosphide crystal layer 103 is 5 × 10^-5cm (= 500 nm). The boron phosphide crystal layer 103 formed in a so-called undoped state in which no impurity was intentionally added exhibited p-type conduction. The carrier concentration is about 2 × 10 at room temperature.¹⁹cm^-3Met.
[0031]
A gallium nitride (GaN) seed crystal layer 104 was deposited on the boron phosphide crystal layer 103 by MOCVD. The gallium nitride seed crystal layer 104 is made of trimethylgallium ((CH₃)₃Ga) as a gallium source, and ammonia (NH)₃) Was deposited at 1050 ° C. using a nitrogen source. The supply ratio of the nitrogen source to the gallium source (V / III ratio) is about 1.2 × 10⁴Set to. The flow rate of the hydrogen gas used as the carrier gas was 16 liter / min. The thickness of the gallium nitride seed crystal layer 104 to be used as a seed crystal when depositing a thick gallium nitride crystal layer was set to 320 nm by a later hydride VPE means. It was formed in a so-called undoped state in which no impurity was intentionally added. After the deposition of the gallium nitride seed crystal layer 104 was completed, the silicon single crystal substrate 101 was cooled to a temperature near room temperature and taken out of the MOCVD apparatus.
[0032]
Analysis by electron beam diffraction showed that the boron phosphide crystal layer 103 was composed of {111} crystal planes of zinc blende-type boron phosphide crystal. Further, in observation by the cross-sectional TEM technique, misfit dislocations due to lattice mismatch between the silicon single crystal substrate 101 and the boron phosphide crystal layer 103 were hardly visually recognized inside the boron phosphide crystal layer 103. . On the other hand, the existence of stacking faults (stacking faults) along the (111) crystal orientation of boron phosphide or twinning having a {111} crystal plane as a twin plane was recognized. From this, it was conceived that misfit dislocations were not visually recognized because stacking faults exhibited an effect of absorbing misfit dislocations. The gallium nitride seed crystal layer 104 is composed of a (0001) crystal plane having a lattice constant substantially equal to the lattice spacing of the {110} crystal plane intersecting the {111} surface of the boron phosphide crystal layer 103. It was.
[0033]
Gallium (Ga) / ammonia (NH) is formed on the gallium nitride seed crystal layer 104.₃) / Hydrogen (H₂G) A gallium nitride (GaN) crystal layer 105 was deposited by a reactive hydride VPE means. The gallium nitride crystal layer 105 was deposited at 1050 ° C. The deposition was stopped when the thickness of the gallium nitride crystal layer 105 reached about 155 μm. Thereafter, the temperature of the substrate on which the gallium nitride crystal layer 105 was laminated was lowered to a temperature of about 550 ° C. while flowing ammonia into the reaction system. After cooling to a temperature near room temperature, {111} -silicon single crystal substrate 101 / amorphous layer 102 / {111} -boron phosphide crystal layer 103 / (0001) -gallium nitride seed crystal layer 104 / gallium nitride The laminate 10 composed of the crystal layer 105 was taken out from the hydride VPE device. According to the electron diffraction method, the gallium nitride crystal layer 105 was a hexagonal wurtzite-type crystal layer arranged in the (0001) direction. Since the boron phosphide crystal layer 103 was provided over the silicon single crystal substrate 101 via the amorphous layer 102 containing phosphorus and boron, the boron phosphide crystal layer 103 was not separated from the silicon single crystal substrate 101. I couldn't. The adhesion between the boron phosphide crystal layer 103 and the gallium nitride seed crystal layer 104 was also good.
[0034]
After that, the silicon single crystal substrate 101 forming the substrate of the stacked body 10 was dissolved with an acid. The silicon single crystal substrate 101 is made of hydrofluoric acid (HF) and nitric acid (HNO₃) And removed by etching. Thereafter, the substrate was washed with ultrapure water to leave the amorphous layer 102, the boron phosphide crystal layer 103, the gallium nitride seed crystal layer 104, and the gallium nitride crystal layer 105. Next, the amorphous layer 102 and the boron phosphide crystal layer 103 were mechanically polished using diamond abrasive grains and removed. The surface of the gallium nitride crystal layer 105 was mirror-polished with cerium oxide fine particles. By polishing, a region having a depth of about 5 μm in the surface portion of the gallium nitride crystal layer 105 was ground. Thereafter, cleaning was performed using a mixed solution of hydrofluoric acid and nitric acid. This indicates that the carrier concentration measured by the Hall effect measurement method is about 8 × 10¹⁷cm^-3An n-type gallium nitride single crystal substrate having a thickness of about 150 μm was manufactured.
[0035]
According to the observation by the cross-sectional TEM technique, the dislocation density of the gallium nitride seed crystal layer 104 bonded to the boron phosphide crystal layer 103 is {110} —the {110} crystal plane intersecting the surface of the boron phosphide crystal layer 103. And the (0001) -gallium nitride seed crystal layer 104 match the a-axis lattice constant,⁵cm^-2And low density. In addition, the dislocation density of the gallium nitride crystal layer 105 was reduced to the same level as that of the gallium nitride seed crystal layer 104, and a gallium nitride crystal substrate having a low dislocation density, which was not conventionally used, could be manufactured.
[0036]
(Second embodiment)
In the second embodiment, a case where a gallium nitride crystal substrate is manufactured from a gallium nitride crystal layer deposited on a silicon single crystal substrate provided with a groove on the back surface for relaxing strain due to thermal stress. The present invention will be specifically described by way of an example.
[0037]
FIG. 2 schematically shows a configuration of a groove provided on the back surface of an n-type {111} -silicon single crystal substrate to which phosphorus (P) is added. The diameter of the silicon single crystal substrate was 2 inches, and the thickness was 350 μm. The vertical section of the groove 106 has a V-shaped tip 106a, and the width 106b of the groove is about 4 × 10^-3cm. The depth of the groove 106 was about 140 μm, and the interval 106c between adjacent grooves was about 0.5 cm. As shown in FIG. 2, the groove 106 is formed in the silicon single crystal substrate [1. -1.0] crystal orientation and [-1. [−1.0] direction, regularly arranged in a grid at equal intervals (= 0.5 cm).
[0038]
Under the same conditions as described in the first embodiment, an amorphous layer, a boron phosphide crystal layer, a gallium nitride seed crystal layer, And a gallium nitride crystal layer were sequentially deposited. The “warp” in the as-grown state measured using the optical interferometry is about 2 × 10 in a warp.^-3cm. On the other hand, the “warp” (warp) in the as-grown state of the laminate described in the first example was about 4 × 10^-3cm, it was shown that "warping" can be suppressed by providing a groove for relaxing thermal stress on the back surface of the silicon single crystal. Next, the silicon single crystal substrate provided with the groove is dissolved with a mixed acid containing hydrofluoric acid, and the other boron phosphide crystal layer is removed by grinding in the same manner as in the first embodiment. A gallium nitride crystal substrate with less “warpage” was manufactured from the crystal layer. As a result, the carrier concentration measured by the Hall effect measurement method was reduced to about 8 × 10¹⁷cm^-3An n-type gallium nitride single crystal substrate having a thickness of about 150 μm was obtained. Dislocation density is about 1 × 10⁵cm^-2And that of the first embodiment is further reduced.
[0039]
(Third embodiment)
On the n-type gallium nitride crystal substrate 107 manufactured in the same manner as in the second embodiment, each functional layer made of the material described in the following items (1) to (4) is vapor-phase grown by MOCVD. The laminated structure 11 for LED use was formed.
(1) Lower cladding layer 108 made of silicon (Si) -doped n-type gallium nitride; (2) Si-doped n-type gallium indium nitride (Ga)_0.80In_0.20N) a light emitting layer 109 comprising
(3) an evaporation preventing layer 110 made of undoped n-type monomer boron phosphide; and (4) an upper cladding layer 111 made of a magnesium (Mg) -doped p-type gallium nitride layer.
The carrier concentration of the n-type GaN layer forming the lower cladding layer 108 is about 2 × 10¹⁸cm^-3The layer thickness (= t) was set to about 320 nm. The light emitting layer 109 has a carrier concentration of about 9 × 10¹⁷cm^-3N-type Ga having a layer thickness of about 180 nm_0.80In_0.20It was composed of N layers. The evaporation prevention layer 110 has a carrier concentration of about 7 × 10¹⁷cm^-3To form an n-type BP layer having a layer thickness of about 12 nm. The p-type GaN layer forming the upper cladding layer 111 has a carrier concentration of about 5 × 10¹⁷cm^-3And the layer thickness was 80 nm.
[0040]
A diameter of about 1.4 × 10 is provided at the center of the uppermost cladding layer 111 of the outermost layer of the multilayer structure 11.^-2An ohmic p-type ohmic electrode 112 having a diameter of 0.1 cm was disposed. The p-type ohmic electrode 112 had a NiO / gold (Au) multilayer structure in which the side in contact with the upper cladding layer 111 was nickel oxide. An n-type ohmic electrode 113 was formed on substantially the entire back surface of the n-type gallium nitride crystal substrate 107. The n-type ohmic electrode 113 had a three-layer structure of Al / titanium (Ti) / gold (Au) in which the side in contact with the substrate 107 was aluminum (Al). Next, one side is about 3.5 × 10^-2The chip was cut into square chips each having a diameter of 2 cm, and an LED 12 having a light emitting portion having a pn junction type double hetero (DH) structure shown in a schematic sectional view of FIG. 3 was formed.
[0041]
A forward current of 20 milliamperes (mA) was passed between the p-type ohmic electrode 112 and the n-type ohmic electrode 113 in the forward direction to cause the LED 12 to emit light. The obtained emission characteristics are summarized below.
(A) Emission wavelength 440 nm
(B) emission spectrum half width (FWHM) 0.3 electron volts (eV) (c) emission intensity (chip state) 状態 1.7 × 10^-2Watt (W)
(D) Forward voltage (at a forward current of 20 mA) 3.2 volts (V)
(E) Reverse voltage (at reverse current of 10 μA) 12 V
In particular, about 1 × 10⁵cm^-2And a GaN crystal substrate having a low dislocation density, there is almost no local withstand voltage failure (local @ breakdown), stable and good rectification is exhibited, and a uniform forward and reverse voltage with no variation. LEDs were obtained from the entire surface of the substrate.
[0042]
【The invention's effect】
By using an amorphous layer, a boron phosphide crystal layer, and a thick gallium nitride crystal layer grown through a gallium nitride seed crystal layer provided on a silicon single crystal substrate, dislocation density is small and good crystallinity is obtained. This is effective in producing a simple gallium nitride single crystal substrate.
[0043]
Further, if a gallium nitride crystal substrate having a low dislocation density is used, it is possible to contribute to providing a gallium nitride-based LED exhibiting stable rectification with less withstand voltage failure.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view of a laminate according to a first embodiment.
FIG. 2 is a schematic cross-sectional view of a silicon single crystal substrate provided with a groove on a back surface according to a second embodiment.
FIG. 3 is a schematic sectional view of an LED according to a third embodiment.
[Explanation of symbols]
10mm laminate
11 LED laminated structure
12 LED
101% silicon single crystal substrate
102 amorphous layer
103 boron phosphide crystal layer
104 gallium nitride seed crystal layer
105% gallium nitride crystal layer
106 mm groove
106a Groove tip
106b width of groove
106c 間隔 spacing between adjacent grooves
107 gallium nitride crystal substrate
108 n-type gallium nitride lower cladding layer
109 n-type gallium-indium nitride light-emitting layer
110 ° n-type boron phosphide evaporation prevention layer
111 p-type gallium nitride upper cladding layer
112 p-type ohmic electrode
113 n-type ohmic electrode

Claims (12)

Forming an amorphous layer containing boron (B) and phosphorus (P) on the surface of a silicon (Si) single crystal substrate, and then forming a boron phosphide (BP) crystal layer on the amorphous layer; Next, a gallium nitride (GaN) seed crystal layer is grown on the boron phosphide crystal layer at a temperature of 750 ° C. or more and 1200 ° C. or less, and then a gallium nitride crystal layer is formed on the gallium nitride seed crystal layer. A method for producing a gallium nitride crystal substrate, comprising: producing a gallium nitride crystal substrate by performing vapor phase growth, and thereafter removing the silicon single crystal substrate, the amorphous layer, and the boron phosphide crystal layer. The amorphous layer, the boron phosphide crystal layer, and the gallium nitride seed crystal layer are formed by metal organic chemical vapor deposition (MOCVD), and the gallium nitride crystal layer is formed by hydride vapor phase epitaxy. The method for manufacturing a gallium nitride crystal substrate according to claim 1, wherein: 3. The method for manufacturing a gallium nitride crystal substrate according to claim 1, wherein the amorphous layer containing boron (B) and phosphorus (P) is formed at a temperature of 250 ° C. or more and 1200 ° C. or less. 4. The method for manufacturing a gallium nitride crystal substrate according to claim 1, wherein the boron phosphide (BP) crystal layer is formed at a temperature of 750 ° C. or more and 1200 ° C. or less. 5. The method for manufacturing a gallium nitride crystal substrate according to claim 1, wherein the surface of the silicon single crystal substrate is a {111} crystal plane. The gallium nitride crystal substrate according to any one of claims 1 to 5, wherein the silicon single crystal substrate is provided with a groove on a back surface opposite to a front surface on which the gallium nitride crystal layer is provided. Production method. 7. The method for manufacturing a gallium nitride crystal substrate according to claim 6, wherein the depth of the groove is in a range of 1/2 to 1/3 of the thickness of the silicon single crystal substrate. The method for manufacturing a gallium nitride crystal substrate according to claim 1, wherein the thickness of the amorphous layer is 1 nm or more and 50 nm or less. A gallium nitride crystal substrate manufactured by the method according to claim 1. A gallium nitride based semiconductor device comprising the gallium nitride crystal substrate according to claim 9. The gallium nitride-based semiconductor device according to claim 10, wherein an ohmic electrode is formed on a surface of the gallium nitride crystal substrate. A functional layer including a light emitting layer made of a group III nitride semiconductor is formed on a gallium nitride crystal substrate manufactured by the method according to any one of claims 1 to 8, and a surface of the functional layer and gallium nitride are formed. A light-emitting diode, wherein ohmic electrodes are formed on the back surface of the crystal substrate.

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