JP2004110120A - Synchronization method for modular type programmable controller and modular type programmable controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a programmable controller device capable of surely transferring data between controllers without placing a limit on the number of mounting of open modules. <P>SOLUTION: When a data storage instruction S17 from a PLC module 100 is inputted by an interrupting signal S14, an option module 200 stores the data of the PLC module 100 into a memory 225. When the interrupting signal S14 is inputted in a data update cycle, the option module 200 calculates data to be outputted to a control unit, and outputs the data to the control unit. The PLC module 100 holds the stand-by state without executing any user program until the data of the PLC module 100 are captured by the option module 200, and the PLC module 100 executes the user program according to a data storage completion signal from the option module 200. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a modular programmable controller (PLC device).
[0002]
[Prior art]
In general, a modular PLC device includes a program input device 1, a PLC module 2, and an option module 3, as shown in FIG. The program input device 1 creates an application program S1. The PLC module 2 exchanges input / output data S2 with the option module 3 via the bus according to the application program S1. The timing for transmitting and receiving data (hereinafter, referred to as a sampling period) is generally created based on a clock from a crystal oscillator mounted on the PLC module 2. The optional module 3 can mount a plurality of arbitrary modules from a plurality of types having different operations. Some of the option modules 3 control the plurality of control devices 4 and 5 by inputting and outputting the control data S3 at a constant update cycle. In this case, the sampling cycle is created based on a signal from the update cycle generation circuit mounted on the option module 3. As described above, there are two methods for creating the sampling period.
[0003]
FIG. 5 shows a configuration of a PLC device in a case where a sampling period is created based on a clock from a crystal oscillator mounted on the PLC module 2.
[0004]
The PLC module 2 generally operates with a data memory unit 21, a program memory unit 20 storing an application program, a crystal oscillator 23, and a clock signal from the crystal oscillator 23, and is stored in the program memory unit 20. (CPU) 22 that calculates according to the control program, and a sampling period generating circuit 24 that generates a sampling period set by the user based on a clock signal from the crystal oscillator 23 and inputs an interrupt signal S5 to the CPU 22. Consists of When receiving the interrupt signal S5, the CPU 22 generates an interrupt signal S4 and exchanges data S2 with the option module 3.
[0005]
The option module 3 includes a memory 33 for storing the data set by the PLC module 2 in its own module, a shared memory 30 for receiving data S2 from the PLC module 2 and an interrupt signal S4 from the CPU 22, It comprises a crystal oscillator 34, a CPU 31 operated by the crystal oscillator 34, and a data input / output unit 32 for exchanging data with the control device 4 in real time. Synchronization between the PLC module 2 and the option module 3 is maintained by the interrupt signal S4.
[0006]
FIG. 6 shows a configuration of a PLC device in a case where a sampling cycle is created based on a signal from an update cycle generating circuit 36 mounted on the option module 3. This PLC device is different from the PLC device of FIG. 5 in that a cycle for inputting and outputting data is created by an update cycle generation circuit 36. In order to ensure data consistency between the PLC module 2 and the control device 4, the interrupt signal S6 from the update cycle generation circuit 36 is simultaneously input to the CPU 31 of the option module 3 and the sampling cycle generation circuit 24 of the PLC module 2. I do. The PLC module 2 creates a sampling cycle using the interrupt signal S6 from the update cycle generating circuit 36 in the option module 3 without using a signal from the crystal oscillator 34 in the module itself.
[0007]
In such a modular PLC device, each of the PLC module and the option module has a CPU mounted thereon, and the CPU generally operates with clocks from different oscillators (crystal oscillators). In the option module 3 as shown in FIG. 6, data from the PLC module 2 can be reliably transferred to the control device 4 at the sampling cycle of the PLC module 2.
[0008]
The conventional technique described above is described in Patent Document 1.
[0009]
[Patent Document 1]
JP-A-11-259105
[Problems to be solved by the invention]
On the other hand, in the PLC device including the option module 3 as shown in FIG. 6 and the PLC module 2 as shown in FIG. 5, even if the same sampling cycle is set, the sampling cycle of the PLC module 2 and the option module 3 is not changed. Slightly shifts. Therefore, there occurs a timing at which the option module 3 cannot receive the data from the PLC module 2, and it is impossible to reliably transfer the instantaneous data from the PLC module 2 to the control device 4 via the option module 3.
[0011]
This problem will be described with reference to the timing chart of FIG. In FIG. 7, D _{1 to} D ₆ indicate data that the PLC module 2 pays out every moment. In this example, the data update cycle of the option module 3 and the control device 4 is 2 ms, and the sampling cycle of the PLC module 2 is 2 ms. Since the accuracy of the crystal oscillator used for the clock is generally about 100 ppm, the error between the crystal oscillator 23 used in the PLC module 2 and the crystal oscillator 34 used in the option module 3 is 200 ppm at the maximum. Therefore, the error is 1/5000. At 2 ms, it becomes 2 ms ± 0.4 μs, and the period (2 ms) for one time in 10 seconds is large or small. FIG. 7 shows the cycle of each module when it is assumed that the crystal oscillator 23 used in the PLC module 2 is later than the crystal oscillator 34 used in the option module 3 by α. 7, the data update period t _A sampling period and option module 3 of the PLC module _2, gradually shifted from the t _B, the data update period of the option module 3 at time t _C is the sampling period of the PLC module 2 without, as a result, data D ₆ is leave out the data without Haraidase. At time t _C, although originally must be transmitted the data D ₆ is the controlled apparatus 4, the same data D ₅ to the time t _B would be sent to the control device 4. That is, the data originally transmitted to the control device 4 is D ₁ → D ₂ → D ₃ → D ₄ → D ₅ → D ₆ →... , D ₁ → D ₂ → D ₃ → D ₄ → D ₅ → D ₅ → D ₆ ...
[0012]
In order to prevent this, conventionally, the PLC module 2 shown in FIG. 6 was used so that the sampling cycles of the PLC module 2 and the option module 3 were not shifted.
[0013]
However, in the case of the PLC module 2 shown in FIG. 6, the option module 3 having the function shown in FIG. 6 must be mounted, but there is a problem that only one module can be mounted.
[0014]
An object of the present invention is to reliably transfer data to and from a control device without restricting the number of mounted optional modules, and to generate a sampling cycle of a PLC module with a clock, An object of the present invention is to provide a programmable controller cycle method and a programmable controller that do not need to be aware of a clock difference generating an update cycle between an option module and a control device.
[0015]
[Means for Solving the Problems]
According to the present invention, when an interrupt signal is input to the CPU of the PLC module and a data storage instruction from the PLC module is input to the option module, the option module stores the data of the PLC module and the interrupt signal is input. When the data update cycle is used, the option module calculates data to be output to the control device, outputs the data to the control device, and the PLC module executes the user program until the data of the PLC module is fetched by the option module. Instead, the PLC module executes the user program in response to the data storage completion signal from the option module, and synchronizes the PLC module with the option module.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings.
[0017]
FIG. 1 is a configuration diagram of a PLC device according to an embodiment of the present invention. The PLC module 100 has a function as a programmable controller, and stores an input unit 110 for receiving an external signal, an output unit 111 for outputting a signal to the outside, a data memory unit 112, and a user program. A program memory unit 114, a crystal oscillator 115, an operation unit (CPU) 113 which operates by a clock signal from the crystal oscillator 115, and operates according to a control program stored in the program memory unit 114, Alternatively, it is constituted by a sampling cycle generating circuit 116 that outputs an interrupt signal S14 and a synchronization signal S15 that is an output signal to the option module 200 in accordance with a cycle set by hardware. When an interrupt signal S14, which is an output signal of the sampling cycle generation circuit 116, is input to the CPU 113, the CPU 113 executes input, output, and calculation of the programmable controller. When the data input / output is completed, a data storage instruction S17 for the option module 200 is stored in the shared memory 220 of the option module 200.
[0018]
The option module 200 includes a memory 225 for storing the data set by the PLC module 100 in its own module, the data S11 from the PLC module 100, and the data S11 when the data S11 is stored in the memory 225. Memory 220 for storing a data storage completion signal S12 notifying that the capture of data has been completed, a crystal oscillator 224, a CPU 221 operated by the crystal oscillator 224, and a data input for outputting data to a control device. The output unit 222 includes an update cycle generation circuit 223 that generates an update cycle between the option module 200 and the control device in synchronization with a synchronization signal S15 that is an output signal of the PLC module 100. The update cycle generation circuit 223 inputs the interrupt signals S13a, S13b, and S13c to the CPU 221 of the option module 200.
[0019]
FIG. 2 is a diagram illustrating the operation of the update cycle generation circuit 223 that generates an update cycle synchronized with the synchronization signal S15 from the PLC module 100 in the present embodiment. In FIG. 2, the case where the synchronization signal S15 is slower and the case where the synchronization signal S15 is faster than the data update cycle will be described separately. In the case of the later case, the synchronization signal S15 is 4 ms, the update cycle is 2 ms, and the synchronization signal S15 is twice the data update cycle. In this case, an interrupt signal S13a (an interrupt signal when the synchronizing signal S15 is input and at the update cycle) is generated in synchronization with the synchronizing signal S15, and after a lapse of 2 ms from this point, the next interrupt signal S13b (An interrupt signal when the synchronizing signal S15 is not input and only in the update period) is generated, and an interrupt signal S13a is output in synchronization with the next synchronizing signal S15. By repeating the above, an interrupt signal S13a and an interrupt signal S13b are generated. The update cycle is set in advance by software or hardware.
[0020]
On the other hand, in the fast case, the synchronization signal S15 is 2 ms, the update period is 4 ms, and the period of the synchronization signal S15 is 倍 of the update period. In this case, an interrupt signal S13a (an interrupt signal when the synchronous signal S15 is input and at the update period) is generated in synchronization with the synchronous signal S15, and in the next synchronous signal S15, the interrupt signal S13c (the synchronous signal) is generated. An interrupt signal when the signal S15 is input and the update cycle is not reached) is generated, and an interrupt signal S13a is output in synchronization with the next synchronization signal S15. By repeating the above, an interrupt signal S13a and an interrupt signal S13c are generated.
[0021]
FIG. 3 shows the operation of the software of the PLC module 100 when the interrupt signal S14 is input from the sampling cycle generation circuit 116 of the PLC module 100, and the interrupt signals S13a, S13b, FIG. 14 is a diagram illustrating an operation of software of the option module 200 when S13c is input.
[0022]
In FIG. 3, when an interrupt signal S14 is input to the CPU 113 of the PLC module 100, the PLC module 100 first performs input / output with an external device (state ST10), and when the input / output is completed, a data storage instruction S17. Is set in the shared memory 220, and the completion of data storage from the option module 200 is waited (state ST11). When the data storage completion S12 is set in the shared memory 220 from the option module 200, the user program stored in the program memory unit 114 is executed, and the momentary data in the user program is set in the shared memory 220. (State ST12).
[0023]
On the other hand, when the interrupt signals S13a, S13b, and S13c generated from the synchronization signal S15 by the update cycle generation circuit 223 are input to the CPU 221 of the option module 200, the option module 200 executes the respective interrupt processing. First, when an interrupt signal S13a (an interrupt signal when the synchronization signal S15 is input and the update period is input) is input, the process waits for a data storage instruction S17 from the PLC module 100 (state ST20). When the data storage command S17 is set in the shared memory 220 from the PLC module 100, the data set in the shared memory 220 by the PLC module 100 is stored in the memory 225 in the own module. This data is integrated to obtain the total data amount output to the control device (state ST21). When the storage is completed, the data storage completion signal S12 is set in the shared memory 220 to notify the PLC module 100 that the data fetch is completed (state ST22). Next, data to be output this time is created from the total data amount (state ST23) and output to the control device (state ST24).
[0024]
Next, when an interrupt signal S13b (an interrupt signal when the synchronization signal S15 is not input but only in the update cycle) is input, data to be output this time is created from the total data amount (state). ST23), and outputs it to the control device (state ST24).
[0025]
When an interrupt signal S13c (an interrupt signal when the synchronization signal S15 is input and the update cycle is not reached) is input, the process waits for a data storage instruction S17 from the PLC module 100 (state ST20). When the data storage command S17 is set in the shared memory 220 from the PLC module 100, the data set in the shared memory 220 by the PLC module 100 is stored in the memory 225 in the own module. This data is added to the total data amount to obtain a new total data amount (state ST21). When the storage is completed, the data storage completion S12 is set in the shared memory 220 to notify the PLC module 100 that the data capture is completed (state ST22).
[0026]
【The invention's effect】
According to the present invention as described above, the following effects can be obtained.
[0027]
1) The data paid out by the PLC module can be reliably transferred to the control device via the option module, and the synchronous control can be performed by the module type control device.
2) Even in a control device that exceeds the control devices connectable with one option module, the required number of option modules are added and synchronized with the PLC module, so that the data to be paid out by the PLC module can be transmitted to a plurality of control devices. The control device can be reliably transferred to the control device via the option module, and synchronous control can be performed by a control device using a large number of control devices using a plurality of option modules.
3) Further, since the PLC module for generating data is programmable, an arbitrary data pattern (collection of data) can be generated, so that it is possible to flexibly cope with the operation of a machine including a control device. Therefore, a high-performance, high-performance machine can be configured by the PLC device.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a modular PLC device according to an embodiment of the present invention.
FIG. 2 is a timing chart showing an operation of an update cycle generation circuit 223 in FIG.
FIG. 3 is a timing chart showing the operation of the embodiment in FIG. 1;
FIG. 4 is a schematic configuration diagram of a general modular PLC device.
FIG. 5 is a configuration diagram showing a conventional example of a PLC module and an option module.
FIG. 6 is a configuration diagram showing another conventional example of a PLC module and an option module.
FIG. 7 is a timing chart showing the operation of the conventional example.
[Explanation of symbols]
1 Program input device 2, 100 PLC module 3, 200 Option module 4, 5 Control device 20, 114 Program memory unit 21, 112 Data memory unit 22, 113 CPU
23, 115 crystal oscillator 30, 220 shared memory 31, 221 CPU
32, 35, 222 Data input / output unit 33, 225 Memory 34, 224 Quartz vibrator 36, 223 Update cycle generation circuit

Claims (2)

A PLC module having a function as a programmable controller and an option module having a function of inputting / outputting data to / from a control device are provided, and data from the option module is reliably transferred to the control device between the option module and the control device. In a modular programmable controller having a function of inputting and outputting data at regular intervals, an interrupt signal is input to the CPU of the PLC module, and a data storage instruction from the PLC module is input to the option module. When the option module stores the data of the PLC module, and when the interrupt signal is input, if the data update period, the option module calculates the data to be output to the control device, and Control The PLC module outputs the data to the device, and holds the standby state without executing the user program until the option module captures the data of the PLC module. A method for synchronizing programmable controllers, performed by a module. A PLC module having a function as a programmable controller and an option module having a function of inputting and outputting data to and from a control device are provided, and data from the option module is reliably transferred to the control device between the option module and the control device. In a modular programmable controller having a function of inputting and outputting data at a fixed period so that the PLC module has a means for generating a first interrupt signal and a synchronization signal at the same timing as the first interrupt signal, When the PLC module receives the first interrupt signal, the PLC module performs input / output with an external device. When the input / output is completed, a data storage command is set in the shared memory of the option module. Waiting for storage completion,
The option module inputs the synchronization signal, and generates a second interrupt signal in synchronization with the synchronization signal when the synchronization signal is slower than a data update cycle. If an interrupt signal is generated and the synchronization signal is earlier than the data update cycle, a second interrupt signal is generated in synchronization with the synchronization signal, and a fourth interrupt signal is generated at the timing of the next synchronization signal. When the second and fourth interrupt signals are input, the option module waits for a data storage command from the PLC module, and the data storage command from the PLC module is sent to the shared memory. When set, the PLC module stores the data set in the shared memory in the memory. When the storage is completed, a data storage completion signal is set in the shared memory. When the interrupt signal is input, modular programmable controller, characterized in that to create the data to be output to the control device, to the control device.

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