JP2004093654A

JP2004093654A - Liquid crystal display device and method for manufacturing the same

Info

Publication number: JP2004093654A
Application number: JP2002251323A
Authority: JP
Inventors: Takayuki Kato; 加藤　隆幸; Shinichiro Tanaka; 田中　慎一郎
Original assignee: Tokyo Sanyo Electric Co Ltd; Tottori Sanyo Electric Co Ltd; Sanyo Electric Co Ltd
Current assignee: Tokyo Sanyo Electric Co Ltd; Sanyo Electric Co Ltd
Priority date: 2002-08-29
Filing date: 2002-08-29
Publication date: 2004-03-25
Anticipated expiration: 2022-08-29
Also published as: JP3979234B2

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device in which a pixel with a defect generated thereon is repaired and lowering of display quality subsequent to repairing is suppressed. <P>SOLUTION: In the liquid crystal display device comprising a liquid crystal 27 interposed between a pair of substrates 1, 21 and pixels arrayed on the substrates 1, 21 in a matrix, auxiliary capacitance wiring lines 3, an insulating film 4, capacitance electrodes 13, a protection film 9 and pixel electrodes 6 are laminated on the one substrate 1. A capacitance electrode 13 in a pixel is divided in two. Contact holes 14 to expose respective capacitance electrodes 13 are provided on the protection film 9. The capacitance electrode 13 and the pixel electrode 6 are electrically connected to each other via the contact hole 14. A slit 8 straddling an auxiliary capacitance wiring 3 is formed on the pixel electrode 6. The slit 8 is located between a part where one capacitance electrode 13 is connected to the pixel electrode 6 and another part where the other capacitance electrode 13 is connected to the pixel electrode 6. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は１画素内に複数のドメインを設けた広視野角の液晶表示器に関し、より詳細には、点欠陥を修復可能な液晶表示器に関する。
【０００２】
【従来の技術】
液晶表示器は薄型軽量、低消費電力という特徴を生かし、携帯端末から大型テレビに至るまで幅広く利用されている。これまで液晶表示器で表示する画像には静止画が多かったが、携帯電話による動画配信や液晶テレビの開発などにより動画を表示するケースが多くなり、液晶表示器の性能として広視野角、高速応答などの要素が重要視されるようになってきた。こうした要求に伴い、例えば視野角を改善するために、画素内に突起や溝を設けて１画素内に複数のドメインを形成するＭＶＡ（Ｍｕｌｔｉ−ｄｏｍａｉｎ　ｖｅｒｔｉｃａｌｌｙ　　ａｌｉｇｎｅｄ）方式が提案されている。これは例えば特許第３００５４１８号公報や特許第３０１１７２０号公報に記載されている。
【０００３】
この従来のＭＶＡ型液晶表示器を図６、図７に基づいて説明する。図６はアレイ基板側の１画素分の平面図であり、図７は液晶表示器の断面図である。なお図７は補助容量配線上の断面図に相当する。
【０００４】
平行に対向配置する一対のガラス基板のうち、アレイ基板５０となる一方のガラス基板５２上には走査線５３、信号線５４、ＴＦＴ５７、画素電極５９が形成され、対向基板５１となる他方のガラス基板６３にはカラーフィルタ６５、対向電極６６、突起６７が形成される。なお図６にはカラーフィルタ６５や突起６７を省略している。走査線５３と信号線５４はマトリクス状に配線され、その交差部分にＴＦＴ５７を、走査線５３と信号線５４で囲まれる領域内に画素電極５９をそれぞれ形成する。ＴＦＴ５７のゲート電極は走査線５３に、ソース電極は信号線５４に、ドレイン電極は画素電極５９にそれぞれ電気的に接続している。画素電極５９にはスリット６９が形成され、対向電極５１には複数の帯状の突起６７がジグザグ状に形成されている。スリット６９はこの複数の突起６７の間に位置し、隣り合う突起６７と略平行に形成されている。画素電極５９や対向電極６６上にはそれぞれ配向膜６０、６８が積層され、画素電極５９に電圧が印加されていない時は配向膜６０、６８の影響により液晶分子７０は垂直配列する。
【０００５】
画素電極５９に所定以上の電圧が印加されたとき、液晶分子７０が傾斜する。このとき、対向基板５１の法線方向から見たとき、液晶分子７０は突起６７及びスリット８９に対して９０°方向に傾斜し、突起６７やスリット８９を境にして逆方向に傾斜する。一対のガラス基板５２、６３の外側には直交ニコルの一対の偏光板７１、７２が配置され、偏光板７１、７２の透過軸と突起６７の延長方向との成す角度が約４５°になるように設定し、偏光板７１、７２の法線方向から見たときに傾斜した液晶分子７０と偏光板７１、７２の透過軸との成す角度が４５°になるようにしている。傾斜した液晶分子７０と偏光板７１、７２の透過軸との角度が４５°になるとき、最も効率よく偏光板から透過光を得ることができる。
【０００６】
各画素の中央付近には補助容量配線５５が設けられている。補助容量配線５５は走査線５３を形成するときに同時形成され、走査線５３と平行に配置されている。補助容量配線５５は走査線５３と同様にゲート絶縁膜５６で覆われ、ゲート絶縁膜５６上で補助容量配線５５と対向する位置に容量電極６１が形成されている。容量電極６１は信号線５４と同時形成されるが、信号線５４とは電気的に接続しないように独立している。信号線５４や容量電極６１上には例えばＳｉＮｘからなる保護膜５８が積層され、保護膜５８には容量電極６１の一部を露出させるコンタクトホール６２が形成されている。画素電極５９は保護膜５８上に形成され、画素電極５９と容量電極６１はコンタクトホール６２を介して電気的に接続している。従って画素電極５９と容量電極６１が同電位になり、補助容量配線５５と容量電極６１によって補助容量を形成する。
【０００７】
【発明が解決しようとする課題】
容量電極が補助容量配線や信号線と電気的に接続すると、画素電極へ印加される電圧がその接続箇所を介してリークするため、表示不良の原因になる。例えばゲート絶縁膜５６中に異物７３が混在して補助容量配線５５と容量電極６１が短絡したり、信号線５４の形成時のエッチング不良による残留物７４によって信号線５４と容量電極６１が短絡するケースがある。しかしながら、このような画素欠陥に対して図６、図７に示す従来例では、画素を修復することができなかった。
【０００８】
そこで、このような補助容量線や信号線に短絡した画素電極に対して、その画素電極の一部分を取除いて短絡部分を分離し、表示品位の低下を防ぐものがある。こうした技術は、例えば特開２０００−２２１５２７号公報に記載されている。これは画素電極の中央付近に補助容量配線上に位置するスリットを形成する。そして補助容量付近に短絡が生じた場合、スリットから画素電極のエッジまでの一部分をレーザーで切断し、短絡箇所を含む部分を画素電極から独立させる。また特開２００１−８３５２２号公報の図３０には、ＭＶＡ方式の液晶表示器における短絡時の修復方法が記載されている。ＭＶＡ方式では、画素電極に配向規制用のスリットが複数形成されている。このスリットのなかで画素電極の中央付近のスリットを、補助容量配線上にも形成する。そして短絡時には、このスリット付近の画素電極の一部をレーザーで切断し、修復を行う。
【０００９】
しかしながら、従来の方法で画素電極を修復した場合、その修復した画素では補助容量が機能しない。つまり図６、図７に示すように画素電極と容量電極を電気的に接続するものでは、切断されて独立した画素電極に容量電極が接続して、容量電極が表示に用いる画素電極から切離されてしまうため、画素電極と容量電極が同電位にならず、容量電極と補助容量配線との間で補助容量を形成することができない。従って、例え画素を修復してその画素で表示を行っても、補助容量がないために、ＴＦＴがＯＦＦしているときに画素電極の電荷のリークによる電圧降下が生じ、その画素では適正な表示ができなかった。
【００１０】
そこで本発明は、画素欠陥が生じた画素を修復でき、修復後も表示品位の低下を抑えた液晶表示器を提供することを目的とする。
【００１１】
【課題を解決するための手段】
上記課題を解決するために本発明は、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、補助容量配線を覆う絶縁膜と、補助容量配線と対向して絶縁膜上に形成した容量電極と、容量電極を覆う保護膜と、保護膜に形成すると共に容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共にコンタクトホールで容量電極と接続する画素電極とを備え、画素電極に補助容量配線をまたがるスリットを形成し、１画素内の容量電極を２分割して、その各容量電極をそれぞれ画素電極に接続し、スリットは一方の容量電極が画素電極に接続する部分と他方の容量電極が画素電極に接続する部分との間に位置することを特徴とする。
【００１２】
また、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器において、一方の基板上に形成した補助容量配線と、補助容量配線を覆う絶縁膜と、補助容量配線と対向して絶縁膜上に形成した容量電極と、容量電極を覆う保護膜と、保護膜に形成すると共に容量電極の一部を露出させるコンタクトホールと、画素内に形成すると共にコンタクトホールで容量電極と接続する画素電極とを備え、画素電極に補助容量配線をまたがる複数のスリットを形成し、容量電極を補助容量配線上におけるスリットで区切られた画素電極に対応して複数に分割し、各容量電極を対応する画素電極に接続したことを特徴とする。
【００１３】
さらに、１画素内の各容量電極がほぼ同じ大きさであることを特徴とする。また、画素電極に液晶分子の傾斜方向を規制する複数のスリットを形成し、補助容量配線をまたがるスリットが補助容量配線付近に位置するスリットと連なっていることを特徴とする。また、他方の基板には画素に対応したカラーフィルタが形成され、カラーフィルタ上には液晶分子の傾斜方向を規制する複数の帯状の突起が形成されていることを特徴とする。
【００１４】
また、一対の基板間に液晶を挟持し、基板上には画素をマトリクス状に配置した液晶表示器の製造方法において、一方の基板上に走査線と補助容量配線をほぼ平行に形成する工程と、走査線及び補助容量配線上に絶縁膜を積層する工程と、絶縁膜上に走査線と直交する信号線を形成する工程と、各画素内に補助容量配線と対向する複数の容量電極を絶縁膜上に形成する工程と、容量電極上に保護膜を積層する工程と、保護膜に各容量電極の一部を露出させるコンタクトホールを形成する工程と、各画素内にコンタクトホールを介して容量電極と接続する画素電極を形成する工程と、各画素電極上に補助容量配線をまたがるスリットを形成する工程と、容量電極が補助容量配線又は信号線と短絡した際に、その容量電極と接続する画素電極の一部分をその画素電極から分割する工程とを有することを特徴とする。
【００１５】
さらに、各容量電極と画素電極との接続部分の間にスリットを形成する工程と、補助容量配線又は信号線と短絡した容量電極に沿って画素電極のエッジからスリットまで画素電極の一部を取除く工程を有することを特徴とする。また、各画素内の容量電極を２分割にすることを特徴とする。
【００１６】
【発明の実施の形態】
以下、本発明の実施の形態を図に基づいて説明する。図１は画素電極を有するアレイ基板１０の平面図、図２は補助容量配線３に沿った液晶表示器の断面図、図３は画素電極６のスリット８と対向基板２０上の突起２５との位置関係を示す模式図である。
【００１７】
１はアレイ基板１０を構成する第一基板であり、ガラス基板などの透明基板により形成されている。２はＡｌなどで形成された走査線、３は走査線２と同時形成される補助容量配線であり、走査線２と補助容量配線３は平行に配置される。４は走査線２や補助容量配線３上に積層されるゲート絶縁膜であり、ゲート絶縁膜４上にはＡｌ又はＣｒ等からなる信号線５が形成される。この信号線５を走査線２に直交するように配置し、走査線２と信号線５で囲まれる領域が１画素に相当する。各画素内にはＩＴＯ又はＩＺＯ等からなる画素電極６を形成し、走査線２と信号線５の交差部付近にはスイッチング素子であるＴＦＴ７を配置する。ＴＦＴ７はゲート電極７ａが走査線２に、ソース電極７ｂが信号線５に、ドレイン電極７ｃが画素電極６にそれぞれ電気的に接続されている。画素電極６にはスリット８が形成され、このスリット８により液晶分子の傾斜方向を規制する。９は信号線５やＴＦＴ７を覆う保護膜であり、画素電極６は保護膜９上に形成されている。この実施例では信号線５と画素電極６の間に保護膜９を１層だけ積層しているが、２層以上の保護膜を積層してもよい。保護膜９にはＴＦＴ７のドレイン電極７ｃに対応する部分にコンタクトホール１１が設けられ、コンタクトホール１１を介して画素電極６はドレイン電極７ｃと電気的に接続している。１２は画素電極４を覆う配向膜であり、垂直配向処理が施されている。こうしてアレイ基板１０が形成される。
【００１８】
アレイ基板１０に対向して対向基板２０が配置される。２１は対向基板２０を構成する第二基板であり、第二基板２１はガラス基板などの透明基板で形成されている。第二基板２１上には各画素を区切るようにブラックマトリックス２２が形成され、ブラックマトリックス２２の開口部には各画素に対応したカラーフィルタ２３が形成されている。カラーフィルタ２３は各画素に対応して赤色（Ｒ）、緑色（Ｇ）、青色（Ｂ）のうちいずれか１色が配置されている。カラーフィルタ２３上には例えばＩＴＯやＩＺＯ等からなる対向電極２４が積層され、対向電極２４上には所定パターンの突起２５が形成され、対向電極２４及び突起２５を垂直配向処理が施された配向膜２６で覆っている。こうして対向基板２０が形成される。
【００１９】
両基板１０、２０間には誘電率異方性が負の液晶層２７が介在する。そして画素電極６と対向電極２４の間に所定以上の電界が生じないときは液晶分子２７が配向膜１２、２６に規制されて垂直配列し、画素電極６と対向電極２４の間に所定以上の電界が発生したときは液晶分子２７が水平方向に傾斜する。このとき液晶分子２７はスリット８や突起２５に規制されて所定の方向に傾斜し、１画素内に複数のドメインを形成する。なお図２は画素電極６と透明電極１５の間に電界が発生した状態を模式的に示している。
【００２０】
第一基板１の外側には第一偏光板２８が、第二基板２１の外側には第二偏光板２９がそれぞれ配置され、第一偏光板２８と第二偏光板２９は互いの透過軸が直交するように設定されている。対向基板２０の法線方向から観察したときに、偏光板２８、２９の透過軸と液晶分子２７の傾斜方向が約４５°を成すとき、最も効率良く透過光が第二偏光板２９を通過することができる。そして液晶分子２７は突起２５やスリット８に対して約９０°方向に傾斜するため、画素内のスリット８や突起２５の延在方向と第二偏光板２９の透過軸とが約４５°を成すように両偏光板１９、２０を配置する。この実施例では第一偏光板２８の透過軸が走査線２の延在方向と一致し、第二偏光板２９の透過軸が信号線５の延在方向と一致するように設定する。
【００２１】
そして画素電極６と透明電極１５の間に所定以上の電界が生じないときは液晶分子２７が垂直配列するため、第一偏光板２８を通過した直線偏光の透過光が液晶層１８を直線偏光のまま通過して第二偏光板２９で遮断され、黒表示になる。また画素電極６に所定の電圧が印加されて画素電極６と透明電極１５の間に電界が発生したとき、液晶分子２７が水平方向に傾斜するため、第一偏光板２８を通過した直線偏光の透過光が液晶層２７により楕円偏光になり第二偏光板２９を通過して、白表示になる。
【００２２】
次にスリット８と突起２５の形状について説明する。なお図３では突起２５を点線で示している。１画素内には複数の帯状の突起２５が存在し、各突起２５は各画素内において第二基板２１の法線方向から見たときに信号線５と約４５°を成す方向に延在している。各突起２５は隣接する突起２５に対して平行に配置され、画素電極６のエッジから伸びる突起２５が補助容量配線３上にまで達した所でほぼ直角に屈曲している。従って画素内の突起２５は補助容量配線３を軸にして上下でほぼ対称に配置されている。この実施例では突起２５が複数の画素にまたがってジグザク状に形成されているが、画素毎に突起２５を独立して設けてもよい。
【００２３】
画素電極６に形成されたスリット８は、対向基板２０の法線方向から見たときに、隣り合う突起２５の中間にその突起２５と平行に位置する。従ってスリット８も補助容量配線３を軸にして上下でほぼ対称になっている。画素内にあるスリット８のうち、画素の中央付近に位置するスリット８ａは補助容量配線３を跨いで形成され、隣接する突起２５と同様に補助容量配線３上でほぼ直角に屈曲する。この補助容量配線３付近のスリット８ａを、補助容量配線３を跨ぐように形成することにより、後述する画素欠陥に対する画素電極６の修復が可能になる。
【００２４】
次に補助容量の構成について説明する。１３は補助容量配線３に対向して配置された容量電極であり、信号線５と同時形成される。容量電極１３はゲート絶縁膜４上に形成され、補助容量配線３からはみ出ない大きさであり、保護膜９によって覆われている。１４は保護膜９に形成されたコンタクトホールであり、容量電極１３はこのコンタクトホール１４を介して画素電極６と接続する。従って容量電極１３は画素電極６と同電位になり、容量電極１３と補助容量配線３の間で補助容量を構成する。１画素内の容量電極１３はほぼ同等の大きさに２分割され、各容量電極１３はスリット８を挟んで左右に存在する画素電極６とそれぞれ接続する。つまり図２において、右側に位置する容量電極１３はスリット８の右側に位置する画素電極６と接続し、左側に位置する容量電極１３はスリット８の左側に位置する画素電極６と接続する。
【００２５】
次に図４、図５に基づいて、容量電極１３が補助容量配線３や信号線５と短絡したときの修復方法を説明する。図４及び図５は容量電極１３が短絡したときの修復状態を示す平面図である。図４では、右側の容量電極１３ａと信号線５との間にエッチング不良による残留物３０が存在し、容量電極１３ａと信号線５が短絡している。この画素を修復するとき、レーザによって画素電極６の一部を取除き、画素電極６に２つの溝３１を形成する。この溝３１はスリット８から画素電極６の右側のエッジまで補助容量配線３に沿って形成され、短絡した容量電極１３ａと接続する画素電極６ａをその他の部分から切離す。これにより画素電極６ａから分離した画素電極６は短絡した容量電極１３ａと離れるため、この画素により所望の表示が行える。さらに、左側の容量電極１３ｂにより補助容量が形成されるため、画素電極６で保持期間中も画素電極６の電荷のリークを抑えることができ、最適な表示が行える。
【００２６】
図５では、左側に位置する容量電極１３ｂが短絡した場合を示す。容量電極１３ｂと補助容量配線３の間に異物３２が存在し、容量電極１３ｂが補助容量配線３と同電位になっている。このときレーザーにより画素電極６に２本の溝３１形成する。この溝３１も図４の場合と同様に補助容量配線３に沿って形成され、スリット８から画素電極６の左側のエッジまで形成されている。そしてこの溝３１により、容量電極１３ｂと接続する画素電極６ｂをその他の部分から分離している。このとき右側の容量電極１３ａにより補助容量が形成されため、画素電極６は保持期間中に所定の電荷を維持することができる。なお、画素電極６の溝３１は、短絡した容量電極１３と接続する画素電極６をその他の部分から分離できればよく、その大きさや深さを特に限定するものではない。
【００２７】
このように本発明では、容量電極１３を複数に分割し、それぞれの容量電極１３をスリット８で区切られた画素電極６のうち異なる領域の画素電極６と接続するため、例え容量電極１３が信号線５等に短絡したときでも、画素の修復後にその画素に補助容量を残すことができる。
【００２８】
この容量電極１３を１画素内でほぼ均等の大きさに分割すれば、どの容量電極１３が短絡したとしてもほぼ同じ容量の補助容量を残すことができ、画素の修復後においても均等な能力の補助容量を確保することができる。
【００２９】
この実施例では容量電極を２分割したが、３つ以上に分割しても良い。このとき補助容量配線３上において、画素電極６がスリット８により区切られた領域毎にそれぞれ独立した容量電極を設けるとよい。つまり、スリット８により区切られた領域数と同数の容量電極１３を形成し、各領域毎にその領域の画素電極６と接続する容量電極１３を配置する。こうすることにより、画素欠陥を修復した後の補助容量の減少を最低限に抑えることができる。
【００３０】
【発明の効果】
本発明によれば、容量電極が信号線や補助容量配線と短絡して画素欠陥が生じたときに、その画素を修復した後でも補助容量が存在するため、表示品位の低下を防ぐことができる。
【図面の簡単な説明】
【図１】本発明の実施例である液晶表示器のアレイ基板の平面図である。
【図２】本発明の液晶表示器の補助容量配線に沿った断面概略図である。
【図３】本発明の突起と画素電極のスリットとの位置関係を示した模式図である。
【図４】本発明の容量電極が信号線に短絡した際の修復状態を示す模式図である。
【図５】本発明の容量電極が補助容量配線に短絡した際の修復状態を示す模式図である。
【図６】従来の液晶表示器のアレイ基板の平面図である。
【図７】従来の液晶表示器の補助容量配線に沿った断面図である。
【符号の説明】
１　　第一基板
３　　補助容量配線
５　　信号線
６　　画素電極
８　　スリット
１０　アレイ基板
１３　容量電極
１４　コンタクトホール
２０　対向基板
２１　第二基板
２５　突起[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a liquid crystal display having a wide viewing angle and a plurality of domains provided in one pixel, and more particularly, to a liquid crystal display capable of repairing a point defect.
[0002]
[Prior art]
Liquid crystal displays are widely used from portable terminals to large televisions, taking advantage of the features of thinness, light weight, and low power consumption. Until now, images displayed on LCDs have often been still images.However, the number of cases of displaying moving images has increased due to the distribution of moving images by mobile phones and the development of LCD TVs. Factors such as response have become more important. In response to such demands, for example, in order to improve the viewing angle, a MVA (Multi-domain Vertically Aligned) method in which a plurality of domains are formed in one pixel by providing a projection or a groove in the pixel has been proposed. This is described in, for example, Japanese Patent Nos. 300005418 and 30111720.
[0003]
This conventional MVA type liquid crystal display will be described with reference to FIGS. FIG. 6 is a plan view of one pixel on the array substrate side, and FIG. 7 is a cross-sectional view of the liquid crystal display. Note that FIG. 7 corresponds to a cross-sectional view over the auxiliary capacitance wiring.
[0004]
A scanning line 53, a signal line 54, a TFT 57, and a pixel electrode 59 are formed on one glass substrate 52 serving as an array substrate 50 of a pair of glass substrates disposed in parallel and opposed to each other. On the substrate 63, a color filter 65, a counter electrode 66, and a protrusion 67 are formed. In FIG. 6, the color filter 65 and the projection 67 are omitted. The scanning line 53 and the signal line 54 are wired in a matrix, and a TFT 57 is formed at the intersection thereof, and a pixel electrode 59 is formed in a region surrounded by the scanning line 53 and the signal line 54. The gate electrode of the TFT 57 is electrically connected to the scanning line 53, the source electrode is electrically connected to the signal line 54, and the drain electrode is electrically connected to the pixel electrode 59. A slit 69 is formed in the pixel electrode 59, and a plurality of strip-shaped protrusions 67 are formed in the counter electrode 51 in a zigzag shape. The slit 69 is located between the plurality of protrusions 67 and is formed substantially parallel to the adjacent protrusions 67. Orientation films 60 and 68 are laminated on the pixel electrode 59 and the counter electrode 66, respectively. When no voltage is applied to the pixel electrode 59, the liquid crystal molecules 70 are vertically aligned by the influence of the orientation films 60 and 68.
[0005]
When a predetermined voltage or more is applied to the pixel electrode 59, the liquid crystal molecules 70 tilt. At this time, when viewed from the normal direction of the opposing substrate 51, the liquid crystal molecules 70 are inclined at 90 ° with respect to the projection 67 and the slit 89, and are inclined in the opposite direction with the projection 67 and the slit 89 as boundaries. A pair of orthogonal Nicol polarizing plates 71 and 72 are disposed outside the pair of glass substrates 52 and 63, and the angle between the transmission axis of the polarizing plates 71 and 72 and the extension direction of the protrusion 67 is about 45 °. , And the angle between the liquid crystal molecules 70 tilted when viewed from the normal direction of the polarizing plates 71 and 72 and the transmission axes of the polarizing plates 71 and 72 is 45 °. When the angle between the tilted liquid crystal molecules 70 and the transmission axes of the polarizing plates 71 and 72 is 45 °, transmitted light can be obtained from the polarizing plates most efficiently.
[0006]
An auxiliary capacitance line 55 is provided near the center of each pixel. The auxiliary capacitance line 55 is formed at the same time when the scanning line 53 is formed, and is arranged in parallel with the scanning line 53. The auxiliary capacitance line 55 is covered with the gate insulating film 56 in the same manner as the scanning line 53, and the capacitance electrode 61 is formed on the gate insulating film 56 at a position facing the auxiliary capacitance line 55. The capacitor electrode 61 is formed at the same time as the signal line 54, but is independent so as not to be electrically connected to the signal line 54. A protection film 58 made of, for example, SiNx is stacked on the signal line 54 and the capacitor electrode 61, and a contact hole 62 exposing a part of the capacitor electrode 61 is formed in the protection film 58. The pixel electrode 59 is formed on the protective film 58, and the pixel electrode 59 and the capacitor electrode 61 are electrically connected via the contact hole 62. Therefore, the pixel electrode 59 and the capacitor electrode 61 have the same potential, and an auxiliary capacitor is formed by the auxiliary capacitor line 55 and the capacitor electrode 61.
[0007]
[Problems to be solved by the invention]
When the capacitance electrode is electrically connected to the auxiliary capacitance line or the signal line, a voltage applied to the pixel electrode leaks through the connection portion, which causes display failure. For example, the foreign matter 73 is mixed in the gate insulating film 56 to short-circuit the auxiliary capacitance wiring 55 and the capacitance electrode 61, or the signal line 54 and the capacitance electrode 61 are short-circuited by a residue 74 due to poor etching during the formation of the signal line 54. There are cases. However, in the conventional examples shown in FIGS. 6 and 7 for such a pixel defect, the pixel could not be repaired.
[0008]
Therefore, there is a device in which a short-circuited portion is separated from a pixel electrode short-circuited to such an auxiliary capacitance line or a signal line by removing a part of the pixel electrode, thereby preventing a deterioration in display quality. Such a technique is described in, for example, JP-A-2000-221527. This forms a slit located on the auxiliary capacitance wiring near the center of the pixel electrode. When a short circuit occurs near the auxiliary capacitance, a portion from the slit to the edge of the pixel electrode is cut by a laser, and a portion including the short-circuited portion is made independent of the pixel electrode. FIG. 30 of JP-A-2001-83522 describes a method of repairing a short circuit in an MVA liquid crystal display. In the MVA method, a plurality of slits for alignment control are formed in a pixel electrode. Among these slits, a slit near the center of the pixel electrode is also formed on the auxiliary capacitance wiring. When a short circuit occurs, a part of the pixel electrode near the slit is cut with a laser to perform repair.
[0009]
However, when the pixel electrode is repaired by the conventional method, the storage capacitor does not function in the repaired pixel. In other words, as shown in FIGS. 6 and 7, when the pixel electrode and the capacitor electrode are electrically connected, the capacitor electrode is connected to the disconnected and independent pixel electrode, and the capacitor electrode is separated from the pixel electrode used for display. Therefore, the pixel electrode and the capacitor electrode do not have the same potential, and a storage capacitor cannot be formed between the capacitor electrode and the storage capacitor wiring. Therefore, even if a pixel is repaired and display is performed by that pixel, since there is no auxiliary capacitance, a voltage drop occurs due to the leakage of the charge of the pixel electrode when the TFT is OFF, and the pixel performs an appropriate display. Could not.
[0010]
SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal display which can repair a pixel having a pixel defect and suppress a decrease in display quality even after the repair.
[0011]
[Means for Solving the Problems]
In order to solve the above problem, the present invention provides a liquid crystal display device in which liquid crystal is sandwiched between a pair of substrates, and pixels are arranged in a matrix on the substrates. An insulating film covering the capacitor wiring, a capacitor electrode formed on the insulating film facing the auxiliary capacitor wiring, a protective film covering the capacitor electrode, and a contact hole formed in the protective film and exposing a part of the capacitor electrode. A pixel electrode formed in the pixel and connected to the capacitance electrode by a contact hole, a slit is formed in the pixel electrode to extend over the auxiliary capacitance line, and the capacitance electrode in one pixel is divided into two parts. Are respectively connected to the pixel electrodes, and the slit is located between a portion where one capacitor electrode is connected to the pixel electrode and a portion where the other capacitor electrode is connected to the pixel electrode.
[0012]
In a liquid crystal display device in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on a substrate, an auxiliary capacitance wiring formed on one substrate, an insulating film covering the auxiliary capacitance wiring, A capacitor electrode formed on the insulating film facing the capacitor wiring; a protective film covering the capacitor electrode; a contact hole formed in the protective film and exposing a part of the capacitor electrode; and a contact hole formed in the pixel. And a pixel electrode connected to the capacitor electrode, and a plurality of slits are formed in the pixel electrode over the auxiliary capacitance line, and the capacitance electrode is divided into a plurality of portions corresponding to the pixel electrodes separated by the slits on the auxiliary capacitance line. Each capacitor electrode is connected to a corresponding pixel electrode.
[0013]
Further, each capacitor electrode in one pixel has substantially the same size. Further, a plurality of slits are formed in the pixel electrode to regulate the tilt direction of the liquid crystal molecules, and a slit extending over the auxiliary capacitance line is connected to a slit located near the auxiliary capacitance line. In addition, a color filter corresponding to the pixel is formed on the other substrate, and a plurality of band-shaped protrusions that regulate the tilt direction of the liquid crystal molecules are formed on the color filter.
[0014]
Further, in a method for manufacturing a liquid crystal display in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrates, a step of forming scanning lines and auxiliary capacitance lines on one of the substrates substantially in parallel. Laminating an insulating film on the scanning line and the auxiliary capacitance line, forming a signal line orthogonal to the scanning line on the insulating film, and insulating a plurality of capacitance electrodes facing the auxiliary capacitance line in each pixel. A step of forming a protective film on the capacitor electrode, a step of forming a contact hole exposing a part of each capacitor electrode in the protective film, and a step of forming a capacitor in each pixel through the contact hole. Forming a pixel electrode connected to the electrode, forming a slit over the auxiliary capacitance line on each pixel electrode, and connecting to the capacitance electrode when the capacitance electrode is short-circuited with the auxiliary capacitance line or signal line One of the pixel electrodes Characterized by a step of dividing the frequency from the pixel electrode.
[0015]
Further, a step of forming a slit between a connection portion between each capacitor electrode and the pixel electrode, and a part of the pixel electrode from the edge of the pixel electrode to the slit along the capacitor electrode short-circuited with the auxiliary capacitor wiring or the signal line. It is characterized by having a removing step. Further, the capacitance electrode in each pixel is divided into two.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of an array substrate 10 having pixel electrodes, FIG. 2 is a cross-sectional view of a liquid crystal display along an auxiliary capacitance line 3, and FIG. It is a schematic diagram which shows a positional relationship.
[0017]
Reference numeral 1 denotes a first substrate constituting the array substrate 10, which is formed of a transparent substrate such as a glass substrate. Reference numeral 2 denotes a scanning line formed of Al or the like, and reference numeral 3 denotes an auxiliary capacitance line formed simultaneously with the scanning line 2. The scanning line 2 and the auxiliary capacitance line 3 are arranged in parallel. Reference numeral 4 denotes a gate insulating film laminated on the scanning line 2 and the auxiliary capacitance wiring 3, and a signal line 5 made of Al or Cr is formed on the gate insulating film 4. The signal lines 5 are arranged so as to be orthogonal to the scanning lines 2, and a region surrounded by the scanning lines 2 and the signal lines 5 corresponds to one pixel. A pixel electrode 6 made of ITO, IZO, or the like is formed in each pixel, and a TFT 7 as a switching element is arranged near an intersection of the scanning line 2 and the signal line 5. In the TFT 7, the gate electrode 7a is electrically connected to the scanning line 2, the source electrode 7b is electrically connected to the signal line 5, and the drain electrode 7c is electrically connected to the pixel electrode 6, respectively. A slit 8 is formed in the pixel electrode 6, and the slit 8 regulates the tilt direction of the liquid crystal molecules. Reference numeral 9 denotes a protective film that covers the signal lines 5 and the TFTs 7, and the pixel electrodes 6 are formed on the protective film 9. In this embodiment, only one protective film 9 is laminated between the signal line 5 and the pixel electrode 6, but two or more protective films may be laminated. The protective film 9 is provided with a contact hole 11 at a portion corresponding to the drain electrode 7c of the TFT 7, and the pixel electrode 6 is electrically connected to the drain electrode 7c via the contact hole 11. Reference numeral 12 denotes an alignment film that covers the pixel electrode 4 and has been subjected to a vertical alignment process. Thus, the array substrate 10 is formed.
[0018]
A counter substrate 20 is arranged to face the array substrate 10. Reference numeral 21 denotes a second substrate constituting the counter substrate 20, and the second substrate 21 is formed of a transparent substrate such as a glass substrate. A black matrix 22 is formed on the second substrate 21 so as to partition each pixel, and a color filter 23 corresponding to each pixel is formed in an opening of the black matrix 22. In the color filter 23, one of red (R), green (G), and blue (B) is arranged corresponding to each pixel. A counter electrode 24 made of, for example, ITO or IZO is laminated on the color filter 23, a projection 25 having a predetermined pattern is formed on the counter electrode 24, and the counter electrode 24 and the projection 25 are vertically aligned. It is covered with a film 26. Thus, the counter substrate 20 is formed.
[0019]
A liquid crystal layer 27 having a negative dielectric anisotropy is interposed between the two substrates 10 and 20. When no electric field exceeding a predetermined level is generated between the pixel electrode 6 and the counter electrode 24, the liquid crystal molecules 27 are regulated by the alignment films 12 and 26 and are vertically arranged. When an electric field is generated, the liquid crystal molecules 27 tilt in the horizontal direction. At this time, the liquid crystal molecules 27 are regulated by the slits 8 and the projections 25 and inclined in a predetermined direction, and form a plurality of domains in one pixel. FIG. 2 schematically shows a state where an electric field is generated between the pixel electrode 6 and the transparent electrode 15.
[0020]
A first polarizing plate 28 is disposed outside the first substrate 1, and a second polarizing plate 29 is disposed outside the second substrate 21. The transmission axes of the first polarizing plate 28 and the second polarizing plate 29 are different from each other. They are set to be orthogonal. When the transmission axes of the polarizing plates 28 and 29 and the tilt direction of the liquid crystal molecules 27 form about 45 ° when observed from the normal direction of the counter substrate 20, the transmitted light passes through the second polarizing plate 29 most efficiently. be able to. Since the liquid crystal molecules 27 are tilted in the direction of about 90 ° with respect to the projections 25 and the slits 8, the extending direction of the slits 8 and the projections 25 in the pixel and the transmission axis of the second polarizing plate 29 form about 45 °. Polarizing plates 19 and 20 are arranged as described above. In this embodiment, the transmission axis of the first polarizing plate 28 is set so as to match the extending direction of the scanning line 2, and the transmission axis of the second polarizing plate 29 is set so as to match the extending direction of the signal line 5.
[0021]
When an electric field of a predetermined magnitude or more is not generated between the pixel electrode 6 and the transparent electrode 15, the liquid crystal molecules 27 are vertically aligned, so that the linearly polarized light transmitted through the first polarizing plate 28 transmits the liquid crystal layer 18 to the linearly polarized light. The light passes as it is and is blocked by the second polarizing plate 29, and a black display is obtained. Further, when a predetermined voltage is applied to the pixel electrode 6 and an electric field is generated between the pixel electrode 6 and the transparent electrode 15, the liquid crystal molecules 27 are inclined in the horizontal direction. The transmitted light becomes elliptically polarized light by the liquid crystal layer 27, passes through the second polarizing plate 29, and becomes white display.
[0022]
Next, the shapes of the slit 8 and the projection 25 will be described. In FIG. 3, the projection 25 is indicated by a dotted line. A plurality of band-shaped protrusions 25 exist in one pixel, and each protrusion 25 extends in each pixel in a direction forming about 45 ° with the signal line 5 when viewed from the normal direction of the second substrate 21. ing. Each projection 25 is arranged in parallel with the adjacent projection 25, and is bent substantially at a right angle when the projection 25 extending from the edge of the pixel electrode 6 reaches the storage capacitor wiring 3. Therefore, the projections 25 in the pixel are arranged substantially vertically symmetrically with respect to the auxiliary capacitance line 3 as an axis. In this embodiment, the projections 25 are formed in a zigzag shape over a plurality of pixels, but the projections 25 may be provided independently for each pixel.
[0023]
The slit 8 formed in the pixel electrode 6 is located between the adjacent projections 25 and parallel to the projections 25 when viewed from the normal direction of the counter substrate 20. Therefore, the slit 8 is also substantially symmetrical about the auxiliary capacitance wiring 3 in the vertical direction. Among the slits 8 in the pixel, a slit 8a located near the center of the pixel is formed so as to straddle the auxiliary capacitance line 3, and is bent substantially at a right angle on the auxiliary capacitance line 3 like the adjacent protrusion 25. By forming the slit 8a near the auxiliary capacitance line 3 so as to straddle the auxiliary capacitance line 3, the pixel electrode 6 can be repaired for a pixel defect described later.
[0024]
Next, the configuration of the storage capacitor will be described. Numeral 13 denotes a capacitance electrode arranged opposite to the auxiliary capacitance line 3 and is formed simultaneously with the signal line 5. The capacitance electrode 13 is formed on the gate insulating film 4, has a size that does not protrude from the auxiliary capacitance line 3, and is covered by the protection film 9. Reference numeral 14 denotes a contact hole formed in the protective film 9, and the capacitor electrode 13 is connected to the pixel electrode 6 via the contact hole 14. Therefore, the capacitance electrode 13 has the same potential as the pixel electrode 6, and forms an auxiliary capacitance between the capacitance electrode 13 and the auxiliary capacitance line 3. The capacitance electrode 13 in one pixel is divided into two substantially equal sizes, and each capacitance electrode 13 is connected to the pixel electrode 6 existing on the left and right with the slit 8 interposed therebetween. That is, in FIG. 2, the capacitance electrode 13 located on the right side is connected to the pixel electrode 6 located on the right side of the slit 8, and the capacitance electrode 13 located on the left side is connected to the pixel electrode 6 located on the left side of the slit 8.
[0025]
Next, a repair method when the capacitance electrode 13 is short-circuited with the auxiliary capacitance wiring 3 or the signal line 5 will be described with reference to FIGS. FIGS. 4 and 5 are plan views showing a repaired state when the capacitor electrode 13 is short-circuited. In FIG. 4, a residue 30 due to poor etching exists between the right capacitor electrode 13 a and the signal line 5, and the capacitor electrode 13 a and the signal line 5 are short-circuited. When the pixel is repaired, a part of the pixel electrode 6 is removed by laser, and two grooves 31 are formed in the pixel electrode 6. The groove 31 is formed along the auxiliary capacitance line 3 from the slit 8 to the right edge of the pixel electrode 6, and separates the pixel electrode 6a connected to the short-circuited capacitance electrode 13a from other portions. As a result, the pixel electrode 6 separated from the pixel electrode 6a is separated from the short-circuited capacitor electrode 13a, so that a desired display can be performed by this pixel. Furthermore, since the auxiliary capacitance is formed by the left capacitance electrode 13b, the leakage of the electric charge of the pixel electrode 6 can be suppressed even during the holding period in the pixel electrode 6, and the optimum display can be performed.
[0026]
FIG. 5 shows a case where the capacitance electrode 13b located on the left side is short-circuited. Foreign matter 32 exists between the capacitance electrode 13b and the auxiliary capacitance line 3, and the capacitance electrode 13b has the same potential as the auxiliary capacitance line 3. At this time, two grooves 31 are formed in the pixel electrode 6 by laser. This groove 31 is also formed along the auxiliary capacitance line 3 as in the case of FIG. 4, and is formed from the slit 8 to the left edge of the pixel electrode 6. The groove 31 separates the pixel electrode 6b connected to the capacitor electrode 13b from other portions. At this time, since the auxiliary capacitance is formed by the right capacitance electrode 13a, the pixel electrode 6 can maintain a predetermined charge during the holding period. The size of the groove 31 of the pixel electrode 6 is not particularly limited as long as the pixel electrode 6 connected to the short-circuited capacitor electrode 13 can be separated from other portions.
[0027]
As described above, in the present invention, since the capacitor electrode 13 is divided into a plurality of parts and each of the capacitor electrodes 13 is connected to the pixel electrode 6 in a different region among the pixel electrodes 6 separated by the slits 8, for example, the signal Even when the pixel is short-circuited to the line 5 or the like, the auxiliary capacitance can be left in the pixel after the pixel is repaired.
[0028]
If the capacitance electrode 13 is divided into substantially equal sizes in one pixel, even if any of the capacitance electrodes 13 is short-circuited, an auxiliary capacitance having substantially the same capacity can be left, and even after the pixel is repaired, the same capacity is maintained. Auxiliary capacity can be secured.
[0029]
In this embodiment, the capacitance electrode is divided into two, but may be divided into three or more. At this time, on the auxiliary capacitance wiring 3, it is preferable to provide independent capacitance electrodes for each region where the pixel electrode 6 is divided by the slits 8. That is, the same number of capacitor electrodes 13 as the number of regions divided by the slits 8 are formed, and the capacitor electrodes 13 connected to the pixel electrodes 6 in the respective regions are arranged for each region. By doing so, it is possible to minimize the decrease in the auxiliary capacitance after repairing the pixel defect.
[0030]
【The invention's effect】
According to the present invention, when a capacitor electrode is short-circuited with a signal line or an auxiliary capacitance line to cause a pixel defect, the auxiliary capacitance exists even after the pixel is repaired, so that a deterioration in display quality can be prevented. .
[Brief description of the drawings]
FIG. 1 is a plan view of an array substrate of a liquid crystal display according to an embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view along an auxiliary capacitance line of the liquid crystal display of the present invention.
FIG. 3 is a schematic diagram showing a positional relationship between a protrusion of the present invention and a slit of a pixel electrode.
FIG. 4 is a schematic diagram showing a repaired state when the capacitor electrode of the present invention is short-circuited to a signal line.
FIG. 5 is a schematic diagram showing a repaired state when the capacitance electrode of the present invention is short-circuited to an auxiliary capacitance wiring.
FIG. 6 is a plan view of an array substrate of a conventional liquid crystal display.
FIG. 7 is a cross-sectional view along a storage capacitance line of a conventional liquid crystal display.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 first substrate 3 auxiliary capacitance wiring 5 signal line 6 pixel electrode 8 slit 10 array substrate 13 capacitance electrode 14 contact hole 20 counter substrate 21 second substrate 25 protrusion

Claims

In a liquid crystal display device in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, an auxiliary capacitance line formed on one substrate, an insulating film covering the auxiliary capacitance line, A capacitor electrode formed on the insulating film in opposition to the auxiliary capacitor wiring, a protective film covering the capacitor electrode, a contact hole formed in the protective film and exposing a part of the capacitor electrode, And a pixel electrode connected to the capacitor electrode at the contact hole, a slit is formed in the pixel electrode so as to extend over the auxiliary capacitor line, and the capacitor electrode in one pixel is divided into two parts. Electrodes are respectively connected to the pixel electrodes, and the slit is located between a portion where one capacitor electrode is connected to the pixel electrode and a portion where the other capacitor electrode is connected to the pixel electrode. The liquid crystal display device according to claim.

In a liquid crystal display device in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrate, an auxiliary capacitance line formed on one substrate, an insulating film covering the auxiliary capacitance line, A capacitor electrode formed on the insulating film in opposition to the auxiliary capacitor wiring, a protective film covering the capacitor electrode, a contact hole formed in the protective film and exposing a part of the capacitor electrode, A pixel electrode connected to the capacitance electrode at the contact hole, a plurality of slits are formed in the pixel electrode over the auxiliary capacitance line, and the capacitance electrode is separated by the slit on the auxiliary capacitance line. A liquid crystal display, wherein the liquid crystal display is divided into a plurality of parts corresponding to the pixel electrodes, and each capacitance electrode is connected to the corresponding pixel electrode.

3. The liquid crystal display according to claim 1, wherein each capacitance electrode in one pixel has substantially the same size.

A plurality of slits are formed in the pixel electrode to regulate the tilt direction of liquid crystal molecules, and a slit straddling the auxiliary capacitance line is connected to a slit located near the auxiliary capacitance line. Item 6. A liquid crystal display according to any one of items 3.

A color filter corresponding to a pixel is formed on the other substrate, and a plurality of band-shaped protrusions for regulating a tilt direction of liquid crystal molecules are formed on the color filter. 5. The liquid crystal display according to any one of the above items 4.

In a method for manufacturing a liquid crystal display in which liquid crystal is sandwiched between a pair of substrates and pixels are arranged in a matrix on the substrates, a step of forming scanning lines and auxiliary capacitance lines on one of the substrates substantially in parallel, A step of stacking an insulating film on the scanning line and the auxiliary capacitance line, a step of forming a signal line orthogonal to the scanning line on the insulating film, and a plurality of capacitance electrodes facing the auxiliary capacitance line in each pixel Forming a contact hole on the insulating film, laminating a protective film on the capacitor electrode, forming a contact hole exposing a part of each capacitor electrode in the protective film, and forming a contact in each pixel. Forming a pixel electrode connected to the capacitance electrode through a hole, forming a slit over the auxiliary capacitance line on each pixel electrode, and short-circuiting the capacitance electrode with the auxiliary capacitance line or the signal line. Edge The method of manufacturing a liquid crystal display device characterized by having a step of dividing a portion of the pixel electrode connected to the capacitor electrode from the pixel electrode.

Forming the slit between the connection portions between the respective capacitor electrodes and the pixel electrode, and removing a part of the pixel electrode from the edge of the pixel electrode to the slit along the capacitor electrode short-circuited with the auxiliary capacitance wiring or the signal line The method for manufacturing a liquid crystal display according to claim 6, comprising a step.

8. The liquid crystal display according to claim 6, wherein a capacitance electrode in each pixel is divided into two.