JP2004088239A - Solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device capable of outputting signals with different resolution without the need for external provision of a control circuit. <P>SOLUTION: The solid-state imaging device 1 including a first sensor array 2 for transferring electric charges stored in its output section side at all times and a second sensor array 3 for transferring the electric charges stored in its output section side depending on an output resolution, wherein the sensor arrays are placed in parallel, is provided with: a control circuit for controlling a clock pulse to transfer the electric charges stored in the second sensor array; and terminals used to give a signal, for determining supply of an output of the second sensor array to an overflow drain, to the control circuit. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a solid-state imaging device. Specifically, each sensor row includes a first sensor row that constantly transfers the charge accumulated on the output section side, and a second sensor row that transfers the charge accumulated on the output section side according to the output resolution. Relates to solid-state imaging devices arranged in parallel.
[0002]
[Prior art]
Horizontal charge transfer in which pixels composed of photodiodes that accumulate an amount of charge corresponding to input light are one-dimensionally arranged, and charges from these pixels are transferred to an output unit side by a charge transfer device of a charge coupled device (CCD). CCD linear sensors having a section are used in many fields such as copying, facsimile, OCR, pattern recognition, and various types of measurement, and in recent years, those capable of obtaining different resolutions as necessary have been developed.
Hereinafter, a conventional CCD linear sensor will be described with reference to the drawings.
[0003]
FIG. 5 is a schematic diagram for explaining a conventional CCD linear sensor. The CCD linear sensor 101 shown here can output signals with resolutions of 2400 dpi and 1200 dpi, and the main line sensor line 102, the sub line sensor line 103 and the main line sensor line which are arranged at a half pitch from the main line sensor line. The first read gate 104 provided adjacent to the main line and reads out the charge taken in by the main line sensor row, the second read gate 105 provided adjacent to the sub line sensor row and reads out the charge taken in by the sub line sensor row, A first horizontal charge transfer unit provided adjacent to the read gate and transferring the charge read by the first read gate to the output unit side; read by a second read gate provided adjacent to the second read gate Output charge Of the second horizontal charge transfer unit 107, the third horizontal charge transfer unit 108 and the 1200 dpi which add the charges transferred by the first horizontal charge transfer unit and the second horizontal charge transfer unit and transfer the added charges to the output unit side. A Sub line Overflow Drain 109, which is a transfer destination of the charge captured by the Sub line sensor array when outputting a resolution signal, is provided.
[0004]
In order to obtain an output signal with a resolution of 2400 dpi in the CCD linear sensor configured as described above, the electrode (1) indicated by A in FIG. 5 (hereinafter referred to as Hφ1) is indicated by F in FIG. A drive pulse is applied at the timing, and a drive pulse is applied at the timing indicated by reference G in FIG. 6 to the electrode (2) (hereinafter referred to as Hφ2) indicated by reference B in FIG. (Hereinafter referred to as Hφ3) at a timing indicated by reference numeral H in FIG. 6, and a drive pulse is applied to an electrode (4) indicated by reference numeral D in FIG. 5 (hereinafter referred to as Hφ4). And a drive pulse is applied to the electrode (5) (hereinafter referred to as Hφ5) indicated by reference numeral E in FIG. 5 at the timing indicated by reference numeral F in FIG.
That is, by applying a drive pulse to the Hφ1 and Hφ2 of the first horizontal charge transfer unit at the timings indicated by reference numerals F and G in FIG. 6, the data is captured by the main line sensor array, and is applied to the first horizontal charge transfer unit by the first readout gate. The read charges are transferred at 5 MHz in the direction of the output section, and drive pulses are applied to Hφ1 and Hφ2 of the second horizontal charge transfer section at timings indicated by reference numerals F and G in FIG. By applying a driving pulse at the timing indicated by F, the sub-line sensor array captures the charges, reads out the charges read out to the second horizontal charge transfer unit by the second readout gate at 5 MHz in the direction of the output unit, and transfers the third horizontal charges. By applying drive pulses to the transfer units Hφ3 and Hφ4 at the timings indicated by reference symbols H and I in FIG. And the electric charges transferred by the second horizontal charge transfer unit are added and transferred at 10 MHz toward the output unit, and a signal having a resolution of 2400 dpi is output from the output unit.
When a signal having a resolution of 2400 dpi is output, the drive pulse is supplied to Hφ5 at the timing indicated by the symbol F in FIG. 6 so that the charge read out to the second horizontal charge transfer unit is output to the third horizontal charge transfer unit. Will be forwarded to
[0005]
In order to obtain an output signal having a resolution of 1200 dpi, a drive pulse is applied to Hφ1 at a timing indicated by reference F in FIG. 6, a drive pulse is applied to Hφ2 at a timing indicated by reference G in FIG. A drive pulse is applied at the timing indicated by the middle symbol H, a drive pulse is applied to Hφ4 at the timing indicated by the reference symbol I in FIG. 6, and a drive pulse is applied to Hφ5 at the timing indicated by the reference symbol J in FIG.
That is, the drive pulse is given to Hφ1 and Hφ2 of the first horizontal charge transfer unit at the timings indicated by reference symbols F and G in FIG. The charge read out to the first horizontal charge transfer unit by the first readout gate is transferred at 5 MHz in the direction of the output unit, and the timing indicated by reference numerals F and G in FIG. 6 is applied to Hφ1 and Hφ2 of the second horizontal charge transfer unit. And a drive pulse is applied to Hφ5 at the timing indicated by reference symbol J in FIG. 6 to capture the data in the Sub line sensor array, and the charges read out by the second readout gate to the second horizontal charge transfer unit to Hφ5. The third horizontal charge transfer unit transfers the charge from Hφ5 to the Sub line Overflow Drain. By applying a drive pulse to Hφ3 and Hφ4 at the timings indicated by reference symbols H and I in FIG. 6, the charges transferred by the first horizontal charge transfer unit are transferred toward the output unit at 10 MHz, and a resolution of 1200 dpi is obtained from the output unit. The signal of is output.
When a signal having a resolution of 1200 dpi is output, a drive pulse is applied to Hφ5 at a timing indicated by a symbol J in FIG. 6 so that the charge read out to the second horizontal charge transfer unit is transferred to the Sub line Overflow Drain. And is not transferred to the third horizontal charge transfer unit.
[0006]
Here, in the conventional CCD linear sensor, the resolution of the output signal is changed depending on whether the driving pulse given to Hφ5 is the timing indicated by the reference F in FIG. 6 or the timing indicated by the reference J in FIG. However, as shown in FIG. 7, the resolution of the signal output from the CCD linear sensor is changed by controlling the timing of the driving pulse given to Hφ5 by the external control circuit 110.
That is, when a drive pulse at the timing indicated by the symbol F in FIG. 6 is input to the external control circuit and a signal having a resolution of 2400 dpi is output from the CCD linear sensor, the control is not performed by the external control circuit and the input signal is left as it is. A drive pulse having the timing indicated by the symbol F in FIG. 6 is applied to Hφ5 to output a signal with a resolution of 1200 dpi from the CCD linear sensor. Thus, the resolution of the signal output from the CCD linear sensor is changed by giving a drive pulse at the timing indicated by the symbol J in FIG. 6 to Hφ5.
7 is a drive pulse given to the CCD linear sensor at the timing shown by reference F in FIG. 6, reference G in FIG. 7 is a drive pulse given to the CCD linear sensor at the timing shown by reference G in FIG. A reference symbol H indicates a drive pulse applied to the CCD linear sensor at the timing indicated by reference symbol H in FIG. 6, and a reference symbol I in FIG. 7 indicates a drive pulse applied to the CCD linear sensor at the timing indicated by reference symbol I in FIG.
[0007]
[Problems to be solved by the invention]
By the way, in the conventional CCD linear sensor, a control circuit had to be provided outside in order to change the resolution of the output signal as described above.
That is, when outputting signals of different resolutions from the CCD linear sensor, drive pulses of different timing must be applied to Hφ5, and a chip for controlling the timing of the drive pulse applied to Hφ5 outside the CCD linear sensor is provided. In a device incorporating a CCD linear sensor, there are disadvantages in terms of manufacturing cost and installation space.
[0008]
The present invention has been made in view of the above points, and has as its object to provide a solid-state imaging device capable of outputting signals having different resolutions without providing a control circuit externally. .
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a solid-state imaging device according to the present invention includes a first sensor array that constantly transfers charges accumulated on an output unit side, and a charge accumulated on an output unit side according to a resolution to be output. A control circuit for controlling a clock pulse for transferring charges accumulated in the second sensor row in a solid-state image sensor arranged in parallel with each other; A terminal for inputting, to the control circuit, a signal for determining that the output of the second sensor array flows to the overflow drain.
[0010]
Here, a signal that determines how the clock pulse is controlled by the terminal for the control circuit can be input to the control circuit.
In addition, the control circuit controls a clock pulse applied to the second sensor row, which determines a transfer destination of the charge accumulated in the second sensor row.
[0011]
Further, the solid-state imaging device according to the present invention includes a first sensor array for constantly transferring the charge accumulated on the output unit side and a second sensor array for transferring the charge accumulated on the output unit side in accordance with the output resolution. A control circuit for controlling a clock pulse for transferring charges accumulated in the second sensor row, in the solid-state image sensors arranged in parallel with a relative shift of a predetermined pitch in each sensor row; A terminal for inputting, to the control circuit, a signal for determining that the output of the second sensor array flows to the overflow drain.
[0012]
Here, by arranging the sensor rows in parallel with a relative shift of a predetermined pitch, it is possible to more clearly recognize an image in each sensor row.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings to provide an understanding of the present invention. In the following embodiment, the main line sensor line and the sub line sensor line are arranged at a resolution of 2400 dpi and 1200 dpi while being shifted by a half pitch. However, the embodiment can be implemented at any resolution. Obviously, the present invention can be implemented as long as the horizontal charge transfer units are shared.
[0014]
FIG. 1 is a schematic diagram for explaining a CCD linear sensor which is an example of a solid-state imaging device to which the present invention is applied. The CCD linear sensor 1 shown here can output signals with resolutions of 2400 dpi and 1200 dpi similarly to the above-described conventional CCD linear sensor, and has a main line sensor row 2 and a sub line sensor arranged at a half pitch from the main line sensor row. Row 3, a first read gate 4 provided adjacent to the main line sensor row and reading out the charge taken in by the main line sensor row, and a first readout gate 4 provided adjacent to the sub line sensor row to read out the charge taken in by the sub line sensor row. A first horizontal charge transfer section 6 provided adjacent to the second read gate 5 and the first read gate for transferring the charge read by the first read gate to the output section side; provided adjacent to the second read gate; The charge read by the second read gate is A second horizontal charge transfer unit 7 for transferring to the output unit, a third horizontal charge transfer unit 8 for adding the charges transferred by the first and second horizontal charge transfer units and transferring to the output unit; A Sub line Overflow Drain 9 is provided, which is a transfer destination of the charge captured by the Sub line sensor array when outputting a signal with a resolution of 1200 dpi.
[0015]
FIG. 2 is a schematic diagram for explaining an example of a switch circuit built in the CCD linear sensor. The switch circuit shown here has a switch (1) 10 and a switch (2) 11, and the switch (1) is arranged at a position where an input signal to the switch circuit can be output from the switch circuit in an ON state. ) Is arranged at a position where a constant voltage, for example, a ground level signal can be output from the switch circuit irrespective of the input signal to the switch circuit in the ON state.
Here, when the switch circuit control pulse applied to the switch circuit is at a low level (hereinafter referred to as L level), the switch (1) is turned on and the switch (2) is turned off, and the signal input to the switch circuit is turned on. Is directly output from the switch circuit. When a switch circuit control pulse applied to the switch circuit is at a high level (hereinafter, referred to as an H level), the switch (1) is turned off and the switch (2) is turned on. Is output from the switch circuit.
Note that the symbol x in FIG. 2 indicates a signal input to the switch circuit, and the symbol y in FIG. 2 indicates a signal output from the switch circuit. The signal output from the switch circuit is supplied to Hφ5 indicated by a symbol e in FIG.
[0016]
When an output signal with a resolution of 2400 dpi is obtained in the CCD linear sensor configured as described above, Hφ1 indicated by reference symbol a in FIG. 1 is indicated by reference symbol f in FIG. 3, as in the above-described conventional CCD linear sensor. A drive pulse is applied at the timing, a drive pulse is applied to Hφ2 indicated by reference numeral b in FIG. 1 at a timing indicated by reference numeral g in FIG. 3, and a drive pulse is applied to Hφ3 indicated by reference numeral c in FIG. A drive pulse at a timing indicated by reference numeral i in FIG. 3 is supplied to Hφ4 indicated by reference numeral d in FIG. 1, and a drive pulse at a timing indicated by reference numeral f in FIG. Is supplied with an L-level switch circuit control pulse.
That is, by giving an L level switch circuit control pulse to the switch circuit, a drive pulse having the timing indicated by reference symbol f in FIG. 3 input to the switch circuit is output from the switch circuit, and the timing indicated by reference symbol f in FIG. , A signal having a resolution of 2400 dpi is output from the CCD linear sensor.
[0017]
Also, when an output signal having a resolution of 1200 dpi is obtained, similarly to the above-described conventional CCD linear sensor, a driving pulse is applied to Hφ1 at a timing indicated by a symbol f in FIG. 3, and a timing indicated by a symbol g in FIG. , A drive pulse is applied to Hφ3 at a timing indicated by reference numeral h in FIG. 3, a drive pulse is applied to Hφ4 at a timing indicated by reference numeral i in FIG. 3, and a timing indicated by reference numeral f in FIG. , And an H-level switch circuit control pulse is applied to the switch circuit.
That is, by giving an H level switch circuit control pulse to the switch circuit, a drive pulse signal at the timing indicated by reference numeral j in FIG. 3 which is the ground level is output from the switch circuit, and Hφ5 is indicated by reference numeral j in FIG. By giving a timing drive pulse, a signal having a resolution of 1200 dpi is output from the CCD linear sensor.
[0018]
Here, in the CCD linear sensor as an example of the solid-state imaging device to which the present invention is applied, the first horizontal charge transfer unit and the second horizontal charge transfer unit transfer charges at 5 MHz, whereas the third horizontal charge transfer unit transfers charges at 5 MHz. The transfer unit is configured to transfer charges at 10 MHz, and when outputting a signal with a resolution of 2400 dpi, transfers the charges transferred by the first horizontal charge transfer unit and the second horizontal charge transfer unit to a third signal. If the first horizontal charge transfer section and the second horizontal charge transfer section transfer charges at 5 MHz, the third horizontal charge transfer section must transfer charges at 10 MHz in order to add and transfer at the horizontal charge transfer section. However, when outputting a signal with a resolution of 1200 dpi, since the third horizontal charge transfer unit transfers only the charges transferred by the first horizontal charge transfer unit, the third horizontal charge transfer unit is not necessarily charged. There is no need to transfer at 10MHz, and may be a charge similar to the first horizontal charge transfer part transfers at 5 MHz.
[0019]
In the CCD linear sensor which is an example of the solid-state imaging device to which the above-described present invention is applied, the CCD linear sensor can output a signal with a resolution of 2400 dpi or a signal with a resolution of 1200 dpi as shown in FIG. In FIG. 3, the resolution output from the CCD linear sensor can be changed by applying a drive pulse at the timing indicated by the symbol f in FIG. 3 and applying a switch circuit control pulse to the switch circuit.
4 is a drive pulse applied to Hφ1 of the CCD linear sensor at the timing indicated by the symbol f in FIG. 3, and the symbol f ′ in FIG. 4 is built in the CCD linear sensor at the timing indicated by the symbol f in FIG. A drive pulse input to the switch circuit, a reference numeral g in FIG. 4 denotes a drive pulse applied to the CCD linear sensor at the timing indicated by reference numeral g in FIG. 3, and a reference numeral h in FIG. 4 denotes a CCD linear sensor at the timing indicated by reference numeral h in FIG. The symbol i in FIG. 4 indicates a drive pulse applied to the CCD linear sensor at the timing indicated by the symbol i in FIG. Reference numeral k in FIG. 4 indicates a switch circuit control pulse applied to the switch circuit. When a signal having a resolution of 2400 dpi is output, a switch circuit control pulse is supplied at the timing indicated by reference numeral k in FIG. In the case of outputting a signal having a resolution of?, A switch circuit control pulse is given at the timing indicated by the symbol k 'in FIG.
[0020]
In the CCD linear sensor which is an example of the solid-state imaging device to which the present invention is applied, it is necessary to provide a switch circuit chip in order to incorporate a switch circuit for controlling the timing of a drive pulse given to Hφ5, or to provide a switch circuit chip from outside. There is no need to provide a switch circuit in a timing generator (hereinafter, referred to as TG) for generating a driving pulse to be input, and a general-purpose TG can be used. Can be improved.
[0021]
【The invention's effect】
As described above, according to the solid-state imaging device of the present invention, signals having different resolutions can be output without providing a control circuit externally.
[Brief description of the drawings]
FIG. 1 is a schematic diagram for explaining a CCD linear sensor as an example of a solid-state imaging device to which the present invention is applied.
FIG. 2 is a schematic diagram for explaining an example of a switch circuit built in a CCD linear sensor which is an example of a solid-state imaging device to which the present invention is applied.
FIG. 3 is a diagram for explaining the operation timing of each drive pulse given to a CCD linear sensor as an example of a solid-state imaging device to which the present invention is applied.
FIG. 4 is a schematic diagram for explaining drive pulses applied to a CCD linear sensor as an example of a solid-state imaging device to which the present invention has been applied.
FIG. 5 is a schematic diagram for explaining a conventional CCD linear sensor.
FIG. 6 is a diagram for explaining the operation timing of each drive pulse given to a conventional CCD linear sensor.
FIG. 7 is a schematic diagram for explaining a drive pulse given to a conventional CCD linear sensor.
[Explanation of symbols]
Reference Signs List 1 CCD linear sensor 2 Main line sensor row 3 Sub line sensor row 4 First read gate 5 Second read gate 6 First horizontal charge transfer section 7 Second horizontal charge transfer section 8 Third horizontal charge transfer section 9 Sub line Overflow Drain
10 switches (1)
11 switch (2)

Claims (2)

It has a first sensor array for constantly transferring charges accumulated on the output unit side, and a second sensor array for transferring charges accumulated on the output unit side in accordance with the output resolution. In the arranged solid-state imaging device,
A control circuit for controlling a clock pulse for transferring charges accumulated in the second sensor row;
A solid-state imaging device comprising: a terminal for inputting, to a control circuit, a signal for determining that an output of the second sensor array flows to an overflow drain. It has a first sensor array for constantly transferring charges accumulated on the output unit side, and a second sensor array for transferring charges accumulated on the output unit side in accordance with the output resolution. Solid-state imaging device arranged in parallel with a predetermined pitch
A control circuit for controlling a clock pulse for transferring charges accumulated in the second sensor row;
A solid-state imaging device comprising: a terminal for inputting, to a control circuit, a signal for determining that an output of the second sensor array flows to an overflow drain.

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