JP2004086295A - Nand type flash memory disk drive and method for logical address detection - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a NAND type flash memory disk drive and a method for logical address detection. <P>SOLUTION: According to the NAND type flash memory disk drive and method for logical address detection, a partial and reverse-direction physical/logical address mapping table is initially constructed by replication in RAM at system startup. Then, the function of the memory disk drive composed of hardware such as a counter and a comparator are utilized to search a partial physical/logical address mapping table in the RAM sequentially, so as to find out a logical address corresponding to a physical address. The present application thereby enables to obtain an effective balance point in terms of speed and space, and prevents the occupation of large space on the precondition that a high processing speed is maintained. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a kind of NAND flash memory disk device and a method of detecting a logical address, and more particularly, to a physical / logical address mapping table (Address Mapping Table or Look-Up) using a semiconductor disk device.
Table) and a method for detecting a logical address by using the address mapping table.
[0002]
[Prior art]
In the operating principle of the memory, when the microprocessor uses the memory as a data storage area, both the calculation result and the data are stored here, and if the program needs to retrieve the data, it retrieves it from the storage area. . When storing and reading data, the microprocessor defines the location of the memory in the required information, transmits the address to the memory through the location bus, and then accurately transmits the data to the corresponding address. Most important to the memory is the time of the read, which is the microprocessor issuing the instruction and then obtaining the address data, the memory transmitting the data to the microprocessor after responding, and the microprocessor receiving the data reliably Until the time. The time required for this process is the memory access time.
[0003]
In the flash memory, data is stored and read in units of blocks each composed of a few bytes, and each block provided for each data access has one physical address (Physical Address). This represents a spatial order in a flash memory, for example, a location of a physical memory in an SRAM, and each one block has a logical address (Logical Address) indicated by a file system (FileSystem). As shown in FIG. 1A, each one physical address has a corresponding logical address. However, in the flash mechanism, the physical address and the logical address required for file system data access are in a non-linear correspondence, and the location of the logical address cannot be directly inferred from the physical address. Usually, corresponding logical addresses are obtained by two types of methods.
[0004]
The first type of method is to first construct a logical / physical address mapping table at system start-up, which is a table for recording the correspondence between logical addresses and physical addresses, and that a plurality of SRAMs are designed to perform this address mapping. Save and record the table. As shown in FIG. 1, when constructing an address mapping table, the arrangement order of logical addresses is main, the corresponding physical address positions are included in the contents of the table grid, and the original logical addresses are irregular. If it is not arranged once from the beginning to the end, an address mapping table as shown in FIG. 1B cannot be constructed, and this address mapping table is stored in the SRAM. Even when it is desired to build a part of the forward physical / logical address mapping table to save SRAM, the logical address contents in the memory must be searched and arranged from beginning to end. When the system accesses data, first, a search standby logical address is provided, and an address mapping table in the SRAM is searched using software, whereby a physical address corresponding to the logical address can be obtained quickly. As described above, the method of searching for a logical address using the address mapping table has the advantages that the address conversion time is short and the processing speed is fast, but it is necessary to record all address correspondences with a large amount of SRAM. Occupies a considerable space area. And now different IC functions are integrated into one single system chip, the number of SRAMs is fixed, and the number of SRAMs cannot be increased at any time as needed, thus limiting the use.
[0005]
The method of knowing the physical address from the other logical address is a design without SRAM, and does not need to construct any address mapping table, and slightly uses a software program to determine the logical address corresponding to the physical address every time. When searching, the search is started from the head in the memory, and the search is performed until a necessary logical address is searched. Such a system is designed without an SRAM and therefore does not occupy space, but it is necessary to start the search each time a logical address is searched from the beginning, the search is slow, and the data access speed of the memory is considerably slow. .
[0006]
[Problems to be solved by the invention]
Thus, the present invention overcomes the well-known drawbacks by obtaining an effective equilibrium point in the above two types of physical address / logical address conversion schemes, and at the same time, considering the speed and space issues, Effectively improve data access performance.
[0007]
SUMMARY OF THE INVENTION It is a primary object of the present invention to provide a kind of NAND flash memory disk device and a method of logical address detection, which first constructs a reverse partial physical / logical address mapping table and uses hardware. Then, a physical / logical address mapping table is searched to obtain a logical address corresponding to the physical address.
[0008]
It is another object of the present invention to provide a kind of NAND flash memory disk device and a method of logical address detection, which combines hardware calculation with the use of a small amount of RAM to increase the number of RAMs. The processing speed of the semiconductor disk device is increased on the assumption that the space is not increased.
[0009]
[Means for Solving the Problems]
According to a first aspect of the present invention, in a NAND flash memory disk device, at the time of system startup, the relationship between a physical address and its corresponding logical address is directly copied to construct a partial physical / logical address mapping table. The search standby logical address is searched using the flash memory disk device.
A counter for successively sending address signals,
A RAM which internally records the partial physical / logical address mapping table, obtains a corresponding logical address signal from the partial physical / logical address mapping table based on the address signal, and transmits it;
After receiving the logical address signal and the search standby logical address and comparing them, if the two logical addresses are the same, that is, obtain the search standby logical address and its corresponding physical position, and operate the counter. To stop the comparator and
And a NAND-type flash memory disk device.
According to a second aspect of the present invention, in the NAND flash memory disk device according to the first aspect, when a required logical address is not loaded in the partial physical / logical address mapping table in the RAM, another one is continued. This is a NAND flash memory disk device characterized by replicating and constructing a partial physical / logical address mapping table.
According to a third aspect of the present invention, in the NAND flash memory disk device according to the first aspect, the RAM is an SRAM.
According to a fourth aspect of the present invention, there is provided the NAND-type flash memory disk device according to the first aspect, wherein the search standby logical address is sent from a computer system. .
According to a fifth aspect of the present invention, in the method for detecting a logical address,
Building a partial physical / logical address mapping table by directly duplicating the relationship between a physical address and its corresponding logical address at system startup, and storing it in a RAM;
When the system transmits a search standby logical address to one comparator, first, an address signal is sent to the RAM using a counter;
The RAM obtaining a corresponding logical address signal from the partial physical / logical address mapping table based on the address signal, and transmitting it to the comparator;
The comparator compares whether the logical address signal and the search standby logical address are the same, and if the two logical addresses are the same, causes the counter to shut down, thus the search standby logical address and its corresponding logical address. Obtaining an entity position;
And a method of detecting a logical address.
According to a sixth aspect of the present invention, in the method for detecting a logical address according to the fifth aspect, when a necessary logical address is not loaded in the partial physical / logical address mapping table in the RAM, another part is continued. A logical address detection method is characterized by replicating and constructing a physical / logical address mapping table.
According to a seventh aspect of the present invention, there is provided the logical address detecting method according to the fifth aspect, wherein the RAM is an SRAM.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
According to the NAND-type flash memory disk device and the logical address detection method of the present invention, at the time of system startup, first, the relationship between the physical address and the corresponding logical address is directly copied to construct the reverse partial physical / logical address mapping table. And save it in SRAM. Since the reverse partial physical / logical address mapping table is constructed according to the present invention, there is no need to fundamentally arrange from the beginning to the end, and the logical address contents of some flash memories may be copied. When the system host accesses the data, it first provides a search standby logical address to the comparator, where one counter transmits one address signal to the SRAM, which is built in based on the address signal. Obtain the corresponding logical address signal from the partial physical / logical address mapping table and send it to the comparator, which compares this logical address signal with the search standby logical address provided by the system, and If the addresses are the same, the counter stops running.
[0011]
【Example】
According to the present invention, at the time of system startup, a partial reverse address mapping table, that is, a partial physical / logical address mapping table is duplicated and constructed, and the operation of hardware such as a counter and a comparator is used. , Combining the characteristics of the continuous reading of the RAM itself and searching the partial physical / logical address mapping table in the RAM to obtain a logical address corresponding to the physical address.
[0012]
When used for storing and reading data in a flash memory, each one of the blocks provided for data access has one physical address and represents an actual physical memory location in the memory. As shown in FIG. 2A, each one block has a physical location and a corresponding logical address, and the physical address and the logical address have a non-linear correspondence. When initialization is performed at the time of system startup, first, based on the relation table shown in FIG. 2A, a part of the reverse address mapping table is duplicated and constructed, and as shown in FIG. When constructing the reverse address mapping table, the arrangement order of physical addresses is mainly used, the corresponding physical position is duplicated in the contents of the table, and the correspondence between the physical address of this relation table and its logical address is directly duplicated. There is no need to form a physical / logical address mapping table and read once from the beginning to the end to construct one address mapping table as in the known technology. After completing this physical / logical address mapping table, it is stored in the SRAM so that the system can search the logical address for search at any time.
[0013]
At the time of system startup, the relationship between the physical address and the corresponding logical address is directly copied depending on the size of the system SRAM to construct a partial physical / logical address mapping table as shown in FIG. Further, this partial physical / logical address mapping table is stored in the SRAM. When a system host accesses data, first, a search standby logical address is provided to a comparator 14, and at this time, as shown in FIG. 3, one counter 10 sequentially outputs an address signal. The corresponding logical address signal is obtained from the partial physical / logical address mapping table built in the SRAM 12 based on the address signal and sent to the comparator 14 based on the address signal.
[0014]
When the comparator 14 receives the logical address signal generated by the SRAM 12, the comparator 14 compares the logical address signal with the search standby logical address provided by the system, and if the comparison result indicates that the two logical addresses are the same. In other words, when the search standby logical address and the corresponding physical address are obtained, the counter 10 stops the operation. Conversely, if the result of the comparison indicates that these two logical addresses are different, then the counter 10 will continue to send different address signals to the SRAM 12, and will repeat the above process, finding the same logical address when counting. To stop.
[0015]
If the necessary logical address is not loaded in the partial physical / logical address mapping table in the RAM, another partial physical / logical address mapping table is further duplicated and constructed. Are repeated until the same logical address is found.
[0016]
Up to this point, the spirit of the present invention has already been described. Hereinafter, the operation and effect of the above-described semiconductor disk device will be verified by combining a specific example with a flowchart, and those skilled in this technology will refer to this example. To gain sufficient knowledge so that it can be implemented.
[0017]
FIG. 4 is a flowchart of the logical address detection according to the present invention. As shown, the method of the logical address detection includes the following steps. First, in step S10, at the time of system startup, a relationship between a physical address and its corresponding logical address is directly copied to construct a partial physical / logical address mapping table, which is stored in the RAM.
[0018]
When the system transmits the search standby logical address to the comparator as shown in step S12, the comparator starts transmitting the address signal to the RAM, as shown in step S14.
[0019]
Upon receiving the logical address signal, the comparator compares the logical address signal with the search standby logical address to determine whether or not the logical address signal is the same, as shown in step S18. If the addresses are the same, indicating that the search standby logical address and its corresponding physical position have been obtained, the counter stops running, and the entire search process is performed as shown in step S20. To end. Conversely, if it is determined that the logical address signal and the search standby logical address are different by comparison of the comparator, step S22 is subsequently executed to determine whether the address search has reached the end of the RAM. If the end of the RAM has already been reached, the physical / logical address mapping table in the RAM is searched, and if the necessary logical address has not been loaded, the process returns to step S10 and another partial physical / logical Build an address mapping table and perform the steps that follow in duplicate. If the search has not reached the end of the RAM, the process returns to step S14, and the above steps are repeated until the search standby logical address and its corresponding physical location are obtained.
[0020]
【The invention's effect】
The fast-build reverse partial physical / logical address mapping table of the present invention duplicates and builds some of the address relationships, and therefore does not occupy too much RAM, and the present invention builds the reverse Since it is a physical / logical address mapping table, there is no need to fundamentally arrange from the beginning to the end, and it is sufficient to directly copy the logical address contents of a part of the flash memory, which is faster than known techniques. Further, according to the present invention, the partial physical / logical address mapping table can be quickly searched using the hardware of the semiconductor disk device, and a logical address corresponding to the physical address can be obtained. As a result, the present invention enhances the processing speed of the semiconductor disk device by associating the use of a small amount of RAM with the hardware calculation under the assumption that the space does not increase too much. The present invention has the advantage that it is fast and does not occupy space, thereby effectively improving the data access performance of the system.
[0021]
The embodiments described above are for explaining the technical idea and features of the present invention, and the purpose is to allow a person having ordinary knowledge in the technical field to which the present invention belongs to understand and implement the contents of the present invention. Is to do so. That is, any equivalent changes or modifications that can be made based on the spirit described in the present invention shall fall within the scope of the present invention.
[Brief description of the drawings]
FIGS. 1A and 1B are a display diagram of a relationship between a physical address and a logical address in a well-known memory, and a logical / physical address mapping table constructed by using this relationship. .
FIGS. 2A and 2B are a diagram showing the relationship between physical addresses and logical addresses in a memory and a partial physical / logical address mapping table constructed using the present invention, respectively. .
FIG. 3 is a schematic diagram of a semiconductor logic device according to the present invention.
FIG. 4 is a flowchart of logical address detection according to the present invention.
[Explanation of symbols]
10 Counter 12 SRAM
14 Comparator

Claims (7)

In a NAND flash memory disk device, at the time of system startup, the device first directly duplicates the relationship between a physical address and its corresponding logical address to construct a partial physical / logical address mapping table, and uses this flash memory disk device. The search standby logical address is searched for, and this flash memory disk device is
A counter for successively sending address signals,
A RAM which internally records the partial physical / logical address mapping table, obtains a corresponding logical address signal from the partial physical / logical address mapping table based on the address signal, and transmits it;
After receiving the logical address signal and the search standby logical address and comparing them, if the two logical addresses are the same, that is, obtain the search standby logical address and its corresponding physical position, and operate the counter. To stop the comparator and
A NAND-type flash memory disk device comprising: 2. The NAND type flash memory disk device according to claim 1, wherein when a required logical address is not loaded in the partial physical / logical address mapping table in the RAM, another partial physical / logical address mapping table is continued. And a NAND flash memory disk device. 2. The NAND flash memory disk device according to claim 1, wherein the RAM is an SRAM. 2. The NAND flash memory disk device according to claim 1, wherein the search standby logical address is sent from a computer system. In the method of detecting a logical address,
Building a partial physical / logical address mapping table by directly duplicating the relationship between a physical address and its corresponding logical address at system startup, and storing it in a RAM;
When the system transmits a search standby logical address to one comparator, first, an address signal is sent to the RAM using a counter;
The RAM obtaining a corresponding logical address signal from the partial physical / logical address mapping table based on the address signal, and transmitting it to the comparator;
The comparator compares whether the logical address signal and the search standby logical address are the same, and if the two logical addresses are the same, causes the counter to shut down, thus the search standby logical address and its corresponding logical address. Obtaining an entity position;
A method for detecting a logical address, comprising: 6. The logical address detection method according to claim 5, wherein when a required logical address is not loaded in the partial physical / logical address mapping table in the RAM, another partial physical / logical address mapping table is further continued. A method of detecting a logical address, which comprises constructing a replica. 6. The logical address detection method according to claim 5, wherein the RAM is an SRAM.

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