JP2004086165A - Manufacturing method of display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obscure variations of luminance or a joint between display units and to improve picture quality, when a display device with a big screen is constructed by arraying a great number of display units. <P>SOLUTION: First, in a step S1 of a creation process of a luminance correcting table, a uniform picture is displayed on a display and luminance of all dots is detected. To be concrete, to the all dots of the display, signals with a gray scale of an intermediate level (for example, 128-gradation level, when a full scale is 256-gradation level) are given and displayed. Each luminance of the all dots in this state is measured, for example, with a CCD camera, and actual luminance distribution of the display is determined. Then, in step S2, target value of luminance of each dot is calculated. Next, in step S3, a luminance correction coefficient on each dot is calculated based on the target value of luminance of each dot. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method of manufacturing a display device with low power consumption and high screen brightness, and more particularly to a method of manufacturing a display device suitable for applying to a brightness correction process of a display device having a plurality of display units arranged. .
[0002]
[Prior art]
2. Description of the Related Art Conventionally, display devices such as a cathode ray tube (CRT), a liquid crystal display device, and a plasma display have been known as display devices.
[0003]
As a cathode ray tube, an ordinary television receiver or a monitor device for a computer is known, but the screen is bright, but the power consumption is large, and the depth of the entire display device is proportional to the screen size. There is a problem that becomes large. In addition, there are disadvantages such as a decrease in resolution at a peripheral portion of a display image, distortion of an image or a figure, lack of a memory function, and the inability to display a large image.
[0004]
The reason is that the electron beam emitted from the electron gun is largely deflected, so that the emission point (beam spot) spreads at a position where the electron beam reaches the phosphor screen of the cathode ray tube obliquely, so that the image is displayed obliquely. become. As a result, a distortion occurs in the display image. Also, there is a limit to maintaining a large space inside the cathode ray tube in a vacuum.
[0005]
On the other hand, the liquid crystal display device has an advantage that the whole device can be reduced in size and consumes less power, but has a problem that screen luminance is inferior and a screen viewing angle is narrow. Further, since the gradation expression is performed by the voltage level, there is a problem that the configuration of the driving circuit becomes very complicated.
[0006]
For example, when a digital data line is used, the driving circuit includes a latch circuit that holds component RGB data (each 8 bits) for a predetermined period, a voltage selector, and a multiplexer that switches to a voltage level of a type corresponding to the number of gray levels. And an output circuit for adding output data from the multiplexer to a digital data line. In this case, when the number of gradations increases, a very large number of levels of switching operations are required in the multiplexer, and the circuit configuration becomes complicated accordingly.
[0007]
When an analog data line is used, the driving circuit includes a shift register for aligning sequentially input component RGB data (each 8 bits) in a horizontal direction, and a latch circuit for holding parallel data from the shift register for a predetermined period. A level shifter for adjusting a voltage level, a D / A converter for converting output data from the level shifter into an analog signal, and an output circuit for adding an output signal from the D / A converter to an analog data line. It is configured to have. In this case, the D / A converter uses an operational amplifier to obtain a predetermined voltage corresponding to the gray scale. However, when the range of the gray scale is widened, the operational amplifier that outputs a high-precision voltage is used. They have to be used and have the disadvantage that the structure is complicated and the price is high.
[0008]
The plasma display has the advantage that, like the liquid crystal display device, the display unit itself does not take up a volume, so that it can be miniaturized, and because it has a flat display surface, it is easy to see.In particular, in an AC type plasma display, Also, there is an advantage that a refresh memory is not required due to the storage function of the cell.
[0009]
Incidentally, in the plasma display, it is necessary to alternately switch the polarity of the applied voltage to sustain the discharge in order to give the cell a memory effect. Therefore, it is necessary to provide the drive circuit with a first pulse generator for generating a sustain pulse in the X direction and a second pulse generator for generating a sustain pulse in the Y direction. However, there is a problem that it becomes complicated.
[0010]
On the other hand, the present applicant has proposed a new display device in order to solve the problems in the CRT, the liquid crystal display device and the plasma display (for example, see Japanese Patent Application Laid-Open No. 7-287176). As shown in FIG. 79, this display device has actuator units 1000 arranged for each pixel, and each actuator unit 1000 has a piezoelectric / electrostrictive layer 1002 and upper and lower surfaces of the piezoelectric / electrostrictive layer 1002. An actuator unit main body 1008 having an upper electrode 1004 and a lower electrode 1006 formed respectively, and a base 1014 including a vibrating unit 1010 and a fixed unit 1012 disposed below the actuator unit main unit 1008. Have been. The lower electrode 1006 of the actuator unit main body 1008 is in contact with the vibration unit 1010, and the actuator unit main body 1008 is supported by the vibration unit 1010.
[0011]
The base 1014 includes a vibrating part 1010 and a fixed part 1012 integrally formed of ceramics. Further, the base 1014 is formed with a recess 1016 so that the vibrating part 1010 becomes thin.
[0012]
Further, a displacement transmitting section 1020 for making the contact area with the optical waveguide plate 1018 a predetermined size is connected to the upper electrode 1004 of the actuator section main body 1008. In the example of FIG. Reference numeral 1020 denotes an actuator that is disposed close to the optical waveguide plate 1018 in a normal state where the actuator unit 1000 is stationary, and is disposed so as to contact the optical waveguide plate 1018 at a distance equal to or less than the wavelength of light in an excited state. .
[0013]
Then, light 1022 is introduced from, for example, an end of the optical waveguide plate 1018. In this case, by adjusting the refractive index of the optical waveguide plate 1018, all the light 1022 is totally reflected inside without being transmitted on the front and back surfaces of the optical waveguide plate 1018. In this state, a voltage signal according to the attribute of the image signal is selectively applied to the actuator unit 1000 through the upper electrode 1004 and the lower electrode 1006, and the actuator unit 1000 is caused to be stationary in a normal state and displaced in an excited state. By this, the contact / separation of the displacement transmitting unit 1020 from / to the optical waveguide plate 1018 is controlled, whereby the scattered light (leakage light) 1024 at a predetermined portion of the optical waveguide plate 1018 is controlled, and At 1018, an image is displayed according to the image signal.
[0014]
According to this display device, (1) the power consumption can be reduced, (2) the screen brightness can be increased, and (3) the number of pixels increases in the case of a color screen as compared with the case of a monochrome screen. It has the advantage that there is no need to perform it.
[0015]
In the peripheral circuit of the display device as described above, for example, as shown in FIG. 80, a display unit 1030 in which a large number of pixels are arranged and a large number of pixels (pixel group) forming one row are common. Vertical shift circuits 1034 derived by the number of rows required for the selected vertical selection lines 1032 and signal lines 1036 shared by a number of pixels (pixel groups) constituting one column by the number of columns required It has a derived horizontal shift circuit 1038.
[0016]
[Problems to be solved by the invention]
In the above-described display device, a large-screen display may be configured by arranging a large number of display units. In such a case, it is conceivable that a large number of display units are arranged at random, but there is a possibility that the image quality is degraded due to a variation in average luminance among the display units.
[0017]
That is, for example, when a display unit having an extremely low average luminance is arranged adjacent to a display unit having a high average luminance, the presence of the display unit is remarkably manifested by a drop in the average luminance, and the display unit is displayed on the screen of the display device. The resulting image is difficult to see. In addition, there is a disadvantage that the seams of the display units are conspicuous.
[0018]
The present invention has been made in view of such a problem, and when a large number of display units are arranged to configure a large-screen display device, luminance variations and seams between the display units are not noticeable. It is an object of the present invention to provide a method for manufacturing a display device capable of improving image quality.
[0019]
Another object of the present invention is to provide a method of manufacturing a display device capable of minimizing display unevenness and a step of brightness, eliminating unnaturalness to human eyes, and improving image quality of an image. Aim.
[0020]
[Means for Solving the Problems]
According to the present invention, in a method of manufacturing a display device in which a plurality of display units in which a plurality of display elements are arranged are arranged, a uniform image is displayed on the display device, and the luminance of each display element is detected. And calculating a luminance target value of each display element, and calculating a luminance correction coefficient for each display element based on the luminance target value of each display element. Features.
[0021]
By setting the luminance target value to a value that suppresses variations in the luminance distribution, the effect is reflected on the luminance correction coefficient. Therefore, when the display element is driven or emits light, the emission luminance is corrected based on the luminance correction coefficient. At this time, the variation in the luminance distribution is effectively suppressed, and the display unit emits light. It is possible to make inconspicuous brightness variations and seams between them.
[0022]
Then, in the manufacturing method, the calculation of the luminance target value is performed by averaging the luminance of the display element and a plurality of display elements arranged around the display element, and calculating the average value as the luminance target value of the display element. You may make it. That is, variation in the luminance distribution is suppressed by moving average.
[0023]
In this case, the plurality of display elements arranged around the display element are included in the display element group of 2m + 1 rows arranged in the vertical direction, and the display element group of 2n + 1 columns arranged in the horizontal direction. May be included.
[0024]
Further, for one display unit, when M display elements are arranged in the vertical direction and N display elements are arranged in the horizontal direction, and when a total of M × N display elements is provided, The above m and n, when α and β are each one or more variables,
(1/2) M ≦ 2m + 1 ≦ αM
(1/2) N ≦ 2n + 1 ≦ βN
And In particular, α and β are set so that the number of display elements whose luminance correction coefficient exceeds the upper limit is equal to or less than a predetermined number.
[0025]
In this way, it is possible to reduce the variation in the brightness distribution in the display unit, make the seams inconspicuous, and make use of the individual brightness of the display unit, so that a display unit that can emit light brightly is unnecessary. The brightness can be prevented from being lowered.
[0026]
Then, among the calculated luminance target values, a display element that shows the minimum value may be searched, and the current luminance target value may be improved by a certain value for the display element to be searched.
[0027]
According to the above method, the inconvenience of discontinuous images between the display units is eliminated (maintaining a continuous surface), and the display capability of the display units can be maximized.
[0028]
As another method, among the calculated luminance target values, a display element exceeding a threshold value is searched, and for the display element to be searched, the current luminance target value is reduced to the threshold value. You may do so.
[0029]
In the present invention, the calculation of the luminance correction coefficient may be performed in consideration of a color temperature.
[0030]
Specifically, the calculated luminance target value of each display element is standardized in accordance with the color scheme, and corrected so that the value after the standardization falls within a certain range. Alternatively, the luminance target value in which the color temperature is taken into account may be obtained by performing a restoration process according to each color arrangement. Note that, when obtaining a luminance target value in which the color temperature is taken into account, a process of multiplying by a color temperature adjustment constant may be included.
[0031]
As the display unit, an optical waveguide plate into which light from a light source is introduced, and a display element of a number corresponding to a large number of pixels are provided so as to be opposed to one plate surface of the optical waveguide plate. A driving unit, and controls a displacement operation in a contact / separation direction of an actuator unit in the display element with respect to the optical waveguide plate in accordance with an attribute of an input image signal, to thereby control a predetermined portion of the optical waveguide plate. The display unit may display an image corresponding to the image signal on the optical waveguide plate by controlling the leakage light.
[0032]
Further, the present invention provides a method of manufacturing a display device in which a plurality of display units in which a plurality of display elements are arranged are arranged, and a step of obtaining characteristic values for each of the display units; and Ranking the display units based on the plurality of display units in the display device, and designating a rank of display units to be arranged in each region, and displaying the display according to the designation. The display device is manufactured by arranging units.
[0033]
As a result, display unevenness, brightness steps, and the like can be reduced as much as possible, and discomfort to human eyes can be eliminated, and image quality can be improved.
[0034]
In this case, when the ranked display units are arranged in the designated area, if the display units ordered in the same rank are arranged according to a predetermined rule, a smooth luminance distribution is obtained when the entire display device is viewed. can do.
[0035]
In particular, the arrangement area of the display units may be divided into a central part and a peripheral part, a display unit with a higher rank may be arranged in the central part, and a display unit with a lower rank may be arranged in the peripheral part. This makes use of the characteristic that even if the surroundings are dark, it is difficult for the human eyes to notice it, and this is effective in eliminating discomfort to the human eyes.
[0036]
Then, when the characteristic value is the average luminance of a plurality of display elements constituting the display unit and the number of defects of the display elements, the ranking is performed by comprehensive evaluation of the rank based on the average luminance and the rank based on the number of defects. May be determined by
[0037]
In this case, the array area of the display units is divided into a central portion and a peripheral portion, display units having a high rank according to the number of defects are arranged in the central portion, and display units having a low rank according to the number of defects are arranged in the peripheral portion. You may do so. Note that display units having substantially the same rank based on the average luminance may be arranged in the central portion and the peripheral portion.
[0038]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a display to which a method of manufacturing a display device according to the present invention is applied (hereinafter, simply referred to as a display according to an embodiment) will be described with reference to FIGS.
[0039]
As shown in FIG. 1, the display 10 according to the present embodiment includes a plurality of display units 14 arranged on a back surface of a light guide plate 12 having a display area as the display 10.
[0040]
As shown in FIG. 2, each display unit 14 includes an optical waveguide plate 20 into which light 18 from the light source 16 is introduced, and a plurality of actuator units 22 provided to face the rear surface of the optical waveguide plate 20. It is configured to have driving units 24 arranged in a matrix or in a staggered manner corresponding to the pixels.
[0041]
For example, as shown in FIG. 3, one dot 26 is formed by two actuator units 22 arranged in a vertical direction, and three dots 26 (a red dot 26R, a green dot 26G, and a green dot 26) are arranged in a horizontal direction. One pixel 28 is constituted by the blue dot 26B). Further, in the display unit 14, the arrangement of the pixels 28 is 16 (48 dots) in the horizontal direction and 16 (16 dots) in the vertical direction.
[0042]
Then, as shown in FIG. 1, the display 10 is arranged such that 640 pixels (1920 dots) are arranged in the horizontal direction and 480 pixels (480 dots) are arranged in the vertical direction in order to comply with, for example, the VGA standard. On the back of the light plate 12, 40 display units 14 are arranged in a horizontal direction and 30 display units are arranged in a vertical direction.
[0043]
The light guide plate 12 has a high light transmittance in the visible light region and is uniform, such as a glass plate or an acrylic plate. Between the display units 14, wire bonding or soldering, an end face connector, and a back face connector are used. By connecting them with each other, signals can be supplied to each other.
[0044]
The light guide plate 12 and the light guide plate 20 of each display unit 14 preferably have a similar refractive index. When the light guide plate 12 and the light guide plate 20 are bonded to each other, a transparent adhesive may be used. Good. This adhesive is preferably uniform and has a high transmittance in the visible light region, similarly to the light guide plate 12 and the optical waveguide plate 20, and has a refractive index close to that of the light guide plate 12 and the optical waveguide plate 20. It is desirable to set it in order to secure the brightness of the screen.
[0045]
By the way, in each display unit 14, as shown in FIG. 2, a pixel structure 30 is laminated on each actuator unit 22. The pixel structure 30 has a function of increasing a contact area with the optical waveguide plate 20 to make an area corresponding to a pixel.
[0046]
The drive unit 24 has an actuator substrate 32 made of, for example, ceramics, and the actuator unit 22 is provided at a position corresponding to each pixel 28 of the actuator substrate 32. The actuator substrate 32 is arranged such that one main surface faces the back surface of the optical waveguide plate 20, and the one main surface is a continuous surface (one surface). Inside the actuator substrate 32, cavities 34 are provided at positions corresponding to the respective pixels 28 for forming vibrating portions described later. Each cavity 34 is communicated with the outside through a small-diameter through hole 36 provided on the other end surface of the actuator substrate 32.
[0047]
The portion of the actuator substrate 32 where the cavity 34 is formed is made thin, and the other portions are made thick. The thin portion has a structure that is easily susceptible to vibrations due to external stress and functions as a vibrating portion 38, and the portion other than the void 34 is thick and functions as a fixing portion 40 that supports the vibrating portion 38. It has become.
[0048]
That is, the actuator substrate 32 is a laminate of the substrate layer 32A as the lowermost layer, the spacer layer 32B as the intermediate layer, and the thin plate layer 32C as the uppermost layer, and a portion corresponding to the actuator portion 22 in the spacer layer 32B. Can be grasped as an integrated structure in which the void 34 is formed. The substrate layer 32A functions as a reinforcing substrate and also functions as a wiring substrate. It should be noted that the actuator substrate 32 may be integrally fired or retrofitted.
[0049]
Here, specific examples of the actuator section 22 and the pixel structure 30 will be described with reference to FIGS. 4 to 13 show a case where a gap forming layer 44 is provided between a beam 42 described later and the optical waveguide plate 20.
[0050]
First, as shown in FIG. 4, the actuator section 22 is configured to maintain the shape of a piezoelectric / electrostrictive layer or an anti-ferroelectric layer formed directly on the vibrating section 38 in addition to the vibrating section 38 and the fixed section 40. It has a layer 46 and a pair of electrodes 48 (row electrode 48a and column electrode 48b) formed on the upper and lower surfaces of the shape maintaining layer 46.
[0051]
As shown in FIG. 4, the pair of electrodes 48 may have a structure formed up and down with respect to the shape holding layer 46 or a structure formed only on one side, or a pair of electrodes 48 formed only on the shape holding layer 46. You may make it.
[0052]
In the case where the pair of electrodes 48 is formed only on the upper part of the shape holding layer 46, the pair of electrodes 48 may have a planar shape in which a number of comb teeth complementarily face each other as shown in FIG. As disclosed in Japanese Patent Application Laid-Open No. 10-78549, a spiral shape or a multi-branched shape can be adopted.
[0053]
When the planar shape of the shape maintaining layer 46 is, for example, an elliptical shape and the pair of electrodes 48 are formed in a comb-teeth shape, as shown in FIGS. There are a form in which 48 comb teeth are arranged, and a form in which comb teeth of a pair of electrodes 48 are arranged along the short axis of the shape retaining layer 46 as shown in FIGS. 7A and 7B.
[0054]
Then, as shown in FIGS. 6A and 7A, the shape in which the comb teeth of the pair of electrodes 48 are included in the planar shape of the shape retaining layer 46, and as shown in FIGS. 6B and 7B, the pair of electrodes 48 There is a form in which the comb teeth protrude from the planar shape of the shape retaining layer 48. 6B and 7B are more advantageous in bending displacement of the actuator section 22.
[0055]
By the way, as shown in FIG. 4, when a row electrode 48a is formed on the upper surface of the shape retaining layer 46 as a pair of electrodes 48 and a column electrode 48b is formed on the lower surface of the shape retaining layer 46, as shown in FIG. As shown in FIG. 8, it is also possible to bend and displace the actuator section 22 in one direction so as to be convex toward the cavity 34. In addition, as shown in FIG. It is also possible to bend and displace in other directions so that The example shown in FIG. 8 shows a case where the gap forming layer 44 (see FIG. 4) is not formed.
[0056]
On the other hand, for example, as shown in FIG. 4, the pixel structure 30 can be configured by a laminate of a white scatterer 50 as a displacement transmission unit formed on the actuator unit 22, a color filter 52, and a transparent layer 54. .
[0057]
Further, as shown in FIG. 9, a light reflection layer 56 may be interposed below the white scatterer 50. In this case, it is desirable to form an insulating layer 58 between the light reflecting layer 56 and the actuator section 22.
[0058]
As another example of the pixel structure 30, for example, as shown in FIG. 10, the pixel structure 30 may be formed of a laminate of the colored scatterer 60 formed on the actuator unit 22 and also serving as a displacement transmitting unit, and the transparent layer 54. Also in this case, as shown in FIG. 11, a light reflecting layer 56 and an insulating layer 58 may be interposed between the actuator section 22 and the colored scatterer 60.
[0059]
Further, as shown in FIGS. 2, 4 and 8, the display unit 14 has a bar 42 formed between the optical waveguide plate 20 and the actuator substrate 32 at a portion other than the pixel structure 30. FIG. 8 shows an example in which the optical waveguide plate 20 is directly fixed to the upper surface of the crosspiece 42. It is preferable that the material of the bar 42 does not deform due to heat and pressure.
[0060]
The bars 42 can be formed, for example, on all sides of the pixel structure 30. Here, the four sides of the pixel structure 30 are, as shown in FIG. 12, for example, if the pixel structure 30 is substantially rectangular or elliptical in a plane, positions corresponding to the respective corners, and the like. Indicates a form shared with the adjacent pixel structure 30.
[0061]
As another example of the crosspiece 42, as shown in FIG. 13, the crosspiece 42 may be configured to have a window 42 a surrounding at least one pixel structure 30. As a typical configuration example, for example, the crosspiece 42 itself is formed in a plate shape, and a window (opening) 42 a having a shape similar to the outer shape of the pixel component 30 is formed at a position corresponding to the pixel component 30. I do. As a result, the entire side surface of the pixel structure 30 is surrounded by the crosspiece 42, and the fixing between the actuator substrate 32 and the optical waveguide plate 20 is further strengthened.
[0062]
Here, the selection of each constituent member of the display unit 14, particularly the material and the like of each constituent member will be described.
[0063]
First, the light 18 incident on the optical waveguide plate 20 may be any of an ultraviolet region, a visible region, and an infrared region. The light source 16 includes an incandescent lamp, a deuterium discharge lamp, a fluorescent lamp, a mercury lamp, a metal halide lamp, a halogen lamp, a xenon lamp, a tritium lamp, a light emitting diode, a laser, a plasma light source, a hot cathode tube (or a filament hot cathode). Instead, a carbon nanotube-field emitter is disposed), a cold cathode tube or the like is used.
[0064]
The vibrating section 38 is preferably made of a highly heat-resistant material. The reason is that when the actuator section 22 has a structure in which the vibration section 38 is directly supported by the fixing section 40 without using a material having inferior heat resistance such as an organic adhesive, at least when the shape holding layer 46 is formed, the vibration section The vibrating section 38 is preferably made of a high heat-resistant material so that the 38 does not deteriorate.
[0065]
Further, the vibrating section 38 is used to electrically separate a wiring (for example, a data line) leading to the row electrode 48a from a wiring (for example, a data line) leading to the column electrode 48b in the pair of electrodes 48 formed on the actuator substrate 22. Preferably, it is an insulating material.
[0066]
Therefore, the vibrating section 38 may be made of a metal having high heat resistance or a material such as enamel whose metal surface is coated with a ceramic material such as glass, but ceramics is most suitable.
[0067]
As the ceramic constituting the vibrating portion 38, for example, stabilized zirconium oxide, aluminum oxide, magnesium oxide, titanium oxide, spinel, mullite, aluminum nitride, silicon nitride, glass, a mixture thereof, or the like can be used. The stabilized zirconium oxide has high mechanical strength even when the thickness of the vibrating part 38 is small, high toughness, and low chemical reactivity with the shape retaining layer 46 and the pair of electrodes 48. Particularly preferred. The stabilized zirconium oxide includes stabilized zirconium oxide and partially stabilized zirconium oxide. The stabilized zirconium oxide has a crystal structure such as a cubic system, so that no phase transition occurs.
[0068]
On the other hand, zirconium oxide undergoes a phase transition between a monoclinic system and a tetragonal system at around 1000 ° C., and cracks may occur during this phase transition. The stabilized zirconium oxide contains 1 to 30 mol% of a stabilizer such as calcium oxide, magnesium oxide, yttrium oxide, scandium oxide, ytterbium oxide, cerium oxide or an oxide of a rare earth metal. In order to increase the mechanical strength of the vibrating section 22, the stabilizer preferably contains yttrium oxide. At this time, yttrium oxide preferably contains 1.5 to 6 mol%, more preferably 2 to 4 mol%, and further contains 0.1 to 5 mol% of aluminum oxide. Is preferred.
[0069]
The crystal phase may be a cubic + monoclinic mixed phase, a tetragonal + monoclinic mixed phase, a cubic + tetragonal + monoclinic mixed phase, etc. However, those having a tetragonal system or a mixed phase of tetragonal system and cubic system are most preferable from the viewpoints of strength, toughness and durability.
[0070]
When the vibrating portion 38 is made of ceramics, a large number of crystal grains constitute the vibrating portion 38. In order to increase the mechanical strength of the vibrating portion 38, the average grain size of the crystal grains may be 0.05 to 2 μm. More preferably, it is 0.1-1 μm.
[0071]
The fixing portion 40 is preferably made of ceramics, but may be made of the same ceramics as the material of the vibrating portion 38 or may be different. As the ceramics constituting the fixing portion 40, similarly to the material of the vibrating portion 38, for example, stabilized zirconium oxide, aluminum oxide, magnesium oxide, titanium oxide, spinel, mullite, aluminum nitride, silicon nitride, glass, And the like can be used.
[0072]
In particular, as the actuator substrate 32 used in the display unit 14, a material mainly containing zirconium oxide, a material mainly containing aluminum oxide, a material mainly containing a mixture thereof, or the like is suitably used. Among them, those containing zirconium oxide as a main component are more preferable.
[0073]
It should be noted that clay or the like may be added as a sintering aid, but it is necessary to adjust the auxiliary component so as not to include excessively vitrified substances such as silicon oxide and boron oxide. Because these vitrified materials are advantageous in bonding the actuator substrate 32 and the shape holding layer 46, they promote the reaction between the actuator substrate 32 and the shape holding layer 46, This is because it becomes difficult to maintain the composition, and as a result, the element characteristics are degraded.
[0074]
That is, it is preferable that the weight ratio of silicon oxide and the like in the actuator substrate 32 be 3% or less, more preferably 1% or less. Here, the main component refers to a component that exists at a ratio of 50% or more by weight.
[0075]
As described above, the shape holding layer 46 can be a piezoelectric / electrostrictive layer, an antiferroelectric layer, or the like. When a piezoelectric / electrostrictive layer is used as the shape holding layer 46, Examples include, for example, lead zirconate, lead magnesium niobate, lead nickel niobate, lead zinc niobate, lead manganese niobate, lead magnesium tantalate, lead nickel tantalate, lead antimonate stannate, lead titanate, titanate Ceramics containing barium, lead magnesium tungstate, lead cobalt niobate, or the like, or any combination thereof, may be used.
[0076]
It goes without saying that the main component may contain 50% by weight or more of these compounds. Among the above ceramics, the ceramic containing lead zirconate is most frequently used as a constituent material of the piezoelectric / electrostrictive layer constituting the shape holding layer 46.
[0077]
When the piezoelectric / electrostrictive layer is formed of ceramics, the ceramics may further include an oxide such as lanthanum, calcium, strontium, molybdenum, tungsten, barium, niobium, zinc, nickel, manganese, or any of these. Or a ceramic to which other compounds are appropriately added.
[0078]
For example, it is preferable to use a ceramic mainly containing a component composed of lead magnesium niobate, lead zirconate and lead titanate, and further containing lanthanum and strontium.
[0079]
The piezoelectric / electrostrictive layer may be dense or porous, and if porous, its porosity is preferably 40% or less.
[0080]
When an antiferroelectric layer is used as the shape maintaining layer 46, the antiferroelectric layer may be composed mainly of lead zirconate, or composed mainly of components composed of lead zirconate and lead stannate. Further, it is desirable to use lead zirconate to which lanthanum oxide is added, or to a component consisting of lead zirconate and lead stannate to which lead zirconate or lead niobate is added.
[0081]
In particular, when an antiferroelectric film containing a component composed of lead zirconate and lead stannate as shown below is applied as a film-type element such as the actuator section 22, it can be driven at a relatively low voltage. Therefore, it is particularly preferable.
[0082]
Pb_0.99Nb_0.02[(Zr_xSn_1-x)_1-yTi_y]_0.98O₃
However, 0.5 <x <0.6, 0.05 <y <0.063, 0.01 <Nb <0.03
Further, the antiferroelectric film may be porous, and if it is porous, it is desirable that the porosity is 30% or less.
[0083]
As a method of forming the shape holding layer 46 on the vibrating portion 38, various thick film forming methods such as a screen printing method, a dipping method, a coating method, and an electrophoresis method, an ion beam method, a sputtering method, and a vacuum deposition method , An ion plating method, a chemical vapor deposition (CVD) method, and various thin film forming methods such as plating can be used.
[0084]
In this embodiment, when forming the shape retaining layer 46 on the vibrating portion 38, a thick film forming method such as a screen printing method, a dipping method, a coating method, and an electrophoresis method is suitably adopted.
[0085]
These methods can be formed by using a paste, slurry, suspension, emulsion, sol, or the like mainly containing piezoelectric ceramic particles having an average particle diameter of 0.01 to 5 μm, preferably 0.05 to 3 μm. This is because good piezoelectric operation characteristics can be obtained.
[0086]
In particular, the electrophoresis method includes the fact that a film can be formed with a high density and a high shape accuracy, and it is described in “Electrochemical and Industrial Physical Chemistry, Vol. 53, No. 1 (1985), p. Authors "or" The First Forming Method of Ceramics by Electrophoresis ", Research Discussion Meeting, Proceedings (1998), p5-6, p23-24, etc. Therefore, a method may be appropriately selected and used in consideration of required accuracy, reliability, and the like.
[0087]
Further, it is preferable that the thickness of the vibrating portion 38 and the thickness of the shape retaining layer 46 have the same dimension. This is because if the thickness of the vibrating portion 38 is extremely larger than the thickness of the shape retaining layer 46 (if it differs by one digit or more), the vibrating portion 38 acts to prevent shrinkage of the shape retaining layer 46 by firing. In addition, the stress at the interface between the shape holding layer 46 and the actuator substrate 22 becomes large, and the shape is easily peeled off. Conversely, if the thickness dimension is substantially the same, the actuator substrate 32 (the vibrating portion 38) can easily follow the firing shrinkage of the shape holding layer 46, which is suitable for integration. Specifically, the thickness of the vibrating portion 38 is preferably 1 to 100 μm, more preferably 3 to 50 μm, and still more preferably 5 to 20 μm. On the other hand, the thickness of the shape maintaining layer 46 is preferably 5 to 100 μm, more preferably 5 to 50 μm, and still more preferably 5 to 30 μm.
[0088]
The row electrode 48a and the column electrode 48b formed on the upper surface and the lower surface of the shape retaining layer 46, or the pair of electrodes 48 formed on the shape retaining layer 46 have an appropriate thickness depending on the application. The thickness is preferably from 01 to 50 μm, more preferably from 0.1 to 5 μm. The row electrode 48a and the column electrode 48b are preferably solid at room temperature and made of a conductive metal. For example, a metal simple substance or alloy containing aluminum, titanium, chromium, iron, cobalt, nickel, copper, zinc, niobium, molybdenum, ruthenium, rhodium, silver, tin, tantalum, tungsten, iridium, platinum, gold, lead, etc. No. It goes without saying that these elements may be contained in any combination.
[0089]
The light guide plate 20 has a light refractive index such that the light 18 introduced therein is totally reflected at the front and rear surfaces without transmitting to the outside of the light guide plate 20. It is necessary that the transmittance in the wavelength region is uniform and high. The material is not particularly limited as long as it has such characteristics. Specifically, for example, glass, quartz, a light-transmitting plastic such as acrylic, a light-transmitting ceramic or the like, or a material having a different refractive index A general structure includes a multi-layered structure of a material or a structure provided with a coating layer on the surface.
[0090]
The coloring layers such as the color filter 52 and the colored scatterer 60 included in the pixel structure 30 are layers used to extract only light in a specific wavelength region, and for example, absorb light of a specific wavelength, There are ones that develop color by transmission, reflection, and scattering, and ones that convert incident light into another wavelength. Transparent, translucent and opaque bodies can be used alone or in combination.
[0091]
The composition is, for example, dyes, pigments, pigments such as ions and phosphors, rubber, organic resin, translucent ceramics, glass, dispersed in the interior of the liquid or the like, or those coated on their surface, further For example, powders of the above-described dyes and phosphors are sintered or pressed to harden. As for the material and structure, these may be used alone or in combination.
[0092]
The difference between the color filter 52 and the colored scatterer 60 is that when the pixel structure 30 is brought into a light emitting state by contacting the optical waveguide plate 20 into which the light 18 has been introduced, the leakage light due to the reflection and scattering only by the colored layer is obtained. If the luminance value is equal to or more than 0.5 times the luminance value of the leaked light due to the reflection and scattering of all the components including the pixel component 30 and the actuator unit 22, the coloring layer is defined as the colored scatterer 60. If it is less than 0.5 times, the color layer is defined as the color filter 52.
[0093]
As a specific example of the measuring method, when the colored layer alone is brought into contact with the back surface of the optical waveguide plate 20 into which the light 18 is introduced, the colored layer passes through the optical waveguide plate 20 and leaks to the front surface. The front luminance of the light thus emitted is A (nt), and when the pixel structure 30 is further brought into contact with the surface of the colored layer opposite to the surface in contact with the optical waveguide plate 20, the front luminance of the light leaked to the front surface Is B (nt), the color layer is the colored scatterer 60 when A ≧ 0.5 × B, and the color filter 52 when A <0.5 × B.
[0094]
The above-mentioned front luminance means that the luminance meter is arranged such that a line connecting the luminance meter for measuring the luminance and the coloring layer is perpendicular to a surface of the optical waveguide plate 20 which is in contact with the coloring layer (luminance meter). (The detection surface is parallel to the plate surface of the optical waveguide plate 20).
[0095]
The advantage of the colored scatterer 60 is that the color tone and the luminance are hard to change depending on the thickness of the layer. As a layer forming method therefor, strict control of the layer thickness is difficult, but the cost is low. Is possible.
[0096]
In addition, since the colored scatterer 60 also serves as the displacement transmitting section, the layer forming process can be simplified, and the entire layer thickness can be reduced, so that the entire display unit 14 can be reduced in thickness. In addition, it is possible to prevent the displacement amount of the actuator unit 22 from decreasing and improve the response speed.
[0097]
The advantage of the color filter 52 is that, since the optical waveguide plate 20 is flat and has high surface smoothness, when a layer is formed on the optical waveguide plate 20 side, the layer formation is facilitated, the process can be selected in a wider range, and the cost can be reduced. In addition, it becomes easy to control the layer thickness which affects the color tone and the luminance.
[0098]
The method of forming the color layers such as the color filters 52 and the colored scatterers 60 is not particularly limited, and various known film formation methods can be applied. For example, in addition to a film sticking method in which a chip-shaped or film-shaped colored layer is directly attached to the surface of the optical waveguide plate 20 or the actuator unit 22, powder, paste, liquid, gas, ions, etc., which are raw materials of the colored layer, Forming a colored layer by forming a thick film such as screen printing, photolithography, spray dipping, coating, or thin film forming such as ion beam, sputtering, vacuum deposition, ion plating, CVD, plating, etc. There is a way to do that.
[0099]
Further, a light emitting layer may be provided on all or a part of the pixel structure 30. The light emitting layer includes a phosphor layer. The phosphor layer may be one that emits visible light when excited by invisible light (ultraviolet light or infrared light), or one that emits visible light when excited by visible light.
[0100]
Also, a fluorescent pigment can be used for the light emitting layer. If this fluorescent pigment is used, the color of the pigment itself, that is, the one to which fluorescence having a wavelength substantially matching the reflection color is added, the color stimulus is so large and it emits vividly, so that the display element and the display have high brightness. And a general daylight fluorescent pigment is preferably used.
[0101]
Further, as the light emitting layer, a stimulable phosphor, a phosphor, or a luminous pigment is used. These materials may be either organic materials or inorganic materials.
[0102]
Then, a light emitting layer was formed using the above light emitting material alone, a light emitting layer was formed using a material obtained by dispersing these light emitting materials in a resin, or these light emitting materials were dissolved in a resin. Those having a light emitting layer formed thereon are preferably used.
[0103]
The afterglow time of the light emitting material is preferably 1 second or less, and more preferably 30 msec. More preferably, it is several milliseconds or less.
[0104]
When the light emitting layer is used as the whole or a part of the pixel structure 30, the light source 16 includes light having a wavelength for exciting the light emitting layer and has a sufficient energy density for the excitation. There is no particular limitation. For example, a cold cathode tube, a hot cathode tube (or a carbon nanotube-field emitter arranged in place of the filamentary hot cathode), a metal halide lamp, a xenon lamp, a laser including an infrared laser, a black light, a halogen lamp, an incandescent lamp , A deuterium discharge lamp, a fluorescent lamp, a mercury lamp, a tritium lamp, a light emitting diode, a plasma light source, and the like.
[0105]
Next, the operation of the display 10 will be briefly described with reference to FIG. In this description of the operation, as shown in FIG. 14, for example, 10 V is used as the offset potential applied to the row electrode 48a of each actuator unit 22, and the ON signal and the OFF signal applied to the column electrode 48b of each actuator unit 22 are used. An example in which 0 V and 60 V are used as signal potentials will be described.
[0106]
Accordingly, in the actuator section 22 to which the ON signal is applied to the column electrode 48b, a low level voltage (−10 V) is applied between the column electrode 48b and the row electrode 48a, and the actuator section 22 to which the OFF signal is applied to the column electrode 48b. In this case, a high-level voltage (50 V) is applied between the column electrode 48b and the row electrode 48a.
[0107]
Then, first, the light 18 is introduced from, for example, an end of the optical waveguide plate 20. In this case, by adjusting the refractive index of the optical waveguide plate 20 in a state where the pixel structure 30 is not in contact with the optical waveguide plate 20, all the light 18 is emitted on the front and back surfaces of the optical waveguide plate 20. Total reflection inside without transmission. The reflectance n of the optical waveguide plate 20 is preferably 1.3 to 1.8, and more preferably 1.4 to 1.7.
[0108]
In this example, in the natural state of the actuator section 22, the end face of the pixel structure 30 is in contact with the back surface of the optical waveguide plate 20 at a distance equal to or less than the wavelength of the light 18. The scattered light 62 is reflected by the surface 30. This scattered light 62 is partially reflected again in the optical waveguide plate 20, but most of the scattered light 62 is transmitted through the front surface (surface) of the optical waveguide plate 20 without being reflected by the optical waveguide plate 20. Will do. As a result, all the actuator units 22 are turned on, and the on state is embodied in the form of light emission, and the light emission color is the color filter 52 or the colored scatterer 60 included in the pixel structure 30 or the light emitting layer described above. It corresponds to the color of. In this case, since all the actuator units 22 are in the ON state, white is displayed on the screen of the display 10.
[0109]
In this state, when an off signal is applied to the actuator section 22 corresponding to a certain dot 26, the actuator section 22 is bent and displaced so as to project toward the cavity 20 as shown in FIG. The end face of the pixel structure 30 is separated from the optical waveguide plate 20 by bending displacement in the direction, the actuator section 22 is turned off, and the off state is embodied as extinction.
[0110]
That is, in the display 10, the presence or absence of light emission (leakage light) on the front surface of the optical waveguide plate 20 can be controlled by the presence or absence of contact of the pixel structure 30 with the optical waveguide plate 20.
[0111]
In particular, in the display 10, one unit in which one unit for displacing the pixel assembly 30 in the approaching / separating direction with respect to the optical waveguide plate 20 is arranged in a vertical direction is defined as one dot, and three dots are formed in the horizontal direction. The arrangement (red dots 26R, green dots 26G, and blue dots 26B) constitutes one pixel, and a large number of these pixels are arranged in a matrix or in a staggered manner for each row. By controlling the displacement operation in each pixel in accordance with this, a color image (character or graphic) corresponding to an image signal is formed on the front surface of the optical waveguide plate 20, that is, the display surface, similarly to the cathode ray tube, the liquid crystal display device, and the plasma display. Etc.) can be displayed.
[0112]
As shown in FIG. 15, in the display 10, the wirings leading to the row electrodes 48 a and the column electrodes 48 b have the number of wirings 70 corresponding to the number of rows of the large number of actuator sections 22 and the number of the entire actuator sections 22. And the number of data lines 72 corresponding to the number of data lines 72. The wiring 70 is used as a common wiring 74 on the way.
[0113]
In the display 10, the column electrode 48b of the actuator section 22 and the data line 72 are connected, the common wiring 70 is connected to one row of the actuator section 22, and the data line 72 It is formed on the back side.
[0114]
The wiring 70 is led out from the row electrode 48a for the actuator unit 22 in the front row, is connected to the row electrode 48a for the actuator unit 22, and is wired in series for one row. The column electrode 48b and the data line 72 are electrically connected through a through hole 78 formed in the actuator substrate 32.
[0115]
In addition, at a portion where each wiring 70 and each data line 72 intersect, an insulating film (not shown) made of a silicon oxide film, a glass film, a resin film, or the like is interposed in order to insulate the wirings 70 and 72 from each other. ing.
[0116]
Then, as shown in FIG. 15, the first driving device 200A includes a row electrode driving circuit 202 mounted on the periphery of the display 10, a column electrode driving circuit 204, and a signal processing for controlling at least the column electrode driving circuit 204. And a circuit 206.
[0117]
The row electrode drive circuit 202 is configured to supply an offset potential (bias potential) to the row electrodes 48a of all the actuator units 22 via the common wiring 74 and each wiring 70, and one type of offset power supply voltage is supplied. The power is supplied through the power supply unit 208.
[0118]
The column electrode drive circuit 204 includes driver outputs 210 of a number corresponding to the total number of dots, and a plurality of driver ICs 210B in which a predetermined number of driver outputs 210 are incorporated. And outputs data signals in parallel to all the dots.
[0119]
As shown in FIG. 16, each driver IC 210B has a shift register 212 having, for example, a 240-bit configuration, and a data transfer unit 230 and a driver output 210 are connected to each bit of the shift register 212, respectively. I have. Each bit data of the 240-bit data (block data Db) supplied to the shift register 212 is dot data Dd to be supplied to a corresponding dot.
[0120]
The data transfer unit 230 can be composed of two shift registers (first and second shift registers 250 and 252).
[0121]
The first shift register 250 receives the dot data Dd in a series by a bit shift operation based on a fixed shift clock Pc1 (= T / 6), and receives the 6-bit dot data Dd when the 6-bit dot data Dd is received. It can be configured by a serial input parallel output shift register that outputs data Dd in parallel.
[0122]
The second shift register 252 receives the dot data Dd stored in the first shift register 250 in parallel, and converts the bit information of the dot data Dd into timing according to the temporal length of the subfields SF1 to SF6. (T / 2, T / 4,..., T / 64) can be configured by a parallel input serial output shift register that sequentially outputs based on the shift clock Pc2 having (T / 2, T / 4,..., T / 64).
[0123]
That is, in the second shift register 252, the bit information of the 0th bit stored in the LSB is directly transmitted to the corresponding driver output 210 of the column electrode driving circuit 204 at the time when the data is transferred from the first shift register 250. When the first shift clock Pc2 (= T / 2) elapses, the entire bit information is bit-shifted to the right, and the first bit information located in the LSB is directly supplied to the driver output 210. Will be.
[0124]
Next, when the shift clock Pc2 (= T / 4) has elapsed, the entire bit information is bit-shifted to the right, and the second bit information located in the LSB is supplied to the driver output 210 as it is. . Similarly, every time the shift clock Pc2 sequentially passes through T / 8, T / 16, T / 32, and T / 64, the entire bit information is bit-shifted, and each time the bit clock is shifted, it is located at the LSB. The bit information of the third, fourth, fifth, and sixth bits is sequentially supplied to the driver output 210.
[0125]
Each driver output 210 is also supplied with two types of data power supply voltages via the power supply unit 208.
[0126]
Since the data lines 72 are connected to all the dots from the column electrode driving circuit 204, it is necessary to secure a wide area for routing the data lines 72, and furthermore, the wiring accompanying the increase in the wiring length of the data lines 72 is required. It is necessary to consider the influence of the time constant (signal attenuation and the like) due to the capacitance and the wiring resistance. In this example, since the display 10 is divided into 1200 display units 14, The routing of the data lines 72 may be considered in units of the display unit 14, and it is not necessary to secure a wide area for forming wiring. In addition, since the wiring capacitance and the wiring resistance may be considered in units of the display unit 14, no signal attenuation or the like occurs.
[0127]
The two types of power supply voltages for data are a high-level voltage sufficient to cause the actuator section 22 to bend downwardly and a low-level voltage sufficient to return the actuator section 22 to its original state, as described later. .
[0128]
The signal processing circuit 206 is configured to control the column electrode driving circuit 204 so as to control gradation at least by a time modulation method.
[0129]
Here, the gradation control by the time modulation method will be described with reference to FIGS. First, when a display period of one image is one frame, and one divided period when the one frame is divided into six, for example, is a subfield, the first subfield (first subfield SF1) is most likely to be used. It is set so as to be long and to be shortened at a rate of 1/2 every time a subfield elapses.
[0130]
When the length of this subfield is represented by the size of the data value, as shown in FIG. 17, when the period of the first subfield SF1 is, for example, “64”, the second subfield SF2 is “32”, The third subfield SF3 is set as "16", the fourth subfield SF4 is set as "8", the fifth subfield SF5 is set as "4", and the sixth subfield SF6 is set as "2".
[0131]
Then, in the signal processing circuit 206, for each dot, a display time corresponding to each gradation level is allocated to each of the subfields SF1 to SF6 to create dot data, and these dot data are each used as a data signal as a column electrode driving circuit. The signal is output during a period of each of the subfields SF1 to SF6 through the sub-field 204.
[0132]
Here, in the case of one dot data, the display time according to the gradation level of the dot is allocated to the time width allocated to each subfield, and therefore, the display time is allocated to all the subfields or some subfields are displayed. In some cases, they can be sorted into fields.
[0133]
For example, when the gradation level of the dot is 126, for example, all the subfields SF1 to SF6 are selected, and the dot data is a bit string of “000000”. If the gradation level is 78, the first, fourth, fifth, and sixth subfields SF1, SF4, SF5, and SF6 are selected, and the dot data includes a bit string of “011000”. Become.
[0134]
The data signal is an analog signal that changes to a high level and a low level in accordance with each bit information of a bit string constituting the dot data. If the bit information is logically “0”, a low level voltage (ON signal) If the bit information is logically “1”, it is set to a high level voltage (off signal).
[0135]
That is, as an output form of the data signal output to the actuator section 22, for example, an ON signal (low level voltage) is output for a selected subfield, and an OFF signal (high level) is output for a non-selected subfield. Voltage) is output.
[0136]
Specifically, as shown in FIG. 18, the signal processing circuit 206 receives, for example, a progressive video signal Sv (for example, an analog video signal) and a synchronization signal Ss from the video output device 220, and An image data processing circuit 224 that converts the image data into digital image data Dv in units and writes the image data into an image memory 222 (frame buffer); a correction data memory 226 in which gradation correction data Dc set in dot units is recorded; A display controller 228 reads out the image data Dv from 222 and the gradation correction data Dc from the correction data memory 226, and multiplies them to obtain corrected image data Dh.
[0137]
Examples of the moving image output device 220 include a VTR and a personal computer that receive and output a moving image recorded on a recording medium or a moving image transmitted by communication (including radio waves, cables, and the like).
[0138]
The display controller 228 includes a first reading circuit 232 for reading image data Dv from the image memory 222, a second reading circuit 234 for reading gradation correction data Dc from the correction data memory 226, and first and second reading. The multiplication circuit 236 that multiplies the image data Dv read from the circuits 232 and 234 and the gradation correction data Dc to obtain corrected image data Dh, and the corrected image data Dh obtained by the multiplication circuit 236 are arranged in parallel. And an output port 238 for outputting to the
[0139]
Here, considering the data transfer rate in the first driving device 200A, it is necessary to transmit 6-bit data per dot within the period T of one frame.
43 Hz x 6 bits x (640 x 3 x 480) = 238 Mbps
It becomes. When an IC having an operation clock of, for example, 1 MHz is used as the column electrode driving circuit 204, 238 MHz / 1 MHz = 238 parallel 1-bit transmission is required.
[0140]
Therefore, the output port OP of the display controller 228 has 238 output terminals for data transmission, and rearranges the corrected image data Dh output from the multiplication circuit 236 in correspondence with the output terminals, and outputs each output. Each terminal outputs the data in parallel as block data Db. In this case, the rate (transfer rate) at which each output terminal transfers data in parallel in 1-bit units is 1 MHz.
[0141]
The first drive device 200A is basically configured as described above, and the operation and effect will be described next.
[0142]
First, the moving image signal Sv and the synchronization signal Ss from the moving image output device 220 are input to the image data processing circuit 224. The image data processing circuit 224 converts the input moving image signal Sv into digital image data Dv in frame units based on the synchronization signal Ss, and writes the digital image data Dv in the image memory 222 (frame buffer).
[0143]
The display controller 228 reads out the image data Dv written in the image memory 222 and the gradation correction data Dc from the correction data memory 226, multiplies them, and corrects the corrected image data Dh (dot data of 6 bits per dot unit). Are arrayed image data).
[0144]
At the output port OP, the corrected image data Dh is rearranged into a data form corresponding to the output terminal, and then output from the output port OP in a 238 parallel manner at a transfer rate of 1 bit / 1 MHz. It is supplied to the driver IC 210B.
[0145]
In each of the driver ICs 210B, the block data Db sent from the output port OP is supplied to the shift register 212. When 240 bit strings are prepared in the shift register 212, the bit strings are transmitted to the corresponding data transfer units 230. The data is sent in parallel as dot data Dd.
[0146]
That is, each data transfer unit 230 reads the dot data Dd sent from the shift register 212 with a fixed shift clock Pc1, and starts the start timings (T / 2, T / 4,...) Of each of the subfields SF1 to SF6. , T / 64) is performed to output the dot data Dd at a timing corresponding to (T / 64).
[0147]
The dot data Dd output from each data transfer unit 230 is supplied to the corresponding driver output 210. The driver output 210 converts the data signal into a data signal based on the bit information included in the dot data Dd, and outputs the data signal to the corresponding dot via the data line 72.
[0148]
That is, the bit information included in the corresponding dot data Dd is supplied to each dot as a data signal while being incremented in synchronization with the start timing of each of the subfields SF1 to SF6.
[0149]
As a result, a color image corresponding to the image data Dv is displayed on the screen of the display 10.
[0150]
As described above, in the first driving device 200A, when one dot 26 is formed by one or more actuator units 22 and one pixel 28 is formed by one or more dots 26, A row electrode drive circuit 202 for applying an offset potential (bias potential) to the unit 22, a column electrode drive circuit 204 for outputting a data signal composed of an ON signal and an OFF signal for each dot based on the image data Dv, And a signal processing circuit 206 for controlling the electrode driving circuit 202 and the column electrode driving circuit 204. In the signal processing circuit 206, the column electrode driving circuit 204 is controlled so as to control gradation at least by a time modulation method. Therefore, only one type of offset power supply voltage is required as the power supply voltage to be supplied to the row electrode drive circuit 202. As a result, the row electrode drive circuit 202 can be easily made into a custom IC, the degree of freedom in designing and manufacturing the drive device 200A can be increased, and power consumption can be reduced.
[0151]
Further, the column driver IC (column electrode drive circuit 204) does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically has only a data input shift register and a level shifter. A multi-output, low-cost IC can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin. This leads to a reduction in the manufacturing cost of the display 10.
[0152]
In the above-described example, the case where the offset potential applied to the row electrode 48a of each actuator unit 22 is set to 10V, but the offset potential may be set to 0V as shown in FIG. In this case, since the ground potential may be used as the offset potential, the number of power supplies can be reduced by one.
[0153]
As another example, as shown in FIG. 20, the polarity of voltage application may be reversed. For example, the offset potential may be set to +50 V, and the potentials of the ON signal and the OFF signal may be set to 60 V and 0 V, respectively. In this case, the polarization direction of the shape maintaining layer 46 is also reversed.
[0154]
Further, as another method, for example, in a state where the polarization direction of the shape holding layer 46 which is performed in advance is set to one direction, for example, a voltage application pattern (for example, positive logic) shown in FIG. 14 and a voltage application pattern shown in FIG. (For example, negative logic) may be switched periodically or temporarily.
[0155]
For example, if the voltage application pattern of only positive logic is repeated for a long time, the displacement of the actuator unit 22 may be reduced. Therefore, by performing a negative logic voltage application pattern periodically or temporarily, it is possible to realize a stable and durable on / off operation of the pixel structure 30 by compensating for a decrease in displacement in the actuator section 22. it can.
[0156]
The switching of the voltage application pattern is performed, for example, in a positive logic voltage application pattern in an actual display period in which an image is displayed on the display 10, and in a non-display period in which an image is not displayed on the display 10. May be performed in accordance with the voltage application pattern of
[0157]
Next, the second driving device 200B will be described with reference to FIGS.
[0158]
In the second driving device 200B, the gradation control by the time modulation method in the signal processing circuit 206 is partially different. As shown in FIG. 21, the display period of one image is set to one frame, and the one frame is set to one frame. When one divisional period when a plurality of equal divisions is set as a linear subfield, the signal processing circuit 206 continuously assigns a display time corresponding to each gradation level to a necessary linear subfield for each dot. To create dot data.
[0159]
For example, if the maximum gradation is 64 gradations, 63 linear subfields LSF1 to LSF63 are allocated in one frame period, and the dot data Dd has a data configuration of 1 bit per one linear subfield.
[0160]
Specifically, if the gradation level of a certain dot is 62, as shown in FIG. 22A, 0 bit and 1 bit are each “1”, and “0” is set over 63 bits from the remaining two consecutive bits. Is generated, and if the gradation level is 8, as shown in FIG. 22B, it is “1” from the 0th consecutive bit to the 55th bit, and “1” from the remaining 56th consecutive bit to 63bits. The dot data “0” is created.
[0161]
As shown in FIG. 23, the second driving device 200B has substantially the same configuration as the above-described first driving device 200A (see FIG. 18), but has the configuration of the data output system of the signal processing circuit 206. And the configuration of each driver IC 210B in the column electrode drive circuit 204 is different as follows.
[0162]
That is, the data transfer unit 230 is connected to the data output system of the signal processing circuit 206, that is, the subsequent stage of the display controller 228. Then, the multiplication circuit 236 of the display controller 228 multiplies the image data Dv read from the first and second read circuits 232 and 234 by the gradation correction data Dc, and corrects the corrected image data Dh (maximum in dot units). The image data is image data in which dot data of the number of bits according to the gradation are arranged), and output as it is to the subsequent data transfer unit 230 via the output port OP.
[0163]
As shown in FIG. 24, the driver IC 210B has a shift register 212 having, for example, a 240-bit configuration, and the driver output 210 is connected to each bit of the shift register 212.
[0164]
Here, considering the data transfer rate in the second driving device 200B, it is necessary to transmit 1-bit data within a 1/64 frame period (T / 64).
(43 x 64 Hz) x 1 bit x (640 x 3 x 480) = 2.5 Gbps
It becomes. When an IC with an operation clock of, for example, 1 MHz is used as the column electrode drive circuit 204, 1 bit transmission of 2.5 GHz / 1 MHz = 2,500 parallel is required.
[0165]
Therefore, the data transfer unit 230 adopts a circuit configuration that outputs bit information constituting the dot data Dd in synchronization with the start timing of each of the linear subfields LSF1 to LSF64. For example, as shown in FIG. The first data output circuit 270 includes two first data output circuits 270 and second data output circuits 272 corresponding to the number of output terminals of the first data output circuit 270.
[0166]
The first data output circuit 270 divides all the driver ICs 210B into a plurality of groups, sets the number of outputs per driver IC 210B (the number of dots output by the driver IC 210B) to k, and sets the number of assigned driver ICs 210B in one group to m, Assuming that the number of bits corresponding to the maximum gradation is n, a data group consisting of k × m × n is allocated to each output terminal during the period T of one frame, and at each output terminal, the data group Are output dot by dot at predetermined timing.
[0167]
The second data output circuit 272 has an output terminal corresponding to the number m of allocations of the driver IC 210B, and the data supplied from the first data output circuit 270 is allocated in parallel through the plurality of output terminals. It is configured to output to the driver IC 210B.
[0168]
For example, when the number of outputs per driver IC 210B (the number of dots output by the driver IC 210B) is 240, 40 driver ICs 210B are allocated to each group, and the number of output terminals of the first data output circuit 270 is 96. To the output terminals φ1 to φ96 of the first data output circuit 270, a second data output circuit 272 having 40 output terminals φ100 to φ139 is connected. In this case, 96 × 40 = 3840 This enables parallel output of a number.
[0169]
Then, the first data output circuit 270 divides the corrected image data Dh supplied from the display controller 228 into 240 × 40 = 9600 dot data as shown in FIG. 9600 pieces of dot data Dd are allocated for every φ96.
[0170]
When one output terminal (for example, output terminal φ1) is viewed, as shown in FIG. 27, a 9600-bit bit string 300 in which bit information at the same bit position of 9600 pieces of dot data Dd are arranged in dot units is represented by dot data Dd. Are generated for bits 0 to 63, and bit string data 302 is formed by arranging these bit strings in the order of 0 to 63 bits.
[0171]
The bit string data 302 is output from the output terminal φ1 while being bit-shifted by 240 × 40 = 9600 bits (the length of the bit string 300) in synchronization with the reference clock of the first data output circuit 270 within the time of T / 64. I do. When the reference clock is, for example, 40 MHz, the transfer frequency of the 40-bit bit string 300B constituting the 9600-bit bit string 300 is 1 MHz, which can be the same as the transfer frequency of the column electrode drive circuit 204. Therefore, by using an IC whose reference clock is 40 MHz or more (for example, 44.9 MHz) as the first data output circuit 270, the bit string 300 can be transferred with sufficient time.
[0172]
The second data output circuit 272 outputs from the 40 output terminals φ100 to φ139 in parallel to the corresponding 40 driver ICs 210B of the column electrode driving circuit 204 each time the bit string 300B having a 40-bit configuration is latched. This series of operations is repeated 240 times, and a 240-bit bit string is stored in the shift register 212 of each driver IC 210B.
[0173]
Each bit information of the bit string stored in the shift register 212 becomes dot data Dd. At this point, 240 dot data Dd are output from the shift register 212 in parallel to the corresponding 240 driver outputs 210. The driver output 210 converts the data signal into a data signal based on the bit information included in the dot data Dd, and outputs the data to the corresponding dot via the data line 72.
[0174]
By repeating the above operation sequentially for all dots, a color image corresponding to the image data is displayed on the screen of the display 10.
[0175]
As described above, also in the second driving device 200B, similarly to the first driving device 200A, the customization of the row electrode driving circuit 202 is facilitated, and the degree of freedom in designing and manufacturing the driving device 200B is increased. Power consumption can be reduced.
[0176]
Further, the column driver IC does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically employs a multi-output low-cost IC having only a data input shift register and a level shifter. Can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin. This leads to a reduction in the manufacturing cost of the display 10.
[0177]
Next, the third driving device 200C will be described with reference to FIGS.
[0178]
The third driving device 200C has the same configuration as the first driving device 200A, as shown in FIG. 28, but the row electrode driving circuit 202 uses the odd-numbered pixels in accordance with the interlaced image signal. The point that the pixels of the even-numbered rows are alternately selected, and that the number of the driver outputs 210 forming the column electrode drive circuit 204 is の of the total number of dots, that is, the driver IC 210B The difference is that the number is の of the number in the first driving device 200A. One driver output 210 is responsible for driving two dots arranged in the vertical direction.
[0179]
As shown in FIG. 29, in the gradation control by the time modulation method in the signal processing circuit 206 of the third driving device 200C, the display period of one image is one frame, and the one frame is divided into two periods. Is defined as one field, and one division period when the one field is divided into six, for example, is defined as a subfield, the first subfield (first subfield SF1) is the longest, and one subfield elapses every time. / 2 is set to be shorter.
[0180]
The row electrode drive circuit 202 has a first driver 280 provided commonly for odd rows and a second driver 282 provided commonly for even rows. Each of the drivers 280 and 282 Are configured to alternately output a selection signal and a non-selection signal for each field. When an odd-numbered row is selected, a selection signal and a non-selection signal are output from the first and second drivers 280 and 282, respectively. When an even-numbered row is selected, the selection signal and the non-selection signal are output from the first and second drivers 280 and 282, respectively. A non-selection signal and a selection signal are output.
[0181]
Switching between the selection signal and the non-selection signal in the first and second drivers 280 and 282 is based on the input of the detection signal Sj from the timing generation circuit 284 provided in the signal processing circuit 206 as shown in FIG. Done. The timing generation circuit 284 is a circuit that detects the start timing of the field period based on the synchronization signal Ss supplied from the moving image output device 220.
[0182]
As the data transfer unit 230 provided corresponding to the driver output 210 of the column electrode drive circuit 204, the data transfer unit 230 (see FIG. 16) in the first drive device 200A can be used. Since one driver output 210 is assigned to two dots arranged in the vertical direction, the dot data Dd output from the data transfer unit 230 is data for two dots. That is, dot data Dd for every two dots is obtained.
[0183]
In the third driving device 200C, as shown in FIG. 31, 10 V as a selection signal and -50 V as a non-selection signal output from the first and second drivers 280 and 282 of the row electrode driving circuit 202. An example in which 0 V is used as an ON signal and 60 V is used as an OFF signal output through each driver output 210 of the column electrode driving circuit 204 is shown.
[0184]
Therefore, in the actuator section 22 in which the selection signal is applied to the row electrode 48a and the ON signal is applied to the column electrode 48b, a low level voltage (−10 V) is applied between the column electrode 48b and the row electrode 48a. The actuator section 22 is in a natural state, that is, a light emitting state.
[0185]
In the actuator section 22 in which the selection signal is applied to the row electrode 48a and the off signal is applied to the column electrode 48b, a high-level voltage (50 V) is applied between the column electrode 48b and the row electrode 48a. 22 is bent and displaced in one direction to be in the extinction state.
[0186]
In the actuator section 22 in which the non-selection signal is applied to the row electrode 48a, a high level voltage (50 V or 110 V) is applied between the column electrode 48b and the row electrode 48a regardless of the ON signal or the OFF signal applied to the column electrode 48b. This causes the actuator section 22 to bend and displace in one direction and enter the extinction state.
[0187]
The third drive device 200C is basically configured as described above, and its operation and effect will be described next.
[0188]
First, as shown in FIG. 30, for example, an interlaced moving image signal Sv (for example, an analog moving image signal) and a synchronization signal Ss from the moving image output device 220 are input to the image data processing circuit 224, and the moving image The synchronization signal Ss from the output device 220 is input.
[0189]
The image data processing circuit 224 converts the input moving image signal Sv into digital image data Dv on a field basis based on the synchronization signal Ss, and writes the digital image data Dv in the image memory 222 (field buffer). The timing generation circuit 284 detects the start timing of one field period Tf from the synchronization signal Ss, and outputs the detection timing to the row electrode drive circuit 202 as a detection signal Sj.
[0190]
The display controller 228 reads out the image data Dv from the image memory 222 and the gradation correction data Dc from the correction data memory 226, multiplies them, and corrects the corrected image data Dh (the 6-bit dot data is arrayed in units of 2 dots). Image data).
[0191]
At the output port OP, the corrected image data Dh is rearranged into a data form corresponding to the output terminal, and then output from the output port OP in a 238 parallel manner at a transfer rate of 1 bit / 1 MHz. It is supplied to the driver IC 210B.
[0192]
Then, when 240 bit strings are prepared in the shift register 212 of each driver IC 210B, the bit strings are sent to the corresponding data transfer units 230 in parallel.
[0193]
The data transfer unit 230 provided in units of two dots reads the dot data Dd sent from the display controller 228 at a constant clock (Tf / 6), and prints the dots at a timing corresponding to the start timing of the subfields SF1 to SF6. An operation of outputting data Dd is performed. The dot data Dd output for every two dots is supplied to the corresponding driver output 210.
[0194]
On the other hand, the row electrode drive circuit 202 alternately selects odd rows and even rows for each field based on the input of the detection signal Sj from the timing generation circuit 284.
[0195]
Then, the column electrode drive circuit 204 converts the data signal into a data signal based on the bit information included in the dot data Dd, and outputs the data signal in units of two dots arranged in the vertical direction through the data line 72.
[0196]
That is, the bit information included in the corresponding dot data Dd is supplied as a data signal to the two dots arranged in the vertical direction while being incremented in synchronization with the start timing of the subfields SF1 to SF6. The data signal is substantially supplied to the dots of the row selected by the row electrode drive circuit 202 among the two dots arranged in the direction. In the next field period, the data signal is substantially supplied to the dots of the previously unselected row.
[0197]
By repeating the above operations sequentially, a color image corresponding to the image data Dv is displayed on the screen of the display 10.
[0198]
As described above, in the third driving device 200C, when one dot 26 is formed by one or more actuator units 22 and one pixel 28 is formed by one or more dots 26, A row electrode driving circuit 202 for alternately selecting the pixels of the even row and the pixels of the even row, and a column electrode for outputting a data signal composed of a light emission signal and an extinction signal for each dot based on the image signal to the pixels of the selected row. A driving circuit 204; and a signal processing circuit 206 for controlling the row electrode driving circuit 202 and the column electrode driving circuit 204. In the signal processing circuit 206, the row electrode driving circuit Since the control circuit 202 and the column electrode drive circuit 204 are controlled, two kinds of power supply voltages are required to be supplied to the row electrode drive circuit 202. No. As a result, the row electrode drive circuit 202 can be easily made into a custom IC, the degree of freedom in designing and manufacturing the drive device 200C can be increased, and the power consumption can be reduced.
[0199]
Further, the column driver IC does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically employs a multi-output low-cost IC having only a data input shift register and a level shifter. Can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin. This leads to a reduction in the manufacturing cost of the display 10.
[0200]
In the above example, the case where 10V is used as the selection signal and -50V is used as the non-selection signal output from the first and second drivers 280 and 282 of the row electrode drive circuit 202. As shown, the selection signal may be 0V and the non-selection signal may be -60V. In this case, since the ground potential may be used as the potential of the selection signal, the number of power supplies can be reduced by one.
[0201]
As another example, as shown in FIG. 33, the polarity of voltage application may be reversed. For example, 50 V may be used as the selection signal, 110 V may be used as the non-selection signal, and the potentials of the ON signal and the OFF signal may be set to 60 V and 0 V, respectively. In this case, the polarization direction of the shape maintaining layer 46 is also reversed.
[0202]
Next, a fourth driving device 200D will be described with reference to FIGS.
[0203]
In the fourth driving device 200D, the gradation control by the time modulation method in the signal processing circuit 206 is partially different, and as shown in FIG. 34, the display period of one image is one frame, and the one frame is two frames. When one divided period is defined as one field, and one divided period when the one field is equally divided into a plurality of lines is defined as a linear subfield, the signal processing circuit 206 sets each gradation level for each two dots. The dot data is created by continuously assigning the corresponding display times to the necessary linear subfields.
[0204]
As shown in FIG. 35, the signal processing circuit of the fourth driving device 200D has substantially the same configuration as the signal processing circuit 206 of the second driving device 200B (see FIG. 23). The difference is that a timing generation circuit 284 for detecting the start timing of the field period based on the synchronization signal Ss is provided.
[0205]
Then, as the data transfer unit connected to the subsequent stage of the display controller 228, the data transfer unit 230 in the second driving device 200B can be used.
[0206]
Also in the fourth driving device 200D, similarly to the second driving device 200B, the customization of the row electrode driving circuit 202 can be easily performed, and the degree of freedom in designing and manufacturing the driving device 200D can be increased. Power consumption can be reduced.
[0207]
Further, the column driver IC does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically employs a multi-output low-cost IC having only a data input shift register and a level shifter. Can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin. This leads to a reduction in the manufacturing cost of the display 10.
[0208]
In the above-described third and fourth driving devices 200C and 200D, the row electrode driving circuit 202 alternately selects the pixels in the odd rows and the pixels in the even rows. Pixels in three or more rows may be selected in order.
[0209]
Next, a fifth driving device 200E will be described with reference to FIGS.
[0210]
The arrangement configuration of pixels in a display element to which the fifth driving device 200E is applied is, for example, as shown in FIG. 36, one dot 26 is formed by two actuator units 22 arranged in the horizontal direction, and One pixel 28 is constituted by three dots 26 (red dot 26R, green dot 26G, and blue dot 26B) arranged in a line.
[0211]
In the gradation control by the time modulation method in the signal processing circuit 206 of the fifth driving device 200E, the display period of one image is divided into one frame and the one frame is divided into three as shown in FIG. When the divided period is defined as one field (a first field, a second field, and a third field), and one divided period when the one field is divided into six, for example, as a subfield, the first subfield (first field) The subfield SF1) is set to be longest and to be shortened at a rate of 1/2 every time the subfield elapses.
[0212]
As shown in FIG. 38, the row electrode drive circuit 202 includes a first driver 500 provided commonly for 3n-2 rows and a second driver 502 provided commonly for 3n-1 rows. And a third driver 504 provided in common for 3n rows. Each of the drivers 500, 502, and 504 is configured to sequentially output a selection signal and a non-selection signal for each field. ing.
[0213]
When selecting the 3n-2 rows, the first, second and third drivers 500, 502 and 504 output a selection signal, a non-selection signal and a non-selection signal, respectively. , First, second, and third drivers 500, 502, and 504 output a non-selection signal, a selection signal, and a non-selection signal, respectively. When selecting 3n rows, the first, second, and third drivers are selected. A non-selection signal, a non-selection signal and a selection signal are output from 500, 502 and 504, respectively.
[0214]
Switching between the selection signal and the non-selection signal in the first, second, and third drivers 500, 502, and 504 is performed by detecting the detection signal from the timing generation circuit 506 provided in the signal processing circuit 206 as shown in FIG. This is performed based on input of Sk. That is, the row electrode driving circuit 202 adjusts the synchronization signal Ss from the timing generation circuit 506, and outputs 3n-2 rows, 3n-1 rows, and 3n rows of dots (n = 1, 2,...). ) Are selected in order.
[0215]
The timing generation circuit 506 generates and outputs a detection signal Sk at a timing obtained by dividing one frame period into three based on the synchronization signal Ss supplied from the moving image output device 220.
[0216]
The image data processing circuit 224 of the signal processing circuit 206 receives, for example, a progressive moving image signal Sv (for example, an analog moving image signal) from the moving image output device 220 and a detection signal Sk from the timing generation circuit 506, and outputs, for example, three primary colors ( The image data Dv is converted into digital image data Dv in units of (red, green, and blue) and written into the red image memory 222R, the green image memory 222G, and the blue image memory 222B, respectively.
[0219]
The first readout circuit 232 is configured to sequentially read out image data Dv from three types of image memories 222R, 222G, and 222B based on the input of the detection signal Sk from the timing generation circuit 506.
[0218]
The light source 16 is configured to sequentially switch and emit three types of light (for example, red light, green light, and blue light) based on the input of the detection signal Sk from the timing generation circuit 506.
[0219]
In the column electrode driving circuit 204, the number of driver outputs 210 is 1/3 of the total number of dots, and the number of driver ICs 210B is 1/3 of the number in the first driving device 200A. One driver output 210 is responsible for driving three dots arranged in one direction.
[0220]
As the data transfer unit provided corresponding to the driver output 210 of the column electrode drive circuit 204, the data transfer unit 230 (see FIG. 16) in the first drive device 200A can be used. Since one driver output 210 is assigned to three dots arranged in the vertical direction, the dot data Dd output from the data transfer unit 230 is data for three dots. That is, dot data Dd for every three dots is obtained.
[0221]
In the fifth driving device 200E, as shown in FIG. 31, for example, as the selection signal output from the first, second, and third drivers 500, 502, and 504 of the row electrode driving circuit 202, 10 V It is possible to use -50 V as a selection signal, 0 V as an ON signal output from each driver output 210 of the column electrode driving circuit 204, and 60 V as an OFF signal.
[0222]
The fifth driving device 200E is basically configured as described above, and its operation and effect will be described next.
[0223]
First, as shown in FIG. 39, for example, a progressive moving image signal Sv (for example, an analog moving image signal) and a synchronization signal Ss from the moving image output device 220 are input to the image data processing circuit 224. The synchronization signal Ss from the output device 220 is input. The timing generation circuit 506 generates and outputs a detection signal Sk at a timing obtained by dividing one frame period into three based on the input synchronization signal Ss.
[0224]
The image data processing circuit 224 converts the input moving image signal Sv into digital image data Dv in units of three primary colors (red, green, and blue) based on the detection signal Sk from the timing generation circuit 506, To the image memory 222R for green, the image memory 222G for green, and the image memory 222B for blue.
[0225]
The display controller 228 reads out the image data Dv from each of the image memories 222R, 222G, and 222B and the gradation correction data Dc from the correction data memory 226, multiplies these, and corrects the corrected image data Dh (6 bits in 3 dot units). Image data in which dot data are arranged).
[0226]
At the output port OP, the corrected image data Dh is rearranged into a data form corresponding to the output terminal, and then output from the output port OP in a 238 parallel manner at a transfer rate of 1 bit / 1 MHz. It is supplied to the driver IC.
[0227]
Then, when 240 bit strings are prepared in the shift register 212 of each driver IC 210B, the bit strings are sent to the corresponding data transfer units 230 in parallel.
[0228]
The data transfer unit 230 provided in units of three dots reads the dot data Dd sent from the shift register 212 at a constant clock (Tf / 6), and performs dot printing at a timing corresponding to the start timing of the subfields SF1 to SF6. An operation of outputting data Dd is performed. The dot data Dd output every three dots is supplied to the corresponding driver output 210.
[0229]
On the other hand, the row electrode driving circuit 202 sequentially selects 3n-2 rows, 3n-1 rows, and 3n rows for each field based on the input of the detection signal Sk from the timing generation circuit 506. At this time, the red light, the green light, and the blue light are sequentially emitted from the light source 16 for each field based on the input of the detection signal Sk from the timing generation circuit 506.
[0230]
Then, the column electrode drive circuit 204 converts the data signal into a data signal based on the bit information included in the dot data Dd, and outputs the data signal through the data line 72 in units of three dots arranged in the vertical direction.
[0231]
That is, the bit information included in the corresponding dot data Dd is supplied as a data signal to the three dots arranged in the vertical direction while being incremented in synchronization with the start timing of the subfields SF1 to SF6. Of the three dots arranged in the direction, during the first field period (for example, the period during which red light is emitted), the 3n-2 rows (the rows related to red) selected by the row electrode drive circuit 202 are not used. A data signal will be supplied substantially. In the next second field period (e.g., a period in which green light is emitted), a data signal is substantially supplied to the dot of the 3n-1th row (the row related to green) which has been unselected last time. In the period of the third field (for example, the period during which blue light is emitted), a data signal is substantially supplied to the dots of 3n rows (rows related to blue) that were previously unselected.
[0232]
By repeating the above operations sequentially, a color image corresponding to the image data Dv is displayed on the screen of the display 10.
[0233]
As described above, in the fifth driving device 200E, when one dot 26 is formed by one or more actuator units 22 and one pixel 28 is formed by one or more dots 26, 3n− A row electrode drive circuit 202 for sequentially selecting two rows of pixels, 3n-1 rows of pixels and 3n rows of pixels (n = 1, 2,...), A column electrode drive circuit 204 for outputting a data signal composed of a light emission signal and an extinction signal for each dot based on the dot, and a signal processing circuit 206 for controlling the row electrode drive circuit 202 and the column electrode drive circuit 204; In the circuit 206, the row electrode driving circuit 202 and the column electrode driving circuit 204 are controlled so as to control the gradation by at least the time modulation method. It requires only two power supply voltages as the power supply voltage to be supplied. As a result, the row electrode drive circuit 202 can be easily made into a custom IC, the degree of freedom in designing and manufacturing the drive device 200E can be increased, and power consumption can be reduced.
[0234]
Further, the column driver IC (column electrode drive circuit 204) does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically has only a data input shift register and a level shifter. A multi-output, low-cost IC can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin. This leads to a reduction in the manufacturing cost of the display 10.
[0235]
In particular, in the fifth driving device 200E, since light of three primary colors is emitted from the light source 16, the blank luminance (the optical waveguide plate other than the pixel light emitting unit) is compared with the case where a white light source is used. (Light emission luminance due to defects or the like) is reduced to 1/3, and the contrast can be improved.
[0236]
Further, when, for example, red light is emitted from the light source 16, red dots are emitted, so that color purity is improved and image quality can be effectively improved.
[0237]
Next, the sixth driving device 200F will be described with reference to FIGS.
[0238]
In the sixth driving device 200F, the gradation control by the time modulation method in the signal processing circuit 206 is partially different, and as shown in FIG. 40, the display period of one image is one frame, and the one frame is three frames. When one divided period is defined as one field, and one divided period when the one field is equally divided into a plurality of lines is defined as a linear subfield, the signal processing circuit 206 sets the respective gradation levels for each of the three dots. The dot data is created by continuously assigning the corresponding display times to the necessary linear subfields.
[0239]
As shown in FIG. 41, the signal processing circuit of the sixth driving device 200F has substantially the same configuration as the signal processing circuit 206 of the fourth driving device 200D (see FIG. 35). A different point is that a timing generation circuit 506 that outputs a detection signal Sk corresponding to the start timing of the field period based on the synchronization signal Ss is provided.
[0240]
Then, as the data transfer unit connected to the subsequent stage of the display controller 228, the data transfer unit 230 in the second driving device 200B can be used.
[0241]
Also in the sixth driving device 200F, similarly to the second driving device 200B, the customization of the row electrode driving circuit 202 can be facilitated, and the degree of freedom in designing and manufacturing the driving device 200F can be increased. Power consumption can be reduced.
[0242]
Further, the column driver IC (column electrode drive circuit 204) does not need an expensive one having a high function such as a PWM modulation in the IC itself, and basically has only a data input shift register and a level shifter. A multi-output, low-cost IC can be used. These are also advantageous in reducing the mounting external size of a bare chip, a TCP or the like, and the space in which the drive IC is mounted can be easily saved, so that the display 10 can be easily made thin.
[0243]
In the display 10 or the display unit 14 to which the first to sixth driving devices 200A to 200F are applied, for example, as shown in FIG. When a high-level voltage is applied between the column electrodes 48b, the actuator section 22 is bent and displaced so as to project toward the cavity 34 to extinguish the light. When the actuator unit 22 is turned on / off by contacting / separating the actuator unit 30, in addition to the distortion generated by applying a voltage to the shape retaining layer 46, the back surface of the optical waveguide plate 20 and the pixel structure 30 are added. Generates static electricity between the contact surface (end face) and the attraction / repulsion force of the static electricity in turning on / off the actuator unit 22. It is also possible to use.
[0244]
As a result, during the driving of the actuator unit 22, dielectric polarization is generated, and the on-characteristics of the actuator unit 22 (such as the contact property of the pixel structure 30 and the response to the contact direction) are improved by utilizing the attractive force of static electricity. By utilizing not only the attractive force due to static electricity but also the repulsive force, it is possible to improve not only the on-characteristics of the actuator section 22 but also the off-characteristics (such as the separation property of the pixel structure 30 and the response in the separation direction). be able to.
[0245]
For example, when only the ON characteristic of the actuator unit 22 is to be improved, a coating material is simply provided on the contact surface (end surface) of the pixel structure 30 and the optical waveguide plate 20 itself or the back surface of the optical waveguide plate 20, and these are applied. What is necessary is just to perform dielectric polarization.
[0246]
Further, for example, when both the ON characteristic and the OFF characteristic of the actuator section 22 are to be improved, the optical waveguide is formed so that both the attractive force and the repulsive force due to static electricity are generated on the contact surface of the dielectrically polarized pixel structure 30. What is necessary is just to arrange | position a transparent electrode or a metal thin film on the back surface of the board 20, and to switch the electrical polarity.
[0247]
Specifically, the configuration will be described with reference to FIGS. 42A to 43B. In the display unit 14 shown in FIGS. 42A and 42B in which the row electrode 48a is formed on the upper surface of the shape retaining layer 46 and the column electrode 48b is formed on the lower surface, for example, as shown in FIG. On the back surface of the optical waveguide plate 20, transparent electrodes 290 are formed at positions corresponding to the actuator sections 22, respectively.
[0248]
When the actuator 22 is turned on to emit light, a voltage (Vc> Va) is applied between the transparent electrode 290 and the row electrode 48a corresponding to the actuator 22, as shown in FIG. 42A. The voltage between the row electrode 48a and the column electrode 48b is set to substantially zero (Va ≒ Vb).
[0249]
As a result, the pixel structure 30 is pressed against the optical waveguide plate 20 by the electrostatic attraction acting between the transparent electrode 290 and the row electrode 48a. With this pressing force, the luminance and the response speed are improved.
[0250]
On the other hand, when the light is extinguished by turning off the actuator section 22, as shown in FIG. 42B, the voltage between the transparent electrode 290 and the row electrode 48a corresponding to the actuator section 22 is set to almost zero (Vc ≒). Va), a voltage (Va <Vb) is applied between the row electrode 48a and the column electrode 48b.
[0251]
As a result, the actuator section 22 is bent and displaced so as to protrude toward the cavity 34, and the pixel structure 30 is separated from the optical waveguide plate 20.
[0252]
Incidentally, the transparent electrode 290 may be formed on any of the back surface of the optical waveguide plate 20 and the end face of the pixel structure 30, but is preferably formed on the end face of the pixel structure 30. This is because the distance from the row electrode 48a on the actuator section 22 is reduced, and a larger electrostatic force can be generated.
[0253]
Further, the transparent electrode 290 formed on the back surface of the optical waveguide plate 20 has an effect of improving the separation of the pixel structure 30. Generally, the contact and separation of the pixel structure 30 causes a local surface charge to be generated on the pixel structure 30 and the light guide plate 20, which helps the pixel structure 30 to contact the light guide plate 20. However, in this case, the disadvantage that the pixel structure 30 is stuck to the optical waveguide plate 20 is likely to occur.
[0254]
Therefore, by forming the transparent electrode 290 on the back surface of the optical waveguide plate 20, local generation of surface charges is reduced, the inconvenience (sticking) is reduced, and the separation of the pixel structure 30 is improved.
[0255]
The configuration using the static electricity by forming the transparent electrode 290 includes a display unit 14 as shown in FIGS. 43A and 43B, that is, a pair of electrodes (a row electrode 48a and a column electrode 48b) on the upper surface of the shape holding layer 46. The present invention can be applied to the formed display unit 14.
[0256]
That is, the transparent electrode 290 is formed on the back surface of the optical waveguide plate 20, and a voltage (Vc> Va, Vc> Vb) is applied between the transparent electrode 290 and a pair of electrodes 48a and 48b provided on the upper surface of the actuator section 22. Is applied, static electricity is generated between the two.
[0257]
Here, considering the case of extinction in the natural state of the actuator unit 22, when the actuator unit 22 is turned on to emit light, a voltage (Va <Vb <Vc) between the pair of electrodes 48a and 48b is applied to the actuator unit. 22 is bent and displaced toward the optical waveguide plate 20, and the pixel structure 30 rapidly approaches the optical waveguide plate 20 due to the attraction of the static electricity to be in a light emitting state. On the other hand, in a state where no voltage is applied between the transparent electrode 290 and the pair of electrodes 48a and 48b (Va ≒ Vb ≒ Vc), the actuator unit 22 is turned off, and the rigidity of the actuator unit 22 causes the optical waveguide plate 20 to move from the optical waveguide plate 20. It separates and becomes an extinction state.
[0258]
The first to sixth driving devices 200A to 200F can be applied to the display 10 configured by arranging a large number of display units 14 using such static electricity.
[0259]
In the display 10 to which the above-described first to sixth driving devices 200A to 200F are applied, the configuration of the actuator unit 22, particularly, the shape holding layer 46 has a single-layer structure. In addition, as shown in FIG. Alternatively, the shape holding layer 46 may have a multilayer structure, and a pair of electrodes 48a and 48b may be alternately formed on each layer. In the example of FIG. 44, a column electrode 48b is formed on the lower surface of the first shape holding layer 46a and the upper surface of the second shape holding layer 46b, and a row electrode 48a is formed between the first and second layers. An example is shown below. As described above, by alternately forming the pair of electrodes 48a and 48b with the multilayer shape holding layer 46, the power (displacement force) of the actuator section 22 can be improved, and the pixel structure 30 (see FIG. 2). ) Can be improved.
[0260]
By the way, in the above-described first to sixth driving devices 200A to 200F, as information for correction stored in the correction data memory 226, as shown in FIG. The brightness correction table 600 in which the brightness correction data is developed may be used. In this case, the brightness correction table 600 developed in the correction data memory 226 and the second read circuit 234 function as the brightness correction means 602.
[0261]
Here, a manufacturing process of the display 10 having the brightness correction function, in particular, a process of creating the brightness correction table 600 will be described with reference to FIGS.
[0262]
In the process of creating the brightness correction table, first, in step S1 of FIG. 46, a uniform image is displayed on the display 10 and the brightness of all the dots 26 is detected. More specifically, a signal of, for example, an intermediate level of gray scale (for example, a gray scale level of 256 when the full scale is set to 256 gray levels) is given to all the dots 26 of the display 10 and displayed. Then, for example, each luminance of all the dots 26 is measured by a CCD camera, and an actually measured luminance distribution of the display 10 is obtained.
[0263]
Thereafter, in step S2, a luminance target value of each dot 26 is calculated, and then, in step S3, a luminance correction coefficient for each dot 26 is calculated based on the luminance target value of each dot 26. Specifically, based on the measured actual luminance value of each dot 26, the actual luminance distribution is smoothed to obtain a theoretical luminance distribution (luminance target value distribution). As the smoothing process, for example, an averaging process, a least square method, a higher-order curve approximation, and the like can be given.
[0264]
47 and 48 show, for example, the luminance distribution of each dot in the first row. In these figures, the plots indicated by x indicate the measured luminance distribution, and the plots indicated by ● indicate the theoretical luminance distribution.
[0265]
As shown in FIG. 47, when the variation of the measured luminance value of each dot in the measured luminance distribution is small and a smooth theoretical luminance distribution (see curve B (broken line)) is obtained by the smoothing process, the luminance correction is performed for all the dots. I do.
[0266]
Explaining a specific method of luminance correction, as shown by dots # 1, # 3, # 4, and # 6 in FIG. 47, when the measured luminance value is larger than the theoretical luminance value, the correction coefficient is less than 1. Value,
Luminance measured value × correction coefficient ≒ luminance theoretical value
Is registered in the luminance correction table 600 as luminance correction data of the dot.
[0267]
On the other hand, as shown by dots # 2, # 5, and # 7 in FIG. 47, when the measured luminance value is smaller than the theoretical luminance value, 1 is used as a correction coefficient, and the correction coefficient is used as the luminance correction data of the dot. In the brightness correction table 600. As a result, a luminance distribution (see curve A (solid line)) that is more uniform than the actually measured luminance distribution in which x is plotted is obtained.
[0268]
Depending on the completed display 10, as shown in FIG. 48, the measured luminance value may be locally low. In FIG. 48, dots # 3 and # 7 are extremely low, and even if the smoothing processing is performed as it is, not only the theoretical luminance distribution does not become smooth but also the average luminance as shown by the curve C (dashed line). May be unnecessarily reduced.
[0269]
In such a case, the theoretical luminance distribution having a smooth curve as shown by a curve D (broken line) is obtained by ignoring dots having extremely low measured luminance values and performing smoothing processing. The specific method of luminance correction is the same as described above.
[0270]
As described above, by using the brightness correction unit 602, the brightness variation of each dot in manufacturing is absorbed, and the image quality can be improved.
[0271]
As the brightness correction means 602, so-called moving averaging may be employed in addition to the above-described method. In this moving averaging, as shown in FIGS. 49A and 49B, the brightness values of one dot 26 (center dot 26) and a plurality of dots 26 arranged around the dot 26 are averaged, and the average value is calculated as the center value. And a luminance correction coefficient for the central dot 26 based on the measured luminance value of the central dot 26 and the luminance target value.
[0272]
For example, as shown in FIG. 50, when the measured luminance value (luminance value before correction: input luminance) is plotted on the horizontal axis x and the target luminance value (luminance value after correction: output luminance) is plotted on the vertical axis y, When the luminance value is Lj and the luminance target value is Lc, a value on a straight line y = (Lc / Lj) x is selected as the luminance correction coefficient. In FIG. 50, Lim indicates the maximum input gradation, and Lom indicates the maximum output gradation.
[0273]
The plurality of dots 26 arranged around the central dot 26 may be included in a dot group of 2m + 1 rows arranged in the vertical direction and may be included in a dot group of 2n + 1 columns arranged in the horizontal direction. . FIG. 49A shows an example in which a plurality of dots 26 arranged in an area Z1 composed of 2m + 1 rows × 2n + 1 columns are selected, and FIG. 49B shows an example in which the plurality of dots 26 are substantially fit in an area composed of 2m + 1 rows × 2n + 1 columns. An example in which a plurality of dots 26 arranged in a circular area Z2 are selected is shown.
[0274]
For one display unit 14, M dots 26 are arranged in the vertical direction, N dots 26 are arranged in the horizontal direction, and when there are a total of M × N dots 26, n is, when α and β are each one or more variables,
(1/2) M ≦ 2m + 1 ≦ αM
(1/2) N ≦ 2n + 1 ≦ βN
And
[0275]
Here, how to determine α and β will be described. First, when α and β are increased, the range for averaging is widened, so that the luminance target value may greatly differ from the actual ability (light emission ability) of the dot 26. As a result, many dots 26 exceeding the upper limit of the luminance correction coefficient may appear. Therefore, α and β are set such that the number of dots 26 whose luminance correction coefficient exceeds the upper limit value is equal to or less than a predetermined number. For example, α and β are preferably 5 or less, particularly preferably 3 or less.
[0276]
With this configuration, the seams can be made inconspicuous while suppressing the variation in the luminance distribution in the display unit 14, and the individual luminance of the display unit 14 can be utilized, and the display unit 14 can emit light brightly. Is not reduced unnecessarily.
[0277]
The processing after calculating the luminance target values for all the dots 26 includes, for example, a bottom-up method and a top-down method. In the bottom-up method, as shown in FIG. 51, first, in step S101, a dot indicating the minimum value is searched for from among the calculated total luminance target values. After that, in step S102, the current brightness target value is improved by a certain value for the searched dot to obtain a new brightness target value.
[0278]
According to the bottom-up method, the inconvenience of discontinuous images between the display units 14 is eliminated (continuous plane maintenance), and the display capability of the display units 14 can be maximized.
[0279]
On the other hand, in the top-down method, as shown in FIG. 52, first, in step S201, a dot 26 exceeding a preset threshold value is searched from the calculated total luminance target value. Thereafter, in step S202, the current brightness target value of the searched dot 26 is reduced to a threshold value.
[0280]
Also in this top-down method, the inconvenience of discontinuous images between the display units 14 can be solved.
[0281]
It is preferable that the above-described calculation of the luminance correction coefficient be performed in consideration of the color temperature. More specifically, as shown in FIG. 53, first, in step S301, the calculated luminance target value (fr for convenience) of each of the dots 26 is normalized according to the color scheme. This normalization is performed to make the levels of the respective color arrangements uniform, and is performed by multiplying the luminance target value fr by the reciprocal 1 / Kr of the standardization coefficient Kr. As a result, a value (normalized value) gr after the standardization is obtained.
[0282]
Thereafter, in step S302, a correction is made so that the standardized value gr falls within a certain range to obtain a corrected standardized value dgr. After that, in step S303, a new luminance target value dfr to which the color temperature is added is obtained by performing a restoration process according to each color arrangement. For example, the following operation is performed.
[0283]
dfr = h · Kr · dgr
Here, h is a color temperature adjustment constant. For example, when a reddish image is desired, h = 1.0 for red, and h = 0.9 for colors other than red. As a result, the dot corresponding to red is emphasized.
[0284]
As shown in FIG. 54, when the input gradation is taken on the horizontal axis x and the output gradation is taken on the vertical axis y as shown in FIG. The value is chosen. Therefore, for example, when a correction is made to the luminance correction coefficient, the inclination D may be changed. In FIG. 54, the straight line after the change is indicated by a broken line B.
[0285]
As a specific calculation, when the input gradation is set to 128 gradation at the maximum,
Output y = (correction value / 128) × input x
It becomes.
[0286]
However, in the present embodiment, as a correction for the luminance correction coefficient, a change to a straight line (see a broken line C) that does not necessarily pass through the origin is also possible, as shown in FIG. That is, a value on the straight line y = Ex ± F can be selected as the luminance correction coefficient. To realize this, for example, if the maximum width of the input gradation is reduced to 64 gradations and the intercept data (F in the straight line y = Ex ± F) is assigned to the number of bits, the memory capacity can be increased. Can be avoided.
[0287]
In this case, as a specific calculation, when the input gradation is set to a maximum of 64 gradations,
Output y = (correction value {1} / 64) × input x ± correction value {2}
It becomes.
[0288]
By adopting this correction method, when the correction value is (2), appropriate brightness correction can be performed on the dots 26 starting to light from a certain gradation, and the + correction value (2) and In this case, it is possible to perform appropriate luminance correction on the dots 26 in which gradation expression is difficult in a low gradation region.
[0289]
In the calculation of the brightness correction coefficient, the brightness of the dots 26 near the seam (the dots 26 in the peripheral portion) is larger than the brightness of the dots 26 in the central portion among the many dots 26 arranged in the display unit 14. It is preferable to set a value that increases the value. Thereby, the joint between the display units 14 can be made inconspicuous.
[0290]
When the display 10 is configured by arranging a large number of display units 14, it is preferable to arrange the display 10 with a certain regularity. The sequence determination method will be described with reference to FIGS.
[0291]
In this arrangement determination method, as shown in FIG. 56, first, in step S401, a characteristic value is obtained for each display unit 14. The characteristic values include the average luminance of the plurality of dots 26 constituting the display unit 14 and the number of missing dots 26. For example, the luminance of several dots 26 in the display unit 14 is measured, the average value is obtained, and the average value is set as the average luminance.
[0292]
Then, in step S402, the display units 14 are ranked based on the obtained characteristic values. For example, as shown in FIG. 57A, when the average luminance is 1000 or more, or the number of defects is 1 or less, the rank is A, and the average luminance is 900 or more and less than 1000, or the number of defects is 2 or more and 5 or less. In the case of, rank B, and when the average luminance is less than 900, or when the number of defects is 6 or more, rank C.
[0293]
Further, these display units 14 are classified into overall ranks when viewed with priority given to average luminance based on the obtained ranks (individual ranks). For example, as shown in FIG. 57B, as the overall rank A, a rank according to the average luminance is A rank and the rank according to the number of defects is A rank, and the overall rank B is a rank according to the average luminance. An A rank and a rank of B rank according to the number of defects are selected. Similarly, for the overall rank C, the rank based on the average brightness is B rank and the rank based on the number of defects is A rank, and the overall rank D is the rank based on the average brightness is B rank. In addition, a rank having a rank B according to the number of defects is selected.
[0294]
Then, in step S403 in FIG. 56, the arrangement area of the plurality of display units 14 on the display 10 is divided, and the rank of the display units 14 to be arranged in each area is designated. Then, in step S404, the display is performed according to the designation. The display 10 is manufactured by arranging the units 14.
[0295]
As an example, as shown in FIGS. 58A and 58B, the array region Z10 of the display unit 14 in the display 10 (10A and 10B) is divided into a central portion Z11 and a peripheral portion Z12, and the central portion Z11 has a high rank according to the number of defects. The display units 14 are arranged, and the display units 14 having a low rank according to the number of defects are arranged in the peripheral portion Z12.
[0296]
For example, for the first display 10A, the display units 14 of the overall rank A are arranged in the central portion Z11, and the display units 14 of the overall rank B are arranged in the peripheral portion Z12. As for the second display 10B, the display units 14 of the overall rank C are arranged in the central portion Z11, and the display units 14 of the overall rank D are arranged in the peripheral portion Z12.
[0297]
The first display 10A is unified with a display unit 14 having an average luminance rank of A rank, and the second display 10B is unified with a display unit 14 having an average luminance rank of B rank. I have. Therefore, in each of the displays 10A and 10B, the variation in the luminance distribution is suppressed, the image quality can be improved, and the seams of the display unit 14 are inconspicuous.
[0298]
For example, when the display units 14 are arranged in the central portion Z11, it is preferable to arrange them in a spiral form from the center, for example, as shown in FIG. 59A, or to arrange them in a cross-shaped order, as shown in FIG. 59B. . In FIG. 59A and FIG. 59B, the serial number is a number ordered by the overall rank, and is a number indicating the order of arrangement of the display units 14. On the other hand, when the display units 14 are arranged in the peripheral portion Z12, it is preferable to arrange the display units 14 in order from one side as shown in FIG. 60A, or to arrange in the order of ten characters as shown in FIG. 60B. .
[0299]
When the display units 14 thus ranked are arranged in a designated area, by arranging the display units 14 ordered in the same rank according to a predetermined rule, when the display 10 is viewed as a whole, A smooth luminance distribution can be obtained.
[0300]
In particular, a method of dividing the array region Z10 of the display unit 14 into a central portion Z11 and a peripheral portion Z12, arranging a display unit 14 having a higher rank in the central portion Z11, and arranging a display unit 14 having a lower rank in the peripheral portion Z12. Is based on the characteristic that even if the surroundings are dark, it is difficult for the human eyes to notice, and this is effective in eliminating discomfort to the human eyes.
[0301]
The above-described characteristic values can use variations in dot brightness and the like in the display unit 14 in addition to the average brightness and the number of defects. In addition, various divisions can be considered in addition to the division into two parts, a central part Z11 and a peripheral part Z12.
[0302]
In the above-described first to sixth driving devices 200A to 200F, as information for correction stored in the correction data memory 226, as shown in FIG. Alternatively, a linear correction table 610 in which linear correction data for improving the efficiency may be used. In this case, the linear correction table 610 developed in the correction data memory 226 and the second read circuit 234 function as the linear correction means 612.
[0303]
Here, the linear correction function will be described with reference to FIGS. 62A to 62C. First, the linear correction table 610 is created. As in the case of the above-described luminance correction, the luminance of each dot of the display 10 is measured as a premise.
[0304]
Specifically, for example, a signal in which the gray scale is increased in a stepwise manner is given to all the dots on the display 10 and displayed, and in this state, for example, using a CCD camera, the gray scale gradation level of all the dots is A luminance change characteristic (emission luminance characteristic) with respect to the change is measured. The number of plots for each dot is determined according to the capacity of the correction data memory 226 and the calculation speed. FIG. 62A shows the light emission luminance characteristics of a certain dot.
[0305]
After that, based on the measured light emission luminance characteristics of each dot, a weight coefficient for linearizing the light emission luminance characteristics is obtained for each dot. FIG. 62B shows a change characteristic of a weight coefficient corresponding to a light emission luminance characteristic of a certain dot.
[0306]
The weighting factor for each dot is obtained by the amount plotted when the above-described emission luminance characteristics are obtained, and an array of weighting factors corresponding to the number of plots is defined as a lookup table for linearization of the dot. Is done. Then, such a look-up table is obtained for each dot and registered in the correction data memory 226 as a linear correction table 610. The weight coefficient between plots may be determined in the display stage by, for example, first-order approximation (line-line approximation).
[0307]
Then, in the actual display stage, the input gradation level of a certain dot is read out through the first readout circuit 232, and the input gradation level read out from the look-up table relating to the dot is read out through the second readout circuit 234. The weighting factor corresponding to the tone level or the weighting factor obtained by the first-order approximation is read out, and the input gradation data value × the weighting factor is calculated in the multiplication circuit 236 at the subsequent stage and output as linearized gradation data. (See FIG. 62C).
[0308]
As described above, by using the linear correction unit 612, the display characteristics of each dot linearly change in accordance with the change of the gradation level, so that not only accurate image display is enabled, but also Thus, the contrast can be improved, and the displayed image can have sharpness.
[0309]
By the way, when displaying an image of a television signal through the display 10, the following linear correction processing is performed. That is, for example, in the current color television system, gamma correction is performed on the image transmission (transmission) side in order to reduce the cost of the receiver. Since this gamma correction is intended only for the cathode ray tube, the light emission luminance characteristics as shown in FIG. 63A are obtained. Therefore, if the video of the gamma-corrected television signal is displayed as it is on the display 10, the resolution of the high-saturation portion of the image is reduced, and the sharpness is lost.
[0310]
Therefore, in the present embodiment, as shown in FIG. 63B, an array of weighting coefficients for canceling the gamma correction may be defined as a lookup table for linearizing each dot.
[0311]
As a result, as shown in FIG. 63C, the display characteristics (display characteristics subjected to gamma correction) with respect to the gradation level in the transmission system (image transmission system) can be linearly corrected. Even when a signal is displayed, the resolution of the high-saturation portion of the image does not decrease, and the displayed image can be given a sharp feeling.
[0312]
Also, as shown in FIG. 64, the first to sixth driving devices 200A to 200F have dimming control means 640 for switching the power of the light source 16 in at least two stages at an arbitrary timing in one frame. You may.
[0313]
The switching of the power of the light source 16 by the dimming control unit 640 may be performed by the light source driving circuit 642 based on the input of the detection signal Sm from the timing generation circuit 284 provided in the signal processing circuit 206. The timing generation circuit 284 detects a power switching timing of the light source 16 based on the synchronization signal Ss supplied from the moving image output device 220.
[0314]
For example, the description will be made based on the second driving device 200B. In the second driving device 200B, as shown in FIG. 21, the display period of one image is one frame, and the one frame is 63 frames, for example. When one divided period at the time of equal division is defined as a linear subfield, the signal processing circuit 206 continuously assigns a display time corresponding to each gradation level to a necessary linear subfield for each dot. It creates dot data.
[0315]
Therefore, in this example, as shown in FIG. 65A, three linear subfields are added after 63 linear subfields, and the period from the first linear subfield LSF1 to the 63rd linear subfield LSF63 is The power of the light source 16 is set to 100%, and the power of the light source 16 is set to 25% for a period from the subsequent 64th linear subfield LSF64 to the 66th linear subfield LSF66.
[0316]
Thus, even if the display periods of the respective linear subfields are all the same, each of the linear subfields from the first linear subfield LSF1 to the 63rd linear subfield LSF63 is changed from the 64th linear subfield LSF64 to the 64th linear subfield LSF64. It has four times the luminance of each linear subfield up to 66 linear subfields LSF66.
[0317]
Therefore, as shown in FIG. 65B, when expressing gradation level 1, an ON signal is output to the 64th linear subfield LSF64, and when expressing gradation level 2, the 64th and 65th linear subfields are output. An ON signal is output continuously to the subfields LSF64 and LSF65. In addition, when expressing the gradation 4, an ON signal is output to the 63rd linear subfield LSF63, and when expressing the gradation level 5, the ON signal is output to the 63rd and 64th linear subfields LSF63 and LSF64. Are output continuously. When expressing the gradation level 14, the ON signal is continuously output to the 61st to 65th linear subfields LSF61 to LSF65.
[0318]
That is, in this example, only the three linear sub-fields LSF64 to LSF66 are added, and only the 64 gradations can be expressed so far, but 256 gradations (0 to 255) can be expressed. . Further, since only three linear subfields LSF64 to LSF66 are added, it is not necessary to almost change the display period of one linear subfield for one frame composed of 64 linear subfields. There are few design change issues. Further, since the period during which the power of the light source 16 is 25% is a short period of 3/66 of one frame, there is almost no decrease in luminance when white display is performed.
[0319]
In the above example, three linear subfields LSF64 to LSF66 are added after the 63 linear subfields LSF1 to LSF63, and the power of the light source 16 is switched between 100% and 25%. As shown in the figure, among the 63 linear subfields LSF1 to LSF63, the power of the light source 16 is set to 100% for the first 32 linear subfields LSF1 to LSF32, and for the last 31 linear subfields LSF33 to LSF63. The power of the light source 16 may be set to 50%.
[0320]
In this case, even if the display periods of the respective linear subfields are all the same, the respective linear subfields in the first to thirty-second linear subfields LSF1 to LSF32 in the first half are the same as the 33rd to 63rd linear subfields in the second half. It has twice the luminance of each linear subfield in the fields LSF33 to LSF63.
[0321]
Therefore, as shown in FIG. 66B, an ON signal is output to the 33rd linear subfield LSF33 when expressing the grayscale level 1, and when the grayscale level 2 is expressed, the 32nd linear subfield LSF32 When the gradation 3 is expressed, the ON signal is continuously output to the 32nd and 33rd linear subfields LSF32 and LSF33, and when the gradation 5 is expressed. On signals are continuously output to the 31st to 33rd linear subfields LSF31 to LSF33.
[0322]
That is, in this example, what can be expressed only in 64 gradations can be expressed in 96 gradations (0 to 95). Further, when the power of the light source 16 is set to 100% for all of the 63 linear subfields LSF1 to LSF63, the power of the light source 16 is 100% even when a low-level gradation expression is performed. In this example, since a period in which the power of the light source 16 is 50% enters at an arbitrary timing, low power consumption can be realized.
[0323]
In this example, the average luminance of the image of the next frame stored in the image memory 222 is analyzed, and if the average luminance is high, the power of the light source 16 is set to 100% in the next frame. Alternatively, the gradation expression may be performed by 63 linear subfields LSF1 to LSF63. In this case, it is possible to prevent the luminance from appearing to be lowered as a whole.
[0324]
As the light source 16, a high-speed cold-cathode tube (with a rising speed of less than 0.1 ms), an LED (with a rising speed of less than 20 ns), or a fluorescent tube having a carbon nanotube-field emitter disposed on the cathode, which has excellent response characteristics, can be used. .
[0325]
Next, the first to sixth driving devices 200A to 200F may adopt the following driving method.
[0326]
First, for example, normal driving in the second driving device 200B will be described. As shown in FIG. 67A, when one dot is viewed, a period during which an OFF signal is to be output according to the gradation level of the dot And the period during which the ON signal is to be output is determined.
[0327]
During the period in which the OFF signal is to be output, for example, 0V is applied to the column electrode 48b as shown in FIG. 67A, and 55V (fixed) is applied to the row electrode 48a as shown in FIG. 67B, as shown in FIG. 67C. As shown, the potential difference of 55 V is applied to the dot, and as a result, the dot is turned off. Then, at the time when the ON signal is to be output, a maximum voltage of, for example, 60 V is applied to the column electrode 48b as shown in FIG. 67A, and a fixed voltage of, for example, 55 V is applied to the row electrode 48a as shown in FIG. 67B. As shown in FIG. 67C, the potential difference of −5 V is applied to the dot, and the dot enters a light emitting state.
[0328]
In this normal operation, the gradation is expressed from the start of one frame for each dot. Therefore, it is necessary to sufficiently separate the pixel structure 30 from the optical waveguide plate 20 at the start of the frame. Due to the slow response at the time of separation of the pixel 30 or the separation property of the pixel structure 30 is deteriorated over time, the response at the time of separation of the pixel structure 30 becomes slow, and in the worst case, the pixel There is a possibility that the structure 30 is stuck to the optical waveguide plate 20 and does not separate.
[0329]
FIG. 68A and FIG. 68B show experimental results obtained by measuring the light emission characteristics of the dots 26 in the normal operation. In this experiment, an intensity change (Ld) of light scattered from the dot 26 was measured by an avalanche photodiode (APD) while measuring a waveform of an applied voltage Vc to a certain dot 26 (see FIG. 68A). Things. From FIG. 68B, it can be seen that this light emission characteristic gradually moves toward the off state from the start of one frame, and the off response within one frame is slow.
[0330]
To prevent this, if the voltage to be applied to the row electrode 48a is set to, for example, 100 V, the voltage to be applied to the column electrode 48b during the ON signal period must be set in order to realize a light emitting state during the ON signal output period. Must be 105V. In this case, it is necessary to increase the breakdown voltage of the driver IC 210B, and accordingly, the driver IC 210B becomes large and expensive.
[0331]
Therefore, in this example, as shown in FIGS. 69A to 69C, a voltage (separation voltage) for surely separating all dots is applied in the first predetermined period (preparation period Tp) of one frame. As the preparation period Tp, a time (for example, 1 msec) that hardly affects the light emission luminance is assigned to one entire frame (for example, 1/60 Hz = 16.7 ms).
[0332]
When, for example, one frame starts, the preparation period Tp starts. As shown in FIG. 69A, for example, 0 V is applied to the column electrodes 48b of all dots, and as shown in FIG. Are applied, and as shown in FIG. 69C, a potential difference of 100 V or more is applied to all the dots. As a result, all the dots are reliably turned off at the start of one frame, and the separation characteristics of the pixel structure 30 can be improved with almost no additional components, thereby improving the yield of the display 10. Can be.
[0333]
FIG. 70A and FIG. 70B show experimental results obtained by measuring the light emission characteristics of the dots 26 in the case where the preparation period is provided. In this experiment, while measuring the waveform of the voltage Vc applied to a certain dot 26 (see FIG. 70A), the intensity change (Ld) of the light scattered from the dot 26 was measured with an avalanche photodiode (APD). Things. From FIG. 70B, it can be seen that this emission characteristic sharply changes from the start of one frame to the off state, and the off response within one frame is extremely fast.
[0334]
Since the separation voltage applied in the preparation period Tp is generated by the row driver, a voltage higher than the withstand voltage of the driver IC 210B, that is, a voltage that sufficiently displaces the pixel structure 30 in the separation direction can be set. Therefore, there is no need to change the driver IC 210B.
[0335]
The row electrode drive circuit 202 is a circuit that can drive all dots in common, as shown in FIG. 71, for example, and can be realized simply and at low cost. Briefly describing the operation of the circuit shown in FIG. 71, in the preparation period Tp, a high-level signal is input to the first input terminal 620 and a low-level signal is input to the second input terminal 622. As a result, the first photocoupler 624 is turned on and the second photocoupler 626 is turned off, and a high-level signal is applied to each gate of the CMOS transistor 628 in the subsequent stage. As a result, the NMOS transistor Tr1 is turned on. The high level signal (100 V) is output from the output terminal 630.
[0336]
On the other hand, during periods other than the preparation period Tp, a low-level signal is input to the first input terminal 620 and a high-level signal is input to the second input terminal 622. As a result, the first photocoupler 624 is turned off, the second photocoupler 626 is turned on, and a low-level signal is applied to each gate of the CMOS transistor 628 at the subsequent stage. As a result, the PMOS transistor Tr2 is turned on. Thus, a low-level signal (55 V) is output from the output terminal 630.
[0337]
By the way, in the above-described third to sixth driving devices 200C to 200F, as shown in FIGS. 31 to 33, when the OFF signal is supplied to the non-selected dot 26, Since a high voltage is applied, the pixel structure 30 can be reliably separated from the optical waveguide plate 20, and the contrast can be improved. Further, the voltage (absolute value) of the non-selection signal can be set to a smaller value. For example, in the example of FIG. 33, the voltage of the non-selection signal can be reduced from 110 V to, for example, 80 V, which can contribute to a reduction in power consumption.
[0338]
Further, in the above-described sub-field driving shown by the first, third and fifth driving devices 200A, 200C and 200E and the linear sub-field driving shown by the second, fourth and sixth driving devices 200B, 200D and 200F, By adding multiple gradations (for example, an error diffusion method or a dither method) by image processing, the number of gradations that can be expressed can be increased.
[0339]
Further, by using only the gradation expression by image processing without using the above-described subfield driving or linear subfield driving, each dot is fixed in an on state or an off state, so that low power consumption is achieved. A still image can be displayed, which is suitable for an electronic poster, for example. In this case, only when the still image to be displayed is replaced with another image, the dots need only be driven to be displaced, so that the power consumption can be significantly reduced.
[0340]
Further, depending on the display pattern, there are cases where a region for displaying a fixed still image and a region for displaying a moving image are mixed. In order to cope with such a display pattern, a display controller is provided with a circuit system corresponding to a moving image ( By preparing two systems, a sub-field drive and a linear sub-field drive) and a circuit system for still images (only gradation expression by image processing), mixed display of moving images / still images can be performed with significantly reduced power consumption. be able to. These display forms are suitable for displaying advertisements and the like that distribute contents (digital contents and analog contents) from a central station in terrestrial broadcasting, the Internet, telephone lines, satellites or cable television, for example.
[0341]
In particular, when the Internet is used, it is preferable to distribute a compressed still image or moving image file from a content distribution central station. The file distributed from the central office is decompressed on the display side connected to the Internet and becomes display data. In this case, a compressed file decoder circuit may be provided before the image data processing circuit 224. Further, by providing an external storage device such as a hard disk on the display side (content receiving side), the image content may be stored, and the image content may be read from the external storage device at the time of display. In this case, the content distributed from the central station can be temporarily stored in the external storage device on the display side.
[0342]
By connecting a plurality of displays to the centralized station via the Internet or the like by such a method, it is possible to centrally and centrally manage the display of the optimum contents from the centralized station according to the display installation location, time zone, and the like.
[0343]
Here, one usage pattern (a usage pattern according to the first specific example) for realizing the above-described function will be described with reference to FIG.
[0344]
In the usage mode according to the first specific example, as shown in FIG. 72, a frame buffer 700 for a still image and a frame buffer 702 for a moving image are provided as the image memory 222, for example. Then, for example, an interface circuit 706 that receives various data from the network 704 and outputs the data to a subsequent circuit system, a file related to an image (still image file or moving image file) and control data from the data output from the interface circuit 706 And a control for controlling the display controller 228, for example, for each display unit 14 (control corresponding to a still image and control corresponding to a moving image) based on control data from the data separating circuit 708. This can be realized by providing a control circuit 710 and a compressed file decoder circuit 712 which is provided at a stage preceding the image data processing circuit 224 and decompresses a file related to a compressed image to restore still image data and moving image data. Can be.
[0345]
As a result, the data received from the central station 714 via the network 704 by the interface circuit 706 is separated by the data separation circuit 708 into a file relating to the image and control data, and the compressed file decoder circuit 712 and the output control circuit 710 respectively. Supplied to
[0346]
The compressed file decoder circuit 712 decompresses the supplied image-related file to restore still image data and moving image data, and outputs the data to the image data processing circuit 224 at the subsequent stage. The image data processing circuit 224 stores the restored still image data in the still image frame buffer 700, and stores the moving image data in the moving image frame buffer 702.
[0347]
On the other hand, the output control circuit 710 controls the display controller 228 based on the control data from the data separation circuit 708. Here, as the control data, for example, address data of the display unit 14 for displaying a still image can be used. The output control circuit 710 separates the first and second read circuits 232 and 234 and the data transfer unit 230 in the display controller 228 into a still image and a moving image based on the control data.
[0348]
As a result, of the display controller 228, the still image data is read from the still image frame buffer 700 by the circuit system allocated to the still image, and the still image is read through the plurality of display units 14 indicated by the address data. The moving image data is read from the moving image frame buffer 702 by the circuit system displayed and distributed for the moving image, and the moving image is displayed through the plurality of display units 14 other than the plurality of display units 14 indicated by the address data. Will be.
[0349]
Further, as a usage form according to the second specific example, the power supply current and the like are monitored in each of the displays 10, and the results are periodically transmitted to the central station 714 as status information of the displays 10. You may.
[0350]
In this case, as shown in FIG. 73, this is realized by providing a monitoring circuit 720 in the power supply unit 208 and providing an interface circuit 706 that transmits the output as status information. This makes it possible to manage whether or not the plurality of displays 10 located at a remote location from the central station 714 are out of order.
[0351]
Next, the usage pattern according to the third specific example is to correct a decrease in luminance due to a change with time. In other words, when the display is driven for a long time, the ON characteristics of the dots (the characteristic that the pixel structure 30 contacts one main surface of the optical waveguide plate 20) deteriorate with the elapse of time, and the display luminance is reduced. There is a risk of causing a decline. In order to prevent this, by reducing the ON voltage of the dots (increase the absolute value), it is possible to maintain the display luminance at substantially the same level as in the initial stage.
[0352]
As a specific circuit configuration, as shown in FIG. 74, various voltage generation systems (a row voltage generation system 722 that generates a row voltage applied to the row electrode 48a, a column voltage generation system 722, and a column electrode 48b) Among the ON voltage generation system 724 that generates the applied ON voltage and the OFF voltage generation system 726 that generates the OFF voltage applied to the column electrode 48b, for example, the ON voltage generation system 724 can generate a variable voltage. I do. FIG. 74 shows an example in which a variable resistor 728 is provided. An interface circuit 706 that receives information on a voltage change from the central station 714 at a stage preceding the power supply unit 208, and controls the variable resistor 728 based on the information from the interface circuit 706 to change the on-voltage to a desired voltage. And a voltage control circuit 730 that sets the voltage.
[0353]
At the factory, the result of measurement on the display 10 used for monitoring the decrease in brightness is managed by the central station 714, and among the displays 10 installed in each area, the display 10 corresponding to the time when the brightness is reduced , Via the network 704. The display 10 receives the information from the central station 714 via the interface circuit 706, and changes the on-voltage generated by the on-voltage generation system 724 to a desired voltage.
[0354]
For example, if the row voltage is 50 V and the ON voltage is 50 V at the time of installation, 0 V is applied to the dots to be turned ON. Then, at the time when the luminance starts to decrease due to the change with time, the information of the voltage change is supplied, so that the ON voltage is changed to, for example, 52V. As a result, −2 V lower than 0 V is applied to the dots to be turned on, and the pixel structure 30 is further displaced toward the optical waveguide plate 20, thereby improving the luminance at the time of turning on.
[0355]
Further, at the time when the luminance decreases after a lapse of time, the information of the voltage change is supplied again, so that the ON voltage is changed to, for example, 54V. As a result, -4V lower than 0V is applied to the dots to be turned on, and the pixel structure 30 is further displaced toward the optical waveguide plate 20, so that the brightness at the time of on is improved.
[0356]
In the above-mentioned usage pattern, the time when the brightness is reduced is determined using the monitor display 10 at the factory. In addition, the brightness is reduced using e-mail or telephone from a site manager. In this case, a method of transmitting voltage change information from the central station 714 to the display 10 based on the notification of the decrease in brightness is preferably adopted.
[0357]
In the above-described example, the example in which the remote control is performed using the network 704 has been described. However, the display 10 itself may have a function of changing the voltage. For example, in a plurality of registers provided in the voltage control circuit 730, time information indicating the time when the luminance decreases and a voltage value to be supplied to the variable resistor 728 are stored in advance. When the time information from the connected timer 732 (see FIG. 74) matches one of the time information in the register, the variable resistor 728 is controlled by the voltage value stored in the register, and the desired ON voltage is controlled. By doing so, a decrease in luminance can be suppressed.
[0358]
As another example, of the plurality of display units 14, for example, a dummy actuator unit 22 is formed in a display unit 14 arranged around the display screen, and a displacement state of the actuator unit 22 is detected by a sensor ( This is detected by a strain gauge or the like, and it is determined whether or not the luminance has decreased based on the displacement of the dummy actuator unit 22 during the ON operation.
[0359]
As a method of this determination, as shown in FIG. 75, a detection signal output from a group 734 of a large number of dummy actuator units 22 through sensors is supplied to a light emission luminance calculation unit 736, and the light emission luminance calculation unit 736 The approximate luminance of the entire display screen is calculated from the bundle of the detection signals. On the other hand, the threshold value is stored in a register in the voltage control circuit 730. Then, the voltage control circuit 730 controls the variable resistor 728 of the on-voltage generation system 724 assuming that the overall luminance has decreased when the approximate value from the light emission luminance calculation unit 736 falls below the threshold. , To a desired ON voltage. As a result, the light emission luminance can be maintained in the initial state.
[0360]
As another example, as shown in FIG. 76, a line sensor 740 that moves the display surface of the display 10 to the left and right is installed, and the line sensor 740 is driven while periodically displaying white on the display 10, A method of detecting the light emission luminance with the line sensor 740 is also preferably employed.
[0361]
Also in this case, the imaging signals sequentially output from the line sensor 740 are supplied to the light emission luminance calculator 736, and the light emission luminance calculator 736 calculates the overall luminance of the display screen based on the continuously supplied image signals. Let me calculate. A threshold value is stored in a register in the voltage control circuit 730, and when the calculated value from the light emission luminance calculation unit 736 falls below the threshold value, the on-voltage The variable resistor 728 of the generation system 724 is controlled to a desired ON voltage. As a result, the light emission luminance can be maintained in the initial state.
[0362]
In the above example, the brightness correction is performed by controlling the ON voltage applied to the column electrode 48b. However, the brightness correction can be realized by controlling the light source 16 (fourth embodiment). Usage form according to specific example).
[0363]
When, for example, a cold cathode tube or the like is used as the light source 16, as shown in FIG. 77, one light source 16 is configured by bundling a plurality of cold cathode tubes 742 and installing them in a reflector (not shown). can do. In this case, in addition to a specified number (for example, 12) of cold cathode tubes 742A, a plurality of (for example, 4) spare cold cathode tubes 724B are installed, and a spare cold cathode tube 724B and a power supply 744 are provided. The switches Sw1, Sw2,..., Swn are respectively inserted and connected. Then, the current of the light source 16 is monitored using the current detecting means 746, and it is determined whether or not the amount of light emitted from the light source 16 has decreased based on the current value from the current detecting means 746. A switch corresponding to a predetermined number (for example, one) of the cold cathode tubes 742B among the spare cold cathode tubes 742B is turned on through the control circuit 748 to increase the light amount.
[0364]
Of course, the luminance correction by the light source 16 may employ the following method. First, a manager of the site notifies the user that the luminance is decreasing. Based on the notification, information to be subjected to luminance correction is sent from the central station 714 via the network 704. The corresponding display 10 receives the information through the interface circuit 706 and supplies the information to the switching control circuit 748. The switching control circuit 748 turns on a switch corresponding to a predetermined number (for example, one) of the cold cathode tubes 742B among the spare cold cathode tubes 742B based on the supplied information. As a result, the light amount of the light source 16 is increased, and the luminance is improved.
[0365]
By the way, it is known that the fading of the fluorescent pigment of the color filter progresses as the use time elapses, and in particular, the fading of the blue color filter progresses. Therefore, at least one cold-cathode tube that emits blue light is installed as a spare cold-cathode tube 742B, and the spare blue-cathode tube is replaced based on a notification from the site that the lamp has faded. You may make it light.
[0366]
Further, in addition to the selective lighting of the spare cold cathode tube 742B, the output of the fan 750 for cooling the light source 16 may be adjusted. As a result, a rapid temperature change can be suppressed, and long-time use can be achieved, and uneven brightness due to the temperature change can be suppressed. In this case, as shown in FIG. 77, a fan drive control circuit 752 that drives and controls the fan 750 based on, for example, information on selective lighting from the interface circuit 706 may be provided.
[0367]
In the above-described example, the case where the luminance adjustment is performed by controlling the peripheral device of the display controller 228 has been described. However, as shown in FIG. 78, the brightness adjustment is logically performed in the correction data memory 226 of the display controller 228. The brightness may be adjusted by changing the value in the brightness correction table 600 (use mode according to the fifth specific example).
[0368]
In this case, as shown in FIG. 78, when the brightness of a certain display 10 decreases, for example, the central station 714 sends a group of brightness correction values to be used when the brightness decreases to the network 704 from the central station 714. To send over. The display 10 receives the correction value from the central station 714 through the interface circuit 706. The subsequent table creation unit 760 creates a new brightness correction table based on the received correction value, and overwrites the brightness correction table 600 stored in the correction data memory 226.
[0369]
Since each dot operates so as to suppress a decrease in luminance by various luminance correction values from the new luminance correction table 600, display luminance can be maintained at substantially the same level as in the initial stage.
[0370]
The method of overwriting the brightness correction table 600 is such that the table creation unit 760 creates a new brightness correction table 600 based on the time information from the timer 732 in addition to the supply from the centralized station 714 as in FIG. Alternatively, as in FIGS. 75 and 76, based on the calculation value output from the group 734 of the dummy actuator units 22 or the line sensor 740 through the light emission luminance calculation unit 736, the table creation unit 760 generates a new The luminance correction table 600 may be created.
[0371]
The rewriting of the luminance correction table 600 can compensate not only as a means for compensating for luminance reduction but also any white balance due to fading. For example, when blue color fades, the white balance can be maintained at substantially the same level as in the initial stage by rewriting the luminance correction coefficient so as to improve the luminance level of only blue.
[0372]
As described above, by using the usage patterns according to the second to fifth specific examples shown in FIGS. 73 to 78, the display 10 is automatically maintained using the network 704 or in a self-diagnosis manner. It becomes possible. Normally, in the maintenance of the display 10 in which a large number of display units 14 are arranged, even if it is a simple operation, a maintenance worker rushes to the site for repair. Therefore, the cost for maintenance is enormous, which is not good for the spread of the display 10.
[0373]
However, if the use modes according to the above-described second to fifth specific examples are adopted, simple maintenance work such as brightness adjustment can be automatically performed, and the cost for maintenance can be significantly reduced. it can. In addition, by setting a maintenance fee according to various usage patterns even with one brightness adjustment, a detailed maintenance service can be provided, and the display 10 can be contributed to spread.
[0374]
Then, if the display principle of the display according to the present invention is used, an optical switch that performs ON / OFF of the optical output and selective optical output can be configured as it is. That is, an optical waveguide functioning as an optical waveguide through which light is introduced and transmitted without leakage, and a number of actuators provided opposite to one of the optical waveguides and corresponding to one or many optical switch contacts A drive unit in which the units are arranged, and controls a displacement operation in a contact / separation direction of the actuator unit with respect to the optical waveguide according to an input optical switch control signal, to thereby control a predetermined portion of the optical waveguide. By controlling the leak light, it is possible to configure an optical switch that turns on / off the optical output and selectively extracts light only to a specific output.
[0375]
The method of manufacturing a display device according to the present invention is not limited to the above-described embodiment, but may adopt various configurations without departing from the gist of the present invention.
[0376]
【The invention's effect】
As described above, according to the method for manufacturing a display device according to the present invention, when a large-screen display device is configured by arranging a large number of display units, variations in brightness and seams between the display units are not noticeable. The image quality can be improved.
[0377]
In addition, display unevenness, brightness steps, and the like can be minimized, the discomfort to human eyes can be eliminated, and the image quality of an image can be improved.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a schematic configuration of a display according to an embodiment.
FIG. 2 is a cross-sectional view illustrating a configuration of a display unit.
FIG. 3 is an explanatory diagram illustrating a pixel configuration of a display unit.
FIG. 4 is a cross-sectional view illustrating a first configuration example of an actuator unit and a pixel structure.
FIG. 5 is a diagram illustrating an example of a planar shape of a pair of electrodes formed in an actuator unit.
FIG. 6A is an explanatory view showing one example in which comb teeth of a pair of electrodes are arranged along the long axis of the shape retaining layer, and FIG. 6B is an explanatory view showing another example.
FIG. 7A is an explanatory diagram showing one example in which comb teeth of a pair of electrodes are arranged along the short axis of the shape maintaining layer, and FIG. 7B is an explanatory diagram showing another example.
FIG. 8 is a sectional view showing another configuration of the display element.
FIG. 9 is a cross-sectional view illustrating a second configuration example of the actuator unit and the pixel structure.
FIG. 10 is a cross-sectional view illustrating a third configuration example of the actuator unit and the pixel structure.
FIG. 11 is a cross-sectional view illustrating a fourth configuration example of the actuator unit and the pixel structure.
FIG. 12 is an explanatory diagram showing a configuration in a case where crosspieces are formed on four sides of a pixel structure.
FIG. 13 is an explanatory diagram showing another configuration of the crosspiece.
FIG. 14 is a table showing a relationship between an offset potential (bias potential) output from a row electrode driving circuit, potentials of an ON signal and an OFF signal output from a column electrode driving circuit, and a voltage applied between a row electrode and a column electrode. FIG.
FIG. 15 is a circuit diagram showing a configuration of a driving device according to the first and second embodiments.
FIG. 16 is a block diagram illustrating a configuration of a driver IC in a column electrode drive circuit of the drive device according to the first embodiment.
FIG. 17 is a diagram particularly illustrating an example in which one frame is divided into a plurality of subfields in order to explain gradation control in the driving device according to the first embodiment.
FIG. 18 is a block diagram illustrating a signal processing circuit in the drive device according to the first embodiment.
FIG. 19 illustrates another relationship between the offset potential (bias potential) output from the row electrode driving circuit, the potential of the ON signal and the OFF signal output from the column electrode driving circuit, and the voltage applied between the row electrode and the column electrode. It is a table figure showing an example.
FIG. 20 shows still another relation between the offset potential (bias potential) output from the row electrode driving circuit, the potential of the ON signal and the OFF signal output from the column electrode driving circuit, and the voltage applied between the row electrode and the column electrode. It is a table | surface figure which shows the example of.
FIG. 21 is a diagram particularly illustrating an example in which one frame is equally divided into a plurality of linear subfields in order to explain gradation control in the driving device according to the second embodiment.
FIG. 22A is an explanatory diagram showing a bit arrangement in a case where a gradation level is 62 in dot data created by the driving device according to the second embodiment, and FIG. FIG. 9 is an explanatory diagram showing a bit arrangement in the case of 8;
FIG. 23 is a block diagram showing a signal processing circuit in a driving device according to the second and fourth embodiments.
FIG. 24 is a block diagram showing a configuration of a driver IC used in the driving device according to the second embodiment.
FIG. 25 is a block diagram illustrating a configuration of a data transfer unit used in the driving device according to the second embodiment.
FIG. 26 is an explanatory diagram showing data division in the first data output circuit.
FIG. 27 is an explanatory diagram showing a data transfer mode from the first data output circuit to the second data output circuit.
FIG. 28 is a circuit diagram showing a configuration of a driving device according to the third and fourth embodiments.
FIG. 29 illustrates an example in which one frame is divided into two fields and one field is further divided into a plurality of subfields in order to explain gradation control in the driving device according to the third embodiment. FIG.
FIG. 30 is a block diagram illustrating a signal processing circuit in a driving device according to a third embodiment.
FIG. 31 shows the relationship between the potentials of a selection signal and a non-selection signal output from a row electrode driving circuit, the potentials of an ON signal and an OFF signal output from a column electrode driving circuit, and the voltage applied between a row electrode and a column electrode. FIG.
FIG. 32 illustrates the relationship between the potentials of a selection signal and a non-selection signal output from a row electrode driving circuit, the potentials of an ON signal and an OFF signal output from a column electrode driving circuit, and the voltage applied between a row electrode and a column electrode. It is a table | surface figure which shows the example of.
FIG. 33 shows the relationship between the potentials of a selection signal and a non-selection signal output from a row electrode driving circuit, the potentials of an ON signal and an OFF signal output from a column electrode driving circuit, and the voltage applied between a row electrode and a column electrode. It is a table | surface figure which shows another example.
FIG. 34 is a diagram in which one frame is divided into two fields and one field is equally divided into a plurality of linear subfields in order to explain the gradation control in the driving device according to the fourth embodiment. It is a figure showing an example.
FIG. 35 is a block diagram showing a signal processing circuit in a driving device according to a fourth embodiment.
FIG. 36 is an explanatory diagram showing a pixel configuration of a display element to which the driving device according to the fifth embodiment is applied.
FIG. 37 illustrates an example in which one frame is divided into three fields and one field is further divided into a plurality of subfields in order to explain gradation control in the driving device according to the fifth embodiment. FIG.
FIG. 38 is a circuit diagram showing a configuration of a driving device according to fifth and sixth embodiments.
FIG. 39 is a block diagram showing a signal processing circuit in a driving device according to a fifth embodiment.
FIG. 40 is a diagram in which one frame is divided into three fields and one field is equally divided into a plurality of linear subfields in order to explain the gradation control in the driving device according to the sixth embodiment. It is a figure showing an example.
FIG. 41 is a block diagram showing a signal processing circuit in a driving device according to a sixth embodiment.
42A is a cross-sectional view showing an example of a display element using static electricity in a light emitting state, and FIG. 42B is a cross-sectional view showing an example of a display element in an extinction state.
FIG. 43A is a cross-sectional view showing a light emitting state of another example of a display element using static electricity, and FIG. 43B is a cross-sectional view showing a light emitting state thereof.
FIG. 44 is a cross-sectional view showing another configuration of the actuator section.
FIG. 45 is a block diagram illustrating a luminance correcting unit.
FIG. 46 is a flowchart showing a process of creating a luminance correction table.
FIG. 47 is a characteristic diagram illustrating an example of a luminance distribution of each dot.
FIG. 48 is a characteristic diagram showing another example of the luminance distribution of each dot.
FIG. 49A is an explanatory diagram showing an example in which a plurality of dots arranged in a rectangular area composed of 2m + 1 rows × 2n + 1 columns are selected in moving averaging; FIG. 8 is an explanatory diagram showing an example in which a plurality of dots arranged in a substantially circular area that fits in a rectangular area composed of 2m + 1 rows × 2n + 1 columns are selected in averaging.
FIG. 50 is a diagram illustrating characteristics of a luminance correction coefficient created by moving averaging.
FIG. 51 is a flowchart showing a process of creating a luminance correction coefficient by a so-called bottom-up method.
FIG. 52 is a flowchart showing a process of creating a luminance correction coefficient by a so-called top-down method.
FIG. 53 is a flowchart showing a process of creating a luminance correction coefficient in consideration of a color temperature.
FIG. 54 is a diagram illustrating an example of a change to a luminance correction coefficient passing through the origin.
FIG. 55 is a diagram illustrating an example of a change to a luminance correction coefficient that does not pass through the origin.
FIG. 56 is a flowchart showing an example of a method for arranging display units.
FIG. 57A is a table showing an example of a criterion for ranking display units based on characteristic values, and FIG. 57B is a table showing a breakdown of the ranking into the overall rank.
FIG. 58A is an explanatory diagram showing an arrangement of display units for a first display, and FIG. 58B is an explanatory diagram showing an arrangement of display units for a second display.
FIG. 59A is an explanatory diagram showing an example of the order when the display units are arranged in the center of the arrangement region, and FIG. 59B is an explanatory diagram showing another example.
FIG. 60A is an explanatory diagram showing an example of an order in which display units are arranged in a peripheral portion of an array region, and FIG. 60B is an explanatory diagram showing another example.
FIG. 61 is a block diagram illustrating a linear correction unit.
FIG. 62A is a diagram showing a light emission luminance characteristic of a certain dot, FIG. 62B is a characteristic diagram showing a weight coefficient for linearizing the light emission luminance characteristic, and FIG. 62C is a diagram after the linearization FIG. 4 is a characteristic diagram showing a light emission luminance distribution of FIG.
FIG. 63A is a diagram showing emission luminance characteristics of a television signal to which gamma correction has been applied, FIG. 63B is a characteristic diagram showing weighting coefficients for canceling gamma correction, and FIG. 63C is linearized It is a characteristic view which shows the light emission luminance distribution after.
FIG. 64 is a block diagram illustrating a dimming control unit.
FIG. 65A is a timing chart illustrating an example of light source switching timing, and FIG. 65B is a timing chart illustrating an example of a combination of linear subfields selected according to a gradation level.
FIG. 66A is a timing chart showing another example of the light source switching timing, and FIG. 66B is a timing chart showing another example of the combination of the linear subfields selected according to the gradation level.
67A is a waveform diagram showing a signal applied to a column electrode in normal driving, FIG. 67A is a waveform diagram showing a signal applied to a row electrode, and FIG. 67C is a waveform diagram showing a signal applied to a dot. FIG. 3 is a waveform diagram showing a voltage.
FIG. 68A is a diagram showing an applied voltage waveform in a normal operation, and FIG. 68B is a diagram showing a light intensity distribution thereof.
69A is a waveform chart showing a signal applied to a column electrode when a preparation period is provided, FIG. 69B is a waveform chart showing a signal applied to a row electrode, and FIG. 69C is a waveform chart showing dots. It is a waveform diagram which shows the voltage applied.
70A is a diagram showing an applied voltage waveform when a preparation period is provided, and FIG. 70B is a diagram showing a light intensity distribution thereof.
FIG. 71 is a diagram showing an example of a circuit used for a row electrode drive circuit.
FIG. 72 is a block diagram illustrating a usage pattern according to a first specific example.
FIG. 73 is a block diagram showing a usage pattern according to a second specific example.
FIG. 74 is a block diagram showing a usage pattern according to a third specific example.
FIG. 75 is a block diagram showing a first modification of the use mode according to the third specific example.
FIG. 76 is a block diagram showing a second modification of the mode of use according to the third specific example.
FIG. 77 is a block diagram showing a use mode according to a fourth specific example.
FIG. 78 is a block diagram showing a use mode according to a fifth specific example.
FIG. 79 is a configuration diagram showing a display device according to a proposal example.
FIG. 80 is a block diagram showing a peripheral circuit of a display device according to a proposal example.
[Explanation of symbols]
10 ... Display No.12 ... Light guide plate
14 display element # 16 light source
18 ... light 20 ... optical waveguide plate
22: Actuator unit # 24: Drive unit
30: Pixel structure # 32: Actuator substrate
38: vibrating part $ 40: fixed part
46: shape retention layer 48a: row electrode
48b: Column electrode 62: Scattered light
70: wiring # 72: data line
74: common wiring $ 76: varistor
200A to 200F: driving device # 202: row electrode driving circuit
204: column electrode driving circuit # 206: signal processing circuit
208: Power supply unit 210: Driver output
220: video output device $ 222: image memory
224: Image data processing circuit # 226: Correction data memory
228: Display controller $ 230: Data transfer unit
250: first shift register $ 252: second shift register
260 shift register $ 262 output circuit
270: first data output circuit # 272: second data output circuit
280: first driver $ 282: second driver
290: Transparent electrode 600: Brightness correction table
602: luminance correction means # 610: linear correction table
612: Linear correction means 640: Dimming control means
642 ... Light source drive circuit

Claims (17)

In a method of manufacturing a display device configured by arranging a plurality of display units in which a plurality of display elements are arranged,
Displaying a uniform image on the display device, and detecting the luminance of each display element;
Calculating a luminance target value for each of the display elements;
Calculating a luminance correction coefficient for each of said display elements based on a luminance target value of each of said display elements. The method for manufacturing a display device according to claim 1,
The display of the luminance target value is calculated by averaging the luminance of the display element and a plurality of display elements arranged around the display element, and using the average value as the luminance target value of the display element. Device manufacturing method. The method for manufacturing a display device according to claim 2,
The plurality of display elements arranged around the display element are included in a display element group for 2m + 1 rows arranged in the vertical direction and are included in a display element group for 2n + 1 columns arranged in the horizontal direction. A method for manufacturing a display device, comprising: The method for manufacturing a display device according to claim 3,
For one display unit, when M display elements are arrayed in the vertical direction and N display elements are arrayed in the horizontal direction, and when a total of M × N display elements is provided,
The above m and n, when α and β are each one or more variables,
(1/2) M ≦ 2m + 1 ≦ αM
(1/2) N ≦ 2n + 1 ≦ βN
A method for manufacturing a display device, comprising: The method for manufacturing a display device according to claim 4,
Α and β are
A method of manufacturing a display device, wherein the number of display elements whose luminance correction coefficient exceeds an upper limit value is set to be equal to or less than a predetermined number. The method for manufacturing a display device according to claim 1,
A first step of searching for a display element exhibiting a minimum value among the calculated luminance target values;
A second step of improving a current luminance target value by a fixed value for a display element to be searched. The method for manufacturing a display device according to any one of claims 1 to 6,
A step of searching for a display element exceeding a threshold value among the calculated luminance target values,
Reducing a current luminance target value to a threshold value for a display element to be searched. The method for manufacturing a display device according to claim 1,
The method of manufacturing a display device, wherein the calculation of the luminance correction coefficient is performed in consideration of a color temperature. The method for manufacturing a display device according to claim 8,
For the calculated luminance target value of each of the display elements, a step of normalizing each according to the color scheme,
Correcting the normalized value so that it falls within a certain range;
Performing a restoration process in accordance with each color scheme on the corrected values to obtain a luminance target value in which a color temperature is taken into account. The method of manufacturing a display device according to claim 9, wherein the step of obtaining the luminance target value in which the color temperature is taken into account is performed,
A method for manufacturing a display device, comprising a process of multiplying a color temperature adjustment constant. The method for manufacturing a display device according to claim 1,
The display unit comprises:
An optical waveguide plate into which light from a light source is introduced, and a driving unit provided opposite to one plate surface of the optical waveguide plate and having a number of display elements corresponding to a number of pixels are provided. Controlling a displacement operation of an actuator unit in the display element with respect to the optical waveguide plate in a contact / separation direction in accordance with an attribute of an input image signal to control light leakage at a predetermined portion of the optical waveguide plate. A display unit for displaying an image corresponding to the image signal on the optical waveguide plate. In a method of manufacturing a display device configured by arranging a plurality of display units in which a plurality of display elements are arranged,
Obtaining a characteristic value for each display unit;
Ranking the display units based on the obtained characteristic values;
Dividing the array region of the plurality of display units in the display device, and specifying a rank of display units to be arranged in each region;
A method for manufacturing a display device, comprising: arranging the display units according to the designation to manufacture the display device. The method for manufacturing a display device according to claim 12,
A method of manufacturing a display device, comprising: arranging ranked display units in a designated area, and arranging display units ordered in the same rank according to a predetermined rule. The method for manufacturing a display device according to claim 12 or 13,
Dividing the array area of the display unit into a central part and a peripheral part,
A method of manufacturing a display device, comprising: arranging a display unit having a high rank in the center portion and arranging a display unit having a low rank in the peripheral portion. The method for manufacturing a display device according to any one of claims 12 to 14,
When the characteristic value is the average luminance of a plurality of display elements constituting the display unit and the number of defective display elements,
The method of manufacturing a display device, wherein the ranking is determined by comprehensive evaluation of a rank based on average luminance and a rank based on the number of defects. The method for manufacturing a display device according to claim 15,
Dividing the array area of the display unit into a central part and a peripheral part,
A method of manufacturing a display device, comprising: arranging display units having a high rank based on the number of defects in the central portion, and arranging display units having a low rank according to the number of defects in the peripheral portion. The method for manufacturing a display device according to claim 16,
A method of manufacturing a display device, comprising: arranging display units having substantially the same rank based on the average luminance in the central portion and the peripheral portion.

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