JP2004071316A - Image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device using a thin film electron source eliminating unevenness of display based on voltage drop caused by wiring resistance of scanning lines and enhancing reliability in an upper bus electrode. <P>SOLUTION: Image information is displayed by line sequential driving method using a lower electrode as a signal line and the upper bus electrode as a scanning line with the upper bus electrode constituted with multilayer interconnection connected through through holes in an interlayer insulation layer. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a self-luminous flat panel display using a thin-film electron source.
[0002]
[Prior art]
A display using a small and integrable cold cathode electron source is called an FED (Field Emission Display). Cold cathode electron sources are classified into field emission type electron sources and hot electron type electron sources.The former includes Spindt type electron sources, surface conduction type electron sources, carbon nanotube type electron sources, etc. There are a metal-insulator-metal (MIM) type in which an insulator-metal is laminated, a metal-insulator-semiconductor (MIS) type in which a metal-insulator-semiconductor is laminated, and a metal-insulator-semiconductor-metal type. JP-A-7-65710 for the MIM type, MOS type (J. Vac. Sci. Technol. B11 (2) p. 429-432 (1993)) for the metal-insulator-semiconductor type, metal-insulator -In the semiconductor-metal type, HEED type (described in high-efficiency-electro-emission device, Jpn. J. Appl. Phys., Vol. 36, p. L939, etc.), EL type (Electroluminescence, Vol. 63, Applied Physics, Vol. 63, No., page 592), and porous silicon type (described in Applied Physics Vol. 66, No. 5, page 437).
The MIM type electron source is disclosed in, for example, JP-A-10-153979. FIG. 2 shows the structure and operating principle of the MIM type electron source. By applying a driving voltage V _d between the upper electrode 13 and the lower electrode 11, when the electric field of the insulating layer 12 to about 1~10MV / cm, the neighborhood of the Fermi level in the lower electrode 11 electron tunneling As a result, the electrons pass through the barrier, are injected into the conduction band of the insulating layer 12 as the electron acceleration layer, become hot electrons, and flow into the conduction band of the upper electrode 13. Among these hot electrons, those that have reached the electrode surface with energy equal to or higher than the work function φ of the upper electrode 13 are released into the vacuum 20.
[0003]
[Problems to be solved by the invention]
When displaying an image in the FED, a driving method called a line sequential driving method is adopted as a standard. In this method, when displaying 60 still images (frames) per second, display in each frame is performed for each scanning line (horizontal direction). Therefore, all the cold cathode electron sources corresponding to the number of signal lines on the same scanning line operate simultaneously. A current obtained by multiplying the current consumed by the cold cathode electron sources included in the sub-pixels by the total number of signal lines flows through the scanning lines during operation. This scanning line current causes a voltage drop along the scanning line due to the wiring resistance, which hinders the uniform operation of the cold cathode electron source. In particular, in realizing a large display device, a voltage drop due to wiring resistance of a scanning line is a serious problem.
To solve this problem, it is necessary to reduce the wiring resistance of the scanning line. In the case of a thin-film electron source, it is conceivable to increase the thickness of the upper bus electrode for supplying power to the lower electrode or the upper electrode. However, when the thickness of the lower electrode is increased, the unevenness of the wiring becomes severe, and the upper bus electrode and the like are easily disconnected. On the other hand, when the upper bus electrode is made thicker, there is a problem that the connection portion with the thin upper electrode is easily broken. Therefore, there is a method to prevent disconnection of the upper electrode by taper etching the upper bus electrode. However, since taper etching is generally performed by using side etching of the resist during etching, it is not possible to control a thick upper bus electrode film having a long etching time. Difficulties arise in sex. Therefore, there is a structure in which the upper bus electrode is a laminated metal film, and a thin upper bus electrode lower layer that is connected to the upper electrode or a tapered etched lower bus electrode lower layer and a thick upper bus electrode upper layer that is used for power supply are stacked. The metal laminated film has a problem that electrochemical corrosion easily occurs during a process such as wet etching, and the upper bus electrode is easily deteriorated.
[0004]
[Means for Solving the Problems]
An object of the present invention is to provide a thin film type having a lower electrode and an upper electrode, an electron acceleration layer sandwiched between the lower electrode and the upper electrode side, by applying a voltage between the lower electrode and the upper electrode. In an image display device having a substrate on which an electron source is formed and a phosphor screen, the thin-film type electron source array has an upper bus electrode serving as a power supply line to the upper electrode, and the upper bus electrode is an interlayer. It can be realized by displaying the image information by a line-sequential driving method using a multilayer wiring connected through a through hole in an insulating layer, using the lower electrode as a signal line and the upper bus electrode as a scanning line. .
[0005]
BEST MODE FOR CARRYING OUT THE INVENTION
(First embodiment)
A first embodiment of the present invention for achieving the above object will be described with reference to FIGS. 4 to 15 and FIG. 1 taking a MIM electron source as an example.
First, a metal film for a lower electrode is formed on an insulating substrate 10 such as glass. As the lower electrode material, Al or an Al alloy is used. The reason why Al or Al alloy is used is that a high-quality insulating film can be formed by anodic oxidation. Here, an Al—Nd alloy doped with 2 atomic% of Nd was used. For example, a sputtering method is used for film formation. The film thickness was 300 nm. After the film formation, a stripe-shaped lower electrode 11 was formed by a photo process and an etching process. For the etching, for example, wet etching with a mixed aqueous solution of phosphoric acid, acetic acid and nitric acid is used (FIG. 3).
Next, a protective insulating layer 14 for limiting an electron emission portion and preventing concentration of an electric field on the lower electrode edge, and an insulating layer 12 are formed. First, a portion serving as an electron emission portion on the lower electrode 11 is masked with a resist film 25, and the other portion is selectively anodized thickly to form a protective insulating layer 14 (FIG. 4). If the formation voltage is 100 V, the protective insulating layer 14 having a thickness of about 136 nm is formed. Next, the resist film 25 is removed, and the surface of the remaining lower electrode 11 is anodized. For example, if the formation voltage is 6 V, an insulating layer 12 having a thickness of about 10 nm is formed on the lower electrode 11 (FIG. 5).
Next, an upper bus electrode film lower layer 26 serving as a power supply line to the upper electrode 13 and a second protective insulating layer 19 formed thereunder are formed by, for example, a sputtering method. The second protective insulating layer 19 was made of, for example, Si oxide and had a thickness of 40 nm. When there is a pinhole in the protective insulating layer 14 formed by anodic oxidation, the second protective insulating layer 19 fills the defect and maintains the insulation between the lower electrode 11 and the upper bus electrode lower layer 26. An Al—Nd alloy was used as a material of the upper bus electrode lower layer 26. (FIG. 6).
Subsequently, the upper bus electrode 26 is formed by processing in a photo-etching process so as to be orthogonal to the lower electrode 11. As an etchant, a mixed aqueous solution of phosphoric acid, acetic acid, and nitric acid is used (FIG. 7).
Next, an interlayer insulating layer 27 is formed. As the interlayer insulating layer 27, for example, SiO ₂ or Si ₃ N ₄ can be used. Using the SiN _x film was deposited by sputtering in this embodiment. In this embodiment, the film thickness is set to 500 nm (FIG. 8).
Subsequently, through holes are formed in the interlayer insulating layer 27 on the upper bus electrode by a photoetching process. The through hole is formed in a portion other than the electron emitting portion, for example, in a gap between the wirings of the lower electrode 11. For this processing, for example, dry etching using CF ₄ or SF ₆ may be used. Since dry etching using a fluoride-based etching gas such as CF ₄ or SF ₆ etches the SiO ₂ film of the interlayer insulating layer 27 with a high selectivity to the Al alloy of the upper bus electrode lower layer 26, the upper bus electrode lower layer 26 is etched. It is possible to process only the interlayer insulating layer 27 using the Al alloy as a stopper film (FIG. 9).
Subsequently, an upper bus electrode upper layer 28 is formed. As the upper layer 28 of the upper bus electrode, for example, Cu having a low specific resistance is used. In this embodiment, a film formed by a sputtering method is used. In this embodiment, Cu is 5 mm. It is also effective to lay a thin Cr film or the like as an adhesive layer under Cu (FIG. 10).
Subsequently, the upper layer 28 of the upper bus electrode is processed by wet etching. As the etchant, for example, an aqueous solution of ferric chloride is used (FIG. 11).
In the above embodiment, a Cu film having a thickness of 5 mm formed by sputtering is used. However, when the film is to be further thickened in order to manufacture a large-sized display device, the sputtered film is used as a seed film and a Cu film is formed thereon. Plating can be performed to further increase the film thickness. By using the plating method, the upper bus electrode upper layer 28 having a thickness of 10 to 75 mm can be formed.
Subsequently, an opening is formed in the interlayer insulating layer 27 of the electron emission portion by a photoetching process. For this processing, for example, dry etching using CF ₄ or SF ₆ may be used. Since dry etching using a fluoride-based etching gas such as CF ₄ or SF ₆ etches the SiO ₂ film of the interlayer insulating layer 27 with a high selectivity to the Al alloy of the upper bus electrode lower layer 26, the upper bus electrode lower layer 26 is etched. It is possible to process only the interlayer insulating layer 27 using the Al alloy as a stopper film (FIG. 12).
Next, the Al—Nd alloy of the upper bus electrode lower layer 26 is tapered by a photo process and a wet etching process so that the film thickness decreases toward the electron emission portion side. The taper processing can be realized by changing the firing temperature of the resist to lower the adhesiveness of the resist, and retreating the resist during wet etching (FIG. 13).
Next, the SiO ₂ of the second protective insulating layer 19 is dry-etched to open an electron emission portion. In the dry etching method using a fluoride-based etching gas such as CF ₄ or SF ₆ , SiO ₂ of the second protective insulating layer 19 is higher than the insulating layer 12 made of an anodic oxide film of Al alloy and the protective insulating layer 14. Since etching is performed at the selectivity, damage to the insulating layer 12 can be reduced (FIG. 14).
Next, the insulating layer 12 is anodized again to repair the damage.
After the repair of the insulating layer 12, a film of the upper electrode 13 is finally formed. As a film forming method, for example, sputtering film forming is used. As the upper electrode 13, for example, a laminated film of Ir, Pt, and Au is used, and the film thickness is several nm. Here, the thickness was set to 5 nm. The upper electrode 13 can be processed by bringing a shadow mask into close contact with the upper bus electrode upper layer 28 as a partition. The formed thin upper electrode 13 is cut for each opening of the interlayer insulating layer 27, separated for each electron source, and formed in a tapered upper bus electrode lower layer 26 on the electron emission portion side. A structure is provided in which power is supplied by contact with the -Nd film (FIG. 1).
Further, as shown in FIG. 15, after the upper bus electrode upper layer 28 is processed, a material having a lower dry etching rate than the interlayer insulating layer 27, for example, SiO ₂ or the like is formed as the surface insulating layer 29 thereon, so that the At the time of opening the emission portion, an eaves structure can be formed by utilizing a difference in dry etching rate between the interlayer insulating layer 27 and the surface insulating layer 29, and the upper electrode 13 can be processed using the eaves structure as a mask. In addition, since the surface insulating layer 29 covers the surface of the upper bus electrode upper layer 28, the oxidation resistance of the upper bus electrode upper layer 28 can be improved.
As described above, by connecting the upper bus electrode lower layer 26 that contacts the upper electrode 13 to the upper bus electrode and the low-resistance upper bus electrode upper layer 28 mainly for power supply through the through hole of the interlayer insulating layer 27, The wiring resistance of the upper bus electrode can be greatly reduced, and can be used as a scanning line of a large-sized image display device. This structure does not cause electrochemical corrosion because the connection portion of the through hole in contact with the dissimilar metal is not exposed to the etchant when the upper bus electrode upper layer 28 and the upper bus electrode lower layer 26 are wet-etched. Therefore, a large-sized image display device with high manufacturing yield and high reliability can be realized.
(Second embodiment)
Next, as an example, a method of forming a display device of the present invention by bonding a thin film type electron source array substrate (FIG. 16) formed according to the first embodiment to a phosphor screen via a spacer will be described.
The display-side substrate is prepared as follows (FIG. 17). A translucent glass or the like is used for the face plate 110. First, a black matrix 120 is formed for the purpose of increasing the contrast of the display device. The black matrix 120 is formed by applying a solution of a mixture of PVA (polyvinyl alcohol) and sodium dichromate to the face plate 110 and irradiating the portions other than the portions where the black matrix 120 is to be formed with ultraviolet rays to expose the unexposed portions. It is formed by applying a solution in which graphite powder is dissolved and removing PVA by lift-off.
Next, a red phosphor 111 is formed. After applying an aqueous solution in which PVA (polyvinyl alcohol) and sodium dichromate are mixed to the phosphor particles on the face plate 110, a portion where the phosphor is to be formed is irradiated with ultraviolet rays to be exposed, and the unexposed portion is exposed to running water. To remove. Thus, the red phosphor 111 is patterned. The pattern is patterned in a stripe shape as shown in FIG. Similarly, a green phosphor 112 and a blue phosphor 113 are formed. As the phosphor, for example, Y ₂ O ₂ S: Eu (P22-R) may be used for red, ZnS: Cu, Al (P22-G) for green, and ZnS: Ag, Cl (P22-B) for blue. .
Next, after filming with a film of nitrocellulose or the like, Al is deposited on the entire face plate 110 to a thickness of about 75 nm to form a metal back 114. This metal back 114 functions as an acceleration electrode. Thereafter, the face plate 110 is heated to about 400 ° C. in the atmosphere to thermally decompose organic substances such as a filming film and PVA. Thus, the display-side substrate is completed.
The display side substrate manufactured in this way and the substrate 10 are sealed with the spacers 40 and the surrounding frame 116 using frit glass 115.
FIG. 18 shows a portion corresponding to an AA ′ cross section and a BB ′ cross section of the bonded display panel. The height of the spacer 40 is set so that the distance between the face plate 110 and the substrate 10 is about 1 to 3 mm. Here, for the sake of explanation, the spacers 40 are all set up for each of the dots emitting light of R (red), G (green), and B (blue). However, in practice, the number of spacers 40 (density) is limited as long as the mechanical strength can withstand. ) Can be reduced and set about every 1 cm.
The sealed panel is evacuated to a vacuum of about 10 ⁻⁷ Torr and sealed. After sealing, the getter is activated and the vacuum in the panel is maintained. For example, in the case of a getter material containing Ba as a main component, a getter film can be formed by high-frequency induction heating or the like. Further, a non-evaporable getter containing Zr as a main component may be used.
As described above, in this embodiment, since the distance between the face plate 110 and the substrate 10 is as long as about 1 to 3 mm, the acceleration voltage applied to the metal back 114 can be as high as 3 to 6 KV. Therefore, as described above, a phosphor for a cathode ray tube (CRT) can be used as the phosphor.
FIG. 19 is a connection diagram of a display device panel manufactured as described above to a drive circuit. The lower electrode 11 is connected to a lower electrode driving circuit 50, and the upper bus electrode lower layer 26 is connected to an upper electrode driving circuit 60. According to the present invention, the wiring resistance of the upper bus electrode lower layer 26 and the upper bus electrode upper layer 28 can be lower than that of the lower electrode 11, so that the upper bus electrode side is used as a scanning line and the lower electrode 11 side is used as a signal line. The intersection of the m-th upper bus electrode 26Cm and the n-th lower electrode 11Kn is represented by (m, n). An acceleration voltage 70 of about 3 to 6 KV is constantly applied to the metal back 114.
FIG. 20 shows an example of the waveform of the generated voltage of each drive circuit. At time t0, since no voltage is applied to any of the electrodes, no electrons are emitted, and thus the phosphor does not emit light. At time t1, a voltage of V1 is applied to the upper bus electrode 28C1, and a voltage of -V2 is applied to the lower electrodes 11K1 and K2. Since a voltage (V1 + V2) is applied between the lower electrode 11 and the upper electrode 13 at the intersections (1,1) and (1,2), if (V1 + V2) is set to be equal to or higher than the electron emission start voltage, Electrons are emitted from the thin-film electron source at the intersection of the two into a vacuum. The emitted electrons are accelerated by the acceleration voltage 70 applied to the metal back 114, and then enter the phosphor to emit light. At time t2, when a voltage of V1 is applied to C2 of the upper bus electrode and a voltage of -V2 is applied to K1 of the lower electrode 11, the intersection (2, 1) is similarly turned on. Thus, a desired image or information can be displayed by changing the signal applied to the lower electrode 11. Further, by appropriately changing the magnitude of the voltage -V2 applied to the lower electrode 11, an image having a gradation can be displayed. In this case, the application of the inversion voltage for releasing the charges accumulated in the insulating layer 12 is performed by applying V1 to all of the upper bus electrode lower layers 26, then applying V3 to all the lower electrodes 11, and applying all the upper bus electrodes kasou.
26 by applying -V3.
[0006]
【The invention's effect】
As described above, a display device which is less affected by a voltage drop due to wiring resistance of a scanning line can be realized, and a large-sized image display device can be realized.
[Brief description of the drawings]
FIG. 1 is a diagram showing a structure of a thin film type electron source of the present invention.
FIG. 2 is a diagram illustrating the operation principle of a thin-film electron source.
FIG. 3 is a view showing a conventional structure of a thin film type electron source.
FIG. 4 is a view showing a method for producing a thin-film electron source of the present invention.
FIG. 5 is a diagram showing a method for producing a thin-film electron source of the present invention.
FIG. 6 is a view showing a method for producing a thin-film electron source of the present invention.
FIG. 7 is a diagram showing a method for producing a thin-film electron source of the present invention.
FIG. 8 is a diagram showing a method for producing a thin-film electron source according to the present invention.
FIG. 9 is a diagram showing a method for producing a thin-film electron source of the present invention.
FIG. 10 is a diagram showing a method for producing a thin-film electron source of the present invention.
FIG. 11 is a diagram showing a method for producing a thin-film electron source of the present invention.
FIG. 12 is a diagram illustrating a method for producing a thin-film electron source according to the present invention.
FIG. 13 is a view showing a method for producing a thin-film electron source of the present invention.
FIG. 14 is a view showing a structure of a thin film type electron source of the present invention.
FIG. 15 is a diagram illustrating a method for producing a thin-film electron source according to the present invention.
FIG. 16 is a view showing an electron source substrate of a display device using the thin-film electron source of the present invention.
FIG. 17 is a diagram showing a phosphor screen substrate of a display device using the thin-film electron source of the present invention.
FIG. 18 is a diagram showing a cross section of a display device using the thin-film electron source of the present invention.
FIG. 19 is a diagram showing connection to a drive circuit in a display device using the present invention.
FIG. 20 is a diagram showing a drive voltage waveform in the display device of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... board | substrate, 11 ... lower electrode, 12 ... insulating layer, 13 ... upper electrode, 14 ... protective insulating layer, 15 ... upper bus electrode, 19 ... 2nd protection Insulating layer, 20: vacuum, 25: resist film, 26: lower layer of upper bus electrode, 27: interlayer insulating film, 28: upper layer of upper bus electrode, 29: surface insulating layer, Reference numeral 40: spacer, 50: lower electrode drive circuit, 60: upper electrode drive circuit, 70: acceleration voltage, 110: face plate, 111: red phosphor, 112: green Phosphor, 113: blue phosphor, 114: metal back, 115: frit glass, 116: frame.

Claims (3)

A substrate having a lower electrode, an upper electrode, and an electron acceleration layer sandwiched therebetween, and forming a thin-film electron source that emits electrons from the upper electrode side by applying a voltage between the lower electrode and the upper electrode. And an image display device having a phosphor screen, the thin-film type electron source array has an upper bus electrode serving as a power supply line to the upper electrode, and the upper bus electrode is provided through a through hole in an interlayer insulating layer. An image display device characterized by being formed by multi-layer wirings connected by connection. The image display device according to claim 1, wherein a part of an upper layer of the multilayer wiring is formed of a plating film. 2. The image display device according to claim 1, wherein the lower electrode is used as a signal line and the upper bus electrode is used as a scanning line to display image information by a line sequential driving method.

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