JP2004063725A - Multilayer interconnection circuit board incorporating coaxial line and its manufacturing method - Google Patents

Multilayer interconnection circuit board incorporating coaxial line and its manufacturing method Download PDF

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JP2004063725A
JP2004063725A JP2002219245A JP2002219245A JP2004063725A JP 2004063725 A JP2004063725 A JP 2004063725A JP 2002219245 A JP2002219245 A JP 2002219245A JP 2002219245 A JP2002219245 A JP 2002219245A JP 2004063725 A JP2004063725 A JP 2004063725A
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layer
conductor
signal conductor
circuit board
covered
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JP2002219245A
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JP4026437B2 (en
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Tatsuhiro Okano
岡野 達広
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Toppan Inc
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Toppan Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer interconnection circuit board that prevents the crosstalk noise between adjacent signal wiring layers, maintains the degree of wiring freedom in the signal wiring layers, and has excellent connection reliability, and to provide a method for manufacturing the multilayer interconnection circuit board. <P>SOLUTION: A ground layer 41 and a power supply layer 42 are formed via an insulating layer 31 on one surface and the other of a wiring circuit board 10 where wiring layers 21a and 21b are formed on both the surfaces of an insulating base 11, respectively. A covering signal conductor 50 is provided on the ground layer 41, the periphery of the covering signal conductor 50 is covered with a conductor layer for forming a coaxial line with a coaxial structure as a signal wiring layer. Additionally, a connection section is provided, where the connection section electrically connects a signal conductor 51 of the coaxial line to the wiring layer, or electrically connects the signal conductor 51 each other when the coaxial line and the wiring layer are formed, thus easily, electrically connecting signal conductors when the coaxial line (signal wiring layer) is set to be in a multilayer structure. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、同軸線を内蔵した多層配線回路基板及びその製造法に関する。
【0002】
【従来の技術】
従来の多層配線回路基板は、配線層が高密度化されることにより、信号線が近接することでお互いの信号配線間にクロストークノイズが発生し、回路の駆動素子に動作不良を発生させるという問題を有する。また、これは動作周波数が100MHz以上の回路で顕著に現れており、これを防止するために、従来は左右の信号線間にグランドパターンを配置したり、上下の信号線間にグランド層を形成するなどの手段を用いて対処しているが不十分である。
【0003】
【発明が解決しようとする課題】
本発明は、近接した信号配線層間のクロストークノイズを防止し、信号配線層の配線自由度を保持し、接続信頼性に優れた同軸線内蔵多層配線回路基板及びその製造法を提供することを目的とする。
【0004】
【課題を解決するための手段】
本発明に於いて上記課題を達成するために、まず請求項1においては、絶縁基材上にグランド層と、電源層と、少なくとも1層以上の配線層とが形成されてなる多層配線回路基板において、前記グランド層上に信号導線の周囲を絶縁層で覆った被覆信号導線を配設し、前記被覆信号導線の絶縁層の周囲を導体層で覆って前記導体層が前記グランド層に電気的に接続された同軸ケーブル構造の同軸線とし、前記同軸線の所定位置に前記同軸線の信号導線と前記配線層、または前記同軸線の信号導線同士を電気的に接続するための接続部が形成されていることを特徴とする同軸線内蔵多層配線回路基板としたものである。
【0005】
また、請求項2においては、前記接続部は、前記被覆信号導線上の前記絶縁層を孔開け加工して、前記被覆信号導線の信号導線の一部が露出した開孔部を形成し、前記開孔部に充填もしくはめっき法等により導体を形成して、前記同軸線の信号導線と配線層、または前記同軸線の信号導線同士を電気的に導通させた形態であることを特徴とする請求項1に記載の同軸線内蔵多層配線回路基板としたものである。
【0006】
また、請求項3においては、前記同軸線を複数形成したとき、前記同軸線の線長を同じ長さにすることを特徴とする請求項1または2に記載の同軸線内蔵多層配線回路基板としたものである。
【0007】
また、請求項4においては、以下の工程を少なくとも具備することを特徴とする同軸線内蔵多層配線回路基板の製造方法としたものである。
(a)絶縁基材11の両面に配線層21a及び21bが形成された配線回路基板(ベース基板)10の一方の面に絶縁層31を介してグランド層41が、他方の面に絶縁層31を介して電源層42が形成された配線回路基板のグランド層41の所定位置をフォトエッチング加工して開孔部を形成し、樹脂等の絶縁材料を埋め込み、埋め込み層41aを形成する工程。
(b)グランド層41及び埋め込み層41a上に所定厚の接着層32を形成する工程。
(c)信号導線51の周囲を絶縁層52で被覆した被覆信号導線50を接着層32上に配設する工程。
(d)被覆信号導線50が固定されている部分を除く接着層32を除去する工程。
(e)被覆信号導線50の絶縁層52周囲及びグランド層41上に薄膜導体層を形成する工程。
(f)薄膜導体層が形成された被覆信号導線50の所定位置に接続部を形成するためのレジストパターン37を形成する工程。
(g)薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線50の絶縁層52周囲に所定厚の導体層44を形成して同軸線60を、グランド層41上に導体層44を形成する工程。
(h)レジストパターン37を専用の剥離液で剥離し、同軸線70、薄膜導体層が形成された被覆信号導線50及び導体層44上に所定厚の絶縁層33を形成する工程。
(i)絶縁層33を孔開け加工して、被覆信号導線50の信号導線51が一部露出した開孔部33aを形成する工程。
(j)絶縁層33上及び開孔部33a内に薄膜導体層を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33上に所定厚の導体層45を、開孔部33aにフィルドビア45cを形成する工程。
(k)絶縁層33上の導体層45をパターニング処理して配線層45a及び接続部45bを形成する工程。
【0008】
さらにまた、請求項5においては、以下の工程を少なくとも具備することを特徴とする同軸線内蔵多層配線回路基板の製造方法としたものである。
(a)絶縁基材11の両面に配線層21a及び21bが形成された配線回路基板(ベース基板)10の一方の面に絶縁層31を介してグランド層41が、他方の面に絶縁層31を介して電源層42が形成された配線回路基板のグランド層41の所定位置をフォトエッチング加工して開孔部を形成し、樹脂等の絶縁材料で埋めこみ、埋め込み層41aを形成する工程。
(b)グランド層41の所定位置に所定形状を有するレジストパターン34を形成する工程。
(c)レジストパターン34及びグランド層41上に薄膜導体層を形成し、レジストパターン38をめっきマスクにして電解銅めっきを行い、所定厚の導体パターン層46を形成する工程。
(d)レジストパターン38を専用の剥離液で剥離処理し、導体パターン層46間に所定形状の溝61を形成する工程。
(e)溝61内に被覆信号導線50を配設し、被覆信号導線50周囲の絶縁層52に薄膜導体層を形成し、被覆信号導線50上の所定位置に接続部を形成するためのレジストパターン38を形成する工程。
(f)薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線50の周囲が導体で満たされた同軸線70を、導体パターン層46上に所定厚の導体層47を形成する工程。
(g)レジストパターン38を専用の剥離液で剥離処理して、薄膜導体層が形成された被覆信号導線50及び導体層47上に所定厚の絶縁層35を形成する工程。
(h)絶縁層35を孔開け加工して、被覆信号導線50の信号導線51の一部が露出された開孔部35aを形成する工程。
(i)絶縁層35上及び開孔部35a内に薄膜導体層を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層35上に導体層48を、開孔部35a内にフィルドビア48cを形成する工程。
(j)絶縁層35上の導体層48をパターニング処理して配線層48a及び接続部48bをする工程。
【0009】
本発明の同軸線内蔵多層配線回路基板では、高密度多層配線回路基板の信号配線層間に発生するノイズを防止するために、絶縁層で被覆された被覆信号導線をグランド層に電気的に接続された導体層で覆うことにより、同軸構造の同軸線を形成し、信号配線層としている。また、同軸線上の絶縁層に接続部を設け、同軸線の信号導線と配線層、同軸線の信号導線同士の電気的接続を行っている。また、被覆信号導線を引き回すことで被覆信号導線同士を重ねて同軸線を形成することが可能となり、同軸線(信号配線層)の設計自由度が増すとともに、従来のビルアップ法の工法がそのまま適用できる同軸線内蔵の高密度多層配線回路基板の作製が可能となる。
【0010】
【発明の実施の形態】
以下本発明の同軸線内蔵多層配線回路基板の実施の形態につき説明する。
図1、図2及び図3は、本発明の同軸線内蔵多層配線回路基板の実施例を示す模式構成部分断面図である。
請求項1に係る本発明の同軸線内蔵多層配線回路基板は、絶縁基材11の両面に配線層21a及び21bが形成された配線回路基板10の一方の面に絶縁層31を介してグランド層41が、他方の面に絶縁層31を介して電源層42が形成されており、グランド層41上に被覆信号導線50を配設し、さらに、被覆信号導線50の周囲を導体層で覆うことにより同軸構造の同軸線を形成し、信号配線層としている。また、同軸線及び配線層を形成する際に同軸線の信号導線51と配線層とを、または信号導線51同士を電気的に接続するための接続部を設けたものである。
これは、同軸線の導体層44及び48がグランド層41に電気的に接続された同軸構造になっているため、高密度多層配線回路基板内の近接した信号配線層間に発生するノイズを防止することができる。
【0011】
請求項2に係る本発明の同軸線内蔵多層配線回路基板は、被覆信号導線50上の絶縁層に開孔部をレーザー加工等で形成する際被覆信号導線の信号導線51を一部露出させて、めっきもしくは充填で導体を埋め込んでフィルドビアを形成して、同軸線の信号導線と配線層、または前記同軸線の信号導線同士を電気的に接続する接続部を設け、同軸線(信号配線層)を多層構造にした場合の信号導線同士の電気的接続、または同軸線の信号導線と配線層との電気的接続が容易になり、配線層設計の自由度が増すと共に接続信頼性に優れたクロストークのない高密度同軸線内蔵多層配線回路基板を得ることができる。
【0012】
請求項3に係る本発明の同軸線内蔵多層配線回路基板は、配線回路基板内で配設する同軸線の線長さを同じ長さにすることで、配線回路基板内での同軸線(信号配線層)の信号伝搬速度が同じになるようにし、信号間の位相ズレを防止している。
【0013】
以下、本発明の同軸線内蔵多層配線回路基板の製造方法について説明する。
図4及び図5(a)〜(j)に、図1(a)及び(b)に示す同軸線内蔵多層配線回路基板の請求項4に係る製造方法の一実施例を工程順に示す。
まず、絶縁基材11の両面に配線層21a及び配線層21bが形成された配線回路基板(ベース基板)10(図4(a)参照)の両面に樹脂フィルム等を貼付する等の方法で絶縁層31を形成し、さらに銅箔等を貼り合わせて、一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層42を形成し、グランド層41をフォトエッチング加工等でパターン加工して開孔部を形成し、樹脂等の絶縁材料をスクリーン印刷等で埋め込み、表面研磨して、埋め込み層41aを形成する(図4(b)参照)。
この埋め込み層41aは、この領域に接続部を形成する際、グランド層41と電気的に絶縁された領域を形成するためのもので、埋め込み層41a上に被覆信号導線50が必ず配設されるようにしておく。
【0014】
次に、グランド層41及び埋め込み層41a上に加熱硬化タイプの粘着フィルムを貼り合わせ、接着層32を形成する(図4(c)参照)。
次に、接着層32上の所定位置に銅線からなる信号導線51が絶縁層52で被覆された被覆信号導線50を配置し、所定の温度で加熱して、被覆信号導線50を接着層32にてグランド層41上に固定する(図4(d)参照)。
【0015】
次に、グランド層41上に被覆信号導線50が固定されている部分を除く接着層32をエッチング等の方法で除去し、被覆信号導線50は加工後の接着層32aでグランド層41に固定される。さらに、被覆信号導線50の周囲及びグランド層41上に無電解めっき等により約0.5μm厚の薄膜導体層(特に図示せず)を形成する。さらに、薄膜導体層が形成されたグランド層41及び被覆信号導線50上に感光層を形成し、パターン露光、現像等のパターンニング処理を行って、埋め込み層41a及び被覆信号導線50上の所定位置に接続部を形成するためのレジストパターン37を形成する(図4(e)参照)。
【0016】
次に、薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線50の周囲に所定厚の導体層44が形成された同軸線60及びグランド層41上に導体層44を形成する(図5(f)参照)。
ここで、導体層44の膜厚は10μm以上あればノイズを防止する効果として十分である。また、導体層44はグランド層41上にも形成されるため、グランド層41に電気的に接続された同軸線60を得ることができる。
【0017】
次に、レジストパターン37を専用の剥離液で剥離し、レジストパターン37下部にあった薄膜導体層をソフトエッチングで除去し、導体層44、同軸線60及び被覆信号導線50上に樹脂溶液を塗布するか樹脂フィルムを貼り合わせる等の方法で絶縁層33を形成する(図5(g)参照)。
次に、被覆信号導線50上の絶縁層33の所定位置をレーザー加工等により孔開け加工して、被覆信号導線50の信号導線51を一部露出させた開孔部33aを形成する(図5(h)参照)。
【0018】
次に、絶縁層33上及び開孔部33a内に無電解銅めっき等により約0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33上に所定厚の導体層45を、開孔部33aにフィルドビア45cを形成して、導体層45と同軸線の信号線51とがフィルドビア45cで電気的に接続された接続部を形成する(図5(i)参照)。
【0019】
次に、絶縁層33上の導体層45をフォトエッチング加工でパターニング処理して配線層45a及び接続部45bを形成し、同軸線60の信号導線51と配線層45aがフィルドビア45cにて電気的に接続された接続部45bを有する同軸線内蔵多層配線回路基板100を得ることができる(図5(j)参照)。
【0020】
図6及び図7(a)〜(j)に、図2(a)及び(b)に示す同軸線内蔵多層配線回路基板の請求項4に係る製造方法の他の実施例を工程順に示す。
まず、絶縁基材11の両面に配線層21a及び配線層21bが形成された配線回路基板(ベース基板)10(図6(a)参照)の両面に樹脂フィルム等を貼付する等の方法で絶縁層31を形成し、さらに銅箔等を貼り合わせて、一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層42を形成し、グランド層41をフォトエッチング等でリング状の開孔部41bを形成し、グランド層41から電気的に絶縁された金属層41cを形成する(図6(b)参照)。
【0021】
以下、上記の請求項4に係る同軸線内蔵多層配線回路基板の製造方法と同じ工程で処理し、同軸線60、配線層45a及びグランド層41から電気的に絶縁された金属層41c上にフィルドビア45cからなる接続部45bを形成し、同軸線60の信号導線51と配線層45aがフィルドビア45cにて電気的に接続された接続部45bを有する同軸線内蔵多層配線回路基板200を得ることができる(図7(j)参照)。
この方法は、上記製造方法のグランド層41の埋め込み層41の代わりに、グランド層41と電気的に絶縁された金属層41bを設けたもので、被覆信号導線50上に形成された絶縁層33をレーザー加工等で孔開け加工して開孔部33aを形成する際(図7(h)参照)、金属層41cがストッパー層の役目をし、レーザー加工の際の加工条件範囲を広く設定できる等のメリットを有する。
【0022】
図8、図9及び図10(a)〜(k)に、図3(a)及び(b)に示す同軸線内蔵多層配線回路基板の請求項5に係る製造方法の一実施例を工程順に示す。
まず、絶縁基材11の両面に配線層21a及び配線層21bが形成された配線回路基板(ベース基板)10(図8(a)参照)の両面に樹脂フィルム等を貼付する等の方法で絶縁層31を形成し、さらに銅箔等を貼り合わせて、一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層42を形成し、グランド層41をフォとエッチング加工等でパターン加工して開孔部を形成し、樹脂等の絶縁材料をスクリーン印刷等で埋め込み、表面研磨して、埋め込み層41aを形成する(図8(b)参照)。
【0023】
次に、グランド層41及び埋め込み層41a上にドライフィルムをラミネートする等の方法で感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、所定形状のレジストパターン34を形成する(図8(c)参照)。このレジストパターン34は、セミアディティブプロセスで導体パターン層及び被覆信号線を配設するための溝を形成するためのめっきマスクとなる。
【0024】
次に、レジストパターン34及びグランド層41上に無電解めっき等により約0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、レジストパターン34間に所定厚の導体パターン層46を形成する(図8(d)参照)。
次に、レジストパターン34を専用の剥離液で剥離し、導体パターン層46間に、被覆信号導線50を配設するための所定形状の溝61を形成する(図8(e)参照)。
【0025】
次に、溝61内に外周部に熱可塑性の樹脂層が形成された被覆信号導線50を配設し、所定の温度で加熱処理して溝61内の被覆信号導線50を固定し、被覆信号導線50の周囲及びグランド層上に無電解めっき等により約0.3μm厚の薄膜導体層(特に図示せず)を形成する。さらに、被覆信号導線50及び導体パターン層46上に感光性樹脂溶液を塗布し、乾燥して感光層を形成し、パターン露光、現像等のパターニング処理を行って、埋め込み層41a上の被覆信号導線50の所定位置に接続部を形成するためのレジストパターン38を形成する(図9(f)参照)。
【0026】
次に、薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線50の周囲が銅からなる導体で埋め込まれた同軸線70を、導体パターン層46上に導体層47を形成する(図9(g)参照)。
ここで、導体層47の膜厚は10μm以上あればノイズを防止する効果として十分である。
【0027】
次に、レジストパターン38を専用の剥離液で剥離し、レジストパターン38下部にあった薄膜導体層をソフトエッチングで除去し、導体層47、同軸線70及び被覆信号導線50上に樹脂溶液を塗布するか樹脂フィルムを貼り合わせる等の方法で絶縁層35を形成する(図9(h)参照)。
次に、被覆信号導線50上の絶縁層35の所定位置をレーザー加工等により孔開け加工して、被覆信号導線50の信号導線51が一部露出した開孔部35aを形成する(図9(i)参照)。
【0028】
次に、絶縁層35上及び開孔部35a内に無電解銅めっき等により約0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層35上に所定厚の導体層48を、開孔部35a内にフィルドビア48cを形成して、導体層48と同軸線の信号線51とがフィルドビア48cで電気的に接続された接続部を形成する(図10(j)参照)。
【0029】
次に、導体層45をフォトエッチング加工等でパターニング処理して配線層48a及び接続部48bを形成し、同軸線70の信号導線51と配線層48aがフィルドビア48cで電気的に接続された接続部48bを有する同軸線内蔵多層配線回路基板300を得ることができる(図10(k)参照)。
【0030】
【実施例】
以下、実施例により本発明を詳細に説明する。
<実施例1>
まず、50μmのポリイミドフィルムからなる絶縁基材11の両面に12μm厚の銅箔を積層して導体層を形成し、導体層をパターニング処理して、配線層21a及び配線層21bを形成した配線回路基板(ベース基板)10を作製した(図4(a)参照)。
【0031】
次に、配線回路基板(ベース基板)10の両面にビルドアップ用樹脂フィルム付銅箔をラミネーターで貼り合わせ、加熱、硬化して絶縁層31及び導体層を形成し、パターニング処理して、配線回路基板(ベース基板)10の一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層41を形成し、グランド層41の所定位置をフォトエッチング法にて加工して開孔部を形成し、樹脂等の絶縁材料をスクリーン印刷で埋め込み、表面を研磨して、埋め込み層41aを形成した(図4(b)参照)。
【0032】
次に、グランド層41及び埋め込み層41a上に熱硬化タイプのエポキシ系両面接着フィルムをラミネートして、接着層32を形成した(図4(c)参照)。次に、接着層32上の所定位置に30μmφの心線(銅)からなる信号導線51に10μmのエポキシ絶縁層52で被覆された被覆信号導線50を配設し、120℃のオーブンで45分間加熱して、被覆信号導線50をグランド層41上に固定した(図4(d)参照)。
【0033】
次に、グランド層41上に被覆信号導線50が固定されている部分を除く接着層32を70℃に加熱されたアルカリエッチング溶液(過マンガン酸60g/l、水酸化ナトリウム35g/l)にて、エッチング等の方法で除去した。さらに、被覆信号導線50の周囲及びグランド層上に無電解めっき等により0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層が形成されたグランド層41及び被覆信号導線50上にレジストを塗布して感光層を形成し、パターン露光、現像等のパターンニング処理を行って、埋め込み層41a上の被覆信号導線50上の所定位置に接続部を形成するためのレジストパターン37を形成した(図4(e)参照)。
【0034】
次に、薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線50の周囲に12μm厚の導体層44が形成された同軸線60及びグランド層41上に12μm厚の導体層44を形成した(図5(f)参照)。
【0035】
次に、レジストパターン37を10%の水酸化ナトリウム溶液にて除去し、レジストパターン37下部にあった薄膜導体層を200g/lの過硫酸アンモニウム溶液からなるエッチング液にて溶解除去した。さらに、導体層44、同軸線60及び被覆信号導線50上に50μm厚の絶縁シート(ABF−50:味の素製)を140℃の真空ラミネータにて貼り合せ、170℃、30分加熱、硬化して絶縁層33を形成した(図5(g)参照)。
次に、被覆信号導線50上の絶縁層33の所定位置をUV−YAGレーザー加工機(三菱電機製)を用いて孔開け加工し、被覆信号導線50の信号導線51が一部露出した50μmφの開孔部33aを形成した(図5(h)参照)。
【0036】
次に、絶縁層33上及び開孔部33a内に無電解銅めっきにより0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33上に12μm厚の導体層45を、開孔部33aにフィルドビア45cを形成して、導体層45と同軸線の信号線51とがフィルドビア45cで電気的に接続された接続部を形成した(図5(i)参照)。
【0037】
次に、導体層45上に15μm厚の感光性ドライフィルム(RY3215:日立化成工業製)を110℃のラミネータで貼り付けて感光層を形成し、紫外線露光装置でパターン露光後1%の炭酸ソーダ溶液をスプレー現像してレジストパターンを形成し、レジストパターンをマスクにして塩化第二鉄溶液にて導体層45をエッチングして配線層45a及び接続部45bを形成し、同軸線60の信号導線51と配線層45aがフィルドビア45cにて電気的に接続された接続部45bを有する同軸線内蔵多層配線回路基板100を得た(図5(j)参照)。
【0038】
<実施例2>
まず、50μmのポリイミドフィルムからなる絶縁基材11の両面に12μm厚の銅箔を積層して導体層を形成し、導体層をパターニング処理して、配線層21a及び配線層21bを形成した配線回路基板(ベース基板)10を作製した(図6(a)参照)。
【0039】
次に、配線回路基板(ベース基板)10の両面にビルドアップ用樹脂フィルム付銅箔をラミネーターで貼り合わせ、加熱、硬化して絶縁層31及び導体層を形成し、パターニング処理して、配線回路基板(ベース基板)10の一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層41を形成し、グランド層41の所定位置をフォトエッチング法にて加工して、リング状の開孔部41bを形成し、グランド層41から電気的に絶縁された金属層41cを形成した(図6(b)参照)。
【0040】
以下、実施例1と同様な工程で、同軸線60、配線層45a及びグランド層41から電気的に絶縁された金属層41c上に接続部45bを形成し、同軸線60の信号導線51と配線層45aがフィルドビア45cにて電気的に接続された接続部45bを有する同軸線内蔵多層配線回路基板200を得た(図7(j)参照)。
【0041】
<実施例3>
まず、50μmのポリイミドフィルムからなる絶縁基材11の両面に12μm厚の銅箔を積層して導体層を形成し、導体層をパターニング処理して、配線層21a及び配線層21bを形成した配線回路基板(ベース基板)10を作製した(図8(a)参照)。
【0042】
次に、配線回路基板(ベース基板)10の両面にビルドアップ用樹脂フィルム付銅箔をラミネーターで貼り合わせ、加熱、硬化して絶縁層31及び導体層を形成し、パターニング処理して、配線回路基板(ベース基板)10の一方の面に絶縁層31を介してグランド層41を、他方の面に絶縁層31を介して電源層41を形成し、グランド層41の所定位置をフォトエッチング法にて加工して開孔部を形成し、樹脂等の絶縁材料をスクリーン印刷で埋め込み、表面を研磨して、埋め込み層41aを形成した(図8(b)参照)。
【0043】
次に、グランド層41及び埋め込み層41a上に25μm厚の感光性ドライフィルム(RY3215:日立化成工業製)をラミネートして感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、所定形状のレジストパターン34を形成した(図8(c)参照)。
【0044】
次に、レジストパターン34及びグランド層41上に無電解めっき等により0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、レジストパターン34間に20μm厚の導体パターン層46を形成した(図8(d)参照)。
次に、レジストパターン34を10%の水酸化ナトリウム溶液で剥離処理し、導体パターン層46間に、被覆信号導線を配設するための所定形状の溝61を形成した。(図8(e)参照)。
【0045】
次に、溝61内に30μmφの心線(銅)からなる信号導線51に10μmのエポキシ絶縁層52で被覆され、さらに外周部に熱可塑性の樹脂層が形成された被覆信号導線50を配設し、加熱して溝61内のグランド層41に仮接着し、120℃のオーブンで45分間加熱して、被覆信号導線50をグランド層41上に固定した。さらに、被覆信号導線50の周囲及びグランド層上に無電解銅めっきにより0.5μm厚の薄膜導体層(特に図示せず)を形成し、被覆信号導線50及び導体パターン層46上に25μm厚の感光性ドライフィルム(RY3215:日立化成工業製)をラミネートして感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、埋め込み層41a上の薄膜導体層が形成された被覆信号導線50の所定位置に接続部を形成するためのレジストパターン38を形成した(図9(f)参照)。
【0046】
次に、薄膜導体層をカソードにして電解銅めっきを行い、溝61内の被覆信号導線50の周囲を銅からなる導体で埋め込んだ同軸線70及びグランド層41上に12μm厚の導体層47を形成した(図9(g)参照)。
【0047】
次に、レジストパターン38を10%の水酸化ナトリウム溶液にて除去し、レジストパターン38下部にあった薄膜導体層を200g/lの過硫酸アンモニウム溶液からなるエッチング液にて溶解除去した。さらに、導体層47、同軸線70及び被覆信号導線50上に50μm厚の絶縁シート(ABF−50:味の素製)を140℃の真空ラミネータにて貼り合せ、170℃、30分加熱して絶縁層35を形成した(図9(h)参照)。
次に、被覆信号導線50上の絶縁層35の所定位置をレーザー加工にて孔開け加工し、被覆信号導線50の信号導線51が一部露出した50μmφの開孔部35aを形成した(図9(i)参照)。
【0048】
次に、絶縁層35上及び開孔部35a内に無電解銅めっきにより0.5μm厚の薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層35上に12μm厚の導体層48を、開孔部35a内にフィルドビア48cを形成して、導体層48と同軸線の信号線51とがフィルドビア48cで電気的に接続された接続部を形成した(図10(j)参照)。
【0049】
次に、導体層48上に15μm厚の感光性ドライフィルム(RY3215:日立化成工業製)を110℃に加熱されたラミネータで貼り付けて感光層を形成し、紫外線露光装置でパターン露光後1%の炭酸ソーダ溶液をスプレー現像してレジストパターンを形成し、レジストパターンをマスクにして塩化第二鉄溶液にて導体層48をエッチングして配線層48a及び接続部48bを形成し、同軸線70の信号導線51と配線層48aがフィルドビア48cにて電気的に接続された接続部48bを有する同軸線内蔵多層配線回路基板300を得た(図10(k)参照)。
【0050】
上記実施例で得られた同軸線内蔵多層配線回路基板の同軸線(信号配線層)間のクロストークノイズを測定した結果従来のクロストークノイズの1/10にまで抑えることができ、本発明の同軸線内蔵多層配線回路基板のクロストークノイズ低減効果を確認することができた。
【0051】
【発明の効果】
本発明の同軸線内蔵多層配線回路基板は、被覆信号導線をグランド層に配設し、グランド層に電気的に接続された導体層で覆って同軸構造の同軸線を形成し、信号配線層としているため、高密度多層配線回路基板内の近接した信号配線層間に発生するノイズを防止することができる。
また、同軸線の所定位置に信号導線と配線層、または信号導線同士を電気的に接続するための接続部を設けているため、同軸線を多層構造にした場合の信号導線同士の電気的接続、または同軸線の信号導線と配線層との電気的接続が容易になり、配線層設計の自由度が増すと共に接続信頼性に優れたクロストークのない高密度同軸線内蔵多層配線回路基板を得ることができる。
【図面の簡単な説明】
【図1】(a)は、本発明の同軸線内蔵多層配線回路基板の一実施例の構成を示す部分斜視図である。(b)は、(a)の部分斜視図をA−A’線で切断した模式構成部分断面図である。
【図2】(a)は、本発明の同軸線内蔵多層配線回路基板の他の実施例の構成を示す部分斜視図である。(b)は、(a)の部分斜視図をA−A’線で切断した模式構成部分断面図である。
【図3】(a)は、本発明の同軸線内蔵多層配線回路基板の他の実施例の構成を示す部分斜視図である。(b)は、(a)の部分斜視図をA−A’線で切断した模式構成部分断面図である。
【図4】(a)〜(e)は、請求項4に係わる同軸線内蔵多層配線回路基板の製造方法の一実施例の製造工程の一部を模式的に示す部分断面図である。
【図5】(f)〜(j)は、請求項4に係わる同軸線内蔵多層配線回路基板の製造方法の一実施例の製造工程の一部を模式的に示す部分断面図である。
【図6】(a)〜(e)は、請求項4に係わる同軸線内蔵多層配線回路基板の製造方法の他の実施例の製造工程の一部を模式的に示す部分断面図である。
【図7】(f)〜(j)は、請求項4に係わる同軸線内蔵多層配線回路基板の製造方法の他の実施例の製造工程の一部を模式的に示す部分断面図である。
【図8】(a)〜(e)は、請求項5に係わる同軸線内蔵多層配線回路基板の製造方法の一実施例の製造工程の一部を模式的に示す部分断面図である。
【図9】(f)〜(i)は、請求項5に係わる同軸線内蔵多層配線回路基板の製造方法の一実施例の製造工程の一部を模式的に示す部分断面図である。
【図10】(j)〜(k)は、請求項5に係わる同軸線内蔵多層配線回路基板の製造方法の一実施例の製造工程の一部を模式的に示す部分断面図である。
【符号の説明】
10……配線回路基板(ベース基板)
11……絶縁基材
21a、21b……配線層
31、33、35……絶縁層
32……接着層
32a……加工後の接着層
33a、35a……開孔部
34、37、38……レジストパターン
41……グランド層
41a……埋め込み層
41b……リング状の開孔部
41c……金属層
42……電源層
44、45、48……導体層
45a、48a……配線層
45b、48b……接続部
45c、48c……フィルドビア
46……導体パターン層
50……被覆信号導線
51……信号導線
52……絶縁層
60、70……同軸線
61……溝
100、200、300……同軸内蔵多層配線回路基板
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a multilayer wiring circuit board having a built-in coaxial line and a method for manufacturing the same.
[0002]
[Prior art]
In a conventional multilayer wiring circuit board, the density of wiring layers is increased, so that signal lines come close to each other, so that crosstalk noise occurs between the signal wirings of each other, thereby causing a malfunction in a driving element of the circuit. Have a problem. In addition, this is noticeable in a circuit having an operating frequency of 100 MHz or more. To prevent this, conventionally, a ground pattern is arranged between left and right signal lines or a ground layer is formed between upper and lower signal lines. However, the measures are not sufficient.
[0003]
[Problems to be solved by the invention]
An object of the present invention is to provide a multilayer wiring circuit board with a built-in coaxial line, which prevents crosstalk noise between adjacent signal wiring layers, maintains the wiring flexibility of the signal wiring layers, and has excellent connection reliability, and a method for manufacturing the same. Aim.
[0004]
[Means for Solving the Problems]
To achieve the above object in the present invention, first, according to claim 1, a multilayer wiring circuit board comprising a ground layer, a power supply layer, and at least one or more wiring layers formed on an insulating base material In the above, a covered signal conductor in which the periphery of the signal conductor is covered with an insulating layer is disposed on the ground layer, and the periphery of the insulating layer of the covered signal conductor is covered with a conductor layer, and the conductor layer is electrically connected to the ground layer. And a connecting portion for electrically connecting the signal conductor of the coaxial cable and the wiring layer or the signal conductor of the coaxial cable is formed at a predetermined position of the coaxial cable. This is a multi-layer wiring circuit board with a built-in coaxial line.
[0005]
Further, in claim 2, the connection portion forms a hole in which a part of the signal conductor of the covered signal conductor is exposed by perforating the insulating layer on the covered signal conductor. A conductor is formed in the opening by filling or plating, or the like, and the signal conductor of the coaxial line and the wiring layer or the signal conductor of the coaxial line are electrically connected to each other. Item 10 is a multilayer wiring circuit board with a built-in coaxial line according to Item 1.
[0006]
According to a third aspect of the present invention, when the plurality of coaxial lines are formed, the coaxial lines have the same length. It was done.
[0007]
According to a fourth aspect of the present invention, there is provided a method of manufacturing a multilayer wiring circuit board with a built-in coaxial line, comprising at least the following steps.
(A) A wiring circuit board (base substrate) 10 having wiring layers 21a and 21b formed on both surfaces of an insulating base material 11 has a ground layer 41 on one surface via an insulating layer 31, and an insulating layer 31 on the other surface. Forming a hole by performing photo-etching processing on a predetermined position of the ground layer 41 of the printed circuit board on which the power supply layer 42 is formed, and burying an insulating material such as resin to form a buried layer 41a.
(B) forming an adhesive layer 32 having a predetermined thickness on the ground layer 41 and the buried layer 41a;
(C) A step of disposing the covered signal conductor 50 in which the periphery of the signal conductor 51 is covered with the insulating layer 52 on the adhesive layer 32.
(D) a step of removing the adhesive layer 32 except for a portion where the covered signal conductor 50 is fixed.
(E) forming a thin-film conductor layer around the insulating layer 52 of the covered signal conductor 50 and on the ground layer 41;
(F) a step of forming a resist pattern 37 for forming a connection portion at a predetermined position of the covered signal conductor 50 on which the thin film conductor layer is formed.
(G) Electrolytic copper plating is performed using the thin film conductor layer as a cathode, a conductor layer 44 having a predetermined thickness is formed around the insulating layer 52 of the covered signal conductor 50, the coaxial line 60 is formed, and the conductor layer 44 is formed on the ground layer 41. Forming step.
(H) a step of stripping the resist pattern 37 with a dedicated stripper to form an insulating layer 33 having a predetermined thickness on the coaxial line 70, the covered signal conductor 50 on which the thin film conductor layer is formed, and the conductor layer 44.
(I) a step of forming a hole 33a in which the signal conductor 51 of the covered signal conductor 50 is partially exposed by boring the insulating layer 33;
(J) A thin-film conductor layer is formed on the insulating layer 33 and in the opening 33a, electrolytic copper plating is performed using the thin-film conductor as a cathode, and a conductor layer 45 having a predetermined thickness is formed on the insulating layer 33. A step of forming a filled via 45c in 33a.
(K) a step of patterning the conductor layer 45 on the insulating layer 33 to form the wiring layer 45a and the connection portion 45b.
[0008]
Furthermore, a fifth aspect of the present invention is a method for manufacturing a multilayer wiring circuit board with a built-in coaxial line, comprising at least the following steps.
(A) A wiring circuit board (base substrate) 10 having wiring layers 21a and 21b formed on both surfaces of an insulating base material 11 has a ground layer 41 on one surface via an insulating layer 31, and an insulating layer 31 on the other surface. Forming a hole by photo-etching a predetermined position of the ground layer 41 of the printed circuit board on which the power supply layer 42 is formed, and filling the hole with an insulating material such as resin to form a buried layer 41a.
(B) forming a resist pattern 34 having a predetermined shape at a predetermined position on the ground layer 41;
(C) A step of forming a thin-film conductor layer on the resist pattern 34 and the ground layer 41 and performing electrolytic copper plating using the resist pattern 38 as a plating mask to form a conductor pattern layer 46 having a predetermined thickness.
(D) a step of subjecting the resist pattern 38 to a stripping treatment with a dedicated stripping solution to form a groove 61 having a predetermined shape between the conductor pattern layers 46;
(E) A resist for disposing the covered signal conductor 50 in the groove 61, forming a thin-film conductor layer on the insulating layer 52 around the covered signal conductor 50, and forming a connection portion at a predetermined position on the covered signal conductor 50. Forming a pattern 38;
(F) A step of forming a conductor layer 47 having a predetermined thickness on the conductor pattern layer 46 by performing electrolytic copper plating using the thin film conductor layer as a cathode to form a coaxial wire 70 in which the periphery of the covered signal conductor 50 is filled with a conductor.
(G) a step of stripping the resist pattern 38 with a dedicated stripper to form the insulating layer 35 having a predetermined thickness on the covered signal conductor 50 and the conductor layer 47 on which the thin film conductor layer is formed.
(H) forming a hole 35a in which a part of the signal conductor 51 of the covered signal conductor 50 is exposed by punching the insulating layer 35;
(I) A thin-film conductor layer is formed on the insulating layer 35 and in the opening 35a, electrolytic copper plating is performed using the thin-film conductor layer as a cathode, and a conductor layer 48 is formed on the insulating layer 35 and the opening 35a is formed in the opening 35a. Forming a filled via 48c;
(J) a step of patterning the conductor layer 48 on the insulating layer 35 to form the wiring layer 48a and the connection portion 48b.
[0009]
In the multilayer wiring circuit board with a built-in coaxial cable of the present invention, in order to prevent noise generated between signal wiring layers of the high-density multilayer wiring circuit board, a covered signal conductor covered with an insulating layer is electrically connected to a ground layer. By covering with a conductor layer, a coaxial line having a coaxial structure is formed and used as a signal wiring layer. In addition, a connection portion is provided in an insulating layer on the coaxial line to electrically connect the signal conductor of the coaxial line with the wiring layer and the signal conductor of the coaxial line. In addition, it is possible to form a coaxial line by laminating the covered signal conductors by routing the covered signal conductors, thereby increasing the degree of freedom in designing the coaxial line (signal wiring layer) and maintaining the conventional building-up method. A high-density multilayer wiring circuit board with a built-in coaxial line can be manufactured.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a multilayer wiring circuit board with a built-in coaxial line according to the present invention will be described.
FIGS. 1, 2 and 3 are partial cross-sectional views schematically showing an embodiment of the multilayer wiring circuit board with a built-in coaxial cable of the present invention.
The multi-layer printed circuit board with a built-in coaxial cable according to the present invention according to claim 1, wherein the wiring layer 21 a and the wiring layer 21 b are formed on both surfaces of the insulating base 11 on one side of the printed circuit board 10 via the insulating layer 31 via the ground layer. 41, the power supply layer 42 is formed on the other surface via the insulating layer 31, the covered signal conductor 50 is provided on the ground layer 41, and the periphery of the covered signal conductor 50 is covered with a conductor layer. To form a coaxial line having a coaxial structure, thereby forming a signal wiring layer. Further, when forming the coaxial line and the wiring layer, a connecting portion for electrically connecting the signal conductor 51 of the coaxial line and the wiring layer or the signal conductors 51 is provided.
This has a coaxial structure in which the conductor layers 44 and 48 of the coaxial lines are electrically connected to the ground layer 41, thereby preventing noise generated between adjacent signal wiring layers in the high-density multilayer wiring circuit board. be able to.
[0011]
In the multilayer wiring circuit board with a built-in coaxial cable according to the present invention, when forming an opening in the insulating layer on the covered signal conductor 50 by laser processing or the like, the signal conductor 51 of the covered signal conductor is partially exposed. A conductor is buried by plating or filling to form a filled via, and a connection portion for electrically connecting the signal conductor of the coaxial line and the wiring layer or the signal conductor of the coaxial line is provided, and the coaxial line (signal wiring layer) is provided. In a multi-layer structure, the electrical connection between the signal conductors or the electrical connection between the coaxial signal conductor and the wiring layer is facilitated, increasing the degree of freedom in the wiring layer design and providing excellent cross-connection reliability. It is possible to obtain a multilayer wiring circuit board with a built-in high-density coaxial line without any talk.
[0012]
The multi-layer printed circuit board with a built-in coaxial line of the present invention according to the third aspect of the present invention is configured such that the coaxial lines provided in the printed circuit board have the same length, so that the coaxial line (signal The signal propagation speeds of the wiring layers are the same to prevent a phase shift between signals.
[0013]
Hereinafter, a method of manufacturing the multilayer wiring circuit board with a built-in coaxial line of the present invention will be described.
FIGS. 4 and 5 (a) to 5 (j) show one embodiment of a method of manufacturing the coaxial-line built-in multilayer wiring circuit board shown in FIGS. 1 (a) and 1 (b) in the order of steps.
First, insulation is performed by attaching a resin film or the like to both sides of a printed circuit board (base substrate) 10 (see FIG. 4A) in which the wiring layers 21a and 21b are formed on both sides of the insulating base material 11. A layer 31 is formed, and further, a copper foil or the like is bonded thereto, and a ground layer 41 is formed on one surface via the insulating layer 31 and a power supply layer 42 is formed on the other surface via the insulating layer 31. Is patterned by photo-etching or the like to form an opening, and an insulating material such as resin is buried by screen printing or the like, and the surface is polished to form a buried layer 41a (see FIG. 4B).
The buried layer 41a is used to form a region that is electrically insulated from the ground layer 41 when a connection portion is formed in this region, and the covered signal conductor 50 is always disposed on the buried layer 41a. So that
[0014]
Next, a heat-curable adhesive film is attached on the ground layer 41 and the buried layer 41a to form the adhesive layer 32 (see FIG. 4C).
Next, a covered signal conductor 50 in which a signal conductor 51 made of a copper wire is covered with an insulating layer 52 is disposed at a predetermined position on the adhesive layer 32, and heated at a predetermined temperature, so that the covered signal conductor 50 is attached to the adhesive layer 32. Is fixed on the ground layer 41 (see FIG. 4D).
[0015]
Next, the adhesive layer 32 other than the portion where the covered signal conductor 50 is fixed on the ground layer 41 is removed by etching or the like, and the covered signal conductor 50 is fixed to the ground layer 41 by the processed adhesive layer 32a. You. Further, a thin film conductor layer (not particularly shown) having a thickness of about 0.5 μm is formed around the covered signal conductor 50 and on the ground layer 41 by electroless plating or the like. Further, a photosensitive layer is formed on the ground layer 41 on which the thin film conductor layer is formed and the covering signal conductor 50, and patterning processing such as pattern exposure and development is performed, so that a predetermined position on the buried layer 41a and the covering signal conductor 50 is formed. A resist pattern 37 for forming a connection portion is formed (see FIG. 4E).
[0016]
Next, electrolytic copper plating is performed using the thin film conductor layer as a cathode to form the conductor layer 44 on the coaxial wire 60 having the conductor layer 44 of a predetermined thickness formed around the covered signal conductor 50 and the ground layer 41 (FIG. 5 (f)).
Here, a thickness of the conductor layer 44 of 10 μm or more is sufficient as an effect of preventing noise. In addition, since the conductor layer 44 is also formed on the ground layer 41, the coaxial line 60 electrically connected to the ground layer 41 can be obtained.
[0017]
Next, the resist pattern 37 is stripped with a dedicated stripping solution, the thin film conductor layer under the resist pattern 37 is removed by soft etching, and a resin solution is applied on the conductor layer 44, the coaxial line 60 and the covered signal conductor 50. Alternatively, the insulating layer 33 is formed by a method such as bonding a resin film (see FIG. 5G).
Next, a predetermined position of the insulating layer 33 on the covered signal conductor 50 is drilled by laser processing or the like to form an opening 33a that partially exposes the signal conductor 51 of the covered signal conductor 50 (FIG. 5). (H)).
[0018]
Next, a thin film conductor layer (not particularly shown) having a thickness of about 0.5 μm is formed on the insulating layer 33 and in the opening 33a by electroless copper plating or the like, and electrolytic copper plating is performed using the thin film conductor layer as a cathode. Then, a conductor layer 45 having a predetermined thickness is formed on the insulating layer 33, a filled via 45c is formed in the opening 33a, and a connection portion where the conductor layer 45 and the coaxial signal line 51 are electrically connected by the filled via 45c. (See FIG. 5 (i)).
[0019]
Next, the conductor layer 45 on the insulating layer 33 is patterned by photo-etching to form a wiring layer 45a and a connection portion 45b, and the signal conductor 51 of the coaxial line 60 and the wiring layer 45a are electrically connected by a filled via 45c. The multilayer wiring circuit board 100 with a built-in coaxial line having the connected connection portion 45b can be obtained (see FIG. 5 (j)).
[0020]
FIGS. 6 and 7A to 7J show another embodiment of the method of manufacturing the multi-layer wiring circuit board with a built-in coaxial cable shown in FIGS. 2A and 2B in the order of steps.
First, a resin film or the like is attached to both sides of a wiring circuit board (base substrate) 10 (see FIG. 6A) in which the wiring layers 21a and 21b are formed on both sides of the insulating base material 11. A layer 31 is formed, and further, a copper foil or the like is bonded thereto, and a ground layer 41 is formed on one surface via the insulating layer 31 and a power supply layer 42 is formed on the other surface via the insulating layer 31. A ring-shaped opening 41b is formed by photo-etching or the like, and a metal layer 41c that is electrically insulated from the ground layer 41 is formed (see FIG. 6B).
[0021]
Hereinafter, processing is performed in the same steps as in the method of manufacturing a multilayer wiring circuit board with a built-in coaxial line according to claim 4, and a filled via is formed on the metal layer 41c which is electrically insulated from the coaxial line 60, the wiring layer 45a and the ground layer 41. A connection portion 45b made of the coaxial line 45c is formed, and the coaxial line built-in multilayer wiring circuit board 200 having the connection portion 45b in which the signal conductor 51 of the coaxial line 60 and the wiring layer 45a are electrically connected by the filled via 45c can be obtained. (See FIG. 7 (j)).
In this method, a metal layer 41b that is electrically insulated from the ground layer 41 is provided instead of the buried layer 41 of the ground layer 41 in the above-described manufacturing method, and the insulating layer 33 formed on the covered signal conductor 50 is provided. Is formed by laser processing or the like to form an opening 33a (see FIG. 7 (h)), the metal layer 41c functions as a stopper layer, and a wide range of processing conditions during laser processing can be set. Etc.
[0022]
FIGS. 8, 9 and 10 (a) to 10 (k) show an embodiment of the method of manufacturing the multilayer wiring circuit board with a built-in coaxial line shown in FIGS. 3 (a) and 3 (b) in the order of steps. Show.
First, a resin film or the like is attached to both sides of a printed circuit board (base substrate) 10 (see FIG. 8A) in which the wiring layer 21a and the wiring layer 21b are formed on both sides of the insulating base material 11. A layer 31 is formed, and further, a copper foil or the like is bonded thereto, and a ground layer 41 is formed on one surface via the insulating layer 31 and a power supply layer 42 is formed on the other surface via the insulating layer 31. The opening is formed by patterning the film with an etching process or the like, and an insulating material such as a resin is buried by screen printing or the like, and the surface is polished to form a buried layer 41a (see FIG. 8B).
[0023]
Next, a photosensitive layer is formed by a method such as laminating a dry film on the ground layer 41 and the buried layer 41a, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern 34 having a predetermined shape. (See FIG. 8 (c)). The resist pattern 34 serves as a plating mask for forming a groove for arranging the conductor pattern layer and the covering signal line in a semi-additive process.
[0024]
Next, a thin film conductor layer (not shown) having a thickness of about 0.5 μm is formed on the resist pattern 34 and the ground layer 41 by electroless plating or the like, and electrolytic copper plating is performed using the thin film conductor layer as a cathode. A conductor pattern layer 46 having a predetermined thickness is formed between the patterns 34 (see FIG. 8D).
Next, the resist pattern 34 is peeled off with a dedicated peeling liquid, and a groove 61 having a predetermined shape for arranging the covering signal conductor 50 is formed between the conductor pattern layers 46 (see FIG. 8E).
[0025]
Next, a covering signal conductor 50 having a thermoplastic resin layer formed on the outer peripheral portion is disposed in the groove 61, and is heated at a predetermined temperature to fix the covering signal conductor 50 in the groove 61, and the covering signal conductor 50 is fixed. A thin conductor layer (not shown) having a thickness of about 0.3 μm is formed around the conductor 50 and on the ground layer by electroless plating or the like. Further, a photosensitive resin solution is applied on the covered signal conductor 50 and the conductor pattern layer 46, dried to form a photosensitive layer, and subjected to a patterning process such as pattern exposure and development to form a covered signal conductor on the buried layer 41a. A resist pattern 38 for forming a connection portion at a predetermined position 50 is formed (see FIG. 9F).
[0026]
Next, electrolytic copper plating is performed using the thin film conductor layer as a cathode to form a coaxial wire 70 in which the periphery of the covered signal conductor 50 is embedded with a conductor made of copper, and a conductor layer 47 is formed on the conductor pattern layer 46 (FIG. 9 (g)).
Here, if the film thickness of the conductor layer 47 is 10 μm or more, the effect of preventing noise is sufficient.
[0027]
Next, the resist pattern 38 is peeled off with a dedicated peeling liquid, the thin film conductor layer under the resist pattern 38 is removed by soft etching, and a resin solution is applied on the conductor layer 47, the coaxial wire 70 and the covered signal conductor 50. Alternatively, the insulating layer 35 is formed by a method such as bonding a resin film (see FIG. 9H).
Next, a predetermined position of the insulating layer 35 on the covered signal conductor 50 is drilled by laser processing or the like to form an opening 35a where the signal conductor 51 of the covered signal conductor 50 is partially exposed (FIG. 9 ( i)).
[0028]
Next, a thin film conductor layer (not particularly shown) having a thickness of about 0.5 μm is formed on the insulating layer 35 and in the opening 35 a by electroless copper plating or the like, and electrolytic copper plating is performed using the thin film conductor layer as a cathode. Then, the conductor layer 48 having a predetermined thickness is formed on the insulating layer 35, and a filled via 48c is formed in the opening 35a, so that the conductor layer 48 and the coaxial signal line 51 are electrically connected by the filled via 48c. A part is formed (see FIG. 10 (j)).
[0029]
Next, the conductor layer 45 is patterned by photo-etching or the like to form a wiring layer 48a and a connection portion 48b, and the connection portion where the signal conductor 51 of the coaxial line 70 and the wiring layer 48a are electrically connected by a filled via 48c. Thus, a coaxial line built-in multilayer wiring circuit board 300 having 48b can be obtained (see FIG. 10 (k)).
[0030]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples.
<Example 1>
First, a conductive layer is formed by laminating a 12 μm thick copper foil on both sides of an insulating base material 11 made of a 50 μm polyimide film, and the conductive layer is patterned to form a wiring layer 21a and a wiring layer 21b. A substrate (base substrate) 10 was produced (see FIG. 4A).
[0031]
Next, copper foil with a resin film for build-up is attached to both sides of the printed circuit board (base substrate) 10 with a laminator, heated and cured to form an insulating layer 31 and a conductor layer, and then subjected to patterning processing. A ground layer 41 is formed on one surface of the substrate (base substrate) 10 via an insulating layer 31 and a power supply layer 41 is formed on the other surface via the insulating layer 31. A predetermined position of the ground layer 41 is formed by photo-etching. Then, an opening was formed, an insulating material such as a resin was embedded by screen printing, and the surface was polished to form an embedded layer 41a (see FIG. 4B).
[0032]
Next, a thermosetting epoxy-based double-sided adhesive film was laminated on the ground layer 41 and the buried layer 41a to form an adhesive layer 32 (see FIG. 4C). Next, a covered signal conductor 50 covered with a 10 μm epoxy insulating layer 52 is disposed on a signal conductor 51 made of a 30 μm core wire (copper) at a predetermined position on the adhesive layer 32, and is placed in an oven at 120 ° C. for 45 minutes. By heating, the covered signal conductor 50 was fixed on the ground layer 41 (see FIG. 4D).
[0033]
Next, the adhesive layer 32 excluding the portion where the covering signal conductor 50 is fixed on the ground layer 41 is treated with an alkaline etching solution (permanganic acid 60 g / l, sodium hydroxide 35 g / l) heated to 70 ° C. , Etching and the like. Further, a 0.5 μm thick thin-film conductor layer (not particularly shown) is formed around the covered signal conductor 50 and on the ground layer by electroless plating or the like, and the ground layer 41 on which the thin-film conductor layer is formed and the covered signal conductor are formed. A resist pattern is formed on the buried layer 41a by forming a photosensitive layer by applying a resist thereon, performing patterning processing such as pattern exposure and development, and forming a connection portion at a predetermined position on the covered signal conductor 50 on the buried layer 41a. 37 was formed (see FIG. 4E).
[0034]
Next, electrolytic copper plating is performed using the thin-film conductor layer as a cathode to form a 12 μm-thick conductor layer 44 on the coaxial line 60 and the ground layer 41 in which the 12 μm-thick conductor layer 44 is formed around the covered signal conductor 50. (See FIG. 5 (f)).
[0035]
Next, the resist pattern 37 was removed with a 10% sodium hydroxide solution, and the thin film conductor layer under the resist pattern 37 was dissolved and removed with an etching solution containing a 200 g / l ammonium persulfate solution. Further, an insulating sheet (ABF-50: made of Ajinomoto) having a thickness of 50 μm is laminated on the conductor layer 44, the coaxial line 60 and the covered signal conductor 50 with a vacuum laminator at 140 ° C., heated and cured at 170 ° C. for 30 minutes. An insulating layer 33 was formed (see FIG. 5G).
Next, a predetermined position of the insulating layer 33 on the covered signal conductor 50 is perforated by using a UV-YAG laser processing machine (manufactured by Mitsubishi Electric Corporation), and a 50 μmφ part of the signal conductor 51 of the covered signal conductor 50 is partially exposed. An opening 33a was formed (see FIG. 5 (h)).
[0036]
Next, a 0.5 μm-thick thin-film conductor layer (not particularly shown) is formed on the insulating layer 33 and in the opening 33 a by electroless copper plating, and electrolytic copper plating is performed using the thin-film conductor layer as a cathode. A conductive layer 45 having a thickness of 12 μm is formed on the insulating layer 33 and a filled via 45c is formed in the opening 33a to form a connection portion where the conductive layer 45 and the coaxial signal line 51 are electrically connected by the filled via 45c. (See FIG. 5 (i)).
[0037]
Next, a photosensitive dry film (RY3215: manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 15 μm is attached on the conductor layer 45 with a laminator at 110 ° C. to form a photosensitive layer. The solution is spray-developed to form a resist pattern. Using the resist pattern as a mask, the conductor layer 45 is etched with a ferric chloride solution to form a wiring layer 45a and a connection portion 45b. The multilayer wiring circuit board 100 with a built-in coaxial line having a connection portion 45b where the wiring layer 45a and the wiring layer 45a are electrically connected by the filled via 45c was obtained (see FIG. 5 (j)).
[0038]
<Example 2>
First, a conductive layer is formed by laminating a 12 μm thick copper foil on both sides of an insulating base material 11 made of a 50 μm polyimide film, and the conductive layer is patterned to form a wiring layer 21a and a wiring layer 21b. A substrate (base substrate) 10 was produced (see FIG. 6A).
[0039]
Next, copper foil with a resin film for build-up is attached to both sides of the printed circuit board (base substrate) 10 with a laminator, heated and cured to form an insulating layer 31 and a conductor layer, and then subjected to patterning processing. A ground layer 41 is formed on one surface of the substrate (base substrate) 10 via an insulating layer 31 and a power supply layer 41 is formed on the other surface via the insulating layer 31. A predetermined position of the ground layer 41 is formed by photo-etching. Then, a ring-shaped opening 41b was formed, and a metal layer 41c electrically insulated from the ground layer 41 was formed (see FIG. 6B).
[0040]
Hereinafter, in the same process as in the first embodiment, the connection portion 45b is formed on the metal layer 41c electrically insulated from the coaxial line 60, the wiring layer 45a, and the ground layer 41, and the signal line 51 of the coaxial line 60 is connected to the wiring. A multilayer wiring circuit board 200 with a built-in coaxial line having a connection portion 45b in which the layer 45a was electrically connected by the filled via 45c was obtained (see FIG. 7 (j)).
[0041]
<Example 3>
First, a wiring circuit in which a copper layer having a thickness of 12 μm is laminated on both surfaces of an insulating substrate 11 made of a 50 μm polyimide film to form a conductor layer, and the conductor layer is patterned to form a wiring layer 21a and a wiring layer 21b. A substrate (base substrate) 10 was produced (see FIG. 8A).
[0042]
Next, copper foil with a resin film for build-up is attached to both sides of the printed circuit board (base substrate) 10 with a laminator, heated and cured to form an insulating layer 31 and a conductor layer, and patterning is performed. A ground layer 41 is formed on one surface of the substrate (base substrate) 10 via an insulating layer 31 and a power supply layer 41 is formed on the other surface via the insulating layer 31. A predetermined position of the ground layer 41 is formed by photo-etching. Then, an opening was formed, and an insulating material such as a resin was embedded by screen printing, and the surface was polished to form an embedded layer 41a (see FIG. 8B).
[0043]
Next, a photosensitive dry film (RY3215: manufactured by Hitachi Chemical) is laminated on the ground layer 41 and the buried layer 41a to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed. Then, a resist pattern 34 having a predetermined shape was formed (see FIG. 8C).
[0044]
Next, a 0.5 μm thick thin-film conductor layer (not particularly shown) is formed on the resist pattern 34 and the ground layer 41 by electroless plating or the like, and electrolytic copper plating is performed using the thin-film conductor layer as a cathode. A conductor pattern layer 46 having a thickness of 20 μm was formed between the conductor patterns 34 (see FIG. 8D).
Next, the resist pattern 34 was stripped with a 10% sodium hydroxide solution to form a groove 61 having a predetermined shape between the conductor pattern layers 46 for disposing the covering signal conductor. (See FIG. 8E).
[0045]
Next, a covered signal conductor 50 in which a signal conductor 51 made of a 30 μm core wire (copper) is covered with a 10 μm epoxy insulating layer 52 in a groove 61 and a thermoplastic resin layer is formed on an outer peripheral portion is provided. Then, it was heated and temporarily bonded to the ground layer 41 in the groove 61, and heated in an oven at 120 ° C. for 45 minutes to fix the covered signal conductor 50 on the ground layer 41. Further, a 0.5 μm-thick thin-film conductor layer (not particularly shown) is formed around the covered signal conductor 50 and on the ground layer by electroless copper plating, and a 25 μm-thick conductor layer is formed on the covered signal conductor 50 and the conductor pattern layer 46. A photosensitive dry film (RY3215: manufactured by Hitachi Chemical Co., Ltd.) is laminated to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed to form a covering signal in which the thin film conductor layer on the buried layer 41a is formed. A resist pattern 38 for forming a connection portion at a predetermined position of the conductive wire 50 was formed (see FIG. 9F).
[0046]
Next, electrolytic copper plating is performed using the thin film conductor layer as a cathode, and a 12 μm thick conductor layer 47 is formed on the coaxial wire 70 and the ground layer 41 in which the periphery of the covered signal conductor 50 in the groove 61 is embedded with a conductor made of copper. It was formed (see FIG. 9 (g)).
[0047]
Next, the resist pattern 38 was removed with a 10% sodium hydroxide solution, and the thin film conductor layer under the resist pattern 38 was dissolved and removed with an etching solution containing a 200 g / l ammonium persulfate solution. Further, an insulating sheet (ABF-50: made of Ajinomoto) having a thickness of 50 μm is adhered on the conductor layer 47, the coaxial line 70 and the covered signal conductor 50 with a vacuum laminator at 140 ° C. and heated at 170 ° C. for 30 minutes to form an insulating layer. 35 (see FIG. 9H).
Next, a predetermined position of the insulating layer 35 on the covered signal conductor 50 was laser-drilled to form an opening 35a of 50 μmφ where the signal conductor 51 of the covered signal conductor 50 was partially exposed (FIG. 9). (See (i)).
[0048]
Next, a 0.5 μm-thick thin-film conductor layer (not particularly shown) is formed on the insulating layer 35 and in the opening 35 a by electroless copper plating, and electrolytic copper plating is performed using the thin-film conductor layer as a cathode. A conductor layer 48 having a thickness of 12 μm is formed on the insulating layer 35, and a filled via 48 c is formed in the opening 35 a to form a connection portion where the conductor layer 48 and the coaxial signal line 51 are electrically connected by the filled via 48 c. It was formed (see FIG. 10 (j)).
[0049]
Next, a photosensitive dry film (RY3215: manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 15 μm is attached on the conductor layer 48 with a laminator heated to 110 ° C. to form a photosensitive layer. A sodium carbonate solution is spray-developed to form a resist pattern. Using the resist pattern as a mask, the conductor layer 48 is etched with a ferric chloride solution to form a wiring layer 48a and a connection portion 48b. A coaxial-line built-in multilayer wiring circuit board 300 having a connection portion 48b in which the signal conductor 51 and the wiring layer 48a are electrically connected by the filled via 48c was obtained (see FIG. 10 (k)).
[0050]
As a result of measuring the crosstalk noise between the coaxial lines (signal wiring layers) of the multilayer wiring circuit board with a built-in coaxial line obtained in the above embodiment, the crosstalk noise can be reduced to 1/10 of the conventional crosstalk noise. The crosstalk noise reduction effect of the multilayer wiring circuit board with a built-in coaxial line was confirmed.
[0051]
【The invention's effect】
The multi-layer wiring circuit board with a built-in coaxial line of the present invention is configured such that a covered signal conductor is disposed on a ground layer, and a coaxial line having a coaxial structure is formed by covering with a conductor layer electrically connected to the ground layer. Therefore, noise generated between adjacent signal wiring layers in a high-density multilayer wiring circuit board can be prevented.
In addition, since a connection portion for electrically connecting the signal conductor and the wiring layer or the signal conductor is provided at a predetermined position of the coaxial line, the electric connection between the signal conductors when the coaxial line has a multilayer structure is provided. In addition, the electrical connection between the signal conductor of the coaxial cable and the wiring layer is facilitated, the degree of freedom in designing the wiring layer is increased, and a high-density coaxial-line-incorporated multilayer wiring circuit board with excellent cross-talk and excellent connection reliability is obtained. be able to.
[Brief description of the drawings]
FIG. 1A is a partial perspective view showing a configuration of an embodiment of a multilayer wiring circuit board with a built-in coaxial line of the present invention. (B) is a schematic configuration partial cross-sectional view of the partial perspective view of (a) cut along line AA '.
FIG. 2 (a) is a partial perspective view showing a configuration of another embodiment of a multilayer wiring circuit board with a built-in coaxial line of the present invention. (B) is a schematic configuration partial cross-sectional view of the partial perspective view of (a) cut along line AA '.
FIG. 3 (a) is a partial perspective view showing the configuration of another embodiment of the multilayer wiring circuit board with a built-in coaxial line of the present invention. (B) is a schematic configuration partial cross-sectional view of the partial perspective view of (a) cut along line AA '.
FIGS. 4A to 4E are partial cross-sectional views schematically showing a part of a manufacturing process of an embodiment of a method for manufacturing a multilayer wiring circuit board with a built-in coaxial cable according to claim 4;
FIGS. 5 (f) to (j) are partial cross-sectional views schematically showing a part of the manufacturing process of an embodiment of the method for manufacturing a multilayer wiring circuit board with a built-in coaxial cable according to claim 4;
FIGS. 6A to 6E are partial cross-sectional views schematically showing a part of the manufacturing process of another embodiment of the method for manufacturing a multilayer wiring circuit board with a built-in coaxial cable according to claim 4;
FIGS. 7 (f) to 7 (j) are partial cross-sectional views schematically showing a part of the manufacturing process of another embodiment of the method for manufacturing a coaxial-line built-in multilayer wiring circuit board according to claim 4;
FIGS. 8A to 8E are partial cross-sectional views schematically showing a part of the manufacturing process of an embodiment of the method for manufacturing a multilayer wiring circuit board with a built-in coaxial cable according to claim 5;
9 (f) to 9 (i) are partial cross-sectional views schematically showing a part of the manufacturing process of an embodiment of the method for manufacturing a coaxial-line built-in multilayer wiring circuit board according to claim 5;
10 (j) to 10 (k) are partial cross-sectional views schematically showing a part of the manufacturing process of an embodiment of the method for manufacturing a multilayer wiring circuit board with a built-in coaxial cable according to claim 5. FIG.
[Explanation of symbols]
10 ... Wiring circuit board (base board)
11 ... insulating base material
21a, 21b ... wiring layer
31, 33, 35 ... insulating layer
32 ... adhesive layer
32a .... Adhesive layer after processing
33a, 35a ... hole opening
34, 37, 38 ... resist pattern
41 ... Ground layer
41a: embedded layer
41b: Ring-shaped opening
41c: Metal layer
42 Power supply layer
44, 45, 48 ... conductor layer
45a, 48a ... wiring layer
45b, 48b ... connection part
45c, 48c ... filled via
46: Conductive pattern layer
50 ... Coated signal conductor
51 ... signal conductor
52 ... insulating layer
60, 70 ... coaxial line
61 ... groove
100, 200, 300 ... Multilayer wiring circuit board with built-in coaxial

Claims (5)

絶縁基材上にグランド層と、電源層と、少なくとも1層以上の配線層が形成されてなる多層配線回路基板において、前記グランド層上に信号導線の周囲を絶縁層で覆った被覆信号導線を配設し、前記被覆信号導線の絶縁層の周囲を導体層で覆って前記導体層が前記グランド層に電気的に接続内蔵された同軸ケーブル構造の同軸線とし、前記同軸線の所定位置に前記同軸線の信号導線と前記配線層、または前記同軸線の信号導線同士を電気的に接続するための接続部が形成されていることを特徴とする同軸線内蔵多層配線回路基板。In a multilayer wiring circuit board having a ground layer, a power supply layer, and at least one or more wiring layers formed on an insulating base material, a covered signal conductor in which a signal conductor is covered with an insulating layer on the ground layer. Disposed, the periphery of the insulating layer of the covered signal conductor is covered with a conductor layer to form a coaxial cable of a coaxial cable structure in which the conductor layer is electrically connected to and embedded in the ground layer. A multilayer wiring circuit board with a built-in coaxial line, wherein a connecting portion for electrically connecting the signal conductor of the coaxial line and the wiring layer or the signal conductor of the coaxial line is formed. 前記接続部は、前記被覆信号導線上の前記絶縁層を孔開け加工して、前記被覆信号導線の信号導線の一部が露出した開孔部を形成し、前記開孔部に充填もしくはめっき法等により導体を形成して、前記同軸線の導線と配線層、または前記同軸線の導線同士を電気的に導通させた形態であることを特徴とする請求項1に記載の同軸線内蔵多層配線回路基板。The connection portion is formed by perforating the insulating layer on the covered signal conductor to form an opening where a part of the signal conductor of the covered signal conductor is exposed, and filling or plating the opening. The multi-layer wiring with a built-in coaxial line according to claim 1, wherein a conductor is formed by a method such as the above, and the conductive line of the coaxial line and the wiring layer or the conductive line of the coaxial line are electrically connected to each other. Circuit board. 前記同軸線を複数形成したとき、前記同軸線の線長を同じ長さにすることを特徴とする請求項1または2に記載の同軸線内蔵多層配線回路基板。3. The multilayer wiring circuit board with a built-in coaxial line according to claim 1, wherein when a plurality of the coaxial lines are formed, the line lengths of the coaxial lines are set to the same length. 以下の工程を少なくとも具備することを特徴とする同軸線内蔵多層配線回路基板の製造方法。
(a)絶縁基材(11)の両面に配線層(21a及び21b)が形成された配線回路基板(ベース基板)(10)の一方の面に絶縁層(31)を介してグランド層(41)が、他方の面に絶縁層(31)を介して電源層(42)が形成された配線回路基板のグランド層(41)の所定位置をフォトエッチング加工して開孔部を形成し、樹脂等の絶縁材料を埋め込み、埋め込み層(41a)を形成する工程。
(b)グランド層(41)及び埋め込み層(41a)上に所定厚の接着層(32)を形成する工程。
(c)信号導線(51)の周囲を絶縁層(52)で被覆した被覆信号導線(50)を接着層(32)上に配設する工程。
(d)被覆信号導線(50)が固定されている部分を除く接着層(32)を除去する工程。
(e)被覆信号導線(50)の絶縁層(52)周囲及びグランド層(41)上に薄膜導体層を形成する工程。
(f)薄膜導体層が形成された被覆信号導線(50)の所定位置に接続部を形成するためのレジストパターン(37)を形成する工程。
(g)薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線(50)の絶縁層(52)周囲に所定厚の導体層(44)を形成して同軸線(60)を、グランド層(41)上に導体層(44)を形成する工程。
(h)レジストパターン(37)を専用の剥離液で剥離し、同軸線(70)、薄膜導体層が形成された被覆信号導線(50)及び導体層(44)上に所定厚の絶縁層(33)を形成する工程。
(i)絶縁層(33)を孔開け加工して、被覆信号導線(50)の信号導線(51)が一部露出した開孔部(33a)を形成する工程。
(j)絶縁層(33)上及び開孔部(33a)内に薄膜導体層を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層(33)上に所定厚の導体層(45)を、開孔部(33a)にフィルドビア(45c)を形成する工程。
(k)絶縁層(33)上の導体層(45)をパターニング処理して配線層(45a)及び接続部(45b)を形成する工程。
A method for manufacturing a multilayer wiring circuit board with a built-in coaxial line, comprising at least the following steps.
(A) On one surface of a printed circuit board (base substrate) (10) in which wiring layers (21a and 21b) are formed on both surfaces of an insulating base material (11), a ground layer (41) via an insulating layer (31). ) Forms a hole by photoetching a predetermined position of the ground layer (41) of the printed circuit board on which the power supply layer (42) is formed on the other surface via the insulating layer (31). Forming an embedded layer (41a) by embedding an insulating material such as
(B) forming an adhesive layer (32) having a predetermined thickness on the ground layer (41) and the buried layer (41a);
(C) A step of disposing a covered signal conductor (50) in which the periphery of the signal conductor (51) is covered with an insulating layer (52) on the adhesive layer (32).
(D) removing the adhesive layer (32) except for the portion where the covered signal conductor (50) is fixed.
(E) forming a thin-film conductor layer around the insulating layer (52) of the covered signal conductor (50) and on the ground layer (41);
(F) forming a resist pattern (37) for forming a connection portion at a predetermined position of the covered signal conductor (50) on which the thin film conductor layer is formed;
(G) Electrolytic copper plating is performed using the thin film conductor layer as a cathode, a conductor layer (44) having a predetermined thickness is formed around the insulating layer (52) of the covered signal conductor (50), and the coaxial line (60) is grounded. Forming a conductor layer (44) on the layer (41);
(H) The resist pattern (37) is peeled off with a dedicated peeling liquid, and a predetermined thickness of an insulating layer (50) is formed on the coaxial line (70), the covered signal conductor (50) on which the thin film conductor layer is formed, and the conductor layer (44). Forming step 33).
(I) forming a hole (33a) in which the signal conductor (51) of the covered signal conductor (50) is partially exposed by perforating the insulating layer (33);
(J) A thin-film conductor layer is formed on the insulating layer (33) and in the opening (33a), electrolytic copper plating is performed using the thin-film conductor layer as a cathode, and a conductor layer having a predetermined thickness is formed on the insulating layer (33). (45) forming a filled via (45c) in the opening (33a);
(K) a step of patterning the conductor layer (45) on the insulating layer (33) to form a wiring layer (45a) and a connection portion (45b).
以下の工程を少なくとも具備することを特徴とする同軸線内蔵多層配線回路基板の製造方法。
(a)絶縁基材(11)の両面に配線層(21a及び21b)が形成された配線回路基板(ベース基板)(10)の一方の面に絶縁層(31)を介してグランド層(41)が、他方の面に絶縁層(31)を介して電源層(42)が形成された配線回路基板のグランド層(41)の所定位置をフォトエッチング加工して開孔部を形成し、樹脂等の絶縁材料で埋めこみ、埋め込み層(41a)を形成する工程。
(b)グランド層(41)の所定位置に所定形状を有するレジストパターン(34)を形成する工程。
(c)レジストパターン(34)及びグランド層(41)上に薄膜導体層を形成し、レジストパターン(38)をめっきマスクにして電解銅めっきを行い、所定厚の導体パターン層(46)を形成する工程。
(d)レジストパターン(38)を専用の剥離液で剥離処理し、導体パターン層(46)間に所定形状の溝(61)を形成する工程。
(e)溝(61)内に被覆信号導線(50)を配設し、被覆信号導線(50)周囲の絶縁層(52)に薄膜導体層を形成し、被覆信号導線(50)上の所定位置に接続部を形成するためのレジストパターン(38)を形成する工程。
(f)薄膜導体層をカソードにして電解銅めっきを行い、被覆信号導線(50)の周囲が導体で満たされた同軸線(70)を、導体パターン層(46)上に所定厚の導体層(47)を形成する工程。
(g)レジストパターン(38)を専用の剥離液で剥離処理して、薄膜導体層が形成された被覆信号導線(50)及び導体層(47)上に所定厚の絶縁層(35)を形成する工程。
(h)絶縁層(35)を孔開け加工して、被覆信号導線(50)の信号導線(51)の一部が露出された開孔部(35a)を形成する工程。
(i)絶縁層(35)上及び開孔部(35a)内に薄膜導体層を形成し、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層(35)上に導体層(48)を、開孔部(35a)内にフィルドビア(48c)を形成する工程。
(j)絶縁層(35)上の導体層(48)をパターニング処理して配線層(48a)及び接続部(48b)をする工程。
A method for manufacturing a multilayer wiring circuit board with a built-in coaxial line, comprising at least the following steps.
(A) On one surface of a printed circuit board (base substrate) (10) in which wiring layers (21a and 21b) are formed on both surfaces of an insulating base material (11), a ground layer (41) via an insulating layer (31). ) Forms a hole by photoetching a predetermined position of the ground layer (41) of the printed circuit board on which the power supply layer (42) is formed on the other surface via the insulating layer (31). Forming a buried layer (41a) by embedding with an insulating material such as
(B) forming a resist pattern (34) having a predetermined shape at a predetermined position on the ground layer (41);
(C) A thin-film conductor layer is formed on the resist pattern (34) and the ground layer (41), and electrolytic copper plating is performed using the resist pattern (38) as a plating mask to form a conductor pattern layer (46) having a predetermined thickness. Process.
(D) a step of stripping the resist pattern (38) with a dedicated stripper to form a groove (61) having a predetermined shape between the conductor pattern layers (46).
(E) disposing a covered signal conductor (50) in the groove (61), forming a thin film conductor layer on an insulating layer (52) around the covered signal conductor (50), and forming a predetermined conductor on the covered signal conductor (50); Forming a resist pattern (38) for forming a connection portion at a position;
(F) Electrolytic copper plating is performed using the thin film conductor layer as a cathode, and a coaxial wire (70) in which the periphery of the covered signal conductor (50) is filled with a conductor is placed on the conductor pattern layer (46) by a conductor layer having a predetermined thickness. A step of forming (47).
(G) Stripping the resist pattern (38) with a dedicated stripper to form an insulating layer (35) having a predetermined thickness on the covered signal conductor (50) on which the thin film conductor layer is formed and the conductor layer (47). Process.
(H) forming a hole (35a) in which a part of the signal conductor (51) of the covered signal conductor (50) is exposed by boring the insulating layer (35);
(I) A thin film conductor layer is formed on the insulating layer (35) and in the opening (35a), electrolytic copper plating is performed using the thin film conductor layer as a cathode, and the conductor layer (48) is formed on the insulating layer (35). Forming a filled via (48c) in the opening (35a).
(J) a step of patterning the conductor layer (48) on the insulating layer (35) to form a wiring layer (48a) and a connecting portion (48b).
JP2002219245A 2002-07-29 2002-07-29 Coaxial line built-in multilayer wiring circuit board and manufacturing method thereof Expired - Fee Related JP4026437B2 (en)

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US7866038B2 (en) 2004-07-06 2011-01-11 Tokyo Electron Limited Through substrate, interposer and manufacturing method of through substrate
CN111372386A (en) * 2020-04-22 2020-07-03 上海航天电子通讯设备研究所 Rectangular micro-coaxial transmission line preparation method based on multilayer LCP circuit board and transmission line
US11350520B2 (en) 2019-08-08 2022-05-31 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7866038B2 (en) 2004-07-06 2011-01-11 Tokyo Electron Limited Through substrate, interposer and manufacturing method of through substrate
US11350520B2 (en) 2019-08-08 2022-05-31 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier and method of manufacturing the same
CN111372386A (en) * 2020-04-22 2020-07-03 上海航天电子通讯设备研究所 Rectangular micro-coaxial transmission line preparation method based on multilayer LCP circuit board and transmission line
CN111372386B (en) * 2020-04-22 2022-03-11 上海航天电子通讯设备研究所 Rectangular micro-coaxial transmission line preparation method based on multilayer circuit board and transmission line

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