JP2004040908A - Parallel-operation apparatus for inverter stack - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To keep AC output current in a balanced condition, even if the number of a plurality of inverter stacks under parallel operation are odd, and to restrain the number of iron cores to be used from increasing to the same degree as that of the inverter stacks under parallel operation. <P>SOLUTION: A first output conductor 36 for outputting AC power from the first inverter stack 31 is penetrated through a hole in a first iron core 41 which is made of a magnetic material and which has a penetration hole in its middle, is penetrated through a hole of a second iron core 42 of the same configuration, and is connected to a generating line 6. A second output conductor 37 for outputting the AC power from a second inverter stack 32 is penetrated through the second iron core 42 from the opposite direction to the first output conductor 36, is penetrated through a hole in a third iron core 43 of the same configuration, and is connected to the generating line 6. The same operation is repeated on the downstream side of a third inverter stack 33. An (n)th output conductor 39 for outputting the AC power from an (n)th inverter stack 34 at the final stage is penetrated through a hole in an (n)th iron core 44 of the same configuration from the opposite direction to an (n-1)th output conductor, and is penetrated through the hole in the first iron core 41 from the opposite direction to the first output conductor 36. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a parallel operation device for an inverter stack that corrects imbalance in current between inverter stacks that occurs when a plurality of inverter stacks are operated in parallel.
[0002]
[Prior art]
Uninterruptible power supplies are often provided in loads, for example, computers, that cause trouble if the AC power is interrupted even for a very short time. In addition, a VVVF inverter is used to output AC power of a desired voltage and frequency to operate the induction motor at a variable speed. In these devices, an inverter stack composed of semiconductor switch elements converts power and outputs AC power of a desired voltage and frequency.However, with the increase in load capacity, many inverter stacks are connected in parallel. It is becoming increasingly common to connect and drive.
[0003]
FIG. 3 is a main circuit connection diagram showing a first conventional example for balancing an AC output current when two sets of inverter stacks operate in parallel.
In the first conventional example circuit of FIG. 3, a common DC power supply 3 is connected to the DC side of the first inverter stack 1 and the DC side of the second inverter stack 2, and the AC power output from the first inverter stack 1 is The AC power output from the second inverter stack 2 is sent to the bus 6 via the second output conductor 5, and the AC power output from the second inverter stack 2 is sent to the bus 6 via the first output stack 4. 2 is a parallel operation.
[0004]
Reference numeral 7 denotes an iron core made of a magnetic material and having a through hole 7A at the center thereof. The first output conductor 4 and the second output conductor 5 pass through the through hole 7A. Are passed through so that the currents flowing in the opposite directions are opposite to each other. That is, in FIG. 3, the current direction of the first output conductor 4 is from left to right, but the current flows through the second output conductor 5 in the opposite direction from right to left. Normally, the output currents of the two inverter stacks are the same, so that the magnetic flux generated in the iron core 7 by the current flowing in the first output conductor 4 and the magnetic flux generated by the current flowing in the second output conductor 5 cancel each other, and The magnetic flux is zero.
[0005]
Even if the drive signals of both inverter stacks are common, the current sharing may be unbalanced transiently due to variations in the operation of the drive circuit and variations in the characteristics of each semiconductor switch element. Becomes a differential type balance core and corrects current imbalance. Further, for example, when there is a moment when the upper arm of the first inverter stack 1 and the lower arm of the second inverter stack 2 are simultaneously turned on, the positive electrode of the DC power supply 3 → the upper arm of the first inverter stack 1 → the first output conductor 4 → A bus 6 → a second output conductor 5 → a lower arm of the second inverter stack 2 → a circulating current in which the DC power supply 3 is short-circuited flows through a path of the negative pole of the DC power supply 3. Is operated to maintain the midpoint between the output voltage of the first inverter stack 1 and the output voltage of the second inverter stack 2 so that the voltage of the bus 6 acts to balance the output current. , Suppress the circulating current described above.
[0006]
However, the first prior art circuit described above with reference to FIG. 3 has a drawback that it cannot be applied to the case where the number of parallel inverter stacks is two and the parallel operation is performed with more than two sets.
FIG. 4 is a main circuit connection diagram showing a second conventional example for balancing AC output currents when more than two inverter stacks are operated in parallel, and illustrates a case where there are six inverter stacks. This is described in JP-A-11-299252. Therefore, only the outline of the second conventional example is described, and the detailed description is omitted.
[0007]
For example, when the six inverter stacks 11, 12, 13, 14, 15, and 16 are operated in parallel, the first set (inverter stacks 11, 12, 13) and the second set (inverter stacks 14, 15, 16) ), The output conductors of the inverter stack 11 belonging to the first set are penetrated through the three iron cores 21, 22, 23, and then connected to the bus 6. The output conductors of the inverter stacks 14, 15, 16 belonging to the second set are separately penetrated from the direction. The output conductors of the inverter stack 12 belonging to the first set are also connected to the bus 6 after penetrating the three iron cores 24, 25, 26, and the output conductors of the inverter stack 13 belonging to the first set are also three iron cores 27, After penetrating through the wires 28 and 29, they are connected to the bus 6, and the output conductors of the inverter stacks 14, 15, and 16 belonging to the second set are separately penetrated through the respective iron cores from the opposite direction. Therefore, the output conductor of the inverter stack 14 penetrates the three iron cores 21, 24, 27 separately from the opposite direction and then connects to the bus 6, and the output conductor of the inverter stack 15 has the three iron cores 22, 25, 28 is connected to the bus 6 separately from the opposite direction and then connected to the bus 6, and the output conductor of the inverter stack 16 is separately penetrated from the opposite direction to the three iron cores 23, 26 and 29 and then connected to the bus 6. Become. Therefore, the number of iron cores used when six inverter stacks are operated in parallel is (6/2) ² = 9 pieces.
[0008]
[Problems to be solved by the invention]
As described above, while the capacity of the load is increasing, it is not easy to increase the unit capacitance of the semiconductor switch element. Therefore, it is desired to cope with an increase in the load capacity by operating a plurality of inverter stacks in parallel. However, in the first conventional example shown in FIG. 3, the number of units operated in parallel is two.
[0009]
Therefore, the second conventional example shown in FIG. 4 enables parallel operation of more than two inverter stacks. However, this second conventional example has a disadvantage that an odd number of units cannot be operated in parallel. For example, even if it is optimal to operate five inverter stacks in parallel based on the capacity of the load, six inverters must be operated in parallel, so there is a disadvantage that an extra inverter stack must be installed. There is a disadvantage in that wasteful costs are incurred, such as a large size, a reduction in use efficiency, and a large installation space. Further, there is a disadvantage that the number of iron cores used for balancing the current is dramatically increased with the increase in the number of parallel-operated inverter stacks. For example, when the number of parallel operation units is four, the number of iron cores used is (4/2) ² = 4, but when the number of parallel operation units is six, the number of iron cores used is nine as described above. When the number of parallel operation units becomes eight, the number of iron cores used becomes (8/2) ² = 16.
[0010]
Therefore, the present invention enables the AC output current to be balanced even when the number of parallel-operated inverter stacks is an odd number, and to suppress the increase in the number of iron cores used to the same degree as the number of parallel-operated units. It is to make.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, a parallel operation device for an inverter stack according to the present invention includes:
A first output conductor that draws AC power from the first inverter stack penetrates a hole of a first core made of a magnetic material and having a through hole in the center, and further penetrates a hole of a second core having the same configuration. Then, the second output conductor connected to the bus and drawing AC power from the second inverter stack penetrates the hole of the second iron core in a direction opposite to the first output conductor, and is further the same. The n-th output conductor that is connected to the bus after passing through the hole of the third core of the configuration, repeats the same for the third and subsequent inverter stacks, and draws AC power from the final n-th inverter stack, The hole of the n-th core having the same configuration penetrates from the direction opposite to the (n-1) -th output conductor, and further penetrates the hole of the first core from the direction opposite to the first output conductor. .
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a main circuit connection diagram showing a first embodiment of the present invention, in which the number of inverter stacks operating in parallel is n.
The first output conductor 36 connecting the first inverter stack 31 and the bus 6 passes through a hole of the first core 41 having a through hole at the center and a hole of the second core 42 having the same structure. The second output conductor 37 connecting the second inverter stack 32 and the bus 6 passes through the hole of the second iron core 42 and the hole of the third iron core 43 having the same structure. The second output conductor 37 penetrates the hole 42 from the direction opposite to the first output conductor 36. The third output conductor 38 connecting the third inverter stack 33 and the bus 6 passes through the hole of the third core 43 and the hole of the fourth core (not shown) having the same structure. At this time, the third output conductor 38 penetrates the hole of the third core 43 from the opposite direction to the second output conductor 37. Similarly, the n-th output conductor 39 connecting the n-th inverter stack 34 and the bus 6 penetrates the hole of the n-th iron core having the same structure and the hole of the first iron core 41. The n-th output conductor 39 penetrates the hole of the iron core 41 from a direction opposite to the first output conductor 36.
[0013]
FIG. 2 is a main circuit connection diagram showing a second embodiment of the present invention. In FIG. 2, all output conductors connected to each inverter stack penetrate the hole of each iron core twice. However, this is different from the first embodiment shown in FIG. In addition, as long as the number of times of penetration of the hole of each iron core is the same, it goes without saying that the number of times of penetration may be any number.
[0014]
【The invention's effect】
When operating inverter stacks in parallel, an odd number of inverters could not be selected in the past, so an extra inverter stack had to be installed, and the number of current balancing cores used was significantly larger than the number of inverter stacks. There was an increasing disadvantage. On the other hand, in the present invention, the number of inverter stacks suitable for the load capacity can be selected, and the number of current balancing cores used can be covered by the same number as the number of inverter stacks. Since the selection can be made, the effect of reducing the number of installations and the installation space can be obtained as compared with the related art.
[Brief description of the drawings]
FIG. 1 is a main circuit connection diagram showing a first embodiment of the present invention. FIG. 2 is a main circuit connection diagram showing a second embodiment of the present invention. FIG. 3 is a diagram when two sets of inverter stacks operate in parallel. FIG. 4 is a main circuit connection diagram showing a first conventional example for balancing AC output currents. FIG. 4 is a main circuit connection showing a second conventional example for balancing AC output currents when more than two sets of inverter stacks are operated in parallel. Figure [Explanation of symbols]
1, 1st, 2nd inverter stack 3 DC power supply 4, 5 1st, 2nd output conductor 6 bus 7 Iron core 7A Through hole 11-16 Inverter stack 21-29 Iron core 31-34 1st-nth inverter stack 36 To 39 first to n-th output conductors 41 to 44 first to n-th iron cores 46 to 49 first to n-th output conductors

Claims (2)

It comprises n inverter stacks for converting DC power to AC power, and connects the DC side of each inverter stack to a common DC power supply and connects each AC side to a common bus to operate the inverter stacks in parallel. In the driving device,
A first output conductor that draws AC power from the first inverter stack penetrates a hole of a first core made of a magnetic material and having a through hole in the center, and further penetrates a hole of a second core having the same configuration. And then connect to the bus,
A second output conductor that draws AC power from the second inverter stack penetrates the hole of the second core from a direction opposite to that of the first output conductor, and further penetrates a hole of the third core having the same configuration. Penetrate and connect to the bus,
A third output conductor that draws AC power from the third inverter stack penetrates the hole of the third core from a direction opposite to that of the second output conductor, and further passes a hole of the fourth core having the same configuration. Penetrate and connect to the bus,
The n-th output conductor of the same configuration that draws AC power from the n-th inverter stack penetrates the hole of the n-th iron core from the opposite direction to the (n-1) -th output conductor of the same configuration, and A parallel operation device for an inverter stack, wherein a hole of a first iron core is penetrated from a direction opposite to the first output conductor, and then connected to the bus. In the invention according to claim 1,
A parallel operation device for an inverter stack, wherein the number of times that each output conductor penetrates through the hole of each iron core is the same.

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