JP2004029539A5 - - Google Patents
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- JP2004029539A5 JP2004029539A5 JP2002188013A JP2002188013A JP2004029539A5 JP 2004029539 A5 JP2004029539 A5 JP 2004029539A5 JP 2002188013 A JP2002188013 A JP 2002188013A JP 2002188013 A JP2002188013 A JP 2002188013A JP 2004029539 A5 JP2004029539 A5 JP 2004029539A5
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Claims (16)
映像データがその水平走査周期ごとにその１ラインずつ入力され、
前記データ駆動回路は、前記映像データの１ライン毎にこれに対応する表示信号を順次一定期間毎に生成し且つ該表示信号を画素アレイにＮ回（Ｎは２以上の自然数）出力する第１の工程と、
前記画素の輝度を前記第１工程における該画素のそれ以下にする表示信号を前記一定期間に生成し且つ該表示信号を画素アレイにＭ回（ＭはＮより小さい自然数）出力する第２の工程とが交互に繰り返され、
前記走査駆動回路は、前記第１の工程において前記複数の画素行をＹ行（ＹはＮ／Ｍより小さい自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第１選択工程と、
前記第２の工程において前記複数の画素行の前記第１選択工程で選択された（Ｙ×Ｎ）行以外をＺ行（ＺはＮ／Ｍ以上の自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第２選択工程とが交互に繰り返され、
前記第２の工程により出力される表示信号は、その出力がフレーム毎の表示にて異なる時間をずらしてなされるとともに、各フレームのブランキング信号は次のフレームの対応するブランキング信号に対して時間的に前記一定期間のずれが多くとも（Ｎ−２）個含むことなく割り振られていることを特徴とする表示装置。A pixel array in which a plurality of pixel rows each including a plurality of pixels arranged along the first direction are arranged in parallel along a second direction intersecting the first direction, and each of the plurality of pixel rows is selected by a scanning signal A scan driving circuit; a data driving circuit for supplying a display signal to each of the pixels included in at least one row selected by the scanning signal of the plurality of pixel rows; and display control for controlling a display operation of the pixel array With a circuit,
Video data is input line by line for each horizontal scanning period,
The data driving circuit generates a display signal corresponding to each line of the video data sequentially every predetermined period and outputs the display signal to the pixel array N times (N is a natural number of 2 or more). And the process of
A second step of generating a display signal for making the luminance of the pixel lower than that of the pixel in the first step in the predetermined period and outputting the display signal to the pixel array M times (M is a natural number smaller than N) Are repeated alternately,
In the first step, the scan driving circuit sequentially shifts the plurality of pixel rows in the second direction from one end to the other end of the pixel array every Y rows (Y is a natural number smaller than N / M). A first selection step to select;
Other than (Y × N) rows selected in the first selection step of the plurality of pixel rows in the second step, every other Z row (Z is a natural number of N / M or more) from one end of the pixel array. The second selection step of sequentially selecting along the second direction toward the end is repeated alternately.
The display signal output by the second step is output at different times in the display for each frame, and the blanking signal of each frame is relative to the corresponding blanking signal of the next frame. A display device characterized in that it is allocated without including at most (N−2) shifts in the predetermined period in time.
映像データがその水平走査周期ごとにその１ラインずつ入力され、
前記データ駆動回路は、前記映像データの１ライン毎にこれに対応する表示信号を順次生成し且つ該表示信号を画素アレイにＮ回（Ｎは２以上の自然数）出力する第１の工程と、
前記画素の輝度を前記第１工程における該画素のそれ以下にする表示信号を生成し且つ該表示信号を画素アレイにＭ回（ＭはＮより小さい自然数）出力する第２の工程とが交互に繰り返され、
前記走査駆動回路は、走査クロックの入力に基づき、前記第１の工程において前記複数の画素行をＹ行（ＹはＮ／Ｍより小さい自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第１選択工程と、
前記第２の工程において前記複数の画素行の前記第１選択工程で選択された（Ｙ×Ｎ）行以外をＺ行（ＺはＮ／Ｍ以上の自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第２選択工程とが交互に繰り返され、
且つ、フレームと次のフレームの切り替え時に前のフレームにて最後に出力される前記第２の工程によって生成される表示信号と次のフレームにて最初に出力される前記第２の工程によって生成される表示信号との間に発生する前記走査クロックの数をＮ個に調整する手段を有することを特徴とする表示装置。A pixel array in which a plurality of pixel rows each including a plurality of pixels arranged along the first direction are arranged in parallel along a second direction intersecting the first direction, and each of the plurality of pixel rows is selected by a scanning signal A scan driving circuit; a data driving circuit for supplying a display signal to each of the pixels included in at least one row selected by the scanning signal of the plurality of pixel rows; and display control for controlling a display operation of the pixel array With a circuit,
Video data is input line by line for each horizontal scanning period,
The data driving circuit sequentially generates a display signal corresponding to each line of the video data and outputs the display signal to the pixel array N times (N is a natural number of 2 or more);
Alternating with a second step of generating a display signal for reducing the luminance of the pixel below that of the pixel in the first step and outputting the display signal to the pixel array M times (M is a natural number smaller than N) Repeated,
The scan driving circuit is configured to move the plurality of pixel rows from one end of the pixel array to the other end every Y rows (Y is a natural number smaller than N / M) in the first step based on an input of a scan clock. A first selection step of sequentially selecting along the second direction;
Other than (Y × N) rows selected in the first selection step of the plurality of pixel rows in the second step, every other Z row (Z is a natural number of N / M or more) from one end of the pixel array. The second selection step of sequentially selecting along the second direction toward the end is repeated alternately.
In addition, the display signal generated by the second step that is output last in the previous frame at the time of switching between the frame and the next frame and the second step that is output first in the next frame are generated. A display device comprising means for adjusting the number of scanning clocks generated between the display signal and the display signal to N.
前記データ駆動回路により、
前記映像データの１ライン毎にこれに対応する表示信号を順次生成し且つ該表示信号を画素アレイにＮ回（Ｎは２以上の自然数）出力する第１の工程と、
前記画素の輝度を前記第１工程における該画素のそれ以下にする表示信号を生成し且つ該表示信号を画素アレイにＭ回（ＭはＮより小さい自然数）出力する第２の工程とが交互に繰り返し、
前記走査駆動回路により、
走査クロックの入力に基づき、前記第１の工程において前記複数の画素行をＹ行（ＹはＮ／Ｍより小さい自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第１選択工程と、
前記第２の工程において前記複数の画素行の前記第１選択工程で選択された（Ｙ×Ｎ）行以外をＺ行（ＺはＮ／Ｍ以上の自然数）毎に前記画素アレイの一端から他端に向けて前記第２方向沿いに順次選択する第２選択工程とが交互に繰り返し、
且つ、フレームと次のフレームの切り替え時に前のフレームにて最後に出力される前記第２の工程によって生成される表示信号と次のフレームにて最初に出力される前記第２の工程によって生成される表示信号との間に発生する前記走査クロックの数をＮ個に調整することを特徴とする表示装置の駆動方法。A pixel array in which a plurality of pixel rows each including a plurality of pixels arranged along the first direction are arranged in parallel along a second direction intersecting the first direction, and each of the plurality of pixel rows is selected by a scanning signal A scan driving circuit; a data driving circuit for supplying a display signal to each of the pixels included in at least one row selected by the scanning signal of the plurality of pixel rows; and display control for controlling a display operation of the pixel array Video data is input to a display device equipped with a circuit for each horizontal scanning period,
By the data driving circuit,
A first step of sequentially generating a display signal corresponding to each line of the video data and outputting the display signal to the pixel array N times (N is a natural number of 2 or more);
Alternating with a second step of generating a display signal for reducing the luminance of the pixel below that of the pixel in the first step and outputting the display signal to the pixel array M times (M is a natural number smaller than N) repetition,
By the scanning drive circuit,
Based on the input of the scanning clock, in the first step, the plurality of pixel rows are arranged along the second direction from one end to the other end of the pixel array every Y rows (Y is a natural number smaller than N / M). A first selection step of sequentially selecting;
Other than (Y × N) rows selected in the first selection step of the plurality of pixel rows in the second step, every other Z row (Z is a natural number of N / M or more) from one end of the pixel array. The second selection step of sequentially selecting along the second direction toward the end is repeated alternately.
In addition, the display signal generated by the second step that is output last in the previous frame at the time of switching between the frame and the next frame and the second step that is output first in the next frame are generated. A method for driving a display device, wherein the number of scanning clocks generated between the display signal and the display signal is adjusted to N.
前記複数の走査信号線に接続された複数の画素とを有する表示装置であって、A display device having a plurality of pixels connected to the plurality of scanning signal lines,
前記複数の走査信号線のうち、隣接するｍ本（ｍは２以上の自然数）よりなる第１の走査信号線群の各走査信号線を順次選択することで、前記第１の走査信号線群に対応する複数の画素に対して映像信号が供給される第１の工程と、The first scanning signal line group is selected by sequentially selecting each scanning signal line of the first scanning signal line group consisting of m adjacent (m is a natural number of 2 or more) among the plurality of scanning signal lines. A first step in which video signals are supplied to a plurality of pixels corresponding to
前記複数の走査信号線のうち、前記第１の走査信号線群とは異なり、隣接するｎ本（ｎは２以上の自然数）よりなる第２の走査信号線群の走査信号線を一括して選択することで、前記第２の走査信号線群に対応する複数の画素に対してブランキング信号が供給される第２の工程とを有し、Of the plurality of scanning signal lines, unlike the first scanning signal line group, the scanning signal lines of the second scanning signal line group consisting of n adjacent (n is a natural number of 2 or more) adjacent to each other are collectively displayed. A second step in which a blanking signal is supplied to a plurality of pixels corresponding to the second scanning signal line group by selecting,
前記第１の工程において順次選択される前記ｍ本の走査信号線のうちの所定の１本が選択される前に前記第２の工程が行われ、The second step is performed before a predetermined one of the m scanning signal lines sequentially selected in the first step is selected;
前記ｍ本の走査信号線の中で、前記所定の１本とは、フレーム毎に異なっており、Among the m scanning signal lines, the predetermined one is different for each frame,
前記ｎ本の走査信号線と前記所定の１本との間に存在する走査信号線の数は、フレーム毎に異なっていることを特徴とする表示装置。A display device, wherein the number of scanning signal lines existing between the n scanning signal lines and the predetermined one is different for each frame.
前記第１の走査信号線群の全ての順次選択が終了した後、再度、前記第１の走査信号線群を順次選択することを特徴とする請求項９に記載の表示装置。 10. The display device according to claim 9, wherein the first scanning signal line group is sequentially selected again after all the sequential selection of the first scanning signal line group is completed.
前記複数の走査信号線に接続された複数の画素とを有する表示装置であって、A display device having a plurality of pixels connected to the plurality of scanning signal lines,
前記複数の走査信号線のうち、隣接するｍ本（ｍは２以上の自然数）よりなる第１の走査信号線群の各走査信号線を順次選択することで、前記第１の走査信号線群に対応する複数の画素に対して映像信号が供給される第１の工程と、The first scanning signal line group is selected by sequentially selecting each scanning signal line of the first scanning signal line group consisting of m adjacent (m is a natural number of 2 or more) among the plurality of scanning signal lines. A first step in which video signals are supplied to a plurality of pixels corresponding to
前記複数の走査信号線のうち、前記第１の走査信号線群とは異なり、隣接するｎ本（ｎは２以上の自然数）よりなる第２の走査信号線群の走査信号線を一括して選択することで、前記第２の走査信号線群に対応する複数の画素に対してブランキング信号が供給される第２の工程とを有し、Of the plurality of scanning signal lines, unlike the first scanning signal line group, the scanning signal lines of the second scanning signal line group consisting of n adjacent (n is a natural number of 2 or more) adjacent to each other are collectively displayed. A second step in which a blanking signal is supplied to a plurality of pixels corresponding to the second scanning signal line group by selecting,
前記第１の工程において順次選択される前記ｍ本の走査信号線のうちの所定の１本が選択される前に前記第２の工程が行われ、The second step is performed before a predetermined one of the m scanning signal lines sequentially selected in the first step is selected;
前記所定の１本とは、第１のフレームにおいては、前記ｍ本の走査信号線の中の第１の走査信号線であり、前記第１のフレームよりも後の第２のフレームにおいては、前記ｍ本の走査信号線の中の第２の走査信号線であり、The predetermined one is the first scanning signal line among the m scanning signal lines in the first frame, and in the second frame after the first frame, A second scanning signal line among the m scanning signal lines;
前記第２の走査信号線は、前記第１の走査信号線に対して、前記順次選択の方向とは逆の方向の走査信号線であり、The second scanning signal line is a scanning signal line in a direction opposite to the sequential selection direction with respect to the first scanning signal line,
前記第１の走査信号線群の全ての順次選択が終了した後、再度、前記第１の走査信号線群を順次選択することを特徴とする表示装置。The display device, wherein after all the sequential selection of the first scanning signal line group is completed, the first scanning signal line group is sequentially selected again.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002188013A JP2004029539A (en) | 2002-06-27 | 2002-06-27 | Display device and its driving method |
| US10/606,223 US7006069B2 (en) | 2002-06-27 | 2003-06-26 | Display device and driving method thereof |
| TW092117427A TWI242666B (en) | 2002-06-27 | 2003-06-26 | Display device and driving method thereof |
| KR1020030042631A KR100540405B1 (en) | 2002-06-27 | 2003-06-27 | Active matrix type display device and driving method thereof |
| CNA031492568A CN1470930A (en) | 2002-06-27 | 2003-06-27 | Dispalying device and its driving method |
| US11/360,692 US7551157B2 (en) | 2002-06-27 | 2006-02-24 | Display device and driving method thereof |
| US12/483,060 US20090243974A1 (en) | 2002-06-27 | 2009-06-11 | Display device and driving method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002188013A JP2004029539A (en) | 2002-06-27 | 2002-06-27 | Display device and its driving method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004029539A JP2004029539A (en) | 2004-01-29 |
| JP2004029539A5 true JP2004029539A5 (en) | 2005-10-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002188013A Pending JP2004029539A (en) | 2002-06-27 | 2002-06-27 | Display device and its driving method |
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| Country | Link |
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| JP (1) | JP2004029539A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4441160B2 (en) * | 2002-06-27 | 2010-03-31 | 株式会社 日立ディスプレイズ | Display device |
| US7006069B2 (en) | 2002-06-27 | 2006-02-28 | Hitachi Displays, Ltd. | Display device and driving method thereof |
| JP4628650B2 (en) * | 2003-03-17 | 2011-02-09 | 株式会社日立製作所 | Display device and driving method thereof |
| JP2008268886A (en) * | 2007-03-29 | 2008-11-06 | Nec Lcd Technologies Ltd | Image display system |
| US8736535B2 (en) | 2007-03-29 | 2014-05-27 | Nlt Technologies, Ltd. | Hold type image display system |
| TWI377548B (en) * | 2007-06-29 | 2012-11-21 | Novatek Microelectronics Corp | Display apparatus and method for driving display panel thereof |
| JP5260470B2 (en) * | 2009-10-27 | 2013-08-14 | 株式会社ジャパンディスプレイ | Display device and driving method thereof |
-
2002
- 2002-06-27 JP JP2002188013A patent/JP2004029539A/en active Pending
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