JP2004023572A - Cell switch and cell switching method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the generation of an operating speed neck (in a device) in an arbiter section even when a low speed circuit is accommodated, and to obtain a low speed circuit accommodating function equivalent to a prior system without using a large capacity speed converting buffer. <P>SOLUTION: A plurality of groupings A, B, C, and D are carried out as to a virtual output queue 3 in an input buffer section. Each group in the plurality of groups is made to be an object of arbitration in turn, according to a time division operation by the arbiter section 4, and a cell output is permitted only to the virtual output queue 3 in the group which is made to be the object of arbitration. A separating section 6 also carries out a time division operation for dividing the cells inputted from a high-speed output port 12 among low-speed outgoing lines 13. A multiplexing section 1 is provided for multiplexing a plurality of low-speed incoming lines 10 to a high-speed input port 11. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a cell switch and a cell switching method for exchanging data in a fixed length (in units of cells) in an ATM communication system, and more particularly to a configuration and control of an input buffer type cell switch.
[0002]
[Prior art]
In an ATM communication system corresponding to various communication modes, for example, Japanese Patent Application Laid-Open No. 9-321768 discloses a block configuration and a switching operation of a conventional input buffer type cell switch. FIG. 7 shows such a conventional example. In FIG. 7, a cell switch (ATM switch) transfers a cell which is fixed-length data input from an input line 10 (indicating 10a, 10b, 10c) to a destination output line. 13 (indicating 13a, 13b, 13c), an input buffer unit 2 (indicating 2a, 2b, 2c), and a virtual output queue 3 in the input buffer unit 2 for actually storing cells for each destination outgoing line 13 (Refer to 3a, 3b, and 3c), output arbitration between the virtual output queues 3 according to a predetermined algorithm based on the cell accumulation information in all the virtual output queues 3 notified from the input buffer unit 2 (the next cell transmission permission). Arbiter 41, which transfers the cell input from the input buffer 2 to the destination outgoing line 13 in accordance with the exchange information from the arbiter 41. That has a switch unit 5.
[0003]
In the input buffer type cell switch having such a configuration, the cell from each input line 10 is stored in the virtual output queue 3 corresponding to the desired destination output line 13 according to the destination information in the cell header. For example, a cell destined for outgoing line # 1 (a cell described as “to # 1” in FIG. 7) is stored in a virtual output queue 3 (each input in FIG. 7) corresponding to outgoing line # 1 in each input buffer unit 2. It is stored in the uppermost queue in the buffer unit 2). Similarly, cells addressed to outgoing lines # 2 and # 3 are stored in the second and third queues, respectively.
[0004]
The arbiter unit 41 monitors the states (cell storage information) of all the virtual output queues 3, and selects “a plurality of input lines / outgoing lines that do not overlap each other” from among the virtual output queues 3 in which cells waiting to be transferred are stored. Of cell transfer paths of the corresponding cell transfer path, and permits cell transmission to the virtual output queue 3 corresponding to the cell transfer path (outputs virtual output queue arbitration information). In FIG. 7, three cell transfer paths, ie, incoming line # 1 → outgoing line # 2, incoming line # 2 → outgoing line # 1, and incoming line # 3 → outgoing line # 3, are extracted in one arbitration. The switching operation (cell transfer path extraction operation) is performed once during the time required for transferring one cell (“cell time”) (= cell length / transmission speed).
[0005]
Since the input buffer type cell switch has the above-described configuration and operation, it is necessary to mount the arbiter unit 41 which is not necessary for the output buffer type cell switch and the like, and the operation speed of this part is reduced. Is the main factor that determines the upper limit of the exchange capacity. Here, the exchange capacity means "accommodated line speed (transmission speed) x number of accommodated lines (number of incoming lines or outgoing lines)".
[0006]
On the other hand, since the cell length is fixed, the overall arbitration time, which is one cell time, is inversely proportional to the transmission rate, ie, becomes shorter, and the arbitration time per line (outgoing line) is inversely proportional to the number of accommodated lines (= cell time). / Number of accommodated lines) is small, that is, short. The theoretical maximum exchange capacity of the input buffer type cell switch is determined from the relationship between the arbitration time and the operation speed of the device (LSI) equipped with the arbiter unit 41.
[0007]
FIG. 8 shows a block configuration (an example of a switch configuration) for avoiding a mounting problem due to a shortage of LSI pins due to an increase in the number of accommodated lines, and is disclosed in, for example, JP-A-10-126419. You. 8, in addition to the configuration shown in FIG. 7, a cell switch (ATM switch) is a multiplexing unit 1 (multiplexing a plurality of low-speed input lines 10 to high-speed input ports 11 (indicating 11a, 11b, and 11c)). 1a, 1b, 1c), a separation unit 61 (61a, 61b, 61c) for separating cells output from the high-speed output port 12 (12a, 12b, 12c) to the low-speed outgoing line 13, and a separation unit 61. And a large-capacity speed conversion buffer 71 (71a, 71b, 71c) for storing cells for each destination outgoing line 13 and absorbing a difference in physical transmission speed between the output port 12 and the outgoing line 13. In this case, in a special case where the transmission speed of the incoming line 10 is higher than the transmission speed of the outgoing line 13, a configuration in which the multiplexing unit 1 is omitted may be considered. In the configuration of FIG. When the transmission speed is just four times the transmission speed of the outgoing line 13, the multiplexing unit 1 is omitted, and the input line 11 is directly accommodated in the input line 11.
[0008]
[Problems to be solved by the invention]
In the above-described cell switch, in an actual application, a function (accommodation function for accommodating different speed lines) that simultaneously accommodates lines having different transmission speeds (for example, a 10 Gbps line and a 2.4 Gbps line) for the cell switch is required by the user. Often. In this case, as shown in FIG. 8, the transmission speed of the input port 11 and the output port 12 of the cell switch is made equal to that of the high-speed line, and the high-speed line is kept as it is. A configuration is conceivable in which the data is multiplexed to the speed and then accommodated in the cell switch. Alternatively, even when a large number of low-speed lines are accommodated in the cell switch, the configuration shown in FIG. 8 is considered to be a good measure to avoid a mounting problem due to a shortage of the number of pins of the LSI. In FIG. 8, an example in which the transmission speed ratio between the low-speed line and the high-speed line (input / output port) is just four times (for example, for the virtual output queues # 1A to #D, the input lines (output lines) Such an example) is shown.
[0009]
The number of virtual output queues 3 in each input buffer unit 2 increases in proportion to the number of outgoing lines 13. Therefore, in the configuration example shown in FIG. 8, the number of virtual output queues 3 when the low-speed line is accommodated is four times that when the high-speed line is accommodated. In other words, the number of virtual output queues 3 (= cell transfer paths) to be arbitrated becomes four times larger per output port 12 when the low-speed line is accommodated than when the high-speed line is accommodated. May increase, which may cause an operation speed bottleneck of a device (LSI). Further, in the configuration shown in FIG. 8, cells destined for each outgoing line 13 are irregularly input to the separation unit 61 in the subsequent stage. Therefore, in order to accurately separate cells by destination outgoing lines 13 in the separating unit 61, it is necessary to sort cells with reference to the cell header. In addition, even if cells are irregularly input, a large buffer having a capacity that does not cause buffer overflow occurs. There is a problem that the capacity / speed conversion buffer 71 must be provided.
[0010]
The present invention has been made in view of the above, and suppresses the occurrence of an operation speed bottleneck (device) of the arbiter unit 41 even when a low-speed line is accommodated. It is an object of the present invention to provide a cell switch and a cell switching method capable of realizing a line accommodation function.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, a cell switch according to the present invention includes an input buffer unit that stores cells input from an input port in a plurality of virtual output queues prepared for each destination and output line, and a cell from the input buffer unit. An arbiter unit that performs output arbitration between the virtual output queues based on accumulated information, a switch unit that transfers cells input from the input buffer unit to an output port that accommodates a destination outgoing line, and a high-speed output port. In a cell switch including a separation unit that sorts input cells to a low-speed destination outgoing line, the virtual output queue in the input buffer unit is divided into a plurality of groups, and the arbiter unit is provided for each of the plurality of groups. In the time division operation, arbitration is sequentially performed and only the virtual output queue in the group that has been arbitrated is set to be arbitrated. And permits the output of.
[0012]
According to the present invention, the number of cell transfer paths can be apparently made the same as that when the high-speed line is accommodated by the time-sharing operation divided into groups, that is, the conditions at the time of arbitration (arbitration time and the number of cell transfer paths) are changed to the high-speed line. It can be made the same as the case of accommodation, and the occurrence of an operation speed bottleneck of the arbiter unit (device) can be suppressed.
[0013]
A cell switch according to the next invention is characterized in that, in the above invention, the separation unit performs a time division operation.
[0014]
According to the present invention, the function of distributing by referring to the cell header is not required by executing the time-sharing operation of grouping in this separation unit, and the cell rate addressed to each group input to the separation unit is set to the low-speed line (outgoing). Since the cell rate on the line is the same and constant, there is no need to increase the capacity of the speed conversion buffer, and only a small-capacity speed conversion buffer needs to be prepared.
[0015]
A cell switch according to the next invention is characterized in that, in the above invention, a multiplexing unit for multiplexing a plurality of low-speed input lines to a high-speed input port is provided.
[0016]
According to the present invention, a low-speed incoming line can be made high-speed, so that a different-speed line accommodating function can be obtained.
[0017]
The cell switch according to the next invention is the cell switch according to the above invention, wherein the time slot information of the time division operation is input using the cell header, between the input buffer unit and the arbiter unit, between the input buffer unit and the switch unit, and between the switch unit and the separation unit. The transmission is performed during at least one of the intervals.
[0018]
According to the present invention, erroneous group recognition is avoided without adding a separate line (control line), and the entire system operates normally in cooperation.
[0019]
In the cell switch according to the next invention, the time slot information of the time-division operation is input between the input buffer unit and the arbiter unit using the control line provided separately from the data line for cell transmission. Transmission is performed between the buffer unit and the switch unit and between at least one of the switch unit and the separation unit.
[0020]
According to the present invention, the time slot information of the time division operation is managed separately from the data by the control line, and it is not necessary to occupy a part of the information area in the cell header for the time slot information. Can be diverted for use.
[0021]
A cell switch according to the next invention is characterized in that in the above invention, the cell switch has a time slot information generating means, and performs a time division operation according to the time slot information distributed from the time slot information generating means.
[0022]
According to the present invention, the time slot information generation unit centrally manages / distributes the time slot information serving as a reference for the time division operation of each unit, so that the group name of a plurality of cells input from each input buffer unit can be obtained. The waiting time until all the same groups in the switch unit are completed can be minimized.
[0023]
A cell switch according to the next invention is characterized in that, in the above invention, flag information indicating a specific time slot is used as time slot information.
[0024]
According to the present invention, erroneous recognition of a group can be avoided, and the entire system can operate normally in cooperation.
[0025]
A cell switch according to the next invention is characterized in that, in the above invention, a time slot number is used as time slot information.
[0026]
According to the present invention, erroneous recognition of a group can be avoided, and the entire system can operate normally in cooperation.
[0027]
A cell switch according to the next invention is characterized in that, in the above invention, the operation / stop of the time division operation of the arbiter unit can be selected for each output port.
[0028]
According to the present invention, the transmission speed of the accommodated output line (or the presence or absence of the separation unit) can be set for each output port, and the high-speed line and the low-speed line can be freely mixed and accommodated in the cell switch.
[0029]
A cell switching method according to the next invention comprises a cell storing step of storing cells input from an input port in a plurality of virtual output queues prepared for each destination and an outgoing line; and a storage information of the cells stored in the cell storing step. An arbitration step of performing output arbitration between the virtual output queues based on the above, a switching step of transferring a cell input from the virtual output queue to an output port accommodating a destination outgoing line, and a high-speed input from the output port. A plurality of groups for the virtual output queue, wherein the arbitration step is performed by a time-sharing operation for each group of the plurality of groups. The arbitration is sequentially performed, and the cell output is permitted only to the virtual output queue in the arbitrated group.
[0030]
According to the present invention, the conditions at the time of arbitration (arbitration time and the number of cell transfer paths) can be made the same as those at the time of accommodating the high-speed line by the time-sharing operation divided into groups, and the operation speed (device) of the arbiter unit becomes a bottleneck. The occurrence can be suppressed.
[0031]
A cell exchange method according to the next invention is characterized in that in the above invention, a time division operation is performed in the separation step.
[0032]
According to the present invention, by executing the grouped time-sharing operation also in this separation step, the step of distributing with reference to the cell header becomes unnecessary, and the cell rate addressed to each group input to the separation step is reduced by the low-speed line (outgoing). Since the cell rate on the line is the same and constant, there is no need to increase the capacity of the speed conversion buffer, and only a small-capacity speed conversion buffer needs to be prepared.
[0033]
The cell switching method according to the next invention is characterized in that, in the above invention, a multiplexing step of multiplexing a plurality of low-speed incoming lines to a high-speed input port is provided.
[0034]
According to the present invention, a low-speed incoming line can be made high-speed, so that a different-speed line accommodating function can be obtained.
[0035]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings 1 to 6. In the drawings, the same parts as those in FIGS. 7 and 8 are denoted by the same reference numerals.
[0036]
Embodiment 1 FIG.
FIG. 1 is a diagram showing a configuration example of a cell switch according to a first embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a multiplexing unit that multiplexes a plurality of low-speed input lines 10 to a high-speed input port 11; 2 denotes an input buffer unit that stores cells input from the input port 11 for each destination output line 13; The virtual output queue 4 that actually stores cells for each destination outgoing line 13 in the buffer unit 2, and the virtual output queue 4 according to a predetermined algorithm based on the cell accumulation information in all the virtual output queues 3 notified from the input buffer unit 2. An arbiter unit for performing output arbitration between the output queues 3 (selecting a virtual output queue 3 to which cell transmission permission is next given), and a destination for cells input from the input buffer unit 2 in accordance with exchange information from the arbiter unit 4 A switch unit for transferring to the outgoing line 13, a separating unit 6 for distributing cells input from the high-speed output port 12 to the low-speed outgoing line 13, and a destination outgoing line 7 in the separating unit 6. 3 is a small-capacity rate conversion buffer to absorb the physical transmission rate difference between the separately storing cells output port 12 and the output line 13.
[0037]
As described above and shown in FIG. 1, the basic block configuration of the first embodiment of the present invention is almost the same as that of the conventional example shown in FIG. 8, but the operation of arbiter unit 4 and the operation of separation unit 6 are different. This is different from the conventional example.
[0038]
In the above-described cell switch, cells input from each input line 10 are first multiplexed in the multiplexing unit 1 to the transmission speed of the input port 11. Next, the cell input from the input port 11 to the input buffer unit 2 is stored in the virtual output queue 3 corresponding to the desired destination outgoing line 13 in accordance with the destination information in the header. For example, a cell addressed to the outgoing line # 1A is stored in the virtual output queue 3 corresponding to the outgoing line # 1A in each input buffer unit 2.
[0039]
Here, the virtual output queue 3 is classified into four groups (groups A to D). The conventional method does not have such a concept of grouping, and the arbiter unit 41 of the conventional method always targets all virtual output queues 3 for arbitration, but the arbiter unit 4 according to the first embodiment has one arbiter unit at a time. Only groups are subject to mediation. Further, the arbiter unit 4 changes the group to be arbitrated one by one for each cell time (time slot) (for example, A → B → C → D → A →... = Cycles in four cell times). Things.
[0040]
The arbiter unit 4 monitors only the state (cell storage information) of the virtual output queue 3 belonging to the group targeted for arbitration at the cell time (time slot), and stores the cells waiting for transfer in the group. , A set of “combinations of a plurality of cell transfer paths in which incoming lines do not overlap with outgoing lines” is extracted from the virtual output queues 3 belonging to the group, and cells are transmitted to the virtual output queue 3 corresponding to the cell transfer paths. (Virtual output queue arbitration information is output).
[0041]
If the example of the configuration of the cell switch shown in FIG. 1 is rewritten focusing on the logical operation, the configuration becomes as shown in FIG. In other words, it is logically equivalent to four independent cell switches having the input buffer unit 2 having the same configuration as that at the time of accommodating the high-speed line operating sequentially for each cell time (time slot). . However, physically, only one arbiter unit 4 and one switch unit 5 exist as shown in FIG.
[0042]
By such a time-sharing operation, the number of virtual output queues 3 to be arbitrated (= the number of cell transfer paths) at each cell time (time slot) is reduced to 1/4 of the total, so that the virtual output queue 3 is apparently accommodated at a high-speed line. Can be the same. In other words, the conditions at the time of arbitration (arbitration time and the number of cell transfer paths) can be made the same as those at the time of accommodating the high-speed line, and an effect of suppressing the occurrence of an operation speed (device) bottleneck of the arbiter unit 4 is obtained.
[0043]
By the way, the conventional method, in which all virtual output queues 3 are always subjected to arbitration, has slightly better performance as a cell switch (cell discarding characteristics, etc.), but this can be said to be excessive quality. Even in the method according to the first embodiment, the operation within each cell time (time slot) is logically exactly the same as when the high-speed line is accommodated. The performance of is also sufficient.
[0044]
Further, by the above-described time division operation, the cells belonging to the groups A to D and destined for the low-speed outgoing line 13 are sequentially input to the separation unit 6 at every one cell time (time slot). Focusing on one group, the cell rate addressed to the group input to the demultiplexing unit 6 is the same and constant as the cell rate on the low-speed line (outgoing line). There is no need to mount the buffer, and it is only necessary to prepare a small-capacity speed conversion buffer 7 of about 1 to 2 cells for converting the physical transmission speed from a high-speed line to a low-speed line (the buffer overflow does not occur even with a small capacity). can get.
[0045]
In the time-sharing operation, in order to avoid erroneous group recognition and to operate the entire system normally in cooperation, it is necessary to specify the group name of the cell transmitted between the units by some method. That is, it is necessary to be able to determine the group name of the cell on the receiving side of the cell. Here, FIGS. 4 and 5 show two typical methods of the explicit method of the group name. In the "flag information method" shown in FIG. 4, as time slot information, for example, flag information such as "1" for cells belonging to group A and "0" for cells belonging to other groups is used. use. On the other hand, in the “time slot number system” shown in FIG. 5, a time slot number (= group name) is used as time slot information.
[0046]
Although FIGS. 4 and 5 show a method of transmitting flag information or a time slot number using a cell header, such information is not a cell header but a control provided separately from a data line for cell transmission. Transmission may be performed using a line.
[0047]
Embodiment 2 FIG.
Next, a second embodiment of the present invention will be described. FIG. 3 is a diagram showing a configuration example of the cell switch according to the second embodiment of the present invention. Each component of the cell switch according to the second embodiment operates basically in the same manner as each component of the cell switch according to the first embodiment shown in FIG. Here, the second embodiment is characterized in that an outgoing line having a high transmission speed (high-speed line) and an outgoing line having a low transmission speed (low-speed line) are mixed, and the outgoing line transmission speed setting distributed to each section is provided. According to the information, the transmission speed of the accommodated output line 13 (or the presence or absence of the separation unit 6) can be set for each output port 12. The configuration of the virtual output queue 3 in the input buffer unit 2 does not depend on the transmission speed of the incoming line 10 but depends only on the transmission speed of the outgoing line 13. Here, four groups of virtual output queues 3 are prepared for the output ports 12 accommodating the low-speed outgoing lines 13, while virtual output queues 3 are prepared for the output ports 12 accommodating the high-speed outgoing lines 13. 3 need only be prepared for one group.
[0048]
In such a configuration of the second embodiment, the arbiter unit 4 performs arbitration for the virtual output queue 3 destined for the low-speed outgoing line 13 in a group unit by a time-sharing operation in the same manner as in the first embodiment. However, the virtual output queue 3 addressed to the high-speed outgoing line 13 is always subjected to arbitration. That is, the handling of the virtual output queue 3 addressed to the high-speed outgoing line 13 is the same as the conventional method, and there is no concept of grouping here. This operation can be described as "the arbiter unit 4 stops the time division operation for the output port 12 accommodating the high-speed outgoing line 13".
[0049]
By such an operation, the effect that the high-speed line and the low-speed line can be freely mixed and accommodated in the cell switch (realization of the different-speed line accommodating function) can be obtained.
[0050]
Embodiment 3 FIG.
Next, a third embodiment of the present invention will be described. FIG. 6 is a diagram showing a part of a configuration example of the cell switch according to the third embodiment of the present invention. In FIG. 6, the multiplexing unit 1, the virtual output queue 3, and the small-capacity speed conversion buffer 7, which are not necessary for the description of the operation of the third embodiment, are simplified to avoid complexity. Basically it exists. Each component of the cell switch according to the third embodiment operates basically in the same manner as each component of the cell switch according to the first embodiment shown in FIG. 1 or the second embodiment shown in FIG. However, in the third embodiment, the time slot information generating unit 8 is added as a new component, and the time slot information generating unit 8 is added to each unit (the multiplexing unit 1, the arbiter unit 4, the switch unit 5, and the demultiplexing unit 6). Slot information 14 is distributed.
[0051]
In the configuration shown in FIG. 6, the basic cell exchange operation itself is the same as in the first or second embodiment. However, the third embodiment is characterized in that the time slot information generating unit 8 manages and distributes the time slot information, which is the basis of the time division operation of each unit, in a unified manner. For example, in the switch unit 5, it is necessary to exchange cells arbitrated in the arbiter unit 4 at the same cell time (cells in the same group). If the group names of a plurality of cells simultaneously input from each input buffer unit 2 to the switch unit 5 are different from each other, the same group is used by using the delay adjustment buffer memory (not shown) in the switch unit 5. It is necessary to wait until all the cells have been prepared. Here, by distributing the same time slot information from the time slot information generation unit 8 to each input buffer unit 2 and unifying the operation timings of all the input buffer units 2, a plurality of cells input from each input buffer unit 2 are obtained. Group names can be made one, and the effect of minimizing the waiting time in the switch unit 5 can be obtained.
[0052]
Also, by centrally managing the operation timing of the entire system, the group name of the cell transmitted between the units can be specified from the time slot information from the time slot information generation unit 8, so that the cell header or the data for cell transmission can be specified. Using a control line provided separately from the line, it is also possible to eliminate the function of specifying the cell group name.
[0053]
In the first to third embodiments, the number of the output ports 12 and the number of the outgoing lines 13 is three, but the number is not particularly limited, and may be any number.
[0054]
In the first to third embodiments, the multiplexing number (the number of time slots for the time division operation) in the multiplexing unit 1 and the demultiplexing unit 6 is set to 4, but these numbers are not particularly limited and may be any number. .
[0055]
【The invention's effect】
As described above, according to the present invention, an input buffer unit for storing cells input from an input port in a plurality of virtual output queues prepared for each destination and outgoing line, and cell storage information from the input buffer unit An arbiter unit that performs output arbitration between the virtual output queues, a switch unit that transfers cells input from the input buffer unit to an output port that accommodates a destination outgoing line, and a high-speed input port that is input from the output port. In a cell switch having a separation unit for distributing cells to a low-speed destination outgoing line, the virtual output queue in the input buffer unit is divided into a plurality of groups, and the arbiter unit is time-divided for each of the plurality of groups. In operation, arbitration is sequentially performed, and cell output is permitted only to the virtual output queue in the group that has been arbitrated. Thus, the number of cell transfer paths can be apparently made the same as that when the high-speed line is accommodated by the group-divided time-sharing operation. That is, the arbitration conditions (arbitration time and the number of cell transfer paths) are the same as when the high-speed line is accommodated. It can be made the same, and the occurrence of the operation speed bottleneck (of the device) of the arbiter unit can be suppressed.
[0056]
According to the next invention, by performing the time-sharing operation in the separation unit, the function of sorting by referring to the cell header by executing the grouped time-sharing operation also in this separation unit becomes unnecessary. Since the cell rate to be input to each group is the same and constant as the cell rate on the low-speed line (outgoing line), it is not necessary to increase the capacity of the speed conversion buffer, and it is only necessary to prepare a small-capacity speed conversion buffer.
[0057]
According to the next invention, by providing a multiplexing unit for multiplexing a plurality of low-speed incoming lines to a high-speed input port, a low-speed incoming line can be made high-speed, so that a function of accommodating a different speed line is obtained.
[0058]
According to the next invention, using the cell header, the time slot information of the time-division operation is input between the input buffer unit and the arbiter unit, between the input buffer unit and the switch unit, and between at least one of the switch unit and the separation unit. In this way, erroneous group recognition is avoided without adding a separate line (control line), and the entire system operates normally in cooperation.
[0059]
According to the next invention, by using a control line provided separately from the data line for cell transmission, the time slot information of the time division operation is input between the input buffer unit and the arbiter unit, between the input buffer unit and the switch unit, And transmission between at least one of the switch unit and the separation unit, the time slot information of the time division operation is managed separately from the data by the control line, and a part of the information area in the cell header is timed. There is no need to occupy slot information, and it can be used for other information.
[0060]
According to the next invention, a time slot information generating unit is provided, and a time division operation is performed in accordance with the time slot information distributed from the time slot information generating unit, whereby a plurality of cells input from each input buffer unit are The group names can be made one, and the waiting time until all the same groups in the switch unit are made can be minimized.
[0061]
According to the next invention, by using the flag information indicating a specific time slot as the time slot information, erroneous recognition of a group can be avoided and the entire system can operate normally in cooperation.
[0062]
According to the next invention, by using the time slot number as the time slot information, erroneous recognition of the group can be avoided and the entire system can operate normally in cooperation.
[0063]
According to the next invention, since the operation / stop of the time-division operation of the arbiter unit can be selected for each output port, the transmission speed of the accommodated output line (or the presence or absence of the separation unit) can be set for each output port, and high speed Lines and low-speed lines can be freely accommodated in cell switches.
[0064]
According to the next invention, a cell storage step of storing cells input from an input port in a plurality of virtual output queues prepared for each destination outgoing line, and based on accumulated information of the cells stored in the cell storage step An arbitration step of performing output arbitration between the virtual output queues, an exchange step of transferring a cell input from the virtual output queue to an output port accommodating a destination outgoing line, and a high-speed cell input from the output port. In the cell switching method provided with a separation step of distributing to a low-speed destination outgoing line, the virtual output queue is divided into a plurality of groups, and the arbitration step is arbitrated in order by time division operation for each of the plurality of groups. By allowing cells to be output only to the virtual output queues within the group targeted for arbitration, Arbitration when conditions (arbitration time and the cell number of transfer path) can be the same as during high-speed line container by suppressing the generation of (the device) the operating speed neck of the arbiter portion.
[0065]
According to the next invention, by performing the time-sharing operation of grouping also in this separation step, the step of distributing by referring to the cell header becomes unnecessary, and the cell rate to each group input to the separation step is set to the low-speed line ( Since the cell rate on the outgoing line is the same and constant, there is no need to increase the capacity of the speed conversion buffer, and only a small capacity speed conversion buffer needs to be prepared.
[0066]
According to the next invention, by providing a multiplexing step of multiplexing a plurality of low-speed incoming lines to a high-speed input port, a low-speed incoming line can be made high-speed, so that a function of accommodating a different speed line can be obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a cell switch according to a first embodiment of the present invention.
FIG. 2 is a block diagram logically equivalent to the block diagram shown in FIG. 1;
FIG. 3 is a block diagram showing a configuration of a cell switch according to a second embodiment of the present invention.
FIG. 4 is an explanatory diagram of a method of transmitting flag information using a cell header.
FIG. 5 is an explanatory diagram of a method of transmitting a time slot number using a cell header.
FIG. 6 is a simplified block diagram showing a configuration of a cell switch according to a third embodiment of the present invention.
FIG. 7 is a block diagram showing a configuration of a conventional cell switch.
FIG. 8 is a block diagram showing a configuration of another conventional cell switch.
[Explanation of symbols]
1 multiplexing unit, 2 input buffer unit, 3 virtual output queue, 4 arbiter unit, 5 switch unit, 6 demultiplexing unit, 7 small capacity speed conversion buffer, 8 time slot information generation unit, 10 input lines, 11 input ports, 12 outputs Port, 13 outgoing line, 14 time slot information.

Claims (12)

An input buffer for storing cells input from an input port in a plurality of virtual output queues prepared for each destination line, and output arbitration between the virtual output queues based on cell accumulation information from the input buffer. An arbiter unit, a switch unit for transferring cells input from the input buffer unit to an output port accommodating a destination outgoing line, and a separating unit for distributing cells input from the high-speed output port to a low-speed destination outgoing line. In the equipped cell switch,
The virtual output queue in the input buffer unit is divided into a plurality of groups, and the arbiter unit is subjected to arbitration sequentially and time-divisionally for each of the plurality of groups, and the arbitration target group Wherein the cell output is permitted only to the virtual output queue in the cell switch. The cell switch according to claim 1, wherein the separation unit performs a time division operation. 3. The cell switch according to claim 1, further comprising a multiplexing unit that multiplexes a plurality of low-speed incoming lines to a high-speed input port. Utilizing a cell header, transmitting time slot information of the time division operation between the input buffer unit and the arbiter unit, between the input buffer unit and the switch unit, and between at least one between the switch unit and the separation unit. The cell switch according to claim 1. Using a control line provided separately from the data line for cell transmission, the time slot information of the time division operation is transmitted between the input buffer unit and the arbiter unit, between the input buffer unit and the switch unit, and between the switch unit and the separation unit. The cell switch according to any one of claims 1 to 3, wherein transmission is performed during at least one of the following. The cell switch according to any one of claims 1 to 5, further comprising a time slot information generation unit, wherein the cell switch performs a time division operation according to the time slot information distributed from the time slot information generation unit. 7. The cell switch according to claim 1, wherein flag information indicating a specific time slot is used as time slot information. 7. The cell switch according to claim 1, wherein a time slot number is used as time slot information. 9. The cell switch according to claim 1, wherein the operation / stop of the time division operation of the arbiter unit can be selected for each output port. A cell storing step of storing cells input from an input port into a plurality of virtual output queues prepared for each destination line, and an output between the virtual output queues based on accumulated information of the cells stored in the cell storing step An arbitration step of performing arbitration; a switching step of transferring cells input from the virtual output queue to an output port accommodating a destination output line; and distributing cells input from the high-speed output port to a low-speed destination output line. In a cell exchange method including a separation step,
The virtual output queue is divided into a plurality of groups, and the arbitration step is to sequentially perform arbitration in a time-sharing operation for each group among the plurality of groups and to perform the virtual output in the group to be arbitrated. A cell switching method, wherein cell output is permitted only to a queue. The cell exchange method according to claim 10, wherein a time division operation is performed in the separation step. 12. The method according to claim 10, further comprising a multiplexing step of multiplexing a plurality of low-speed incoming lines to a high-speed input port.

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