JP2004022550A - Method for manufacturing semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an ultrasonic cleaning technique for LSIs giving reduced damage on LSI patterns, while maintaining high cleaning performance. <P>SOLUTION: To the tip of a quartz rod 204 arranged over a wafer stage 201 of an ultrasonic cleaning apparatus 200, an attenuating member 207 is attached for attenuating ultrasonic energy transmission to a cleaning liquid 208, with a structure so that no excessive ultrasonic energy is applied to the surface of a board 1 from the tip of the quartz rod 204. Since the peripheral side of a wafer chuck 202 attached to the wafer stage 201 is designed to be substantially flush with the surface of the board 1, the cleaning liquid 208 spreads to as far as the outermost of the wafer chuck 202, and the boundary between the cleaning liquid 208 and the air comes to be positioned at farther the outside of the periphery of the substrate 1, excessive ultrasonic energy will not be applied to the periphery of the substrate 1. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technology for manufacturing a semiconductor integrated circuit device, and more particularly to a technology that is effective when applied to cleaning of a semiconductor wafer using ultrasonic waves.
[0002]
[Prior art]
A megasonic cleaning technique of cleaning the surface of a semiconductor wafer (hereinafter, referred to as a wafer) with pure water or a chemical solution while applying ultrasonic waves called megasonic having a frequency of about 1 MHz is a conventional technique using ultrasonic waves having a frequency of several tens KHz. Since the damage to the LSI pattern is less than that of kilosonic cleaning and the particle removal ability is higher than that of brush cleaning, cleaning technology that is indispensable in recent LSI manufacturing processes in which element and wiring patterns have become finer It is becoming.
[0003]
“Clean Technology, August 2001” (Nippon Kogyo Publishing Co., Ltd., issued on July 25, 2001), pp. 14-18, discusses issues of megasonic cleaning technology employing a single-wafer method. According to this document, the immersion method of irradiating megasonics with the wafers immersed in a water tank hardly causes the problem of LSI destruction due to megasonic energy, whereas the cleaning liquid nozzle is mounted above the wafers mounted on the rotary stage. In the case of a single wafer system in which megasonic is applied to the cleaning liquid passing through the nozzle tube and supplied to the surface of the wafer, the megasonic is directly applied to the surface of the wafer, and the Lamb wave vibration (the wafer which is a thin silicon plate) is applied. However, it has been pointed out that a pattern movement of an LSI occurs due to the occurrence of a bending motion which causes resonance with respect to megasonic.
[0004]
Japanese Patent Application Laid-Open No. 2001-53047 (Tomita et al.) Has a cleaning liquid supply nozzle capable of simultaneously supplying a cleaning liquid to both front and back surfaces of a wafer, and an ultrasonic vibrator capable of simultaneously applying ultrasonic waves to both front and back surfaces of the wafer. An ultrasonic cleaning apparatus that shortens the cleaning time by simultaneously supplying the cleaning liquid and applying the ultrasonic wave is disclosed. According to one aspect of the ultrasonic cleaning apparatus described in this publication, the ultrasonic cleaning apparatus is arranged near the outer peripheral edge of the wafer to be cleaned and separated from the wafer, and supplies the cleaning liquid to both front and back surfaces of the wafer. An ultrasonic oscillation nozzle to be applied, an ultrasonic oscillator for applying ultrasonic waves to both the front and back surfaces of the wafer, and placed in contact with the outer peripheral edge of the wafer, holding the wafer by being pressed against the outer peripheral edge of the wafer and rotating, It is composed of a plurality of drive rollers to be rotated. Further, a desirable vibration frequency of the ultrasonic wave is 200 to 700 KHz, and 400 to 500 KHz is considered to be optimal.
[0005]
Japanese Patent Application Laid-Open No. H10-74724 (Kinoshita et al.) Discloses that when ultrasonic waves are used to clean the back surface of a wafer, ultrasonic energy penetrates the wafer and reaches the opposite surface (device forming surface). A technique for preventing a pattern from being damaged is disclosed.
[0006]
The wafer cleaning apparatus described in this publication is provided with a spray nozzle having an ultrasonic vibrator attached to a head portion, and scans and moves the head along the radial direction of the rotation center axis of the wafer while the upper surface (rear surface) of the wafer is moved. ), The angle of the spray nozzle is adjusted so that the irradiation angle of the cleaning water ejected from the head is in the range of 75 ° to 90 ° with respect to the cleaning surface of the wafer when supplying the cleaning water in which the ultrasonic wave is propagated. By adjusting, the transmittance of the ultrasonic wave to the wafer is reduced to 5% or less.
[0007]
Japanese Patent Laying-Open No. 10-154677 (Tomozawa et al.) Discloses a technique in which a single cleaning unit can simultaneously clean both surfaces of a wafer in a wafer cleaning apparatus using ultrasonic waves.
[0008]
The wafer cleaning apparatus described in this publication fixes a wafer to a cleaning surface of a wafer from a spray nozzle head to which an ultrasonic vibrator is fixed while the rear surface (cleaning surface) of the wafer is fixed on a rotary stage with the back surface facing upward. The structure is such that water is supplied and pure water for back rinsing is sprayed on the lower surface of the wafer, that is, the element formation surface. When cleaning the back surface of the wafer, the incident angle of the cleaning water ejected from the lower end of the head is within a range of 0 ° <θ ≦ 30 ° (θ = 0 ° is a direction perpendicular to the cleaning surface of the wafer). In addition to adjusting the angle of the spray nozzle so as to achieve the above, pure water is sprayed on the lower surface (element formation surface) of the wafer to form a water film. By doing so, the transmittance of the ultrasonic wave to the wafer is maximized, and the water in contact with the lower surface (element formation surface) is vibrated by the ultrasonic wave, so that both surfaces of the wafer can be cleaned at the same time.
[0009]
Japanese Patent Application Laid-Open No. 11-176786 (Osaka et al.) Discloses a wafer holding means for holding a wafer (substrate) substantially horizontally and rotating it in a cleaning chamber, and a wafer holding means arranged opposite to the back side of the wafer and substantially at the center of the wafer. A cleaning nozzle having a cleaning liquid outlet formed along the outer peripheral direction from the cleaning liquid supply means for supplying the cleaning liquid from the cleaning liquid outlet toward the back surface of the wafer; and a cleaning liquid or pure water flowing out of the cleaning liquid outlet. An ultrasonic cleaning apparatus including an ultrasonic vibration applying means for applying ultrasonic vibration is disclosed. According to this ultrasonic cleaning apparatus, the cleaning liquid or pure water is ultrasonically vibrated after the inside of the wafer and the cleaning nozzle is filled with the cleaning liquid or pure water, and the back surface of the wafer is vibrated for cleaning. It is said that effective cleaning becomes possible.
[0010]
Japanese Patent Application Laid-Open No. H11-300301 (Heira et al.) Discloses that when cleaning is performed by supplying, from a nozzle, a cleaning liquid applied with ultrasonic waves to the other surface of a wafer (substrate) having one surface covered with a liquid film, for cleaning. When the frequency of the sound wave is f (MHz), the thickness of the wafer is t (mm), and the incident angle of the cleaning liquid with respect to the normal to the wafer surface is θ (°), 1 <ft <5 and 34 A cleaning method that suppresses ultrasonic damage to one surface of a wafer by performing cleaning under a condition satisfying <θ <70 is disclosed.
[0011]
[Problems to be solved by the invention]
The present inventors have proposed, as a method of cleaning a wafer performed in a manufacturing process of a semiconductor integrated circuit device, a megasonic which cleans the surface of the wafer with pure water or a chemical solution while applying ultrasonic waves having a frequency on the order of MHz called megasonic. We are considering introducing sonic cleaning technology.
[0012]
In this megasonic cleaning, a cleaning liquid (pure water or chemical liquid) is supplied to a main surface of a wafer placed on a wafer stage rotating at a predetermined speed in a horizontal plane, and connected to a transducer which is an ultrasonic generation source. This is a non-contact cleaning technique in which a quartz rod is brought into contact with the cleaning liquid and ultrasonic waves are supplied in multiple directions to the entire main surface of the wafer through the cleaning liquid. According to the study of the present invention, ultrasonic waves were applied. Unlike nozzle cleaning, in which the cleaning liquid is converged in a beam form from the tip of the nozzle and locally supplied to the main surface of the wafer, ultrasonic waves can be applied to the entire main surface of the wafer in multiple directions, so it is formed on the main surface of the wafer It was evaluated that the ultrasonic damage to the performed LSI pattern was small.
[0013]
Also, unlike brush cleaning, ultrasonic energy is applied from a direction that is not in contact with the wafer and is substantially perpendicular to the main surface of the wafer, so that a step with a high aspect ratio is formed on the surface of the wafer. In addition, it was evaluated that a high cleaning effect was obtained, and that a cleaning effect was obtained even for a hydrophobic film in which foreign matter might be generated by brush cleaning.
[0014]
However, according to the study of the present inventors, the megasonic cleaning locally applies strong ultrasonic energy to a specific region on the main surface of the wafer, so that the LSI pattern formed in this region may cause damage. As a result, a phenomenon in which the pattern fell or was deformed was observed.
[0015]
One of the reasons that megasonic cleaning gives strong ultrasonic energy to a specific area of the wafer is that the tip of the quartz rod generates ultrasonic waves with higher energy than other parts, so that the main surface of the wafer Of these, it is conceivable that strong ultrasonic energy is applied to the LSI pattern in the region located near the tip of the quartz rod.
[0016]
Another reason is that the ultrasonic waves applied to the cleaning liquid on the wafer are hardly transmitted into the air, so that the energy of the ultrasonic waves concentrates on the interface between the cleaning liquid and the air, that is, near the periphery of the wafer. It is conceivable that strong ultrasonic energy is applied to the LSI pattern in the region.
[0017]
An object of the present invention is to provide an ultrasonic cleaning technique that reduces damage to an LSI pattern while maintaining high cleaning performance.
[0018]
Another object of the present invention is to provide an ultrasonic cleaning technique capable of efficiently removing foreign substances adhering to a wafer surface.
[0019]
Another object of the present invention is to provide an ultrasonic cleaning technique capable of obtaining a high cleaning effect even on a wafer having a surface with a step having a high aspect ratio.
[0020]
It is another object of the present invention to provide a chemically assisted cleaning technique in which an adverse effect on device characteristics is reduced while maintaining high cleaning performance.
[0021]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0022]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
(1) A method for manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps.
(A) forming a connection hole having an aspect ratio of 2 or more in a first insulating film on a main surface of a semiconductor wafer;
(B) a step of ultrasonic cleaning the main surface of the semiconductor wafer in which the connection holes are formed.
(2) The method for manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps.
(A) forming a hydrophilic film on the main surface of the semiconductor wafer;
(B) brush cleaning the surface of the hydrophilic film;
(C) forming a hydrophobic film on the main surface of the semiconductor wafer prior to (a) or after (b);
(D) a step of ultrasonically cleaning the surface of the hydrophobic film.
(3) In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the main surface of the semiconductor wafer is subjected to ultrasonic wave cleaning by a single wafer method using a cleaning liquid involving a chemical reaction of the main surface or a film formed on the main surface. Including a washing step.
[0023]
In the present application, the term “semiconductor integrated circuit device” means not only a device formed on a single crystal silicon substrate, but also a SOI (Silicon On Insulator) substrate or a TFT (Thin Film) unless otherwise specified. Transistor: A substrate manufactured on another substrate such as a liquid crystal manufacturing substrate. In addition, a wafer refers to a single crystal silicon substrate (generally a disk shape), an SOS substrate, a glass substrate, other insulating, semi-insulating, or semiconductor substrates, or a substrate obtained by combining them, used for manufacturing a semiconductor integrated circuit device.
[0024]
Further, when ultrasonic cleaning of a wafer is performed by a single wafer method, cleaning is performed by supplying a cleaning liquid to which ultrasonic waves are applied onto the main surface of one wafer.
[0025]
Further, the term “cleaning solution” includes not only a chemical solution containing a cleaning component but also pure water.
[0026]
The term "chemically assisted cleaning" refers to cleaning using a chemical solution containing a component accompanied by a chemical reaction of a main surface of a wafer or a film formed on the main surface.
[0027]
In the case of multi-directional megasonic cleaning or multi-directional ultrasonic cleaning, a cleaning liquid is supplied to the main surface of a wafer placed on a wafer stage rotating at a predetermined speed in a horizontal plane, and connected to an ultrasonic generation source. A method in which an ultrasonic wave transmitting means such as a quartz rod is brought into contact with the cleaning liquid, and cleaning is performed while supplying ultrasonic waves in multiple directions to the entire main surface of the wafer via the cleaning liquid. This is distinguished from the nozzle cleaning method in which the cleaning liquid is converged in a beam form from the tip of the nozzle and locally supplied to the main surface of the wafer.
[0028]
The term “megasonic” includes not only an ultrasonic wave having a frequency of 1 MHz or more but also an ultrasonic wave having a frequency of about 1 MHz.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings for describing the embodiments, the same members are denoted by the same reference numerals, and a repeated description thereof will be omitted.
[0030]
In the following embodiments, when necessary for the sake of convenience, the description will be made by dividing into a plurality of sections or embodiments, but unless otherwise specified, they are not unrelated to each other, and one is the other. Some or all of the modifications, details, supplementary explanations, and the like are provided.
[0031]
Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, amount, range, etc.), unless otherwise specified, and unless the number is clearly limited to a specific number in principle, The number is not limited to the specific number, and may be more than or less than the specific number. Furthermore, in the embodiments described below, the constituent elements (including element steps and the like) are not necessarily essential unless otherwise specified and considered to be indispensable in principle. Not even.
[0032]
Similarly, in the following embodiments, when referring to the shape of components and the like, the positional relationship, etc., the shape and the like of the components and the like are substantially excluded, unless otherwise specified and when it is considered that it is not clearly apparent in principle. And those similar to or similar to This is the same for the above numerical values and ranges.
[0033]
A method of manufacturing a CMOS-LSI according to an embodiment of the present invention will be described in the order of steps with reference to FIGS.
[0034]
First, as shown in FIG. 1, an element isolation groove 2 is formed in a semiconductor substrate (hereinafter, referred to as a substrate or wafer) 1 made of p-type single crystal silicon having a specific resistance of, for example, about 1 to 10 Ωcm. In order to form the element isolation groove 2, the substrate 1 in the element isolation region is etched to form a groove, and then a silicon oxide film 3 is deposited on the substrate 1 including the inside of the groove by a CVD method. The external silicon oxide film 3 is removed by a chemical mechanical polishing method.
[0035]
Next, as shown in FIG. 2, boron is ion-implanted into a part of the substrate 1 and phosphorus is ion-implanted into another part, and then the substrate 1 is heat-treated to diffuse the impurities (boron and phosphorus). Thereby, the p-type well 4 is formed in a part of the substrate 1 and the n-type well 5 is formed in the other part. At this time, boron is ion-implanted into the surface of the substrate 1 in order to control the threshold voltage of the MISFET.
[0036]
Next, the substrate 1 is immersed in a mixed aqueous solution of ammonia and hydrogen peroxide (hereinafter referred to as SC-1 solution) heated to about 50 ° C. to 80 ° C. to remove the natural oxide film and foreign matter on the surface of the substrate 1. Removed to expose the single crystal silicon portion.
[0037]
Next, as shown in FIG. 3, a clean gate oxide film 6 is formed on each surface of the p-type well 4 and the n-type well 5 by subjecting the substrate 1 to steam oxidation. After that, in order to reduce the interface state in the gate oxide film 6, the substrate 1 is heat-treated as necessary in an atmosphere containing NO gas, so that the gate oxide film 6 and the substrate 1 (p-type well) are formed. 4. Nitrogen may be segregated at the interface with the n-type well 5).
[0038]
Next, as shown in FIG. 4, a gate electrode conductive film 7a is deposited on the gate oxide film 6. The conductive film 7a for a gate electrode is formed by, for example, a laminated film (polycide film) of an n-type polycrystalline silicon film and a W (tungsten) silicide film deposited by a CVD method or an n-type polycrystalline silicon film deposited by a CVD method. It is composed of a laminated film (polymetal film) of a tungsten nitride (WN) film and a W film deposited by a method.
[0039]
Next, as shown in FIG. 5, the conductive film 7a for a gate electrode is patterned by dry etching using the photoresist film 30 as a mask, so that the gate oxide film 6 on each of the p-type well 4 and the n-type well 5 is formed. Then, a gate electrode 7 is formed.
[0040]
Next, the photoresist film 30 on the gate electrode 7 is removed by ashing (ashing) or the like. When the photoresist film 30 is removed, the residue of the conductive film 7a for the gate electrode generated by the dry etching and the residue of the photoresist film 30 generated by the ashing process adhere to the surface of the substrate 1, so that the next cleaning is performed. These foreign substances are removed in the process.
[0041]
FIG. 6 is a schematic side view showing a single-wafer ultrasonic cleaning apparatus used for cleaning the substrate 1, and FIG. 7 is a schematic plan view thereof.
[0042]
The ultrasonic cleaning apparatus 100 includes a wafer stage 101 that rotates in a horizontal plane. The substrate 1 in a wafer state is placed on a wafer stage 101 with its main surface (element formation surface) facing upward, and is held and fixed by a wafer chuck 102.
[0043]
Above the wafer stage 101, a quartz rod 104 having a transducer 103 attached to one end is disposed. The transducer 103 is a device that converts electric energy into ultrasonic energy. Ultrasonic waves (megasonic) having a frequency of about 1.0 MHz to 1.5 MHz generated here are transmitted to the quartz rod 104. When the substrate 1 is not mounted on the wafer stage 101, the quartz rod 104 is retracted outside the wafer stage 101 and stands by.
[0044]
Above the wafer stage 101, a first nozzle 105 for supplying a chemical or pure water to the surface of the substrate 1, and a chemical or pure water for supplying near the base of the quartz rod 104 and near the periphery of the wafer stage 101. A second nozzle 106 is disposed.
[0045]
FIG. 8 is an enlarged plan view of the quartz rod 104. As shown, a groove 107 is provided near the distal end of the quartz rod 104 along the outer periphery thereof. That is, in the quartz rod 104, the diameter of the portion where the groove 107 is provided is smaller than the diameter of the other portion.
[0046]
By providing the groove 107 as described above in a part of the quartz rod 104, an ultrasonic wave generated by the transducer 103 and traveling toward the distal end of the quartz rod 104 and an ultrasonic wave reflected by the distal end of the quartz rod 104. Interfere with each other inside the groove 107. At this time, if the width (w) of the groove 107 is set to one half of the wavelength of the ultrasonic wave, the phase of the traveling wave and the phase of the reflected wave are reversed inside the groove 107, so that the energy of the ultrasonic wave is reduced. Be the lowest. For example, assuming that the frequency of the ultrasonic wave is 1.0 MHz and the sound speed in water is 1500 m / sec, the width (w) of the groove 107 is set to wavelength / 2 = 1500/1000/2 = 1.5 mm. At this time, the energy of the ultrasonic wave transmitted from the vicinity of the tip of the quartz rod 104 to the cleaning liquid (or pure water) is about 17% as compared with the case where the groove 107 is not provided, when compared by the square of the sound pressure. As described above, by providing the groove 107 having a width (w) that is a half of the wavelength of the ultrasonic wave near the tip of the quartz rod 104, the ultrasonic energy near the tip of the quartz rod 104 can be reduced. it can.
[0047]
When the cleaning liquid (or pure water) is supplied to the surface of the substrate 1 on the wafer stage 101 through the nozzles 105 and 106, the cleaning liquid (or pure water) is supplied to the quartz rod 104 inside the groove 107. (Water) must be at a depth that does not make contact. When the quartz rod 104 inside the groove 107 comes into contact with the cleaning liquid (or pure water), interference between the traveling wave and the reflected wave does not occur inside the groove 107.
[0048]
As shown in FIG. 9, the number of grooves 107 provided near the tip of the quartz rod 104 may be two (or more). When the number of the grooves 107 is increased, the attenuation amount of the ultrasonic energy is also increased. Therefore, by adjusting the number of the grooves 107, the energy of the ultrasonic waves transmitted from the vicinity of the tip of the quartz rod 104 to the cleaning liquid (or pure water) can be reduced. It can be controlled to the optimal value.
[0049]
A method of cleaning the substrate 1 using the ultrasonic cleaning apparatus 100 will be described with reference to FIGS. 10 and 11. First, the wafer-like substrate 1 is placed on the wafer stage 101 using a robot hand or the like. The wafer is held and fixed by the wafer chuck 102. Subsequently, the cleaning liquid 108 is supplied to the surface of the substrate 1 through the nozzles 105 and 106 while rotating the wafer stage 101. The rotation speed of the wafer stage 101 is such a speed that the cleaning liquid 108 supplied to the surface of the substrate 1 does not scatter to the outside of the substrate 1 due to centrifugal force and the surface tension can be maintained on the surface of the substrate 1, for example, every minute. It is about 18 rotations. The cleaning liquid 108 supplied from the nozzles 105 and 106 is the aforementioned SC-1 liquid (a mixed aqueous solution of ammonia and hydrogen peroxide). This cleaning liquid 108 is used at room temperature without any particular heating operation.
[0050]
When the cleaning liquid 108 is supplied onto the substrate 1 rotating on the wafer stage 101 and a thin layer of the cleaning liquid 108 is formed on the surface, the quartz rod 104 waiting outside the wafer stage 101 is moved above the wafer stage 101. The ultrasonic wave generated from the transducer 103 is transmitted to the quartz rod 104 while being moved to the cleaning liquid 108. At this time, the quartz rod 104 contacts the cleaning liquid 108 on the surface of the substrate 1 but does not directly contact the substrate 1.
[0051]
By the above operation, the ultrasonic wave transmitted from the transducer 103 to the quartz rod 104 is transmitted in multiple directions over the entire surface of the substrate 1 via the cleaning liquid 108, and the chemical action of the SC-1 liquid and the mechanical Chemically assisted cleaning of the substrate 1 is performed by using the mechanical action. At this time, the ultrasonic wave is mainly applied in a direction perpendicular to the surface of the substrate 1.
[0052]
As described above, of the two nozzles 105 and 106 disposed above the wafer stage 101, the cleaning liquid 108 is supplied from the nozzle 106 to the vicinity of the base of the quartz rod 104 and the vicinity of the peripheral edge of the wafer stage 101. Therefore, as shown in FIG. 10, at the periphery of the wafer stage 101 located near the base of the quartz rod 104, the interface between the cleaning liquid 108 and the air, that is, the region where the ultrasonic energy transmitted to the cleaning liquid 108 is high 1 moves outward from the periphery. Accordingly, since excessive ultrasonic energy is not applied to the peripheral portion of the substrate 1, it is possible to prevent the gate electrode 7 formed on the peripheral portion of the substrate 1 from falling or deforming.
[0053]
Further, the above-described groove 107 is provided near the tip of the quartz rod 104 to reduce the ultrasonic energy transmitted from the vicinity of the tip of the quartz rod 104 to the cleaning liquid 108, so that the substrate 1 near the tip of the quartz rod 104 is reduced. Since excessive ultrasonic energy is not applied to the substrate 1, it is possible to prevent the gate electrode 7 formed on the substrate 1 in this region from falling or deforming.
[0054]
Next, the composition of the cleaning liquid 108 is switched from the SC-1 liquid to a mixed aqueous solution of hydrochloric acid and hydrogen peroxide (hereinafter referred to as SC-2 liquid), and ultrasonic cleaning is further continued. Finally, pure water is supplied from the nozzles 105 and 106. The cleaning liquid 108 remaining on the surface of the substrate 1 is removed by supplying and ultrasonically cleaning the surface of the substrate 1. The SC-2 solution and pure water are used at room temperature without any particular heating operation.
[0055]
After the gate electrode 7 is formed on the substrate 1 as described above, the substrate 1 is cleaned using both the chemical action of the cleaning liquid 108 (SC-1 liquid and SC-2 liquid) and the mechanical action of ultrasonic waves. Accordingly, foreign substances can be efficiently removed without heating the cleaning liquid 108. Further, since the gate oxide film 6 can be prevented from being excessively etched by not heating the cleaning liquid 108, deterioration of element characteristics can be prevented. Furthermore, by using the ultrasonic cleaning apparatus 100 having the above-described structure, excessive ultrasonic energy is not applied to a part of the surface of the substrate 1. It is also possible to prevent the occurrence of a defect such as falling down or deformation.
[0056]
Next, as shown in FIG. 12, phosphorus or arsenic is ion-implanted into the p-type ⁻ The semiconductor region 8 is formed, and boron is ion-implanted into the n-type well 5 to form a low impurity concentration p-type region. ⁻ A type semiconductor region 9 is formed.
[0057]
Next, a silicon nitride film is deposited on the substrate 1 by the CVD method, and subsequently, the silicon nitride film is anisotropically etched to form a sidewall spacer 10 on the side wall of the gate electrode 7, and then a p-type By ion-implanting phosphorus or arsenic into the well 4, a high impurity concentration n ⁺ The semiconductor region 11 (source, drain) is formed, and boron is ion-implanted into the n-type well 5 to form a high impurity concentration p-type region. ⁺ A type semiconductor region 12 (source, drain) is formed. Through the steps so far, the n-channel MISFET Qn and the p-channel MISFET Qp are completed.
[0058]
In the above process, the impurity is ion-implanted using the photoresist film as a mask, or the silicon nitride film is dry-etched. ⁺ Type semiconductor region 11, p ⁺ The residue of the photoresist film and the residue of etching adhere to the surface of the substrate 1 after the formation of the mold semiconductor region 12). Therefore, next, the surface of the substrate 1 is chemically assisted cleaned using the SC-1 solution and the SC-2 solution. At this time, by using the ultrasonic cleaning device 100, foreign substances can be efficiently removed without heating the SC-1 solution and the SC-2 solution.
[0059]
Next, as shown in FIG. 13, a silicon oxide film 16 is deposited on the substrate 1 by the CVD method, and a photoresist film 31 is formed on the silicon oxide film 16, and then the photoresist film 31 is used as a mask. T ⁺ Semiconductor region 11 (source, drain) and p ⁺ The contact holes 17 having an aspect ratio of 2 or more are formed by dry-etching the silicon oxide film 16 and the gate oxide film 6 on each of the type semiconductor regions 12 (source and drain).
[0060]
Next, as shown in FIG. 14, the photoresist film 31 on the silicon oxide film 16 is removed by ashing (ashing) or the like. When the photoresist film 31 is removed, a residue when the silicon oxide film 16 and the gate oxide film 6 are dry-etched and a residue when the photoresist film 31 is removed adhere to the inside of the contact hole 17. In addition, the residue obtained by removing the photoresist film 31 adheres to the surface of the silicon oxide film 16. Therefore, these foreign substances are removed in the next cleaning step.
[0061]
For removing the foreign matter, the ultrasonic cleaning device 100 shown in FIGS. 6 and 7 may be used. Alternatively, the single-wafer ultrasonic cleaning device 200 shown in FIGS. 15 and 16 may be used. it can.
[0062]
The ultrasonic cleaning device 200 includes a wafer stage 201 that rotates in a horizontal plane. The substrate 1 in a wafer state is mounted on the wafer stage 201 with its main surface (element formation surface) facing upward, and a ring-shaped wafer chuck 202 provided along the peripheral portion of the wafer stage 201. Held and fixed by
[0063]
As shown in FIG. 15, a step 202a whose inner peripheral side is lower than the outer peripheral side is provided on the upper surface of the wafer chuck 202, and the substrate 1 is mounted on the inner peripheral side of this step 202a. I have. The height difference between the inner peripheral side and the outer peripheral side of the step 202a is almost equal to the thickness of the substrate 1. When the substrate 1 is positioned on the inner peripheral side of the step 202a, the height of the surface of the substrate 1 and the wafer chuck 202 Are almost equal on the outer peripheral side. The wafer chuck 202 can be formed integrally with the wafer stage 201.
[0064]
Above the wafer stage 201, a quartz rod 204 having a transducer 203 attached to one end is disposed. When the substrate 1 is not placed on the wafer stage 201, the quartz rod 204 retreats outside the wafer stage 201 and stands by.
[0065]
An attenuating member 207 for attenuating the energy of the ultrasonic wave transmitted to the cleaning liquid on the surface of the substrate 1 from the vicinity of the tip is attached to the tip of the quartz rod 204. The damping member 207 is made of a material whose acoustic impedance is significantly different from the quartz material forming the quartz rod 204. Since the acoustic impedance of a substance is equal to the product (ρv) of the density (ρ) of the substance and the speed of sound (v) in the substance, the damping member 207 is made of a material (for example, acrylic resin) having a significantly lower density than quartz. , A synthetic resin such as a fluorine resin) or a material (for example, a heavy metal such as tungsten) having a significantly higher density than quartz.
[0066]
Quartz density (ρ) = 2.3 × 10 ³ Kg / m ³ From the speed of sound in quartz (v) = 5500 m / s, the acoustic impedance (ρv) of quartz = 12.7 × 10 ³ Kg / m ² s. On the other hand, the density (ρ) of the acrylic resin = 1.5 × 10 ³ Kg / m ³ , The acoustic impedance (ρv) of the acrylic resin is 3.6 × 10 from the speed of sound (v) in quartz = 2400 m / s. ³ Kg / m ² s. Therefore, in the case of the quartz rod 204 in which the attenuation member 207 made of acrylic resin is adhered to the tip, the energy of the ultrasonic wave transmitted from the vicinity of the tip to the cleaning liquid is about 28% of the case where the attenuation member 207 is not attached. .
[0067]
On the other hand, the density (ρ) of tungsten = 19.1 × 10 ³ Kg / m ³ , The acoustic impedance (ρv) of tungsten = 103.1 × 10 from the speed of sound (v) in tungsten = 5400 m / s. ³ Kg / m ² s. Therefore, in the case of the quartz rod 204 to which the attenuation member 207 made of tungsten is adhered at the tip, the ultrasonic energy transmitted from the vicinity of the tip to the cleaning liquid is attenuated to about 12% of that when the attenuation member 20 is not attached. .
[0068]
A method of cleaning the substrate 1 using the ultrasonic cleaning apparatus 200 will be described with reference to FIGS. 17 and 18. First, the wafer-shaped substrate 1 is placed on the wafer stage 201 using a robot hand or the like. The wafer is held and fixed by the wafer chuck 202. Subsequently, while rotating the wafer stage 201, the nozzle 205 waiting on the outside of the wafer stage 201 is moved above the wafer stage 201, and the cleaning liquid 208 is supplied to the surface of the substrate 1. The cleaning liquid 208 is the SC-1 liquid described above. This cleaning liquid 208 is used at room temperature without any particular heating operation.
[0069]
When the cleaning liquid 208 is supplied onto the substrate 1 rotating on the wafer stage 201 and a thin layer of the cleaning liquid 208 is formed on the surface thereof, the quartz rod 204 waiting outside the wafer stage 201 is moved above the wafer stage 201. The ultrasonic wave generated from the transducer 203 is transmitted to the quartz rod 204 while contacting with the cleaning liquid 208. At this time, the quartz rod 204 comes into contact with the cleaning liquid 208 on the surface of the substrate 1, but does not come into direct contact with the substrate 1.
[0070]
By the above operation, the ultrasonic wave transmitted from the transducer 203 to the quartz rod 204 is transmitted to the entire surface of the substrate 1 via the cleaning liquid 208, and the chemical action of the SC-1 liquid and the mechanical action of the ultrasonic wave are used together. Chemically assisted cleaning of the substrate 1 is performed.
[0071]
As described above, since the height of the outer peripheral side of the wafer chuck 202 is almost equal to the height of the surface of the substrate 1, when the cleaning liquid 208 is supplied onto the substrate 1 through the nozzle 205, the cleaning liquid 208 And spreads to the outermost peripheral portion of the wafer chuck 202. That is, the interface between the cleaning liquid 208 and the air is located outside the peripheral edge of the substrate 1. As a result, excessive ultrasonic energy is not applied to the peripheral portion of the substrate 1, so that elements formed on the peripheral portion of the substrate 1 are not damaged by the ultrasonic energy.
[0072]
Further, the above-described damping member 207 is attached to the tip of the quartz rod 204 to reduce the ultrasonic energy transmitted from the vicinity of the tip of the quartz rod 204 to the cleaning liquid 208, so that the substrate 1 near the tip of the quartz rod 204 is reduced. Since excessive ultrasonic energy is not applied to the substrate 1, the elements formed on the substrate 1 in this region are not damaged by the ultrasonic energy. Thereafter, pure water is supplied from the nozzle 205 to ultrasonically clean the surface of the substrate 1 to remove the cleaning liquid 208 remaining on the surface of the substrate 1.
[0073]
As described above, after the contact hole 17 having a high aspect ratio is formed in the silicon oxide film 16 on the substrate 1, the chemical action of the cleaning liquid 208 (SC-1 solution) and the mechanical action of the ultrasonic wave are used together to form the substrate 1. By cleaning, it is possible to efficiently remove foreign matter remaining in the contact hole 17 having a high aspect ratio, which is difficult to remove by brush cleaning. In addition, since the cleaning liquid 208 is not heated, the surface of the substrate 1 exposed at the bottom of the contact hole 17 can be prevented from being shaved by the cleaning liquid 208, so that deterioration of element characteristics can be prevented. Furthermore, by using the ultrasonic cleaning apparatus 200 having the above-described structure, excessive ultrasonic energy is not applied to a part of the surface of the substrate 1, so that the element is damaged by a part of the surface of the substrate 1. I do not receive it.
[0074]
Next, as shown in FIG. 19, a wiring metal film 18a is deposited on the silicon oxide film 16 including the inside of the contact hole 17 by using a sputtering method or the like. The wiring metal film 18a is composed of an Al alloy film or a composite metal film in which a Ti film or a TiN film is stacked below and above an Al alloy film.
[0075]
Next, the substrate 1 is cleaned in order to remove metal-based foreign substances and the like attached to the surface of the wiring metal film 18a in the above-described sputtering process. When the surface (uppermost layer) of the wiring metal film 18a is made of a hydrophilic metal material such as an Al alloy, brush cleaning with high cleaning ability is suitable for this cleaning. As the cleaning liquid, pure water is mainly used to prevent a reaction with the wiring metal film 18a. Examples of the metal material having high hydrophilicity include Cu, W, Mo, and Ti in addition to Al. Even when the surface (uppermost layer) of the wiring metal film 18a is made of a highly hydrophilic metal material, the wiring metal film 18a has a large surface step, that is, the aspect ratio of the surface step is 2 or more. In such a case, it is better to perform ultrasonic cleaning instead of brush cleaning.
[0076]
On the other hand, when the surface (uppermost layer) of the wiring metal film 18a is composed of a TiN film, such as a composite metal film in which a TiN film is laminated on a lower layer and an upper layer of an Al alloy film, TiN has high hydrophobicity. When brush cleaning is performed, the surface of the brush is shaved and foreign matter is easily generated. Accordingly, in this case, the use of the ultrasonic cleaning device 100 shown in FIGS. 6 and 7 or the ultrasonic cleaning device 200 shown in FIGS. 15 and 16 can obtain a higher foreign matter removing effect. Although not a metal material, polycrystalline silicon is also highly hydrophobic. Therefore, even when cleaning the surface of an electrode wiring formed of a polycrystalline silicon film, the ultrasonic cleaning apparatus 100 shown in FIGS. The use of the ultrasonic cleaning device 200 shown in FIGS. 15 and 16 can achieve a higher foreign matter removing effect than brush cleaning.
[0077]
Next, as shown in FIG. 20, after forming a photoresist film 32 on the wiring metal film 18a, the wiring metal film 18a is dry-etched using the photoresist film 32 as a mask, thereby forming a silicon oxide film. A first-layer metal wiring 18 made of a wiring metal film 18a is formed on the upper part of the metal wiring 18.
[0078]
Next, as shown in FIG. 21, the photoresist film 32 on the metal wiring 18 is removed by ashing or the like. When the photoresist film 32 is removed, a residue obtained when the wiring metal film 18a is dry-etched adheres to the surface of the silicon oxide film 16. In addition, residues from the removal of the photoresist film 32 adhere to the surface of the silicon oxide film 16 and the surface of the metal wiring 18.
[0079]
Therefore, these foreign substances are removed by using the ultrasonic cleaning apparatus 100 shown in FIGS. 6 and 7 and the ultrasonic cleaning apparatus 200 shown in FIGS. 15 and 16.
[0080]
Next, as shown in FIG. 22, a silicon oxide film 19 is deposited on the metal wiring 18 by the CVD method, and subsequently, cleaning for removing foreign substances on the surface of the silicon oxide film 19 is performed. Since silicon oxide is hydrophilic, this cleaning is performed by a brush cleaning method with high foreign matter removal efficiency. Examples of the insulating film material having high hydrophilicity include, in addition to silicon oxide, an organic glass-based insulating material such as HSQ (hydrogen silsesquioxane) or MSQ (methyl silsesquioxane), a silicon oxide-based insulating material such as BPSG, SOG, or silicon carbide. can do. Note that even when the interlayer insulating film is formed of an insulating material having high hydrophilicity, if the surface step of the film is large, that is, if the aspect ratio of the surface step is 2 or more, instead of brush cleaning, It is better to perform ultrasonic cleaning.
[0081]
On the other hand, a hydrophobic film such as silicon nitride or a low-dielectric-constant insulating material (Low-k film) having a porous inside to lower the dielectric constant is a flat film having an aspect ratio of a surface step of less than 2. Even so, it is better to perform ultrasonic cleaning.
[0082]
Next, as shown in FIG. 23, after a photoresist film 33 is formed on the silicon oxide film 19, the silicon oxide film 19 on the metal wiring 18 is dry-etched by using the photoresist film 33 as a mask. Then, a through hole 20 is formed above the metal wiring 18.
[0083]
Next, as shown in FIG. 24, the photoresist film 33 on the silicon oxide film 19 is removed by ashing (ashing) or the like. When the photoresist film 33 is removed, a residue obtained when the silicon oxide film 19 is dry-etched or a residue obtained when the photoresist film 33 is removed adheres to the inside of the through hole 20. In addition, a residue from the removal of the photoresist film 33 adheres to the surface of the silicon oxide film 19. At this time, by performing cleaning using the ultrasonic cleaning device 100 or the ultrasonic cleaning device 200, foreign substances on the surface of the silicon oxide film 19 including the inside of the through hole 20 can be efficiently removed.
[0084]
Next, as shown in FIG. 25, a wiring metal film 21a is deposited on the silicon oxide film 19 including the inside of the through hole 20 by using a sputtering method or the like. The wiring metal film 21a is composed of an Al alloy film or a composite metal film in which a Ti film or a TiN film is stacked below and above an Al alloy film.
[0085]
Next, the substrate 1 is cleaned in order to remove metal-based foreign matter and the like attached to the surface of the wiring metal film 21a in the above-described sputtering process. In this cleaning, like the wiring metal film 18a, if the surface of the wiring metal film 21a is hydrophilic, brush cleaning having a high cleaning ability is suitable, and if the surface is hydrophobic, the brush cleaning is performed. An ultrasonic cleaning device 100 or an ultrasonic cleaning device 200 is used.
[0086]
Next, as shown in FIG. 26, after a photoresist film 34 is formed on the wiring metal film 21a, the wiring metal film 21a is dry-etched using the photoresist film 34 as a mask to form a silicon oxide film. A second-layer metal wiring 21 composed of a wiring metal film 21a is formed on the upper part of the metal wiring 21.
[0087]
Thereafter, when the wiring metal film 21a is dry-etched by the same cleaning as that when the first-layer metal wiring 18 is formed, that is, cleaning using the ultrasonic cleaning device 100 or the ultrasonic cleaning device 200. The residue and the residue when the photoresist film 33 is removed are removed.
[0088]
Thereafter, by repeating the above steps, an interlayer insulating film and a wiring are alternately formed above the second-layer metal wiring 21, thereby completing the CMOS-LSI of the present embodiment.
[0089]
As described above, the invention made by the inventor has been specifically described based on the embodiment of the invention. However, the invention is not limited to the embodiment, and can be variously modified without departing from the gist of the invention. Needless to say, there is.
[0090]
In the first embodiment, the ultrasonic energy transmitted from the vicinity of the distal end portion to the cleaning liquid 108 is reduced by providing the groove 107 near the distal end portion of the quartz rod 104. For example, as shown in FIG. By extending the tip of the quartz rod 104 to the outside of the substrate 1, the strong ultrasonic energy generated at the tip of the quartz rod 104 may not reach the substrate 1.
[0091]
The means for weakening the ultrasonic energy at the distal end of the quartz rod 104 and the means for weakening the ultrasonic energy at the peripheral portion of the substrate 1 disclosed in the present application may be modified by appropriately changing the combination thereof or used alone. Is also good.
[0092]
In addition, it is optional to change the detailed configuration of the ultrasonic cleaning apparatus (100 or 200) without departing from the gist of the present invention. For example, as shown in FIG. In 100, when a dam 109 for storing the cleaning liquid 108 is attached below the vicinity of the base of the quartz rod 104, the region where the ultrasonic energy transmitted to the cleaning liquid 108 becomes higher moves further outward than the peripheral edge of the substrate 1, Since a sufficient amount of the cleaning liquid 108 can be supplied to the peripheral portion of the substrate 1, it is possible to prevent excessive ultrasonic energy from being applied to the peripheral portion of the substrate 1 and simultaneously clean the side surface of the substrate 1. Although not shown, a cleaning liquid supply unit may be provided on the back side of the wafer stage 101 to prevent foreign matter removed on the front side of the substrate from adhering to the back side.
[0093]
【The invention's effect】
The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.
[0094]
By preventing the ultrasonic energy from becoming strong in a specific region of the main surface of the substrate, it becomes possible to perform ultrasonic cleaning with reduced damage to the LSI pattern while maintaining high cleaning performance.
[Brief description of the drawings]
FIG. 1 is a fragmentary cross-sectional view of a semiconductor substrate, illustrating a method of manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention.
FIG. 2 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 3 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 4 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 5 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 6 is a schematic side view showing a single-wafer ultrasonic cleaning apparatus used in one embodiment of the present invention.
FIG. 7 is a schematic plan view showing a first single-wafer ultrasonic cleaning apparatus used in one embodiment of the present invention.
8 is an enlarged plan view showing a part of the first single-wafer ultrasonic cleaning apparatus shown in FIG. 6;
FIG. 9 is an enlarged plan view showing a part of the single-wafer ultrasonic cleaning apparatus shown in FIG. 6;
10 is a schematic side view illustrating a cleaning method using the single-wafer ultrasonic cleaning apparatus shown in FIG.
11 is a schematic plan view illustrating a cleaning method using the single-wafer ultrasonic cleaning apparatus shown in FIG.
FIG. 12 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 13 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 14 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 15 is a schematic side view showing a second single-wafer ultrasonic cleaning apparatus used in one embodiment of the present invention.
FIG. 16 is a schematic plan view showing a second single-wafer ultrasonic cleaning apparatus used in one embodiment of the present invention.
17 is a schematic side view illustrating a cleaning method using the single-wafer ultrasonic cleaning apparatus shown in FIG.
18 is a schematic plan view illustrating a cleaning method using the single-wafer ultrasonic cleaning apparatus shown in FIG.
FIG. 19 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 20 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 21 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 22 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 23 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 24 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 25 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 26 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating the method for manufacturing the semiconductor integrated circuit device according to one embodiment of the present invention;
FIG. 27 is a schematic plan view showing another single-wafer ultrasonic cleaning apparatus used in the present invention.
FIG. 28 is a schematic side view showing another single-wafer ultrasonic cleaning apparatus used in the present invention.
[Explanation of symbols]
1 semiconductor substrate (wafer)
2 Element isolation groove
3 Silicon oxide film
4 p-type wells
5 n-type well
6 Gate oxide film
7a Conductive film for gate electrode
7 Gate electrode
8 n ⁻ Semiconductor region
9 p ⁻ Semiconductor region
10 Sidewall spacer
11 n ⁺ Semiconductor region (source, drain)
12 p ⁺ Semiconductor region (source, drain)
16 Silicon oxide film
17 Contact hole
18a Metal film for wiring
18 metal wiring
19 silicon oxide film
20 Through hole
21a Metal film for wiring
21 Metal wiring
30-34 Photoresist film
100 Ultrasonic cleaning equipment
101 wafer stage
102 Wafer chuck
103 transducer
104 quartz rod
105, 106 nozzles
107 grooves
108 cleaning liquid
109 Dam
200 Ultrasonic cleaning equipment
201 wafer stage
202 Wafer chuck
202a step
203 transducer
204 quartz rod
205 nozzle
207 Damping member
208 cleaning liquid
Qn n-channel type MISFET
Qp p-channel type MISFET

Claims (16)

A method for manufacturing a semiconductor integrated circuit device including the following steps:
(A) forming a connection hole having an aspect ratio of 2 or more in a first insulating film on a main surface of a semiconductor wafer;
(B) a step of ultrasonic cleaning the main surface of the semiconductor wafer in which the connection holes are formed. Prior to the step (a) or after the step (b),
(C) forming a hydrophilic film having a surface step having an aspect ratio of less than 2 on the main surface of the semiconductor wafer;
(D) brush cleaning the surface of the hydrophilic film,
2. The method for manufacturing a semiconductor integrated circuit device according to claim 1, further comprising: 2. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the main surface of the semiconductor wafer is subjected to ultrasonic cleaning by a single wafer method. A method for manufacturing a semiconductor integrated circuit device, comprising: a step of ultrasonically cleaning a main surface of a semiconductor wafer by a single wafer method using a cleaning liquid involving a chemical reaction of the main surface or a film formed on the main surface. 5. The method according to claim 4, wherein ultrasonic energy is applied to the entire main surface of the semiconductor wafer. A method for manufacturing a semiconductor integrated circuit device including the following steps:
(A) forming a connection hole having an aspect ratio of 2 or more in a first insulating film on a main surface of a semiconductor wafer;
(B) a step of ultrasonically cleaning the main surface of the semiconductor wafer in which the connection holes are formed while applying ultrasonic energy to the entire main surface. 7. The method for manufacturing a semiconductor integrated circuit device according to claim 6, wherein the main surface of the semiconductor wafer is subjected to ultrasonic cleaning by a single wafer method. A method for manufacturing a semiconductor integrated circuit device including the following steps:
(A) forming a hydrophilic film on the main surface of the semiconductor wafer;
(B) brush cleaning the surface of the hydrophilic film;
(C) forming a hydrophobic film on the main surface of the semiconductor wafer prior to (a) or after (b);
(D) ultrasonic cleaning the surface of the hydrophobic film. 9. The method according to claim 8, wherein the surface of the hydrophobic film has a step having an aspect ratio of 2 or more. 9. The method according to claim 8, wherein the surface of the hydrophilic film has a step having an aspect ratio of less than 2. 9. The method of manufacturing a semiconductor integrated circuit device according to claim 8, wherein the main surface of the semiconductor wafer is subjected to ultrasonic cleaning by a single wafer method. A wafer stage that horizontally supports the semiconductor wafer, a cleaning liquid supply unit that supplies a cleaning liquid onto a main surface of the semiconductor wafer supported by the wafer stage, and an ultrasonic transmission unit that includes an ultrasonic generation source; By contacting the ultrasonic transmission means with the cleaning liquid supplied on the main surface of the semiconductor wafer, using an ultrasonic cleaning apparatus that applies ultrasonic energy to the main surface of the semiconductor wafer through the cleaning liquid. A method for manufacturing a semiconductor integrated circuit device including a step of ultrasonically cleaning a main surface of the semiconductor wafer,
The ultrasonic cleaning apparatus includes a second cleaning liquid supply unit that supplies the cleaning liquid to the vicinity of the peripheral portion of the semiconductor wafer supported by the wafer stage and the ultrasonic transmission unit located near the peripheral portion. A method of manufacturing a semiconductor integrated circuit device. A wafer stage that horizontally supports the semiconductor wafer, a cleaning liquid supply unit that supplies a cleaning liquid onto a main surface of the semiconductor wafer supported by the wafer stage, and an ultrasonic transmission unit that includes an ultrasonic generation source; By contacting the ultrasonic transmission means with the cleaning liquid supplied on the main surface of the semiconductor wafer, using an ultrasonic cleaning device that applies ultrasonic waves to the main surface of the semiconductor wafer through the cleaning liquid. A method for manufacturing a semiconductor integrated circuit device including a step of ultrasonically cleaning a main surface of a semiconductor wafer,
A method of manufacturing a semiconductor integrated circuit device, comprising: attaching an ultrasonic energy attenuating means made of a material having an acoustic impedance different from a material constituting the ultrasonic transmitting means main body to a tip portion of the ultrasonic transmitting means. A wafer stage that horizontally supports the semiconductor wafer, a cleaning liquid supply unit that supplies a cleaning liquid onto a main surface of the semiconductor wafer supported by the wafer stage, and an ultrasonic transmission unit that includes an ultrasonic generation source; By contacting the ultrasonic transmission means with the cleaning liquid supplied on the main surface of the semiconductor wafer, using an ultrasonic cleaning device that applies ultrasonic waves to the main surface of the semiconductor wafer through the cleaning liquid. A method for manufacturing a semiconductor integrated circuit device including a step of ultrasonically cleaning a main surface of a semiconductor wafer,
A method for manufacturing a semiconductor integrated circuit device, characterized in that a groove for reducing the energy of ultrasonic waves applied to the cleaning liquid from the vicinity of the tip is provided near the tip of the ultrasonic transmission means. A wafer stage that horizontally supports the semiconductor wafer, a cleaning liquid supply unit that supplies a cleaning liquid onto a main surface of the semiconductor wafer supported by the wafer stage, and an ultrasonic transmission unit that includes an ultrasonic generation source; By contacting the ultrasonic transmission means with the cleaning liquid supplied on the main surface of the semiconductor wafer, using an ultrasonic cleaning device that applies ultrasonic waves to the main surface of the semiconductor wafer through the cleaning liquid. A method for manufacturing a semiconductor integrated circuit device including a step of ultrasonically cleaning a main surface of a semiconductor wafer,
The peripheral edge of the wafer stage extends outward from the peripheral edge of the semiconductor wafer supported by the wafer stage, and the height of the surface of the peripheral edge of the wafer stage is supported by the wafer stage. A method of manufacturing a semiconductor integrated circuit device, wherein the height of the semiconductor wafer is substantially equal to the height of the main surface of the semiconductor wafer. A wafer stage that horizontally supports the semiconductor wafer, a cleaning liquid supply unit that supplies a cleaning liquid onto a main surface of the semiconductor wafer supported by the wafer stage, and an ultrasonic transmission unit that includes an ultrasonic generation source; By contacting the ultrasonic transmission means with the cleaning liquid supplied on the main surface of the semiconductor wafer, using an ultrasonic cleaning device that applies ultrasonic waves to the main surface of the semiconductor wafer through the cleaning liquid. A method for manufacturing a semiconductor integrated circuit device including a step of ultrasonically cleaning a main surface of a semiconductor wafer,
When the ultrasonic transmission means is brought into contact with the cleaning liquid supplied on the main surface of the semiconductor wafer, the tip of the ultrasonic transmission means is located outside the peripheral edge of the semiconductor wafer. Of manufacturing a semiconductor integrated circuit device.

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