JP2004015298A - Solid-state imaging device and its driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a solid-state imaging sensor, in which a plurality of data having different accumulation times can be taken out, without including time shift and maximum accumulation time can be set equal to the full length of one frame. <P>SOLUTION: The potential of a photodiode 10 is detected with amplifying transistor 30 by a source follower and oupt to an A/D converter 80 for converting an analog signal into a digital signal. The output operation of the amplification transistor 30 is controlled by means of an output selecting transistor 40 and an output reset transistor 50. The input-side state of the amplification transistor 30 is sustained by source follower characteristics, without being affected by the variation of load on the output side, and the charges of the photodiode 10 will not be destroyed. Multiplex exposures are realized by performing data detecting operation of different accumulation time a plurality of number of times, while sustaining single time exposure. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a solid-state imaging device having a pixel structure in which an A / D converter is provided in each pixel of a two-dimensional pixel array forming an imaging area, and a driving method thereof.
[0002]
[Prior art]
As a conventional structure for reading out signal charges of a photodiode, there is known a structure disclosed in “FIGURE 10” (hereinafter referred to as a document) of US Pat. No. 6,369,737 B1.
FIG. 5 is a circuit diagram showing a circuit disclosed in this document.
This circuit is configured by a comparator (M9 to M17, M21) 102 and a latch (M18 to M20) 104 for converting an analog signal read out from photodiodes D0 to D3 constituting four pixels via MOS transistors M1 to M8. A / D converter 100 converts the signal into a digital signal.
[0003]
[Problems to be solved by the invention]
However, in the related art according to the above-mentioned document, in order to share one A / D converter 100 for four pixels and to realize a simultaneous shutter in a frame, the photodiodes D0 to D3 and the A / D converter 100 are used. Switches (M1 to M4) are provided between the input terminals.
However, the reading of signal charges through such a switch is a destructive reading, so that a plurality of accumulation times cannot be realized in one frame. Different frames of data must be used.
Therefore,
(1) a large time lag between a plurality of accumulation time data;
(2) The maximum storage time that can be set in one frame cannot be set to the full length of one frame, and the sensitivity is reduced accordingly.
There was a problem.
[0004]
Therefore, an object of the present invention is to provide a solid-state imaging device capable of extracting a plurality of pieces of data having different accumulation times without including a time lag and setting a maximum accumulation time to the full length of one frame, and a driving method thereof. Is to provide.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, a solid-state imaging device of the present invention has one or more photoelectric conversion units each including a photoelectric conversion unit that generates a signal charge according to a received light amount, and a reading unit that reads out a potential of the photoelectric conversion unit as a pixel signal. A pixel and an A / D converter for converting an analog pixel signal from the readout unit into a digital pixel signal corresponding to one pixel or a plurality of pixels, wherein the readout unit is connected via a source follower circuit A pixel signal is output to an A / D converter.
[0006]
The present invention also provides one or more pixels including a photoelectric conversion unit that generates a signal charge according to a received light amount, a reading unit that reads out the potential of the photoelectric conversion unit as a pixel signal, and one pixel or a plurality of pixels. And an A / D converter for converting an analog pixel signal from the readout unit into a digital pixel signal in correspondence with the above-described method, wherein the pixel output from the readout unit to the A / D converter is provided. A signal is output to an A / D converter via a source follower circuit.
[0007]
Further, according to the present invention, in an electronic apparatus having an imaging unit using a solid-state imaging device, the solid-state imaging device includes a photoelectric conversion unit that generates a signal charge corresponding to a received light amount, and a readout that reads a potential of the photoelectric conversion unit as a pixel signal. And an A / D converter for converting an analog pixel signal from the readout unit into a digital pixel signal corresponding to one pixel or a plurality of pixels, the readout unit comprising: Outputs a pixel signal to an A / D converter via a source follower circuit.
[0008]
In the solid-state imaging device and the method of driving the same according to the present invention, the pixel signal from the photoelectric conversion unit is read out to the A / D converter via the source follower circuit, so that the signal is not destroyed on the photoelectric conversion unit side. / D converter can be output.
Therefore, by repeatedly performing output and reset by the source follower circuit while the light receiving state of the photoelectric conversion unit is maintained, a plurality of pixel signals having different charge accumulation periods can be output.
As a result, a plurality of data having different accumulation times can be taken out without including a time lag, and the maximum accumulation time can be set to the full length of one frame by continuing the light receiving state. It is possible to perform shooting in a wide dynamic range.
Further, for various electronic devices such as a camera device and a portable communication terminal on which such a solid-state imaging device is mounted, the imaging function can be improved, and the product value can be improved.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a solid-state imaging device and a driving method thereof according to the present invention will be described.
In this embodiment mode, in a pixel structure having an A / D converter in a pixel, data reading is performed in a non-destructive manner by guiding the potential of the photodiode to the input of the A / D converter via a source follower circuit. For example, simultaneous multiple exposure can be realized.
[0010]
FIG. 1 is a circuit diagram showing a pixel structure of a CMOS image sensor according to a first embodiment of the present invention.
This CMOS image sensor is an area sensor having an imaging area in which a large number of pixels are provided in a two-dimensional array, and the element structure in each pixel is configured as shown in FIG.
That is, each pixel includes a photodiode 10 as a photoelectric conversion element, a pixel reset transistor 20, an amplification transistor 30, an output selection transistor 40, an output reset transistor 50, a pixel selection transistor 60, a capacitor 70, An A / D converter 80 is provided.
In this example, the capacitor 70 and the A / D converter 80 are shared by four adjacent pixels, and the pixel selection transistors 61, 62, and 63 of the other pixels are provided on the input side of the capacitor 70. It is connected.
[0011]
The photodiode 10 generates a signal charge according to the amount of received light, and the signal charge is input to the gate of the amplification transistor 30.
The amplification transistor 30 detects a change in the gate potential due to the signal charge from the photodiode 10 and outputs a signal corresponding to the potential. As shown in the figure, a source follower circuit having the source side as the output is provided. Make up.
The output selection transistor 40 is inserted between the drain of the amplification transistor 30 and the power supply voltage Vdd, and controls execution of the output operation of the amplification transistor 30 by inputting the output selection signal SFACT.
[0012]
The output reset transistor 50 is inserted between the drain of the amplification transistor 30 and the ground voltage GND, and resets the output operation of the amplification transistor 30 in response to the input of the output reset signal SFRST.
The pixel reset transistor 20 resets the signal charge of the photodiode 10 to the power supply voltage Vdd in response to the input of the pixel reset signal PRST. In this example, the pixel reset transistor 20 is configured by a PMOS transistor.
The pixel selection transistor 60 connects the output of the amplification transistor 30 to the A / D converter 80 in response to the input of the pixel selection signal PSEL.
The capacitor 70 is for removing components such as noise contained in the output of the amplification transistor 30, and the A / D converter 80 is provided with analog to digital output of the amplification transistor 30.
[0013]
FIG. 2 is a timing chart showing operation timing in the pixel having the above-described configuration.
Hereinafter, an operation in the case of capturing image signals with different accumulation times 1 and 2 will be described with reference to FIGS. 1 and 2.
First, at the beginning of the accumulation time 1, the potential of the photodiode 10 is reset to the power supply voltage Vdd by the pixel reset signal PRST. At this time, one pixel (one-fourth of all pixels) among the four pixels is connected to the A / D converter 80 by the PSEL signal.
Further, after resetting the output of the source follower circuit (amplifying transistor) 30 by the SFRST signal, the reset level is read by the SFACT signal and A / D converted. This result is output for each row and stored in, for example, a frame memory (not shown).
If the same operation is performed four times while changing the pixel selected by the PSEL signal, the reset levels of all the pixels are stored in the frame memory.
[0014]
Next, at the end of the accumulation period 1, one pixel (one-fourth of all pixels) of the four-pixel sharing is selected again by the PSEL signal, the source follower output is reset by the SFRST signal, and then the data is transmitted by the SFACT signal. Is output to the A / D converter 80 side.
The data (signal level) read here is compared with the data (reset level) obtained immediately after the reset, and the difference signal obtained by subtracting them is the actual image data. With such an operation, it is possible to remove the inter-pixel variation component. This operation is also performed four times by changing the pixel selected by the PSEL signal.
In such an operation, the state of the input side of the amplification transistor 30 is maintained without being affected by the load fluctuation on the output side due to the characteristics of the source follower, and the charge of the photodiode 10 is not destroyed. Can continue.
Therefore, charge accumulation is continued until the accumulation time 2, and at the end of the accumulation period 2 or at the end of the accumulation time 3 (not shown), data is read out by the same operation. It is possible to collect image data based on a plurality of accumulation periods by one exposure operation.
[0015]
The following operations can be realized by the above operations.
(1) Data for a plurality of accumulation periods can be extracted without causing a time lag between the data.
(2) The longest accumulation time that can be set in one frame can be set to the full length of one frame.
(3) Simultaneous shutter for all pixels of the stored image can be realized.
(4) KTC noise of the photodiode can be removed by CDS (correlated double sampling).
[0016]
FIG. 3 is a circuit diagram showing a pixel structure of a CMOS image sensor according to a second embodiment of the present invention, and FIG. 4 is a timing chart showing operation timings of the pixel shown in FIG. 1 and 2 are denoted by the same reference numerals.
This example is a structure for preventing the above-described reset level of the pixel from being stored in the frame memory.
It is characterized in that a clamp capacitor 90 is interposed between the output of the source follower circuit (amplifying transistor) 30 and the input of the A / D converter 80.
Further, the A / D converter 80 of the present example includes a comparator 81 and a latch circuit 82, similarly to the conventional example (FIG. 5) of the above-mentioned document.
The comparator 81 compares the pixel signal input via the clamp capacitor 90 with the ramp signal RAMP. A transistor 83 is inserted in the negative feedback loop of the comparator 81, and a reset signal ADRST for A / D conversion is input.
The latch circuit 82 turns on and off the output state of the clock BITX based on the comparison output of the comparator 81.
In such a circuit, the ON / OFF timing of the comparison result is determined according to the level of the pixel signal, the number of clocks from the latch circuit 82 changes, and the pixel signal level is converted to the number of clocks.
[0017]
Hereinafter, the operation in the case of capturing image signals with different accumulation times 1 and 2 will be described with reference to FIGS.
First, similarly to the first embodiment, the photodiode 10 is reset by the PRST signal. At the same time, the output of the source follower circuit (amplifying transistor) 30 is reset by the SFRST signal, and thereafter, the reset level is read by the SFACT signal.
Here, the value of the ramp signal RAMP of the A / D converter 80 is set to the maximum value of the A / D conversion range in accordance with the reset level read timing.
In this case, the left side (input side) of the clamp capacitor 90 includes the variation of the reset level between the pixels, but the right side (output side) of the clamp capacitor 90 can be aligned with all the pixels. Need not be stored in the frame memory.
[0018]
At the end of the accumulation period 1, the output of the source follower circuit 30 is reset by the SFRST signal, and then the data (signal level) is output to the left side of the clamp capacitor 90 by the SFACT signal.
Accordingly, the input potential to the right side of the clamp capacitor 90, that is, the input potential to the A / D converter 80 changes, and only the change (data having no reset level variation) is output as the A / D conversion result data. .
At this time, the charge of the photodiode 10 is not destroyed, so that the accumulation time can be continued. At the end of the accumulation period 2 and at the end of the accumulation period longer than that, the data may be similarly read.
[0019]
The following operations can be realized by the above operations.
(1) Data for a plurality of accumulation periods can be extracted without causing a time lag between the data.
(2) The longest accumulation time that can be set in one frame can be set to the full length of one frame.
(3) Simultaneous shutter for all pixels of the stored image can be realized.
(4) KTC noise of the photodiode can be removed by CDS (correlated double sampling).
[0020]
Although each of the examples has been described with reference to the case of a CMOS image sensor, the present invention is applicable to various solid-state imaging devices having similar element structures.
In the above description, the element structure and the driving method of the CMOS image sensor alone have been described. However, the same element structure and the driving method may be applied to the imaging units of various electronic devices such as various digital camera devices, portable communication terminals and personal computers. The present invention can contribute to the improvement of the functions of these electronic devices by applying to the electronic devices. Therefore, electronic devices having a solid-state imaging device employing the element structure and the driving method as described above are also included in the scope of the present invention. Shall be included.
[0021]
【The invention's effect】
As described above, according to the solid-state imaging device and the driving method of the present invention, the pixel signal by the photoelectric conversion unit is read out to the A / D converter via the source follower circuit, so that the photoelectric conversion unit side The output to the A / D converter can be performed without causing signal destruction, and the output and reset by the source follower circuit are repeatedly performed while the light receiving state of the photoelectric conversion unit is continued, so that the charge accumulation period differs. A plurality of pixel signals can be output.
Therefore, a plurality of data having different accumulation times can be taken out without including a time lag, and the maximum accumulation time can be set to the full length of one frame by continuing the light receiving state. It is possible to perform shooting in a wide dynamic range.
Further, for various electronic devices such as a camera device and a portable communication terminal on which such a solid-state imaging device is mounted, the imaging function can be improved, and the product value can be improved.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a pixel structure of a CMOS image sensor according to a first embodiment of the present invention;
FIG. 2 is a timing chart showing operation timings of the pixel shown in FIG.
FIG. 3 is a circuit diagram showing a pixel structure of a CMOS image sensor according to a second embodiment of the present invention;
FIG. 4 is a timing chart showing operation timings of the pixel shown in FIG.
FIG. 5 is a circuit diagram showing a conventional technique for reading signal charges of a photodiode.
[Explanation of symbols]
10 Photodiode, 20 Pixel reset transistor, 30 Amplification transistor, 40 Output selection transistor, 50 Output reset transistor, 60 Pixel selection transistor, 70 Capacitor, 80 A / D converter, 81 comparator, 82 latch circuit, 90 clamp capacitor.

Claims (11)

One or more pixels having a photoelectric conversion unit that generates a signal charge corresponding to the amount of received light, a reading unit that reads out the potential of the photoelectric conversion unit as a pixel signal, and one or more pixels corresponding to one or more pixels. An A / D converter for converting an analog pixel signal from the reading unit into a digital pixel signal,
The reading unit outputs a pixel signal to an A / D converter via a source follower circuit;
A solid-state imaging device characterized by the above-mentioned. 2. The solid-state imaging device according to claim 1, wherein a clamp capacitor for clamping a DC level of an output signal of the source follower circuit is provided between the source follower circuit and the A / D converter. The read unit includes an amplification transistor that forms a source follower circuit, an output selection transistor that controls an output operation of the amplification transistor, and an output reset transistor that resets an output of the amplification transistor. 2. The solid-state imaging device according to 1. The solid-state imaging device according to claim 1, wherein the A / D converter includes a comparator and a latch circuit. 2. The solid-state imaging device according to claim 1, wherein the A / D converter is provided corresponding to a plurality of pixels, and includes a selection transistor that selectively connects the plurality of pixels to the A / D converter. One or more pixels having a photoelectric conversion unit that generates a signal charge corresponding to the amount of received light, a reading unit that reads out the potential of the photoelectric conversion unit as a pixel signal, and one or more pixels corresponding to one or more pixels. A method for driving a solid-state imaging device, comprising: an A / D converter that converts an analog pixel signal from a readout unit into a digital pixel signal;
Outputting a pixel signal output from the readout unit to the A / D converter to the A / D converter via a source follower circuit;
A method for driving a solid-state imaging device. 7. The method according to claim 6, wherein a DC level of an output signal of the source follower circuit is clamped by providing a clamp capacitor between the source follower circuit and an A / D converter. . 7. The method according to claim 6, wherein a plurality of pixel signals having different charge accumulation periods are output by repeatedly performing output and reset by the source follower circuit while the light receiving state of the photoelectric conversion unit is continued. A method for driving a solid-state imaging device. By obtaining a difference between a reset level detected immediately after resetting of the source follower circuit and a signal level detected after a predetermined charge accumulation time, a pixel signal in which variation in characteristics of a photoelectric conversion unit is removed is obtained. The driving method of a solid-state imaging device according to claim 6, wherein In an electronic device having an imaging unit using a solid-state imaging device,
The solid-state imaging device includes one or more pixels including a photoelectric conversion unit that generates a signal charge corresponding to a received light amount, a readout unit that reads a potential of the photoelectric conversion unit as a pixel signal, and one or more pixels. An A / D converter that converts an analog pixel signal from the readout unit into a digital pixel signal corresponding to a pixel;
The reading unit outputs a pixel signal to an A / D converter via a source follower circuit;
Electronic equipment characterized by the above. 11. The electronic apparatus according to claim 10, wherein a clamp capacitor for clamping a DC level of an output signal of the source follower circuit is provided between the source follower circuit and the A / D converter of the solid-state imaging device.

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