JP2004014778A5 - - Google Patents
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- JP2004014778A5 JP2004014778A5 JP2002165632A JP2002165632A JP2004014778A5 JP 2004014778 A5 JP2004014778 A5 JP 2004014778A5 JP 2002165632 A JP2002165632 A JP 2002165632A JP 2002165632 A JP2002165632 A JP 2002165632A JP 2004014778 A5 JP2004014778 A5 JP 2004014778A5
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- JP
- Japan
- Prior art keywords
- electrode
- semiconductor device
- bump
- wiring electrode
- passivation film
- Prior art date
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Claims (5)
前記バンプ電極の電極表面には、前記半導体装置に設けられた配線電極上のパッシベーション膜に形成された凹凸形状に倣って形成された前記配線電極と導通する複数の凹部が設けられ、
前記凹部は、電極表面側の凹部開口側面積が凹部底面側面積より大きいことを特徴とする半導体装置。A semiconductor device having a bump electrode,
On the electrode surface of the bump electrode, there are provided a plurality of recesses that are electrically connected to the wiring electrode formed in accordance with the concavo-convex shape formed on the passivation film on the wiring electrode provided in the semiconductor device,
The recess has a recess opening side area on the electrode surface side larger than the recess bottom side area.
前記バンプ電極の電極表面には、前記半導体装置に設けられた配線電極上のパッシベーション膜に形成された凹凸形状に倣って形成された前記配線電極と導通する複数の凹部が、同心状に設けられ、
前記凹部は、電極表面側の凹部開口側面積が凹部底面側面積より大きいことを特徴とする半導体装置。A semiconductor device having a bump electrode,
On the electrode surface of the bump electrode, there are concentrically provided a plurality of recesses that are electrically connected to the wiring electrode formed following the uneven shape formed on the passivation film on the wiring electrode provided in the semiconductor device. ,
The recess has a recess opening side area on the electrode surface side larger than the recess bottom side area.
前記バンプ電極の電極表面には、前記半導体装置の配線電極上のパッシベーション膜に形成された凹凸形状に倣って形成された凹凸部が設けられ、
前記凹凸部の凹部は、前記半導体装置に設けた配線電極に導通され、前記凹部の電極表面側の凹部開口側面積が、凹部底面側面積より大きく形成され、
前記電極表面側の凹部の差し渡し寸法が、前記導電性粒子の平均粒径より小さく設定されていることを特徴とする半導体装置。A semiconductor device having a bump electrode that is connected to an electrode on a mounting substrate side through an anisotropic conductive film containing conductive particles so as to be conductive,
On the electrode surface of the bump electrode, an uneven portion formed following the uneven shape formed in the passivation film on the wiring electrode of the semiconductor device is provided,
The concave portion of the concavo-convex portion is electrically connected to a wiring electrode provided in the semiconductor device, and the concave opening side area on the electrode surface side of the concave portion is formed larger than the concave bottom surface side area,
The semiconductor device according to claim 1, wherein a passing dimension of the concave portion on the electrode surface side is set smaller than an average particle diameter of the conductive particles.
前記半導体装置の配線電極上に設けたパッシベーション膜に、パッシベーション膜表面側の開口面積が、配線電極側の開口面積より大きくなるように、前記配線電極上に通じる孔部を設ける工程と、
前記配線電極上に、前記孔部を介して前記配線電極側に導通可能に前記孔部の段差に倣ったバンプ電極を形成する工程とを有することを特徴とする半導体装置の製造方法。A method of manufacturing a semiconductor device having a bump electrode,
Providing a hole communicating with the wiring electrode in the passivation film provided on the wiring electrode of the semiconductor device so that an opening area on the surface of the passivation film is larger than an opening area on the wiring electrode side;
Forming a bump electrode that follows the step of the hole so as to be conductive to the wiring electrode through the hole . The method for manufacturing a semiconductor device comprises:
前記半導体装置の配線電極上に設けたパッシベーション膜に、等方性エッチング処理を施して、前記配線電極上に、断面錐状または断面台形状のパッシベーション膜を断続的に残す工程と、
前記配線電極上に、断面錐状あるいは断面台形状のパッシベーション膜を断続的に残した状態で、前記配線電極上に、前記断面錐状あるいは断面台形状に倣ったバンプ下地金属層を設ける工程と、
前記バンプ下地金属層上に、メッキによりバンプ電極を形成する工程とを有することを特徴とする半導体装置の製造方法。A method of manufacturing a semiconductor device having a bump electrode,
A step of subjecting the passivation film provided on the wiring electrode of the semiconductor device to an isotropic etching process to intermittently leave a passivation film having a truncated cone shape or a trapezoidal shape on the wiring electrode;
Providing a bump base metal layer following the cross-sectional cone or trapezoidal shape on the wiring electrode in a state where the passivation film having a cross-sectional cone or trapezoidal shape is intermittently left on the wiring electrode; ,
And a step of forming a bump electrode by plating on the bump base metal layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002165632A JP3970694B2 (en) | 2002-06-06 | 2002-06-06 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002165632A JP3970694B2 (en) | 2002-06-06 | 2002-06-06 | Semiconductor device and manufacturing method thereof |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004014778A JP2004014778A (en) | 2004-01-15 |
| JP2004014778A5 true JP2004014778A5 (en) | 2005-09-29 |
| JP3970694B2 JP3970694B2 (en) | 2007-09-05 |
Family
ID=30433423
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002165632A Expired - Fee Related JP3970694B2 (en) | 2002-06-06 | 2002-06-06 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3970694B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7952206B2 (en) * | 2005-09-27 | 2011-05-31 | Agere Systems Inc. | Solder bump structure for flip chip semiconductor devices and method of manufacture therefore |
| JP2009054833A (en) * | 2007-08-28 | 2009-03-12 | Seiko Epson Corp | Ectronic device and its manufacturing emthod, electrooptical device, and electronic device |
| US9184144B2 (en) | 2011-07-21 | 2015-11-10 | Qualcomm Incorporated | Interconnect pillars with directed compliance geometry |
| CN104112682A (en) * | 2014-07-03 | 2014-10-22 | 上海交通大学 | Solid-state ultrasonic bonding method based on nickel microneedle cones of the same structure |
-
2002
- 2002-06-06 JP JP2002165632A patent/JP3970694B2/en not_active Expired - Fee Related
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