JP2003510686A5 - - Google Patents
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- JP2003510686A5 JP2003510686A5 JP2001525542A JP2001525542A JP2003510686A5 JP 2003510686 A5 JP2003510686 A5 JP 2003510686A5 JP 2001525542 A JP2001525542 A JP 2001525542A JP 2001525542 A JP2001525542 A JP 2001525542A JP 2003510686 A5 JP2003510686 A5 JP 2003510686A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/399,281 | 1999-09-17 | ||
US09/399,281 US6938094B1 (en) | 1999-09-17 | 1999-09-17 | Virtual channels and corresponding buffer allocations for deadlock-free computer system operation |
PCT/US2000/012574 WO2001022247A1 (en) | 1999-09-17 | 2000-05-09 | Virtual channels and corresponding buffer allocations for deadlock-free computer system operation |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2003510686A JP2003510686A (ja) | 2003-03-18 |
JP2003510686A5 true JP2003510686A5 (ja) | 2007-05-31 |
JP4410967B2 JP4410967B2 (ja) | 2010-02-10 |
Family
ID=23578934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001525542A Expired - Lifetime JP4410967B2 (ja) | 1999-09-17 | 2000-05-09 | デッドロックのないコンピュータシステム動作のためのバーチャルチャネルおよび対応するバッファ割当て |
Country Status (6)
Country | Link |
---|---|
US (1) | US6938094B1 (ja) |
EP (1) | EP1222558B1 (ja) |
JP (1) | JP4410967B2 (ja) |
KR (1) | KR100643873B1 (ja) |
DE (1) | DE60003834T2 (ja) |
WO (1) | WO2001022247A1 (ja) |
Families Citing this family (26)
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US7230917B1 (en) * | 2001-02-22 | 2007-06-12 | Cisco Technology, Inc. | Apparatus and technique for conveying per-channel flow control information to a forwarding engine of an intermediate network node |
US7152128B2 (en) | 2001-08-24 | 2006-12-19 | Intel Corporation | General input/output architecture, protocol and related methods to manage data integrity |
US9836424B2 (en) | 2001-08-24 | 2017-12-05 | Intel Corporation | General input/output architecture, protocol and related methods to implement flow control |
US7979573B2 (en) * | 2002-05-15 | 2011-07-12 | Broadcom Corporation | Smart routing between peers in a point-to-point link based system |
US7447872B2 (en) * | 2002-05-30 | 2008-11-04 | Cisco Technology, Inc. | Inter-chip processor control plane communication |
US20040122973A1 (en) * | 2002-12-19 | 2004-06-24 | Advanced Micro Devices, Inc. | System and method for programming hyper transport routing tables on multiprocessor systems |
JP4891521B2 (ja) | 2003-03-28 | 2012-03-07 | 三洋電機株式会社 | データ入出力方法、およびその方法を利用可能な記憶装置およびホスト装置 |
US7386626B2 (en) * | 2003-06-23 | 2008-06-10 | Newisys, Inc. | Bandwidth, framing and error detection in communications between multi-processor clusters of multi-cluster computer systems |
US7395347B2 (en) * | 2003-08-05 | 2008-07-01 | Newisys, Inc, | Communication between and within multi-processor clusters of multi-cluster computer systems |
US7949782B2 (en) * | 2003-11-06 | 2011-05-24 | Qualcomm Incorporated | Extended link monitoring channel for 10 Gb/s Ethernet |
US7480784B2 (en) | 2005-08-12 | 2009-01-20 | Advanced Micro Devices, Inc. | Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU) |
US7516247B2 (en) | 2005-08-12 | 2009-04-07 | Advanced Micro Devices, Inc. | Avoiding silent data corruption and data leakage in a virtual environment with multiple guests |
US7793067B2 (en) * | 2005-08-12 | 2010-09-07 | Globalfoundries Inc. | Translation data prefetch in an IOMMU |
US7543131B2 (en) | 2005-08-12 | 2009-06-02 | Advanced Micro Devices, Inc. | Controlling an I/O MMU |
US9053072B2 (en) * | 2007-01-25 | 2015-06-09 | Hewlett-Packard Development Company, L.P. | End node transactions at threshold-partial fullness of storage space |
US7809006B2 (en) * | 2007-08-16 | 2010-10-05 | D. E. Shaw Research, Llc | Routing with virtual channels |
JP5119882B2 (ja) * | 2007-11-21 | 2013-01-16 | 富士通株式会社 | メモリクロック設定機能を有する情報処理装置およびメモリクロック設定方法 |
US7562168B1 (en) | 2008-05-29 | 2009-07-14 | International Business Machines Corporation | Method of optimizing buffer usage of virtual channels of a physical communication link and apparatuses for performing the same |
KR101250666B1 (ko) * | 2009-01-30 | 2013-04-03 | 후지쯔 가부시끼가이샤 | 정보 처리 시스템, 정보 처리 장치, 정보 처리 장치의 제어 방법, 및 컴퓨터 판독 가능한 기록 매체 |
WO2012127619A1 (ja) * | 2011-03-22 | 2012-09-27 | 富士通株式会社 | 並列計算機システム及び並列計算機システムの制御方法 |
US8631212B2 (en) | 2011-09-25 | 2014-01-14 | Advanced Micro Devices, Inc. | Input/output memory management unit with protection mode for preventing memory access by I/O devices |
US9007962B2 (en) | 2013-01-24 | 2015-04-14 | International Business Machines Corporation | Deadlock-free routing using edge-disjoint sub-networks |
US9552045B2 (en) | 2014-03-20 | 2017-01-24 | Intel Corporation | Method, apparatus, and system for controlling power consumption of unused hardware of a link interface |
US20160188519A1 (en) * | 2014-12-27 | 2016-06-30 | Intel Corporation | Method, apparatus, system for embedded stream lanes in a high-performance interconnect |
US10075383B2 (en) | 2016-03-30 | 2018-09-11 | Advanced Micro Devices, Inc. | Self-timed router with virtual channel control |
US11238041B2 (en) | 2020-03-25 | 2022-02-01 | Ocient Holdings LLC | Facilitating query executions via dynamic data block routing |
Family Cites Families (37)
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US4905231A (en) | 1988-05-03 | 1990-02-27 | American Telephone And Telegraph Company, At&T Bell Laboratories | Multi-media virtual circuit |
GB8915136D0 (en) | 1989-06-30 | 1989-08-23 | Inmos Ltd | Method for controlling communication between computers |
WO1993023810A1 (en) | 1992-05-12 | 1993-11-25 | Seiko Epson Corporation | Scalable coprocessor |
US5533198A (en) | 1992-11-30 | 1996-07-02 | Cray Research, Inc. | Direction order priority routing of packets between nodes in a networked system |
US6157967A (en) | 1992-12-17 | 2000-12-05 | Tandem Computer Incorporated | Method of data communication flow control in a data processing system using busy/ready commands |
KR100304063B1 (ko) | 1993-08-04 | 2001-11-22 | 썬 마이크로시스템즈, 인코포레이티드 | 2지점간상호접속통신유틸리티 |
US5583990A (en) | 1993-12-10 | 1996-12-10 | Cray Research, Inc. | System for allocating messages between virtual channels to avoid deadlock and to optimize the amount of message traffic on each type of virtual channel |
US5613129A (en) | 1994-05-02 | 1997-03-18 | Digital Equipment Corporation | Adaptive mechanism for efficient interrupt processing |
FI98774C (fi) * | 1994-05-24 | 1997-08-11 | Nokia Telecommunications Oy | Menetelmä ja laitteisto liikenteen priorisoimiseksi ATM-verkossa |
JPH08185380A (ja) | 1994-12-28 | 1996-07-16 | Hitachi Ltd | 並列計算機 |
US5659796A (en) * | 1995-04-13 | 1997-08-19 | Cray Research, Inc. | System for randomly modifying virtual channel allocation and accepting the random modification based on the cost function |
US5978359A (en) | 1995-07-19 | 1999-11-02 | Fujitsu Network Communications, Inc. | Allocated and dynamic switch flow control |
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US6055618A (en) * | 1995-10-31 | 2000-04-25 | Cray Research, Inc. | Virtual maintenance network in multiprocessing system having a non-flow controlled virtual maintenance channel |
US6094431A (en) * | 1995-11-30 | 2000-07-25 | Kabushiki Kaisha Toshiba | Node device and network resource reservation method for data packet transfer using ATM networks |
US5848068A (en) | 1996-03-07 | 1998-12-08 | Lsi Logic Corporation | ATM communication system interconnect/termination unit |
US5748900A (en) | 1996-03-13 | 1998-05-05 | Cray Research, Inc. | Adaptive congestion control mechanism for modular computer networks |
JPH09293015A (ja) | 1996-04-24 | 1997-11-11 | Mitsubishi Electric Corp | メモリシステムおよびそれに用いられる半導体記憶装置 |
US5749095A (en) | 1996-07-01 | 1998-05-05 | Sun Microsystems, Inc. | Multiprocessing system configured to perform efficient write operations |
US5892970A (en) | 1996-07-01 | 1999-04-06 | Sun Microsystems, Inc. | Multiprocessing system configured to perform efficient block copy operations |
US5881316A (en) | 1996-11-12 | 1999-03-09 | Hewlett-Packard Company | Dynamic allocation of queue space using counters |
US5996013A (en) * | 1997-04-30 | 1999-11-30 | International Business Machines Corporation | Method and apparatus for resource allocation with guarantees |
US6122700A (en) | 1997-06-26 | 2000-09-19 | Ncr Corporation | Apparatus and method for reducing interrupt density in computer systems by storing one or more interrupt events received at a first device in a memory and issuing an interrupt upon occurrence of a first predefined event |
US6005851A (en) * | 1997-10-10 | 1999-12-21 | Nortel Networks Corporation | Adaptive channel control for data service delivery |
US6014690A (en) * | 1997-10-24 | 2000-01-11 | Digital Equipment Corporation | Employing multiple channels for deadlock avoidance in a cache coherency protocol |
US6279084B1 (en) | 1997-10-24 | 2001-08-21 | Compaq Computer Corporation | Shadow commands to optimize sequencing of requests in a switch-based multi-processor system |
US6101420A (en) * | 1997-10-24 | 2000-08-08 | Compaq Computer Corporation | Method and apparatus for disambiguating change-to-dirty commands in a switch based multi-processing system with coarse directories |
US6094686A (en) * | 1997-10-24 | 2000-07-25 | Compaq Computer Corporation | Multi-processor system for transferring data without incurring deadlock using hierarchical virtual channels |
GB9809183D0 (en) | 1998-04-29 | 1998-07-01 | Sgs Thomson Microelectronics | Microcomputer with interrupt packets |
US6370621B1 (en) | 1998-12-21 | 2002-04-09 | Advanced Micro Devices, Inc. | Memory cancel response optionally cancelling memory controller's providing of data in response to a read operation |
US6205508B1 (en) | 1999-02-16 | 2001-03-20 | Advanced Micro Devices, Inc. | Method for distributing interrupts in a multi-processor system |
US6449267B1 (en) * | 1999-02-24 | 2002-09-10 | Hughes Electronics Corporation | Method and apparatus for medium access control from integrated services packet-switched satellite networks |
US6370600B1 (en) | 1999-05-25 | 2002-04-09 | Advanced Micro Devices, Inc. | Staging buffer for translating clock domains when source clock frequency exceeds target clock frequency |
US6389526B1 (en) | 1999-08-24 | 2002-05-14 | Advanced Micro Devices, Inc. | Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system |
US6484220B1 (en) | 1999-08-26 | 2002-11-19 | International Business Machines Corporation | Transfer of data between processors in a multi-processor system |
GB2360168B (en) | 2000-03-11 | 2003-07-16 | 3Com Corp | Network switch including hysteresis in signalling fullness of transmit queues |
US6715055B1 (en) | 2001-10-15 | 2004-03-30 | Advanced Micro Devices, Inc. | Apparatus and method for allocating buffer space |
-
1999
- 1999-09-17 US US09/399,281 patent/US6938094B1/en not_active Expired - Lifetime
-
2000
- 2000-05-09 EP EP00932185A patent/EP1222558B1/en not_active Expired - Lifetime
- 2000-05-09 DE DE60003834T patent/DE60003834T2/de not_active Expired - Lifetime
- 2000-05-09 KR KR1020027003545A patent/KR100643873B1/ko active IP Right Grant
- 2000-05-09 JP JP2001525542A patent/JP4410967B2/ja not_active Expired - Lifetime
- 2000-05-09 WO PCT/US2000/012574 patent/WO2001022247A1/en active IP Right Grant