JP2003347293A - Glass and semiconductor device - Google Patents

Glass and semiconductor device

Info

Publication number
JP2003347293A
JP2003347293A JP2002158518A JP2002158518A JP2003347293A JP 2003347293 A JP2003347293 A JP 2003347293A JP 2002158518 A JP2002158518 A JP 2002158518A JP 2002158518 A JP2002158518 A JP 2002158518A JP 2003347293 A JP2003347293 A JP 2003347293A
Authority
JP
Japan
Prior art keywords
glass
weight
semiconductor layer
semiconductor device
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002158518A
Other languages
Japanese (ja)
Inventor
Fumihiro Honma
史浩 本間
Akihito Tanifuji
昭仁 谷藤
Takasato Hinuma
孝吏 日沼
Atsushi Sasaki
敦 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP2002158518A priority Critical patent/JP2003347293A/en
Publication of JP2003347293A publication Critical patent/JP2003347293A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C8/00Enamels; Glazes; Fusion seal compositions being frit compositions having non-frit additions
    • C03C8/02Frit compositions, i.e. in a powdered or comminuted form
    • C03C8/10Frit compositions, i.e. in a powdered or comminuted form containing lead
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/02Surface treatment of glass, not in the form of fibres or filaments, by coating with glass

Landscapes

  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Glass Compositions (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a semiconductor device having high reliability in conduction. <P>SOLUTION: Glass is provided which contains a silicon dioxide by 49 wt.% or more and 55 wt.% or less, a lead oxide by 40 wt.% or more and 46 wt.% or less, and an aluminum oxide by 3 wt.% or more and 7 wt.% or less. When a glass layer 17 for covering a PN junction is formed by using such glass to obtain the semiconductor device 10, the device suffers from only the small leakage of a current that flows in a reverse direction during current application under high temperature conditions. In the case that the burning temperature of the glass is 850°C or more and 880°C or below, the semiconductor device 10 attains particularly high conduction reliability. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ガラスの製造技術
に関し、特に、半導体装置のパッシベーション膜を構成
するガラスを製造する技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a glass manufacturing technique, and more particularly to a glass manufacturing technique for forming a passivation film of a semiconductor device.

【0002】[0002]

【従来の技術】図6の符号101は従来技術の半導体装
置の一例を示している。この半導体装置101は、オー
ミック接続層112と、第一の半導体層113と、第二
の半導体層114と、ガラス部材117とを有してい
る。各層112〜114はそれぞれ所定厚に形成されて
おり、オーミック接続層112と、第一の半導体層11
3と、第二の半導体層114はその順番に積層されてい
る。
2. Description of the Related Art Reference numeral 101 in FIG. 6 shows an example of a conventional semiconductor device. The semiconductor device 101 has an ohmic connection layer 112, a first semiconductor layer 113, a second semiconductor layer 114, and a glass member 117. Each of the layers 112 to 114 is formed to have a predetermined thickness, and includes the ohmic connection layer 112 and the first semiconductor layer 11.
3 and the second semiconductor layer 114 are stacked in that order.

【0003】オーミック接続層112の導電型はN+
であり、第一の半導体層113の導電型はN-型にあ
り、第二の半導体層114の導電型はP型である。従っ
て、第一の半導体層113と第二の半導体層114との
界面にはPN接合が形成されている。
The conductivity type of the ohmic connection layer 112 is N + type, the conductivity type of the first semiconductor layer 113 is N type, and the conductivity type of the second semiconductor layer 114 is P type. Therefore, a PN junction is formed at the interface between the first semiconductor layer 113 and the second semiconductor layer 114.

【0004】ここでは、オーミック接続層112と第一
の半導体層113はそれぞれ正方形又は長方形になって
おり、第二の半導体層114の周囲は切り欠かれ、第二
の半導体層114はオーミック接続層112及び第一の
半導体層113の面積よりも小さな正方形又は長方形に
なっている。
Here, the ohmic connection layer 112 and the first semiconductor layer 113 are each formed in a square or a rectangle, the periphery of the second semiconductor layer 114 is cut out, and the second semiconductor layer 114 is formed as an ohmic connection layer. It is a square or rectangle smaller than the area of the first semiconductor layer 113 and the first semiconductor layer 113.

【0005】その切り欠きは第一の半導体層113の上
端部分まで及んでおり、その切り欠き部分に第一の半導
体層113と第二の半導体層114との界面、即ち、P
N接合が露出するようになっている。ガラス部材117
は切り欠き上に配置されており、PN接合の露出部分は
ガラス部材117によって覆われ、外部雰囲気から遮断
されている。
[0005] The notch extends to the upper end of the first semiconductor layer 113, and the interface between the first semiconductor layer 113 and the second semiconductor layer 114, that is, P
The N junction is exposed. Glass member 117
Is disposed on the notch, and the exposed portion of the PN junction is covered by the glass member 117 and is shielded from the external atmosphere.

【0006】第二の半導体層114の表面と、オーミッ
ク接続層112の表面にはそれぞれ半田金属からなる電
極121、122が形成されており、第二の半導体層1
14の表面に形成された電極121に正の電圧を印加
し、オーミック接続層112の表面に形成された電極1
22に負の電圧を印加すると、PN接合が順バイアスさ
れ、電極121、122間に電流が流れるが、第二の半
導体層114の表面に形成された電極121に負の電圧
を印加し、オーミック接続層112の表面に形成された
電極に正の電圧を印加すると、PN接合が逆バイアスさ
れ、測定下限以下の電流しか逆方向に流れないようにな
っている。しかしながら、従来の半導体装置101で
は、高温条件で通電すると逆方向に流れる電流(漏れ電
流)が大きくなり、不都合が生じるという問題があっ
た。
Electrodes 121 and 122 made of solder metal are formed on the surface of the second semiconductor layer 114 and the surface of the ohmic connection layer 112, respectively.
14, a positive voltage is applied to the electrode 121 formed on the surface of the ohmic connection layer 112.
When a negative voltage is applied to the electrode 22, the PN junction is forward-biased and a current flows between the electrodes 121 and 122. However, when a negative voltage is applied to the electrode 121 formed on the surface of the second semiconductor layer 114 and the ohmic When a positive voltage is applied to the electrode formed on the surface of the connection layer 112, the PN junction is reverse-biased, and only a current equal to or less than the lower limit of measurement flows in the reverse direction. However, the conventional semiconductor device 101 has a problem in that when current is supplied under high-temperature conditions, a current (leakage current) flowing in the reverse direction increases, which causes a problem.

【0007】[0007]

【発明が解決しようとする課題】本発明は上記従来技術
の不都合を解決するために創作されたものであり、その
目的は、導通信頼性の高い半導体装置を製造することで
ある。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned disadvantages of the prior art, and an object thereof is to manufacture a semiconductor device having high conduction reliability.

【0008】[0008]

【課題を解決するための手段】本発明者等が、半導体装
置の漏れ電流を小さくするためにガラス部材を構成する
ガラスの組成や配合割合について検討を行ったところ、
二酸化ケイ素が49重量%以上55重量%以下含有さ
れ、酸化鉛が40重量%以上46重量%以下含有され、
酸化アルミニウムが3重量%以上7重量%以下含有され
たガラスでガラス部材を構成すれば、高温条件でも半導
体装置の漏れ電流が小さくなることがわかった。
Means for Solving the Problems The present inventors have studied the composition and mixing ratio of the glass constituting the glass member in order to reduce the leakage current of the semiconductor device.
Silicon dioxide is contained in an amount of 49% by weight or more and 55% by weight or less, and lead oxide is contained in an amount of 40% by weight or more and 46% by weight or less,
It has been found that when the glass member is made of glass containing aluminum oxide in a content of 3% by weight or more and 7% by weight or less, the leakage current of the semiconductor device is reduced even under a high temperature condition.

【0009】かかる知見に基いてなされた請求項1記載
の発明は二酸化ケイ素が49重量%以上55重量%以下
含有され、酸化鉛が40重量%以上46重量%以下含有
され、酸化アルミニウムが3重量%以上7重量%以下含
有されたガラスである。請求項2記載の発明は、請求項
1記載のガラスであって、850℃以上880℃以下の
温度で焼成されたガラスである。請求項3記載の発明
は、第一導電型の第一半導体層と、前記第一半導体層と
PN接合を形成する第二導電型の第二の半導体層と、前
記第一の半導体層表面から掘削され、前記第二の半導体
層に達するリング状の溝と、前記溝内に配置され、前記
溝内に露出するPN接合を覆うガラス部材を有する半導
体装置であって、前記ガラス部材は二酸化ケイ素が49
重量%以上55重量%以下含有され、酸化鉛が40重量
%以上46重量%以下含有され、酸化アルミニウムが3
重量%以上7重量%以下含有されたガラスによって構成
された半導体装置である。
The invention according to claim 1, which has been made based on such findings, contains silicon dioxide in an amount of 49% by weight to 55% by weight, lead oxide in an amount of 40% by weight to 46% by weight, and aluminum oxide in an amount of 3% by weight. % To 7% by weight. The invention according to claim 2 is the glass according to claim 1, wherein the glass is fired at a temperature of 850 ° C. or more and 880 ° C. or less. The invention according to claim 3 is characterized in that the first semiconductor layer of the first conductivity type, the second semiconductor layer of the second conductivity type forming a PN junction with the first semiconductor layer, and the surface of the first semiconductor layer. A semiconductor device having a ring-shaped groove excavated and reaching the second semiconductor layer, and a glass member disposed in the groove and covering a PN junction exposed in the groove, wherein the glass member is silicon dioxide. Is 49
% By weight, 55% by weight or less, 40% by weight or more and 46% by weight or less of lead oxide, and 3% by weight of aluminum oxide.
This is a semiconductor device made of glass containing not less than 7% by weight and not more than 7% by weight.

【0010】本発明のガラスを用いて、PN接合を被覆
するガラス部材を形成した場合、漏れ電流の小さい半導
体装置が得られる。特に、二酸化ケイ素が49重量%以
上55重量%以下含有され、酸化鉛が40重量%以上4
6重量%以下含有され、酸化アルミニウムが3重量%以
上7重量%以下含有され、かつ、アルカリ濃度が50p
pm以下であるガラスで半導体装置のガラス部材を構成
した場合、半導体装置の漏れ電流は非常に小さかった。
When a glass member covering a PN junction is formed using the glass of the present invention, a semiconductor device having a small leakage current can be obtained. In particular, silicon dioxide is contained in an amount of from 49% by weight to 55% by weight, and lead oxide is contained in an amount of from 40% by weight to 4% by weight.
6% by weight or less, aluminum oxide of 3% by weight or more and 7% by weight or less, and alkali concentration of 50 p
When the glass member of the semiconductor device was composed of glass of less than pm, the leakage current of the semiconductor device was very small.

【0011】[0011]

【発明の実施の形態】以下に本発明のガラスを用いた半
導体装置の製造工程を詳細に説明する。図1の符号11
はシリコンウェハを示しており、図2(a)は図1のA
−A切断線断面図を示している。シリコンウェハ11
は、オーミック接続層12と、第一の半導体層13と、
第二の半導体層14と、溝15とを有している。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The manufacturing process of a semiconductor device using the glass of the present invention will be described below in detail. Reference numeral 11 in FIG.
2A shows a silicon wafer, and FIG. 2A shows A in FIG.
FIG. 4 shows a cross-sectional view taken along the line A-A. Silicon wafer 11
Are the ohmic connection layer 12, the first semiconductor layer 13,
It has a second semiconductor layer 14 and a groove 15.

【0012】各層12〜14はそれぞれ所定厚に形成さ
れており、オーミック接続層12と第一の半導体層13
と第二の半導体層14はその順番に積層されている。こ
こでは、オーミック接続層12はN+型であり、第一の
半導体層13の導電型はN-型であり、第二の半導体層
14の導電型はP型である。従って、第一の半導体層1
3と、第二の半導体層14との界面にはPN接合が形成
されている。
Each of the layers 12 to 14 is formed to have a predetermined thickness, and the ohmic connection layer 12 and the first semiconductor layer 13 are formed.
And the second semiconductor layer 14 are stacked in that order. Here, the ohmic connection layer 12 is N + type, the conductivity type of the first semiconductor layer 13 is N type, and the conductivity type of the second semiconductor layer 14 is P type. Therefore, the first semiconductor layer 1
A PN junction is formed at the interface between 3 and the second semiconductor layer 14.

【0013】溝15は細長であり、シリコンウェハ11
の第二の半導体層14が形成された面に格子状に形成さ
れている。溝15の深さは第二の半導体層14の膜厚よ
りも深く、かつ、第二の半導体層14と第一の半導体層
13との合計膜厚よりも浅くなっているので、第二の半
導体層14と、第一、第二の半導体層13、14の界面
であるPN接合は溝15によって複数に分離され、溝1
5内には第一、第二の半導体層13、15と、PN接合
とが露出している。
The groove 15 is elongated, and the silicon wafer 11
Are formed in a lattice on the surface on which the second semiconductor layer 14 is formed. Since the depth of the groove 15 is deeper than the film thickness of the second semiconductor layer 14 and shallower than the total film thickness of the second semiconductor layer 14 and the first semiconductor layer 13, The PN junction, which is the interface between the semiconductor layer 14 and the first and second semiconductor layers 13 and 14, is separated into a plurality by a groove 15.
In 5, the first and second semiconductor layers 13 and 15 and the PN junction are exposed.

【0014】このシリコンウェハ11にガラス部材を形
成するためには、先ず、二酸化ケイ素(SiO2)と、
酸化鉛(PbO)と、酸化アルミニウム(Al23)を
それぞれ粉砕し、各粉砕物を二酸化ケイ素(SiO2
を49重量%以上55重量%以下、酸化鉛(PbO)を
40重量%以上46重量%以下、酸化アルミニウム(A
23)を3重量%以上7重量%以下の配合割合で混合
し、得られた混合物をるつぼに入れて加熱溶融する。次
いで、溶融した混合物をるつぼから取り出し、冷却によ
って固化させてガラス材料を得る。
In order to form a glass member on the silicon wafer 11, first, silicon dioxide (SiO 2 )
Lead oxide (PbO) and aluminum oxide (Al 2 O 3 ) are each pulverized, and each pulverized product is silicon dioxide (SiO 2 ).
From 49% by weight to 55% by weight, lead oxide (PbO) from 40% by weight to 46% by weight, aluminum oxide (A
l 2 O 3 ) is mixed at a mixing ratio of 3% by weight or more and 7% by weight or less, and the obtained mixture is put into a crucible and melted by heating. Next, the molten mixture is taken out of the crucible and solidified by cooling to obtain a glass material.

【0015】そのガラス材料を粉砕してガラスパウダー
を作製し、該ガラスパウダーを有機溶媒等の液体に分散
させて分散液を作製する。上述したシリコンウェハ11
を分散液に浸漬して電気泳動を行うと、溝15の内周面
に露出する第一、第二の半導体層13、14と、PN接
合のみにガラスが付着する。
The glass material is pulverized to produce a glass powder, and the glass powder is dispersed in a liquid such as an organic solvent to produce a dispersion. Silicon wafer 11 described above
Is immersed in the dispersion liquid to perform electrophoresis, glass adheres only to the first and second semiconductor layers 13 and 14 exposed on the inner peripheral surface of the groove 15 and the PN junction.

【0016】その状態のシリコンウェハ11を分散液か
ら引き上げた後、全体を850℃以上880℃以下の温
度に昇温させると、付着したガラスが焼成され、溝15
の内周面に露出する第一、第二の半導体層13、14
と、PN接合を覆う膜状のガラス部材が形成される。
After the silicon wafer 11 in this state is pulled out of the dispersion, the whole is heated to a temperature of 850 ° C. or more and 880 ° C. or less.
First and second semiconductor layers 13 and 14 exposed on the inner peripheral surface of
Then, a film-like glass member covering the PN junction is formed.

【0017】図2(b)の符号17はそのガラス部材を
示しており、このガラス部材17を構成するガラスは、
上述した混合物と同じ配合比率の二酸化ケイ素と、酸化
鉛と、酸化アルミニウムとで構成されている。上述した
ように、分散液中のガラスは溝15の内周面にのみ付着
するので、第二の半導体層14の表面のうち、溝14間
に位置する部分と、オーミック接続層12の表面はガラ
ス部材17から露出している。
Reference numeral 17 in FIG. 2B indicates the glass member, and the glass constituting the glass member 17 is as follows.
It is composed of silicon dioxide, lead oxide, and aluminum oxide in the same compounding ratio as the above-mentioned mixture. As described above, since the glass in the dispersion adheres only to the inner peripheral surface of the groove 15, the portion of the surface of the second semiconductor layer 14 located between the grooves 14 and the surface of the ohmic connection layer 12 It is exposed from the glass member 17.

【0018】その状態のオーミック層12表面と、第二
の半導体層14表面の溝15間に露出した部分に、金属
被膜(ここではニッケル被膜)と半田金属被膜からなる
電極をそれぞれ形成した後、溝15の底部を切断する
と、溝15で囲まれた領域が分離され、該領域からなる
ダイオード素子が得られる。
After forming electrodes made of a metal coating (here, nickel coating) and a solder metal coating on the surface of the ohmic layer 12 and the portion exposed between the grooves 15 on the surface of the second semiconductor layer 14 in that state, When the bottom of the groove 15 is cut, a region surrounded by the groove 15 is separated, and a diode element including the region is obtained.

【0019】図3の符号10はそのダイオード素子を示
している。このダイオード素子10の電極21、22を
それぞれ外部リード端子に接続し、ダイオード素子10
をプラスチックからなるモールド樹脂でモールドする。
このとき、PN接合はガラス部材17によって外部雰囲
気から遮断されているので、PN接合にモールド樹脂が
接触することがない。
Reference numeral 10 in FIG. 3 indicates the diode element. The electrodes 21 and 22 of the diode element 10 are connected to external lead terminals, respectively.
Is molded with a plastic molding resin.
At this time, since the PN junction is shielded from the external atmosphere by the glass member 17, the mold resin does not come into contact with the PN junction.

【0020】ダイオード素子10の第二の半導体層14
表面に形成された電極21をアノード電極とし、オーミ
ック接続層12表面に形成された電極22をカソード電
極とし、外部リード端子を介してアノード電極21に正
の電圧を印加し、カソード電極22に負の電圧を印加す
ると、PN接合が順バイアスされ、アノード電極21か
らカソード電極22に電流が流れるが、アノード電極2
1に負の電圧を印加し、カソード電極22に正の電圧を
印加すると、PN接合が逆バイアスされ電流が殆ど流れ
ない。また、このダイオード素子10は高温条件で電流
を流したときでも、逆方向に流れる漏れ電流が従来のも
のに比べて小さい。
Second semiconductor layer 14 of diode element 10
An electrode 21 formed on the surface is used as an anode electrode, an electrode 22 formed on the surface of the ohmic connection layer 12 is used as a cathode electrode, and a positive voltage is applied to the anode electrode 21 via an external lead terminal, and a negative voltage is applied to the cathode electrode 22. Is applied, the PN junction is forward-biased, and current flows from the anode electrode 21 to the cathode electrode 22.
When a negative voltage is applied to 1 and a positive voltage is applied to the cathode electrode 22, the PN junction is reverse-biased and almost no current flows. Further, even when a current flows under a high temperature condition, the diode element 10 has a smaller leakage current flowing in the reverse direction than the conventional one.

【0021】[0021]

【実施例】酸化鉛46重量部と、二酸化ケイ素49重量
部と、酸化アルミニウム5重量部とからなる混合物を用
いて、上記工程でガラス材料を作製し、該ガラス材料を
シリコンウェハ11に付着させ、860℃で焼成してガ
ラス部材17を形成する。次いで、上述した工程で金属
被膜と半田被膜とを形成した後、ダイシングによって
2.1mm角の正方形形状のダイオード素子10を切り
出した。
EXAMPLE A glass material was prepared in the above-mentioned process using a mixture of 46 parts by weight of lead oxide, 49 parts by weight of silicon dioxide, and 5 parts by weight of aluminum oxide, and the glass material was adhered to the silicon wafer 11. The glass member 17 is formed by firing at 860 ° C. Next, after a metal film and a solder film were formed in the above-described steps, a square 2.1 mm square diode element 10 was cut out by dicing.

【0022】このダイオード素子10を実施例とし、後
述する信頼性試験(BT試験、Bias Temper
ature試験)を行った。 〔BT試験〕175℃の温度条件でダイオード素子10
の電極21、22間に600Vの電圧を印加したとき
に、逆方向に流れる電流(漏れ電流、単位:mA)を測
定した。
Using this diode element 10 as an example, a reliability test (BT test, Bias Temper)
ature test). [BT test] Diode element 10 at 175 ° C temperature condition
When a voltage of 600 V was applied between the electrodes 21 and 22, the current flowing in the reverse direction (leakage current, unit: mA) was measured.

【0023】<比較例>酸化鉛48重量部と、二酸化ケ
イ素47重量部と、酸化アルミニウム5重量部とからな
る混合物を用いて上記実施例と同じ条件でガラス材料を
作製した。このガラス材料を用い、焼成温度を840℃
に変えた以外は上記実施例と同じ条件で比較例のダイオ
ード素子を作製し、このダイオード素子について上記実
施例と同じ条件でBT試験を行った。
<Comparative Example> A glass material was produced under the same conditions as in the above example using a mixture consisting of 48 parts by weight of lead oxide, 47 parts by weight of silicon dioxide, and 5 parts by weight of aluminum oxide. Using this glass material, the firing temperature is 840 ° C.
A diode element of a comparative example was manufactured under the same conditions as in the above example except that the above was changed to, and a BT test was performed on this diode element under the same conditions as in the above example.

【0024】図4、5は実施例と比較例のBT試験の測
定結果を表すグラフであり、図4、5の横軸は測定時間
(時間)を、縦軸は漏れ電流(mA)を示している。こ
こでは、1個から20個のダイオード素子を用いて測定
を行い、得られた20個の曲線を各図4、5に図示し
た。上記図4、5から明かなように、比較例のダイオー
ド素子では漏れ電流が非常に大きかったが、実施例は漏
れ電流が少なく、本発明のガラスでガラス部材を構成し
た場合の導通信頼性の高さが確認された。
FIGS. 4 and 5 are graphs showing the measurement results of the BT tests of the example and the comparative example. In FIGS. 4 and 5, the horizontal axis represents the measurement time (hour), and the vertical axis represents the leakage current (mA). ing. Here, measurement was performed using 1 to 20 diode elements, and the obtained 20 curves are shown in FIGS. As is clear from FIGS. 4 and 5, the leakage current was very large in the diode element of the comparative example, but the leakage current was small in the example and the conduction reliability when the glass member of the present invention was formed was used. The height was confirmed.

【0025】また、ガラスの配合比率や焼成温度を変え
てダイオード素子を作製し、それらのダイオード素子に
ついて上記と同じ条件でBT試験を行ったところ、焼成
温度が高くなる程漏れ電流が大きくなる傾向があること
が確認された。上記比較例では、ガラスの焼成温度が8
40℃と低かったにもかかわらず漏れ電流が大きかった
が、二酸化ケイ素が49重量%以上55重量%以下、酸
化鉛が40重量%以上46重量%以下、酸化アルミニウ
ムが3重量%以上7重量%以下の範囲にあるガラスで
は、焼成温度が880℃と高くても実用上充分な程度に
漏れ電流が少なかった。
Further, diode elements were manufactured by changing the mixing ratio of glass and the firing temperature, and a BT test was performed on these diode elements under the same conditions as described above. As a result, the higher the firing temperature, the larger the leakage current. It was confirmed that there was. In the above comparative example, the firing temperature of the glass was 8
Although the leakage current was large although it was as low as 40 ° C., silicon dioxide was 49% to 55% by weight, lead oxide was 40% to 46% by weight, and aluminum oxide was 3% to 7% by weight. In the glass in the following range, even when the firing temperature was as high as 880 ° C., the leakage current was small enough for practical use.

【0026】これらのことから、本発明のガラスでガラ
ス部材17を構成すれば、導通信頼性の高い半導体装置
が得られることがわかる。これとは別に、本発明のガラ
スのアルカリ濃度を変化させてダイオード素子10を作
製し、それらのダイオード素子10についてBT試験を
行ったところ、ガラスのアルカリ濃度が50ppmを超
えると、時間の経過と共に漏れ電流が大きくなった。こ
のとこから、本願発明のガラスのアルカリ濃度は50p
pm以下が好ましいことがわかる。
From these facts, it can be seen that a semiconductor device having high conduction reliability can be obtained if the glass member 17 is made of the glass of the present invention. Separately from this, the diode element 10 was manufactured by changing the alkali concentration of the glass of the present invention, and a BT test was performed on the diode element 10. When the alkali concentration of the glass exceeded 50 ppm, with the passage of time, The leakage current has increased. From this, the alkali concentration of the glass of the present invention is 50 p.
pm or less is preferable.

【0027】以上は、オーミック接続層12をN+型と
し、第二の半導体層14をP型とする場合について説明
したが、本発明はこれに限定されるものではなく、オー
ミック接続層12をP型とし、第二の半導体層14をN
+型とすることもできる。以上は、本発明のガラスを用
いてダイオード素子に用い、PN接合を被覆する場合に
ついて説明したが、本発明はこれに限定されるものでは
なく、例えば、本発明のガラスをトランジスタのガラス
被膜に用いることもできる。
The case where the ohmic connection layer 12 is N + type and the second semiconductor layer 14 is P type has been described above. However, the present invention is not limited to this. P type and the second semiconductor layer 14 is N
+ It can also be a type. The case where the glass of the present invention is used for a diode element to cover a PN junction has been described above, but the present invention is not limited to this. For example, the glass of the present invention is used for a glass coating of a transistor. It can also be used.

【0028】[0028]

【発明の効果】本発明のガラスを用いれば、導通信頼性
の高い半導体装置を製造することができる。
By using the glass of the present invention, a semiconductor device having high conduction reliability can be manufactured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】シリコンウェハの平面図FIG. 1 is a plan view of a silicon wafer.

【図2】(a)、(b):半導体装置の製造工程を説明
する断面図
FIGS. 2A and 2B are cross-sectional views illustrating manufacturing steps of a semiconductor device.

【図3】本発明の半導体装置の断面図FIG. 3 is a cross-sectional view of the semiconductor device of the present invention.

【図4】本願実施例のダイオード素子を用いたBT試験
のグラフ
FIG. 4 is a graph of a BT test using the diode element of the embodiment of the present application.

【図5】比較例のダイオード素子を用いたBT試験のグ
ラフ
FIG. 5 is a graph of a BT test using a diode element of a comparative example.

【図6】従来技術の半導体装置を説明する断面図FIG. 6 is a cross-sectional view illustrating a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

10……半導体装置 11……シリコンウェハ 12……第一の半導体層 13……第二の半導体層 15……溝 17……ガラス部材 10. Semiconductor device 11 Silicon wafer 12 First semiconductor layer 13 Second semiconductor layer 15 ... groove 17 Glass member

───────────────────────────────────────────────────── フロントページの続き (72)発明者 日沼 孝吏 秋田県本荘市大浦字上谷地114番2号 株 式会社秋田新電元大浦工場内 (72)発明者 佐々木 敦 秋田県本荘市大浦字上谷地114番2号 株 式会社秋田新電元大浦工場内 Fターム(参考) 4G062 AA09 BB04 CC08 DA05 DA06 DB03 DC01 DD01 DE01 DF05 EA01 EB01 EC01 ED01 EE01 EF01 EG01 FA01 FB01 FC01 FD01 FE01 FF01 FG01 FH01 FJ01 FK01 FL01 GA01 GB01 GC01 GD01 GE01 HH01 HH03 HH05 HH07 HH09 HH11 HH13 HH15 HH17 HH20 JJ01 JJ03 JJ05 JJ07 JJ10 KK01 KK03 KK05 KK07 KK10 MM08 MM11 MM35 MM36 NN32 NN34 NN40 5F058 BA05 BC05 BF42 BF80 BH01 BJ03    ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Takashi Hinuma             114-2, Kamiyachi, Oura, Honjo City, Akita Prefecture             Akita Shinden Moto Oura Plant (72) Inventor Atsushi Sasaki             114-2, Kamiyachi, Oura, Honjo City, Akita Prefecture             Akita Shinden Moto Oura Plant F term (reference) 4G062 AA09 BB04 CC08 DA05 DA06                       DB03 DC01 DD01 DE01 DF05                       EA01 EB01 EC01 ED01 EE01                       EF01 EG01 FA01 FB01 FC01                       FD01 FE01 FF01 FG01 FH01                       FJ01 FK01 FL01 GA01 GB01                       GC01 GD01 GE01 HH01 HH03                       HH05 HH07 HH09 HH11 HH13                       HH15 HH17 HH20 JJ01 JJ03                       JJ05 JJ07 JJ10 KK01 KK03                       KK05 KK07 KK10 MM08 MM11                       MM35 MM36 NN32 NN34 NN40                 5F058 BA05 BC05 BF42 BF80 BH01                       BJ03

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】二酸化ケイ素が49重量%以上55重量%
以下含有され、酸化鉛が40重量%以上46重量%以下
含有され、酸化アルミニウムが3重量%以上7重量%以
下含有された半導体被覆用ガラス。
(1) at least 49% by weight and 55% by weight of silicon dioxide;
The glass for semiconductor coating which contains the following, the lead oxide is contained 40 to 46 weight%, and the aluminum oxide is 3 to 7 weight%.
【請求項2】第一導電型の第一半導体層と、前記第一導
電体層の表面に位置し、前記第一半導体層とPN接合を
形成する第二導電型の第二の半導体層と、 前記第一の半導体層表面から掘削され、前記第二の半導
体層に底部が達するリング状の溝と、前記溝内に配置さ
れたガラス部材を有する半導体装置であって、 前記ガラス部材は二酸化ケイ素が49重量%以上55重
量%以下含有され、酸化鉛が40重量%以上46重量%
以下含有され、酸化アルミニウムが3重量%以上7重量
%以下含有されたガラスによって構成された半導体装
置。
2. A first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type located on the surface of the first conductor layer and forming a PN junction with the first semiconductor layer. A semiconductor device having a ring-shaped groove excavated from the surface of the first semiconductor layer and reaching a bottom portion of the second semiconductor layer, and a glass member disposed in the groove; Silicon is contained in an amount of 49% by weight or more and 55% by weight or less, and lead oxide is contained in an amount of 40% by weight or more and 46% by weight.
A semiconductor device comprising glass containing 3 wt% or more and 7 wt% or less of aluminum oxide.
【請求項3】前記半導体装置は、850℃以上880℃
以下の温度に昇温されることで前記ガラスが焼成された
請求項2記載の半導体装置。
3. The semiconductor device according to claim 1, wherein the semiconductor device is at 850.degree.
3. The semiconductor device according to claim 2, wherein the glass is baked by raising the temperature to the following temperature.
JP2002158518A 2002-05-31 2002-05-31 Glass and semiconductor device Pending JP2003347293A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002158518A JP2003347293A (en) 2002-05-31 2002-05-31 Glass and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002158518A JP2003347293A (en) 2002-05-31 2002-05-31 Glass and semiconductor device

Publications (1)

Publication Number Publication Date
JP2003347293A true JP2003347293A (en) 2003-12-05

Family

ID=29773746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002158518A Pending JP2003347293A (en) 2002-05-31 2002-05-31 Glass and semiconductor device

Country Status (1)

Country Link
JP (1) JP2003347293A (en)

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