JP2003346482A - Flash memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flash memory providing excellent data rewrite performance to a device by minimizing a write time so as to minimize a rewrite time of the flash memory used by a semiconductor disk. <P>SOLUTION: The flash memory stores a write pulse applied to a flash memory cell at writing of data to the flash memory to a nonvolatile memory other than the flash memory cell so as to minimize the write time. <P>COPYRIGHT: (C)2004,JPO

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention minimizes data write time by storing a write pulse applied to a flash memory cell in a nonvolatile memory separate from the flash memory cell when writing data to a flash memory. Flash memory.

[0002]

2. Description of the Related Art To write data to a flash memory cell of a flash memory, a write pulse is applied to the flash memory cell, charges are injected into the flash memory cell, and a value of data which is expected to have a threshold value of the flash memory cell is obtained. By doing so, data writing is performed. However, when data writing to the flash memory cell is insufficient, application of a write pulse and check of data in the flash memory cell are repeated until data is written to the flash memory cell up to a certain limit. In addition, as the number of times of rewriting of the flash memory increases, it becomes more difficult to inject charges into the flash memory cells, and therefore, the number of times of repeatedly applying a write pulse also increases. To minimize the write time of a flash memory, see Japanese Patent Application Laid-Open No. 2000-3484.
As described in JP-A-91, the time for writing data to the flash memory is minimized by varying the write voltage.

[0003]

In the above prior art, the writing time can be shortened by increasing the voltage of the writing pulse. There is a problem in that another problem occurs in that a storage element in a so-called depleted state occurs in which the threshold value of a storage element that should be 1.0 V becomes 0 V or less.

An object of the present invention is to provide a flash memory capable of minimizing a writing time without increasing a voltage of a writing pulse.

[0005] The depleted state is an excessive charge state of a flash memory cell. When the flash memory cell enters the depleted state, the value of an adjacent flash memory cell becomes abnormal.

[0006]

In order to achieve the above object, the present invention has a function of storing the number of write pulses to a flash memory cell at the time of rewriting data in the flash memory cell in a nonvolatile memory different from the flash memory. At the time of rewriting data in the flash memory cell, the number of previous write pulses is called from the non-volatile memory, and write pulses corresponding to the called write pulse number can be applied to the flash memory cell. This eliminates the need to check every time after the application of the write pulse to the flash memory cell, so that the write time can be minimized without increasing the voltage of the write pulse.

[0007]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
This will be described with reference to FIGS.

FIG. 1 is a block diagram of a data storage device according to one embodiment of the present invention. The data storage device 1 of this embodiment includes an input unit 2 to which output data from another device is supplied, and a CPU 3 that controls output data from the input unit 2 to record the data in a flash memory.
And an output unit 4 for supplying data output from the flash memory via the CPU 3 to another device, and a flash memory 5 as a memory.
The data is stored after F.

FIG. 2 shows a functional block diagram of the flash memory 5. The flash memory 5 includes an external interface 11, a write control unit 12, a write pulse generation unit 15, and a flash memory cell unit 16. The write control unit 12 includes a previous write pulse count storage unit (non-volatile memory cell) 13 and a write pulse limit value storage unit (non-volatile memory cell) 14.

FIG. 3 is a flow chart of the respective functions of the flash memory 5 shown in FIG. 2 when the flash memory is rewritten. The external interface 11 receives the "rewrite command" and "data to be rewritten" sent from the CPU 3 to the flash memory 5 (step S1). The external interface 11 writes a “rewrite command” and “data to be rewritten”
The write control unit 12 reads the “previous write pulse count” of the flash memory cell to be rewritten in the flash memory cell unit 16 from the previous write pulse count storage unit 13. The “initial value of the previous write pulse count” is 1, and the life of the rewrite count of the nonvolatile memory used in the previous write pulse count storage unit 13 is longer than that of the flash memory cell 13 (S2). Write pulses corresponding to the "number of previous write pulses" are applied from the write pulse generator 15 to the flash memory cells to be rewritten in the flash memory cell section 16 (S3). After the application, it is determined whether expected data has been written to the flash memory cell unit 16 (S4). If the data has been written, the data rewriting has been completed (S7). If the data has not been written in step S4, "a value obtained by adding 1 to the previous write pulse count" and the write pulse count limit value storage unit 1
4 is compared with the “write pulse number limit value”. The “write pulse count limit value” is a numerical value set by the device maker (S5). If the “numerical value obtained by adding 1 to the previous write pulse count” is larger than the “write pulse count limit value”, a data write disable signal is output from the flash memory 5 as data write disable (S6). In step S5, “the value obtained by adding 1 to the previous write pulse count” is “write pulse count limit value”.
In the following cases, a write pulse is applied once from the write pulse generator 15, and a value obtained by adding 1 to “the number of previous write pulses” is set as “the number of previous write pulses” to the previous write pulse number storage 13. Store (S
8). Thereafter, the process returns to step S4 to check whether the expected data has been written to the flash memory cell unit 16, and repeats until the data rewriting is completed (S7) or the data becomes unwritable (S6). CPU to the same flash memory cell in flash memory cell section 16
When the “rewrite command” is issued again from step 5, it is possible to collectively apply the “previous write pulse number” of rewrite pulses without checking whether the expected data has been written each time one write pulse is applied. (1) The data writing time can be shortened by the time for checking whether writing has been completed each time.

According to this embodiment, the rewriting time of the flash memory can be minimized, so that the data rewriting performance of the device is improved.

[0012]

According to the present invention, the writing time can be minimized, and the rewriting time of the flash memory used in the semiconductor disk can be minimized. However, a good flash memory can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of a semiconductor disk as a control device according to one embodiment of the present invention.

FIG. 2 is a functional block diagram of the flash memory according to the embodiment of the present invention;

FIG. 3 is a diagram showing the flash memory according to the embodiment of the present invention;
5 is a flowchart for explaining the operation of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Control device, 2 ... Input part, 3 ... CPU, 4 ... Output part,
5 flash memory, 11 external interface unit,
12: write control unit, 13: previous write pulse count storage unit, 14: write pulse count limit value storage unit, 1
5: Write pulse generator, 16: Flash memory cell

Claims (1)

[Claims] In a flash memory, a function of storing the number of write pulses to a flash memory cell in a nonvolatile memory different from the flash memory when rewriting data in the flash memory cell is provided. Call the number of write pulses from the non-volatile memory, apply the write pulses for the called write pulse number to the flash memory,
After writing with the previous write pulse count called from the nonvolatile memory, check whether the data written to the flash memory cell is written correctly.If the data cannot be written to the flash memory cell, the write pulse Is applied to the flash memory cell until data can be written.If the number of write pulses reaches the upper limit of the number of write pulses stored in the non-volatile memory different from the flash memory cell, the data is written to the flash memory cell. Flash memory characterized by stopping writing.