JP2003345288A - Video display device and video signal processing method used in the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a video display device capable of improving gradation continuity by adaptively smoothing a gradation characteristic from a low gradation part to intermediate and high gradation parts and effectively reducing the occurrence of pseudo contour-shaped image quality disturbance that is liable to be wholly conspicuous. <P>SOLUTION: A video signal processing circuit (first dither superimposing circuit) 100 adds a dither coefficient pattern to correct the gradation of a low gradation part of R, G and B signals. An inverted gamma correction circuit 200 applies inverted gamma correction processing. A video signal processing circuit (second dither superimposing circuit) 400 adds the dither coefficient pattern to an output of the inverted gamma correction circuit 200 to correct the gradation of intermediate and high gradation parts of the R, G and B signals. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video display device and a video signal processing method used for the same, and more particularly to a plasma display panel display device (PDP), a field emission display device (FED), a digital light processing projector (DLP). ), An electroluminescence display (EL), and the like, in a video display device that expresses digitally limited halftones, to improve grayscale characteristics when digitally limited halftones are expressed. The present invention relates to a video display device and a video signal processing method used therein.

[0002]

2. Description of the Related Art Among video display devices for displaying video signals,
For example, in a video display device such as a PDP that divides one field into a plurality of subfields for gradation display, or an EL or FED that performs gradation display by PWM modulation, a floor that is digitally limited depending on a driving method. Images can be expressed only in the key. Further, it is necessary to perform inverse gamma correction processing on the video signal to which the gamma characteristic has been applied to restore the linear gradation.

Therefore, in this type of image display device, when displaying an image with a digitally limited number of gradations, a straight line of gradation which is lost when inverse gamma correction processing is performed to return to a linear gradation. In order to smooth the property, the multi-gradation process is performed by using the dither method as an example.

In the multi-gradation processing by the dither method, a plurality of adjacent pixels (dots) is set as a set to form a dither matrix, and the intermediate gradation of the damaged gradation is divided into individual dither matrices. It is a general processing method to express with a dither coefficient. For example, when the video display device has only 6-bit gradation capability and the gradation display is performed by the upper 6 bits of 8-bit dot data, a dither matrix of 2 × 2 dots adjacent to each other is formed, and within the dither matrix, By superimposing the noise pattern for the lacking 2 bits, gradation display corresponding to 8 bits is performed by utilizing the visual integration effect.

As an example of a conventional video signal processing circuit for performing multi-gradation processing using the dither method, a prior application by the present applicant, Japanese Patent Application No. 10-315743 (Japanese Patent Laid-Open No. 2000-14).
8068). In this prior application, a video signal processing circuit that performs multi-gradation processing using the dither method is provided in the preceding stage of the inverse gamma correction circuit, and the video signal processing circuit divides the gradation of the video signal into a plurality of areas. , Adding an appropriate dither coefficient pattern for each of the plurality of regions.

[0006]

According to the video signal processing circuit described in the above-mentioned prior application, it is possible to effectively reduce the pseudo contour image quality disturbance in the low gradation part, but in the middle and high gradation parts. It was not possible to reduce the false contour image quality disturbance, which was insufficient to reduce the image quality disturbance of the entire image. In particular, in the middle and high gradation parts after the inverse gamma correction circuit performs the inverse gamma correction, the luminance step between adjacent gradations becomes large, and in the case of a PDP or the like in which gradation display is performed by dividing into a plurality of subfields, There is a problem that a pseudo contour image quality disturbance is likely to occur in a moving image depending on the selection condition of subfields between adjacent pixels in which high gradation parts are continuous.

The present invention has been made in view of the above problems, and it is possible to adaptively smooth the gradation characteristics from the low gradation portion to the middle and high gradation portions to improve the continuity of gradation. It is an object of the present invention to provide a video display device and a video signal processing method used for the video display device, which can effectively reduce the occurrence of pseudo contour-shaped image quality disturbance that is easily noticeable as a whole.

[0008]

In order to solve the above-mentioned problems of the prior art, the present invention provides (a) an R, G, B signal as an input video signal in an input R, A dither coefficient pattern in which a plurality of dither coefficients are arranged in a matrix is added to each of the G and B signals to obtain the R,
A first dither superposition circuit (1
00) and R, G, which are provided in the subsequent stage of the first dither superimposing circuit and are output from the first dither superimposing circuit.
An inverse gamma correction circuit (200) for performing an inverse gamma correction process on each of the B signals, and R, G, B output from the inverse gamma correction circuit, which is provided at the subsequent stage of the inverse gamma correction circuit.
A second dither superposition circuit (400) for adding a dither coefficient pattern in which a plurality of dither coefficients are arranged in a matrix to each signal to correct the gradation of the R, G, B signals. Providing a characteristic video display device,
(B) In the video signal processing method used in a video display device in which R, G, and B signals are input video signals, the input R,
A dither coefficient pattern in which a plurality of dither coefficients are arranged in a matrix is added to each of the G and B signals to obtain the R, G, and B signals.
A first dither superimposing step for correcting the gradation of the signal, and a RZ, G, and B signal to which the dither coefficient pattern has been added by the first dither superimposing step, respectively, in the subsequent stage of the first dither superimposing step. In the inverse gamma correction step of performing the inverse gamma correction process, and in the subsequent stage of the inverse gamma correction step, a plurality of dither coefficients are matrixed for each of the R, G, and B signals inversely gamma corrected in the inverse gamma correction step. And a second dither superimposing step for correcting the gradations of the R, G, B signals by adding dither coefficient patterns, to provide a video signal processing method used in a video display device. .

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION A video display device of the present invention and a video signal processing method used therein will be described below with reference to the accompanying drawings. 1 is a block diagram showing an embodiment of a video display device of the present invention, FIG. 2 is a block diagram showing a concrete configuration example of the video signal processing circuit 100 in FIG. 1, and FIG. 3 is FIG.
FIG. 4 is a diagram showing an example of a dither pattern used in the video signal processing circuit 100 in FIG.
FIG. 5 is a diagram showing a specific example of the dither coefficient when setting the dither coefficient in the dither pattern for each gradation group. FIG. 5 is a final dither coefficient determining method in the video signal processing circuit 100 in FIG. 6 is a diagram showing an example of the inverse gamma correction characteristic in the inverse gamma correction circuit in FIG. 1, and FIG. 7 is a block diagram showing a specific configuration example of the video signal processing circuit 400 in FIG. 8 is a diagram showing a specific example of the dither coefficient when setting the dither coefficient in the dither pattern used in the video signal processing circuit 400 in FIG. 1 for each gradation group, and FIG. 9 is the image in FIG. FIG. 6 is a diagram for explaining a method of determining a final dither coefficient in the signal processing circuit 400.

The embodiment of the present invention shown in FIG. 1 shows a case of a PDP as an example of a video display device. In FIG. 1, a video signal is input to a video signal processing circuit (first dither superposition circuit) 100, multi-gradation is achieved by a dither method described later, and is input to an inverse gamma correction circuit 200. The inverse gamma correction circuit 200 performs inverse gamma correction processing on the input video signal. Inverse gamma correction circuit 200
Is further input to the video signal processing circuit (second dither superposition circuit) 400, and multi-gradation is achieved by the dither method described in detail later. The output of the video signal processing circuit 400 is input to the PDP 300. The video signals are R,
G and B signals. Therefore, actually, the video signal processing circuit 100, the inverse gamma correction circuit 200, and the video signal processing circuit 400 require three systems for R, G, and B signals.

One of the characteristics of the present invention is that the first signal processing for increasing the number of gradations by the dither method is performed before the inverse gamma correction processing is performed on the video signal, and the inverse gamma correction processing is performed on the video signal. Even after that, the second signal processing for increasing the number of gradations is performed by the dither method. In FIG. 1, the video signal processing circuit 100 that performs the first signal processing, the inverse gamma correction circuit 200, and the video signal processing circuit 400 that performs the second signal processing are shown as separate circuit blocks. You may make it perform the said series of processes in one circuit block.

Before describing the multi-gradation processing in the video signal processing circuits 100 and 400, referring to FIG.
The correspondence between the dot data on the 300 panel and the dither coefficient will be described. In FIG. 10, 301 is PDP3
00 indicates a panel, and 302 indicates dots forming pixels of R, G, and B. As shown in FIG. 10, the panel 301 includes a plurality of dots 30 arranged in N rows × M columns.
The dither coefficients a, b, c, and d are added according to the dot data applied to each dot 302. Here, for simplification, R,
Although it is illustrated that the panel 301 is configured by dots of one color of G and B, in reality, the dots of R, G, and B are sequentially arranged in the row direction to configure the panel 301.

Next, the video signal processing circuit 1 will be described with reference to FIG.
00 will be described. In FIG.
The dither matrix pattern generator 1 is, for example, n
A plurality of types of dither matrix patterns (hereinafter, dither patterns) each including a matrix of × n dots (here,
m types) occur. Although m is shown as 3 or more here, m = 2, that is, two types of dither patterns may be generated. The dither matrix pattern generator 1 may be composed of a ROM or software.

Here, the dither matrix pattern generator 1 does not generate the dither coefficient pattern itself, that is, the individual dither coefficients in the dither pattern, but only the position information of the dither pattern. More specifically, the dither matrix pattern generator 1 generates a pattern indicating in what positional relationship the dither coefficient is associated with one section (matrix) in the dot 302 of the panel 301 in FIG. is there. Therefore, at the time of the output stage of the dither matrix pattern generator 1, the individual dither coefficients in the dither pattern have not yet been determined.

The selector 2 selects one of the m kinds of dither patterns from the dither matrix pattern generator 1 and inputs it to the gradation-based dither coefficient generation circuit 5. To the dither coefficient generation circuit 5 for each gradation and the adder 3, for example, a digitally converted video signal is input. The gradation-by-gradation dither coefficient generation circuit 5 detects the gradation of the input video signal, further divides the video signal below a preset gradation into a plurality of gradation groups, and common to each gradation group, Set the individual dither coefficients in the dither pattern. At this time, all the individual dither coefficients in the dither pattern are set to 0 above the preset gradation. Although a plurality of gradation groups are used, one gradation group may be used.

The gradation-based dither coefficient generating circuit 5 is
Individual dither coefficients in the dither pattern are determined corresponding to the dither pattern selected by the selector 2 and the gradation group of the input video signal. The dither coefficient generated by the tone-level dither coefficient generation circuit 5 is input to the adder 3. The adder 3 adds the input video signal and the dither coefficient generated by the gradation-based dither coefficient generation circuit 5, and inputs the result to the limiter 4. The limiter 4 limits and outputs an amount (so-called underflow) that exceeds the value depending on the number of bits of the original signal in the output of the adder 3. The bits (lower bits) of the output of the adder 3 may be limited and output according to the gradation capability of the video display device.

FIG. 3 is an example of the dither pattern used in FIG. In FIGS. 3A and 3B, a, b, c, d
The section composed of four dots shown by indicates a dither pattern by a matrix of 2 × 2 dots in the vertical (row) × horizontal (column). This 2 × 2 dot dither pattern is set as position information corresponding to the dot data applied to the dots 302 of the panel 301 in the PDP 300, as described with reference to FIG.

For example, in the dither patterns shown in FIGS. 3A and 3B, the dither patterns a, b, a, b, ...
Dither patterns c, d, and
.. are sequentially added from the dot at the beginning of the line. Figure 3
In the dither pattern (A), the dither patterns d, c, d, c, ... Are sequentially added to the dot data of the odd-numbered rows from the dot at the beginning of the row, and the dither patterns b, a, b are added to the dot data of the even-numbered row. , A, ... Are added in order from the dot at the beginning of the line.

In the example shown in FIG. 3A, a, b, c, d
The dither pattern and the dither pattern d, c, b, and a are used, and the dither pattern is alternately switched for each field, for example.

In the example shown in FIG. 3B, a, b, c, d
4 dither patterns, a dither pattern d, a, c, b, a dither pattern c, d, b, a, and a dither pattern b, c, a, d. The dither patterns (1) to (5) are regularly circulated in a field cycle and switched. The example shown in FIG. 3 shows a state in which the dither pattern is associated with the dots 302 of the panel 301.

As described above, in the dither pattern input to the adder 3, at the time of output from the dither matrix pattern generator 1, individual dither coefficients in the dither pattern are not determined. As shown in FIG. 3, only the position information of each dither coefficient is determined. The individual dither coefficients are
Based on this position information, the gradation-based dither coefficient generation circuit 5
Will be finally decided. The processing method will be described in detail below.

FIG. 4 shows an example of individual dither coefficients in the dither pattern set for each gradation group by the gradation-specific dither coefficient generation circuit 5. Here, as shown in FIG. 3A, a case is shown in which two types of patterns, a dither pattern, are used. In this example, the dither coefficient is set for the gradations equal to or lower than the gradation 63 in the input video signal input with 256 gradations. Gradation (A): gradation 0
To 15, (B): gradation 16 to 31, (C): gradation 32 to
47, (D): gradations 48 to 63, (E): gradations 64 or more are divided into 5 kinds of gradation groups, and different dither coefficients are set for each.

For example, in gradations 0 to 15 of FIG. 4A, the dither coefficients of the dither patterns a, b, c and d are set to 5, 3, -3 and -5, respectively, and the dither coefficients of FIG. ), The dither patterns a, b, c, d
The dither coefficients of are set to 4, 2, -2 and -4, respectively. In the gradations 32 to 47 of FIG. 4C, the dither coefficients of the dither patterns a, b, c, and d are 3, respectively.
1, -1, and -3 are set, and the gradation 48 in FIG.
6 to 63, the dither coefficients of the dither patterns a, b, c and d are set to 2, 1, -1, and -2, respectively. Further, when the gradation is 64 or more in FIG. 4E, the dither coefficients of the dither patterns a, b, c and d are 0,
It is set to 0, 0, 0. The specific dither coefficient forming the dither pattern is as shown in FIG.

In this example of the dither pattern, both the positive dither coefficient and the negative dither coefficient are provided so that the total sum of the dither coefficients in one dither pattern becomes zero.

In the above configuration, the dither coefficient is added to the original signal (input video signal) for the main purpose of smoothing the continuity of the gradation which is impaired when the inverse gamma correction process is performed. The dither coefficient is added only to the low gradation portion where the visual difference in brightness with respect to the adjacent gradation becomes large and becomes conspicuous. In particular, PD that expresses gradation by subfield division
In the case of P300, the degree of gradation loss increases as the gradation level decreases even in this low gradation part.
Therefore, in order to improve the continuity of the gradation in all the low gradation parts, the weighting of the dither coefficient is changed for each gradation level, and the weighting (that is, the absolute value of the coefficient) is increased as the gradation becomes smaller. ing.

FIG. 5 shows a 2 × 2 that is finally added to the original signal.
An example of a method of determining each dither coefficient in a dot dither pattern is shown. FIG. 5 shows the case of the dither pattern in FIG. In this example, the first and second rows and the first and second columns of the panel 301 in FIG.
A method for determining individual dither coefficients in a dot dither pattern is shown. The same applies to the other sections (matrix) of the panel 301.

First, when the dither pattern of FIG. 3A is used, as shown in FIG. 5, the gradation of the first row and the first column is 12, the gradation of the first row and the second column is 18, and the second row. It is assumed that the gradation of the first column is 33 and the gradation of the second row and the second column is 57. At this time, the first row and the first column has 12 gradations, and thus FIG.
5, 3, -3, and -5 shown in FIG. 3 are selected, and the dither coefficient 5 corresponding to the position of a is selected among them. Since the gray level is 18 in the first row and second column, 4, 2, and 2 shown in FIG.
-2 and -4 are selected, of which the dither coefficient 2 corresponding to the position of b is selected.

Since the gray scale is 33 in the second row and first column, 3, 1, -1, and -3 shown in FIG. 4C are selected. Among them, the dither coefficient corresponding to the position of c is selected. -1 is selected.
Since the second row and second column has a gradation of 57, 2, 1, -1, and -2 shown in FIG. 4D are selected, and among them, the dither coefficient -2 corresponding to the position of d is selected. To be selected. In this way, the individual dither coefficients of the dither pattern finally determined are 5, 2, -1, and -2.

The dither pattern of FIG. 3A and FIG.
In the case of using the dither patterns 1 to 3 shown in (B), similarly, each dither coefficient is determined according to the gradation of the dot data applied to each dot 302 forming the panel 301.

As described above, the gradation-based dither coefficient generation circuit 5
Adds 1 dither coefficient pattern in panel 301
The gradation of each dot data forming a matrix which is one section is detected. The gradation-by-gradation dither coefficient generation circuit 5 also operates as gradation detection means. The gradation detecting means may be provided separately from the gradation-based dither coefficient generating circuit 5.
Then, according to the gradation of the detected dot data, the specific dither coefficient pattern shown in FIG. 4 is selected for each dot of the matrix, and the dither coefficient corresponding to the position of the dot of the matrix is selected from the dither coefficient pattern. Extract. Next, the final dither coefficient pattern for combining the extracted dither coefficients and adding them to one matrix is generated.

By the way, in the example of FIG. 5, for easy understanding of the gist of the present invention, the case where the gradations of the adjacent dots 302 are greatly different is shown. Adjacent dots 3
If the gradation of 02 is not so different and is in the same gradation group shown in FIGS. 4A to 4D, a plurality of dither coefficients determined by the final dither coefficient determination method shown in FIG. The pattern is the same as the dither coefficient pattern shown in FIGS.

As described above, in the dither coefficient patterns shown in FIGS. 4A to 4D, since the total sum of the dither coefficients in one dither pattern is 0,
The total sum of the dither coefficients in the actually added dither coefficient pattern is also 0. Therefore, when the gradations of the adjacent dots 302 are in the same gradation group shown in FIGS. 4A to 4D, even if the dither coefficient is added to the video signal, it becomes less noticeable as noise.

Next, the operation of the inverse gamma correction circuit 200 will be described. The inverse gamma correction circuit 200 performs an inverse gamma correction process on the input video signal with the correction characteristic as shown in FIG. 6A, for example. In FIG. 6A, the horizontal axis represents the gradation of the input video signal and the vertical axis represents the gradation of the output video signal. The correction characteristic shown in FIG. 6 (A) is an inverse gamma curve that is generally used to return a gamma-corrected video signal to a visually linear characteristic. Figure 6
(B) shows other correction characteristics. The correction characteristic shown in FIG. 6B is an S-shaped inverse gamma curve for performing a specific correction process on the video signal.

The inverse gamma correction circuit 200 can be realized by a ROM or software table that converts an input video signal with the characteristics shown in FIGS. 6A and 6B and outputs the converted video signal.

Next, referring to FIG. 7, the video signal processing circuit 4
00 will be described. As shown in FIG. 7, the video signal processing circuit 400 includes a dither matrix pattern generator 11, a selector 12, an adder 13, a limiter 14, and a grayscale dither coefficient generation circuit 15. As can be seen by comparing FIGS. 2 and 7, the video signal processing circuit 400 has substantially the same configuration as the video signal processing circuit 100, and operates in the same manner. The dither pattern generated by the dither matrix pattern generator 11 is shown in FIG.
The method for determining the individual dither coefficients in the 2 × 2 dot dither pattern to be finally added to the original signal is also the same as in FIG.

However, the individual dither coefficients in the dither pattern set for each gradation group by the gradation-specific dither coefficient generation circuit 15 are not those shown in FIG. 4, but the one shown in FIG. 8 is used as an example. FIG. 8 shows an example of individual dither coefficients in the dither pattern set for each gradation group by the gradation-specific dither coefficient generation circuit 15. Here, as shown in FIG. 3A, a case is shown in which two types of patterns, a dither pattern, are used.

In the example shown in FIG. 8, the dither coefficient is applied to the gradations of 32 or more for the 256 gradation video signal input to the video signal processing circuit 400 after the inverse gamma correction circuit 200. Set. Gradation (A): gradation 0
To 31, (B): gradation 32 to 63, (C): gradation 64 to
96, (D): gradation 97 to 133, (E): gradation 144
The above-mentioned five types of gradation groups are divided and different dither coefficients are set for each.

For example, in the gradations 0 to 31 of FIG. 8A, the dither coefficients of the dither patterns a, b, c and d are set to 0, 0, 0 and 0 respectively, and the dither coefficients of FIG. Gradation 32
6 to 63, the dither coefficients of the dither patterns a, b, c and d are set to 2, 1, -1, and -2, respectively. In the gray scales 64 to 96 of FIG. 8C, the dither coefficients of the dither patterns a, b, c, and d are 3, 1, respectively.
It is set as -1, -3.

In the gradations 97 to 133 in FIG. 8D, the dither coefficients of the dither patterns a, b, c and d are set to 4, 2, -2 and -4, respectively. When the gradation is 144 or more, the dither patterns a, b, c,
The dither coefficients of d are set to 5, 3, -3 and -5, respectively. The specific dither coefficient forming the dither pattern is as shown in FIG.

In this example of the dither pattern, both the positive dither coefficient and the negative dither coefficient are provided so that the total sum of the dither coefficients in one dither pattern becomes zero.

The video signal processing circuit 400 has a large luminance step between adjacent gray levels after the inverse gamma correction process is performed. This is for reducing the pseudo contour-shaped image quality disturbance that occurs in 1. Therefore, the video signal processing circuit 400 adds the dither coefficient only to the middle and high gradation portions for the main purpose of smoothing the continuity of the middle and high gradation portions in which the pseudo contour-shaped image disturbance occurs.

In particular, the inverse gamma correction circuit 200 shown in FIG.
In the case of the PDP 300 that uses the inverse gamma curve shown in (A) and expresses gradations by subfield division, the degree of the luminance difference between adjacent gradations increases as the gradation level increases in the middle and high gradation parts. . Therefore,
In order to improve the continuity of gradation in all middle and high gradation parts, the weighting of the dither coefficient is changed for each gradation level, and the weighting (that is, the absolute value of the coefficient) is increased as the gradation increases. .

FIG. 9 shows an example of a method of determining individual dither coefficients in a 2 × 2 dot dither pattern which is finally added to the original signal in the video signal processing circuit 400. FIG. 9 shows the case of the dither pattern in FIG. In this example, a method of determining individual dither coefficients in the 2 × 2 dot dither pattern on the first and second rows and the first and second columns of the panel 301 in FIG. 10 is shown. The same applies to the other sections (matrix) of the panel 301.

First, in the case of using the dither pattern of FIG. 3A, as shown in FIG. 9, the gradation of the first row and the first column is 64, the gradation of the first row and the second column is 100, and the second row is 100. It is assumed that the gradation in the first column is 63 and the gradation in the second row and the second column is 157. At this time, since the gray scale is 64 in the first row and the first column, FIG.
3, 1, -1, and -3 shown in (C) are selected, and among them, the dither coefficient 3 corresponding to the position of a is selected. Since the gradation in the first row and second column is 100, 4, 2, -2, and -4 shown in FIG. 8D are selected, and the dither coefficient 2 corresponding to the position of b is selected among them. To be done.

Since the gradation in the second row and first column is 63, 2, 1, -1, and -2 shown in FIG. 8B are selected, and among them, the dither coefficient corresponding to the position of c is selected. -1 is selected.
Since the second row and second column has a gradation of 157, 5, 3, -3 and -5 shown in FIG. 8E are selected, and among them, the dither coefficient -5 corresponding to the position of d is selected. To be selected. In this way, the individual dither coefficients of the dither pattern finally determined are 3, 2, -1, and -5.

The dither pattern of FIG. 3 (A) and FIG.
In the case of using the dither patterns 1 to 3 shown in (B), similarly, each dither coefficient is determined according to the gradation of the dot data applied to each dot 302 forming the panel 301.

As described above, the gradation-based dither coefficient generation circuit 1
Reference numeral 5 detects the gradation of each dot data forming a matrix which is one section for adding the dither coefficient pattern in the panel 301. Gradation dither coefficient generation circuit 15
Also operates as a gradation detecting means. The gradation detecting means may be provided separately from the gradation-based dither coefficient generation circuit 15. Then, according to the gradation of the detected dot data,
A specific dither coefficient pattern shown in FIG. 8 is selected for each dot of the matrix, and the dither coefficient corresponding to the dot position of the matrix is extracted from the dither coefficient pattern. Next, the final dither coefficient pattern for combining the extracted dither coefficients and adding them to one matrix is generated.

By the way, in the example of FIG. 9, for easy understanding of the gist of the present invention, the case where the gradations of the adjacent dots 302 are greatly different is shown. Adjacent dots 3
If the gradations of 02 are not so different and are in the same gradation group shown in FIGS. 8A to 8D, a plurality of dither coefficients determined by the final dither coefficient determination method shown in FIG. The pattern is the same as the dither coefficient pattern shown in FIGS.

As described above, in the dither coefficient patterns shown in FIGS. 8A to 8D, since the total sum of the dither coefficients in one dither coefficient pattern is set to 0, the dither to be actually added is added. The total sum of the dither coefficients in the coefficient pattern is also 0. Therefore, the adjacent dots 30
When the 2 gradation is in the same gradation group shown in FIGS. 8A to 8D, even if the dither coefficient is added to the video signal, it becomes less noticeable as noise.

As described above, according to the present invention, the video signal processing circuit (dither superposition circuit) 10 for performing the multi-gradation process using the dither method before and after the inverse gamma correction circuit 200, respectively.
0 and 400 are provided, the gradation of the video signal is divided into a plurality of gradation groups for each input video signal, and a dither pattern (dither coefficient pattern) having a dither coefficient suitable for each is added. I have to. Therefore, it is possible to effectively correct all gradations.

Further, in the above-described embodiment, FIG.
As a suitable example when the inverse gamma correction characteristic shown in is used, a low gradation part (gradation 63 or less as an example) in which the degree of gradation loss that occurs when the inverse gamma correction processing is performed is large.
In the above, the dither coefficient patterns are added before the inverse gamma correction processing, and in the middle and high gradation portions (for example, the gradation 32 or more) where the degree of the luminance difference between the adjacent gradations after the inverse gamma correction processing is large. The dither coefficient pattern is added after the inverse gamma correction process. At this time, since the sum of the dither coefficients is set to 0 in each area, the gradation of the video signal does not increase overall. Therefore, it is possible to display a good image with the same number of gradations as the original signal.

An example suitable for the case of using the S-shaped inverse gamma correction characteristic shown in FIG. 6B will be described.
In the correction characteristic shown in FIG. 6B, the increase in the gradation of the output video signal is moderate with respect to the increase in the gradation of the input video signal in the low gradation part and the high gradation part of the input video signal. As described above, in the region where the increase in the gradation of the output video signal with respect to the increase in the gradation of the input video signal is small, before the inverse gamma correction process is performed, that is, the video signal processing circuit 100 adds the dither coefficient pattern. It is preferable.

On the other hand, the inverse gamma correction processing is performed in the region where the increase in the gradation of the output video signal with respect to the increase in the gradation of the input video signal is large, that is, in the correction characteristics shown in FIG. It is preferable to add the dither coefficient pattern afterward, that is, in the video signal processing circuit 400.

In the correction characteristics (inverse gamma curve) shown in FIGS. 6A and 6B, in the region where the inclination is smaller than 45 degrees, the video signal processing circuit 100 provided in the preceding stage of the inverse gamma correction circuit 200. Add the dither coefficient pattern at
In the region where the inclination is greater than 45 degrees, the inverse gamma correction circuit 2
It is preferable to add the dither coefficient pattern in the video signal processing circuit 400 provided in the subsequent stage of 00. In the region where the inclination is 45 degrees, the effect is the same regardless of which of the video signal processing circuits 100 and 400 the dither coefficient patterns are added.

In this way, the video signal processing circuits 100, 4
When the dither coefficient pattern is added for each 00, the gradation position to which the dither coefficient pattern is added is adjusted according to the inverse gamma correction characteristic of the inverse gamma correction circuit 200, or according to the degree of the brightness difference between adjacent gradations. The (gradation area) may be selected appropriately. As a region to which the dither coefficient pattern is added, only the low gradation part, only the middle gradation part, only the high gradation part, or any combination thereof (including the entire gradation region) is considered. Video signal processing circuit 100
The gradation region to which the dither coefficient pattern is added and the gradation region to which the video signal processing circuit 400 adds the dither coefficient pattern may partially overlap as in the above embodiment. Conversely speaking, at least a part of the gradation area may be different.

The present invention is not limited to the embodiments described above. In the present embodiment, the dither pattern is changed for each field, but the present invention is not limited to this. The dither pattern may be changed for each frame, the dither pattern may be changed for each adjacent block, or the correspondence between partitions (matrix) and dots may be changed. That is, the dither pattern is temporally or PD
It may be changed in position on the panel 301 in P300.

Further, in the present embodiment, the dither pattern is formed by using the positive and negative dither coefficients, but this is for the same number of gradations as the original signal. This is because it is used only to smooth the continuity of. However, the setting of the dither coefficient is not limited to the above example, and the final dither coefficient may be set in consideration of the purpose of supplementing the shortage of the display capability as in the conventional example. . By doing so, it is possible not only to make the continuity of the gradation smooth in the gradation area thus set, but also to increase the number of gradations apparently.

[0058]

As described in detail above, the video display apparatus and the video signal processing method used for the same according to the present invention are provided with a dither in which a plurality of dither coefficients are matrixed for each of the input R, G and B signals. Add the coefficient patterns to obtain R,
The gradations of the G and B signals are corrected, and then the inverse gamma correction process is performed on the R, G and B signals, and thereafter, a dither coefficient pattern in which a plurality of dither coefficients are arranged in a matrix is added, Since the gradations of the R, G, and B signals are corrected, the gradation characteristics are adaptively smoothed from the low gradation portion to the middle and high gradation portions to provide gradation continuity and multi-gradation characteristics. It is possible to improve the image quality, and it is possible to effectively reduce the occurrence of pseudo-contoured image quality disturbance that is easily noticeable as a whole.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video display device of the present invention.

FIG. 2 is a block diagram showing a specific configuration example of a video signal processing circuit 100 in FIG.

3 is a diagram showing an example of a dither pattern used in the video signal processing circuit 100 in FIG.

FIG. 4 is a diagram showing a specific example of a dither coefficient when setting a dither coefficient in a dither pattern used in the video signal processing circuit 100 in FIG. 1 for each gradation group.

5 is a diagram for explaining a method of determining a final dither coefficient in the video signal processing circuit 100 in FIG.

6 is a diagram showing an example of an inverse gamma correction characteristic in the inverse gamma correction circuit 200 in FIG.

7 is a block diagram showing a specific configuration example of a video signal processing circuit 400 in FIG.

8 is a diagram showing a specific example of a dither coefficient when setting a dither coefficient in a dither pattern used in the video signal processing circuit 400 in FIG. 1 for each gradation group.

9 is a diagram for explaining a method of determining a final dither coefficient in the video signal processing circuit 400 in FIG.

FIG. 10 is a diagram for explaining the correspondence between dots and dither coefficients in the video display device.

[Explanation of symbols]

11 Dither matrix pattern generator 12 selector 13 adder 14 limiter 15 Gradation dither coefficient generation circuit 100,400 Video signal processing circuit (dither superposition circuit) 200 Reverse gamma correction circuit 300 PDP

Claims (8)

[Claims] 1. A video display device using R, G, B signals as input video signals, wherein each of the input R, G, B signals is added with a dither coefficient pattern having a matrix of a plurality of dither coefficients,
A first dither superimposing circuit that corrects gradations of the R, G, and B signals; and a first dither superimposing circuit that is provided after the first dither superimposing circuit.
An inverse gamma correction circuit for performing inverse gamma correction processing on each of the R, G, and B signals output from the dither superimposing circuit, and an R, G output provided from the inverse gamma correction circuit, which is provided after the inverse gamma correction circuit. A second dither coefficient pattern in which a plurality of dither coefficients are arranged in a matrix is added to each of the G and B signals to correct the gradation of the R, G, and B signals.
And a dither superposition circuit of 1. 2. A gradation region of the R, G, B signals to which the first dither superposition circuit adds dither coefficient patterns, and the R and G to which the second dither superposition circuit adds dither coefficient patterns. 2. The image display device according to claim 1, wherein the gradation regions of the B signals are different from each other in at least a part. 3. The first and second dither superimposing circuits generate a plurality of dither matrix patterns that represent in what positional relationship the dither coefficients correspond to the dots forming the pixels of the video display device. A dither matrix pattern generator, a selector for selecting one of a plurality of dither matrix patterns generated by the dither matrix pattern generator, a gradation of R, G, B signals divided into a plurality of regions, For each region, a plurality of dither coefficients R, G, and R are set according to the dither matrix pattern selected by the selector.
2. A gradation-based dither coefficient generating circuit for generating a dither coefficient pattern for adding to the B signal, and an adder for adding the dither coefficient pattern to the R, G, B signals. The video display device according to 2. 4. The first dither superposition circuit includes R, G, and B in the inverse gamma correction processing by the inverse gamma correction circuit.
In a region where the inclination of the input / output characteristic of the signal is less than 45 degrees, the weighting of the dither coefficient generated by the gradation-based dither coefficient generating circuit is increased as the gradation of the R, G, B signals decreases, The second dither superimposing circuit weights the dither coefficients generated by the grayscale-specific dither coefficient generating circuit in the region where the slope of the input / output characteristic is larger than 45 degrees by R, G, and
4. The video display device according to claim 3, wherein the gradation is increased as the gradation of the B signal increases. 5. A video signal processing method used in a video display device using R, G, B signals as input video signals, wherein a dither coefficient in which a plurality of dither coefficients are matrixed for each of the input R, G, B signals. Add patterns,
A first dither superimposing step for correcting the gradation of the R, G, B signals, and R, to which the dither coefficient pattern is added by the first dither superimposing step after the first dither superimposing step, An inverse gamma correction step of performing an inverse gamma correction process on each of the G and B signals, and a plurality of dithers for each of the R, G, and B signals subjected to the inverse gamma correction by the inverse gamma correction step after the inverse gamma correction step. A second dither superimposing step of adding dither coefficient patterns having coefficients in a matrix form to correct the gradations of the R, G, B signals, and a video signal processing method for use in a video display device. . 6. The gradation region of the R, G, B signals to which a dither coefficient pattern is added in the first dither superimposing step, and the R which adds a dither coefficient pattern in the second dither superimposing step. 6. The video signal processing method used in the video display device according to claim 5, wherein the gradation regions of the G, G and B signals are made different from each other at least in part. 7. The first and second dither superimposing steps generate a plurality of dither matrix patterns indicating in what positional relationship the dither coefficients correspond to the dots forming the pixels of the video display device. A dither matrix pattern generating step, a selecting step for selecting one of the plurality of dither matrix patterns generated in the dither matrix pattern generating step, and dividing the gradations of the R, G, B signals into a plurality of areas, According to the dither matrix pattern selected in the selecting step, a plurality of dither coefficients R, G, and
6. A gradation-based dither coefficient generation step for generating a dither coefficient pattern for addition to the B signal, and an addition step for adding the dither coefficient pattern to the R, G, B signals. 6
A video signal processing method used in the video display device according to. 8. The first dither superimposing step is an area in which the slope of the input / output characteristics of the R, G, B signals in the inverse gamma correction processing in the inverse gamma correction step is smaller than 45 degrees, and is classified by the gradation. The weighting of the dither coefficient generated in the dither coefficient generating step is increased as the gradation of the R, G, and B signals decreases, and in the second dither superimposing step, the slope of the input / output characteristic is larger than 45 degrees. In the region, the weighting of the dither coefficient generated in the gradation-based dither coefficient generating step is set to R,
8. The video signal processing method used in the video display device according to claim 7, wherein the G and B signals are increased in gradation as the gradation is increased.