JP2003337695A - Computing device and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To precisely realize an arithmetic operation of inputted values of functions given in a floating point form while controlling the capacity of a look-up table used for an interpolation approximate calculation. <P>SOLUTION: A separating means 2 outputs residual inputted value of a function to an interpolation processing means 7 having the look-up table 7a while regarding an inputted exponent part as zero and also outputs an extracted exponent part to a multiplier 6 in case of the calculation-instructing mode signal of a low-speed distortion function. The amplifier 6 amplifies the exponent part by a multiple and adds the value of the exponent thus multiplied to the exponent part of interpolation-processing output value in an adder 9. By this, the exponent part is excluded from the function calculated by the interpolation processing means 7 and the capacity of the look-up table is reduced. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arithmetic device and method for performing an interpolation approximation calculation process using data stored in a memory as a lookup table, and more particularly to a floating point format including an exponent part and a mantissa part. The present invention relates to a technique suitable for calculating a function input value given as.

[0002]

2. Description of the Related Art The field of thinking about the behavior of liquids, solids or polymers as a result of the movement of the atoms and molecules that make them up and simulating the movements with an electronic computer is called molecular dynamics. In molecular dynamics, we consider atoms or molecules to be particles, calculate the forces acting between these particles,
Calculate the position of the particles after a short time. The trajectory of each particle is obtained by repeating this calculation, and the properties of the resulting substance are calculated. Therefore, in molecular dynamics, the force acting between particles is a physical quantity that must be calculated.

When a force is calculated in molecular dynamics, the first or second order is used as a means for obtaining a function in which the distance between particles is an input value and the force or potential acting on the particle or a value similar thereto is an output. Interpolation approximation calculation processing using a polynomial such as the next interpolation is performed. An apparatus for performing the interpolation approximation calculation processing by this polynomial is, for example, Japanese Patent Laid-Open No. 6-1758.
As described in Japanese Patent No. 25, a device is known that performs an interpolation calculation process by referring to a lookup table in which differential coefficients and approximate values are stored in advance. For example, in the case of interpolation data represented by the function f (x), f (1), f (2) ...
Values at discontinuous points such as and the differential coefficient (slope) of the function f (x) are stored in the lookup table.

Here, the interparticle force handled by molecular dynamics consists of various forces. Generally, these forces are a short-range force acting only at a short distance and a long-range force reaching a long distance. It can be roughly divided. The short-distance force is a force having a rapid convergence such that a magnitude thereof rapidly approaches zero as the distance increases, such as a covalent bond force or a Van der Waals force. The calculation formula for such a short-range force is generally a relatively complicated formula. For example, the van der Waals force calculation formula is expressed as the following formula 1 when the distance is x and the force field parameters are R and ε.

[0005]

[Equation 1]

The long-distance force is represented by, for example, the Coulomb force, and is a force of slow convergence that does not easily reach zero even if the distance increases. Therefore, even if the interparticle distance is large, it affects other particles. . Generally, the calculation formula of the long-distance force is in the form of a simple exponential function as shown in Formula 2. For example, the Coulomb force calculation formula can be expressed in the form of a simple exponential function, as shown in Formula 3, where the distance is x and the particle charges are constants q1 and q2.

[0007]

[Equation 2]

[0008]

[Equation 3]

Since the interparticle force treated by molecular dynamics includes a long-distance force as described above, there is a force that cannot be ignored even when the distance between particles is large. Therefore, the computing device collectively calculates the interparticle force including the long-distance force,
The input range of the function that calculates the force must cover a wide range. Since the width of this input range is proportional to the required capacity (memory capacity) of the lookup table for performing the interpolation approximation calculation processing, the capacity of the lookup table of the interpolation approximation processing apparatus that calculates the force in molecular dynamics. However, there is a problem that it becomes large.

A specific example of conventional interpolation approximation processing will be described below, and the required size of the lookup table will be described. FIG. 4 is a block diagram of an example of a conventional interpolation processing device. This interpolation processing device includes a multiplier 41 and an adder 4
2, a temporary storage device (latch) 43 for temporarily storing the calculation result, a logic gate device 44 for selecting the input of the adder 42 to either the temporary storage device 43 or zero, and interpolation based on the input value (IN) An address generator 45 for generating an index address of data, a lookup table storage device 46 for outputting interpolation data based on the index address output by the address generator 45, a control device for controlling the logic gate device 44 and the address generator 45. 47
It is configured with.

This interpolation processing device is configured as a synchronous circuit which operates sequentially in synchronization with a clock, and is capable of calculating a function registered in advance in the lookup table 46 by polynomial interpolation. The flow of processing will be described by taking the case of performing quadratic polynomial interpolation as an example. The quadratic polynomial interpolation approximation means that when the value x is input to the input (IN),
This means selecting the interpolation terms a2, a1, a0 corresponding to this value x from the look-up table and outputting the approximate value shown in Equation 4 to the output (OUT).

[0012]

[Equation 4]

FIG. 5 shows a clock, an input value (IN), an A input value (MUL_A) of the multiplier 41, an output of the lookup table storage device 46 and an input value of the adder 43 (ADD_B), a multiplier. 41 output and adder 4
Another input value of 2 (MUL_OUT), adder 42
7 shows a signal timing chart of the output value (ADD_OUT) of the.

At the first clock, the logic gate unit 4
The controller 47 controls so that 4 outputs zero. At the same time, the controller 47 controls the address generator 45 to output the index address in which the quadratic interpolation term a2 corresponding to the input value x is stored. As a result, the multiplier 41 outputs zero because it is zero no matter what is multiplied, and the adder 42 calculates 0 + a2 and naturally outputs a2, which is stored in the temporary storage device 43. This concludes the processing of the first clock.

At the next second clock, the logic gate unit 44
The control device 47 controls so that the value stored in the temporary storage device 43 is output. At the same time, the controller 47 controls the address generator 45 to output the index address in which the primary interpolation term a1 corresponding to the input value x is stored. Since a2 is stored in the temporary storage device 43,
The multiplier 41 outputs a2 · x. And the adder 42
Outputs a2 · x + a1, and this value is stored in the temporary storage device 43. This is the end of the processing for the second clock.

At the next third clock, like the second clock, the control unit 47 controls the logic gate unit 44 to output the value stored in the temporary storage unit 43. At the same time, the address generator 4 outputs the constant interpolation term a0 corresponding to the input value x.
The control device 47 controls to output the index address in which is stored. The temporary storage device 43 stores a2.
Since x + a1 is stored, the multiplier 41 outputs the value of Expression 5. Then, the adder 42 outputs the value shown in Expression 6, and this value is stored in the temporary storage device 43. This value is the calculation result of the quadratic interpolation approximation. With the above procedure, the calculation of the quadratic interpolation approximation can be performed in 3 clocks. When calculating a higher-order polynomial approximation, the number of iterations of the procedure after the second clock may be increased.

[0017]

[Equation 5]

[0018]

[Equation 6]

Next, the capacity of the lookup table will be specifically described. The precision generally required for molecular dynamics is not sufficient with 32-bit single precision floating point, but not as much as with 64-bit double precision floating point. Therefore, as shown in FIG. 6, the mantissa part 31 bits and the exponent part 8
A floating point format of 40 bits in total including 1 bit and 1 sign is adopted. Three-dimensional Cartesian coordinate system (Cartesian coordinates)
When calculating the distance between two coordinates, the squared value of the distance can be easily obtained by only the product-sum calculation. Therefore, the input value (IN) to the interpolation processing device is not the distance r but the square of the interparticle distance r ² . The input value (IN) is always a positive value.

In the function of Coulomb force or van der Waals force, in order to obtain the accuracy of 31 bits of the mantissa in the quadratic interpolation approximation, interpolation data indexed by the upper 11 bits, that is, 2048 sets of interpolation data are required. I know empirically that Since it is quadratic interpolation, one set of interpolation data is composed of three interpolation coefficients, and each interpolation coefficient is stored in a 40-bit floating point format.

Considering a long-range force such as Coulomb force in the molecular dynamics method, at least the input value range of Expression 7 is required. In order to interpolate and approximate the range of -9 to +21 by the index, 30 × 2048 sets of interpolation data are required. In other words, the required lookup table storage capacity is 30 ×
2048 x 3 x 40 = 737,800 bits, 8
A little less than a megabit capacity is needed for the look-up table memory.

[0022]

[Equation 7]

Since the capacity is too large as expected,
There is also a way to compress the look-up table capacity at the expense of some accuracy. For example, there is a method of compressing the lookup table capacity by thinning out the interpolated data and using the upper 8 bits of the index address of the mantissa for the region where the precision is not so important as shown in Formulas 8 and 9. Due to this capacity compression, in the areas shown in Expressions 8 and 9, only mantissas of about 20 to 23 bits are obtained, but the total capacity is 16 × 20.
48 × 3 × 40 = 3932160 bits, which can be compressed to 4 megabits.

[0024]

[Equation 8]

[0025]

[Equation 9]

[0026]

Even if compression is performed at the expense of accuracy as in the above example, the lookup table storage device requires a large capacity of 4 megabits, resulting in a system with high cost and high power consumption. There is a problem that it will end. The present invention, without reducing the accuracy of the interpolation approximation calculation,
The purpose is to be able to calculate the force handled by molecular dynamics, etc., with a smaller lookup table capacity.
Further objects of the present invention will be apparent from the following description.

[0027]

The present invention is a computing device for computing a function input value given as a floating point format including an exponent part and a mantissa part, and an exponent part or an upper part of the exponent part from the function input value. Interpolation processing means for performing an interpolation approximation calculation by referring to a look-up table using the remaining part of which the bit part is separated as an input value, and an exponent part extracted from the function input value or a high-order bit part of the exponent part are preset. A multiplication means for multiplying by a multiple, and an addition means for adding a value of an exponent part or an upper bit part of the exponent part multiplied by the multiple to the exponent part of the output value from the interpolation processing means.

Further, the present invention is a method for calculating a function input value provided as a floating point format including an exponent part and a mantissa part, and separating the exponent part or the high-order bit part of the exponent part from the function input value. Then, the remaining part of the mantissa part or the upper bit part of the exponent part separated by the arithmetic processing with reference to the look-up table stored in the memory is approximated by interpolation, and the exponent part or the exponent extracted from the function input value is calculated. Is a calculation method of multiplying the high-order bit part of the part by a preset multiple, and adding the exponent part multiplied by the multiple or the value of the high-order bit part of the exponent part to the exponent part of the result value of the interpolation approximation calculation. .

For example, if the function input value is a simple exponential function as shown in Equation 10, the convergence is slow, and therefore a large amount of look-up tables are required if the calculation is performed by the conventional interpolation approximation processing apparatus. According to the present invention, the capacity of the lookup table required according to the following principle can be reduced. In general, when a positive real number is handled by a digital computer, a floating point format represented by the formula 11 is used by using a mantissa m (1 ≦ m <2) and an exponent e (an integer). When a simple exponential function is calculated in the floating point format, the transformation shown in Expression 12 can be made.

[0030]

[Equation 10]

[0031]

[Equation 11]

[0032]

[Equation 12]

Multiplying a value in the floating-point format by a power of 2 to the power of ne is very simple because all that is required is to add ne to the exponent part. That is, it indicates that the function can be calculated by calculating f (m) by the interpolation process and adding ne to the exponent part of the result. Since the mantissa m is a value in a narrow range such as 1 ≦ m <2, f (m) can be calculated by an interpolation processing device having a small lookup table capacity. Using this principle, in order to reduce the required capacity of the lookup table, the calculation is performed as follows.

A function input value given in the form of a floating point is obtained by concatenating the exponent shift part composed of the whole exponent part or the high-order bit part of the exponent part and the mantissa part or the low-order bit part of the exponent part and the mantissa part. It is separated into two of the configured mantissa index parts. Then, the exponent shift part is multiplied by n which is a power of the functional expression, and in parallel with this, the mantissa index part is subjected to interpolation processing calculation. Then, the exponent part of the output value obtained by the interpolation process is added to the value obtained by multiplying the exponent shift part by the exponent n to obtain the output value. That is, the mantissa index part input to the interpolation approximation process can have a bit length shorter than that of the entire function input value by separating the exponent shift part, and as a result, the capacity of the lookup table used in the interpolation approximation process can be calculated more accurately. It can be kept small and small.

The present invention is effective for the operation on the input value of the function which converges slowly. For the function input value which has a complicated function shape but converges quickly, the operation may be executed by the conventional interpolation approximation processing. . That is, with such a function input value, the convergence speed is high, so that the required input value range is narrow and the capacity of the lookup table can be small. Therefore, as an aspect of the present invention, the arithmetic processing is performed by distinguishing whether the formula of the function input value to be calculated is complicated and has a fast convergence, or whether it is a simple exponential function and has a slow convergence.

In the present invention, since the bit length of the exponent shift part is not limited, the input value range in which the input is allowed can be expanded to the whole range which can be expressed by the floating point format. Further, the present invention can be applied not only to molecular dynamics but also to a general many-body problem for performing a slow-convergence function operation given in a floating-point format.

[0037]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be specifically described based on Examples. FIG. 1 shows the configuration of the main part of an arithmetic unit according to an embodiment of the present invention. A floating-point number having a sign part, an exponent part, and a mantissa part is input as the function input value 1, and the exponent part / mantissa part separating means 2 outputs the input value 1 to the exponent part output 3 and the mantissa according to the calculation mode signal. The partial output 4 is output separately. The exponent part / mantissa part separation means 2
Can be easily configured as a logic circuit such as a register that outputs a bit in response to an input signal.

There are two kinds of calculation modes, an exponential function mode and a complex function mode, and this calculation mode signal is input by an operator's selection operation. The function input value 1
The automatic determination may be performed based on the function form of, and a signal indicating which calculation mode should be used may be input according to the determination result. When the calculation mode is the exponential function mode, the exponent part output 3 is the exponent part of the function input value 1,
The mantissa output 4 is a floating point format in which the exponent of the function input value 1 is zero (zero bit string). On the other hand, when the calculation mode is the complex function mode, the exponent output 3
Is output as zero (zero bit string), and the mantissa output 4 outputs the function input value 1 as it is.

The multiplier 6 calculates the product of the exponent part output 3 and a preset multiple 5. The multiplier 6 can be easily configured by a logic circuit, and can be easily realized on a small scale because it is an integer multiplier. The interpolation processing device 7 has a look-up table 7a in which necessary interpolation data is stored in a memory, performs a function calculation by polynomial interpolation approximation using the mantissa output 4 as an input and refers to the look-up table 7a, and outputs it in a floating point format. The interpolation approximation output 8 is output. The interpolation processing device 7 is, for example, disclosed in Japanese Patent Laid-Open No. 6-1
As described in Japanese Patent No. 75825, it can be easily configured by a logic circuit.

The adder 9 is provided in the exponent part of the interpolation approximation output 8
The product output from the multiplier 6 is added to generate and output the calculation result 10. Therefore, when the calculation mode is the exponential function mode in which the convergence is slow, the function input value 1 is separated into the exponent part and the residual part, the exponent part is multiplied by a multiple, and the residual part is looked up. Interpolation approximation calculation is performed with reference to the table, and processing is performed in which the multiplied exponent part and the interpolation approximation calculation result are added. Although the same processing is performed when the calculation mode is the complex function mode, the product output from the multiplier 6 is zero, so the interpolation approximation output 8 becomes the calculation result 10 as it is.

As described above, when the calculation mode is the exponential function mode, the input value range of the interpolation processing device 7 is very narrow, being 1 or more and less than 2, and the required capacity of the look-up table is very small. On the other hand, when the calculation mode is the complex function mode, it corresponds to the calculation of the short-distance force in the above-mentioned molecular dynamics method, and therefore the calculation of the function is fast. for that reason,
The upper limit of the input range of the interpolation processing device 7 is small, and the required lookup table capacity of the interpolation processing device 7 is small. Therefore, according to the present embodiment, it is possible to obtain a correct calculation result without degrading accuracy with an interpolation processing device having a small lookup table capacity.

FIG. 2 shows the configuration of the main part of an arithmetic unit according to another embodiment of the present invention. In this example, the function input value is separated into the high-order bit part of the exponent part and the remaining part including the low-order bit part and the mantissa part of the exponent part. Will be described more specifically by using the extended single precision format of 40-bit length as shown in FIG.

In this example, the squared value of the interparticle distance is used as the input value. This is because, as described above, when the distance between two coordinates is calculated in the three-dimensional Cartesian coordinate system (Cartesian coordinates), the square value of the distance can be easily obtained by only the product-sum calculation.
With the input value S, the functions to be calculated are the Coulomb force fc (S) as shown in Formula 13 and the van der Waals force fvdw (S) as shown in Formula 14. As you can see from the form of the equation, Coulomb force is a simple exponential function, and Van der Waals force is a complicated form, but convergence is a fast function.

[0044]

[Equation 13]

[0045]

[Equation 14]

The input value 21 represents the argument S of the function to be calculated in the 40-bit extended single precision floating point format shown in FIG. Specifically, the mantissa m (1 ≦ m <2) and the exponent e (integer) are used and expressed in the form shown in Expression 15. The input value 21 is a mantissa including an exponent part 23 obtained by cutting out the upper 7 bits of the exponent part from the 38th bit to the 32nd bit by the separating means 22 and the lower bits of the other exponent parts, the mantissa part, and the sign part. It is separated into two parts 24.

[0047]

[Equation 15]

In this example, the lower 1 bit of the exponent part is left in the mantissa part 24. This is because the exponent of the Coulomb force calculation formula shown in Formula 13 is −15 and is not an integer. Therefore, the exponent part e is divided into an upper 7-bit eh and a lower 1-bit e1. Then, since eh is always an even number, the value -15eh multiplied by -15 is always an integer. That is, Equation 16 is obtained and Equation 17 is obtained. Formula 1
Calculation is performed by interpolation processing with the term shown in Expression 18 in 7 as the mantissa part. The range of this mantissa part is 1 or more and less than 4.
Since −15 eh is always an integer, a correct calculation result can be obtained by adding this to the exponent part of the value obtained by the interpolation processing.

[0049]

[Equation 16]

[0050]

[Equation 17]

[0051]

[Equation 18]

The logic gate 25 performs a logical product operation of the value of the FuncMode command signal (calculation mode signal) and the exponent part 23. Func assuming that the function to calculate is a simple exponential function
When the Mode command value is set, the logic gate 25 outputs a 7-bit zero string, and when the FuncMode command value is set because the function to be calculated is a complicated function, the exponent part 23 is left as it is. Output. The output of the logic gate 25 is inserted into the separated exponent part of the mantissa part 24 and combined to generate an interpolation processing input value 26. Interpolation processing device 2
Reference numeral 7 has a lookup table 27a in which interpolation data is stored in a memory, and the interpolation approximation output value 28 is calculated by referring to the lookup table 27a using the interpolation processing input value 26 as an input value.

On the other hand, the exponent part 23 is generated by the left shifter 29 and the two gate devices 30, 31 and the adder 32 and the sign inverter 33 based on the MULSEL command signal value.
The multiplication means is configured to perform the multiplication processing with the multiple shown in (1) to generate an 8-bit integer 34. When calculating the Coulomb force shown in Expression 13, the value of −1.5 is calculated with the MULSEL command signal value as (11). When calculating a complicated function such as the Van der Waals force, MULSEL is set to (00) and the calculation is performed with zero times. As shown in FIG. 3, it is also possible to use another type of simple exponential function calculation by setting the MULSEL command signal value.

The adder 35 adds the integer 34 to the exponent part of the interpolation approximation output 28 and outputs the calculation result 36. In this case, since the integer 34 is zero when calculating a complicated function, the interpolation approximation output 28 is the calculation result 3 as it is.
It becomes 6. Therefore, the calculation result 36 can be correctly obtained by the above processing.

The input value range required for the interpolation processing device 27 of this example depends on the speed of convergence of 1 or more and less than 4 in the case of a simple exponential function and in the case of a complicated function. For example, in the calculation of the van der Waals force shown in Expression 14, it has been empirically known that S in a range of less than 2 9 is sufficient. Therefore, if the input value range is expressed by Equation 19, 18 × 2048 sets of interpolation data are required to interpolate and approximate the range of −9 to +9 by the exponent. That is,
The required lookup table storage capacity is 18 × 204
8 x 3 x 40 = 4423680 bits, which is 7
It is almost half of 372800 bits.

[0056]

[Formula 19]

Next, consider a case where interpolation data is thinned out in a region where accuracy is relatively unimportant, as in the conventional case. For the areas shown in Equations 20 and 21, the upper 8 bits of the index address of the mantissa part are used.
When the lookup table capacity is compressed, the required lookup table storage capacity is 10.5 × 2048 × 3 ×
40 = 2580480 bits, which is the conventional 39321
It can be compressed much more than 60 bits. With this van der Waals force due to this volume compression, Equation 20 and Equation 2
Although only a precision of about 20 to 23 bits can be obtained in the mantissa in the area indicated by 1, the Coulomb force, which is a simple exponential function, can be calculated with sufficient precision for all input value ranges.

[0058]

[Equation 20]

[0059]

[Equation 21]

Here, in the case of the function input value calculation mode with fast convergence, in the example shown in FIG. 1, the exponent part separated from the input function value is set to zero, and multiplication is performed to add zero to the interpolation approximation calculation result. In the example shown in FIG. 2, the exponent part separated from the input function value is multiplied by zero to add zero to the interpolated approximation calculation result. Therefore, in the present invention, any of these aspects can be adopted in the method of separating the entire exponent part from the function input value and the method of separating the upper bit part of the exponent part. Also, in the case of the method of separating the high-order bit part of the exponent part from the function input value, the number of high-order bits (that is, how many low-order bits are connected to the mantissa part and left) is calculated by the exponential function. The exponent of the exponential function may be treated as an integer.

[0061]

As described above, according to the present invention,
Since the interpolation approximation processing is performed for all of the exponent part of the function input value or for the part excluding the high-order bit part, the memory required for the lookup table used for the interpolation approximation process is ensured while guaranteeing a highly accurate calculation result. The capacity can be reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a main part of an arithmetic device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a main part of an arithmetic device according to another embodiment of the present invention.

FIG. 3 is a diagram showing a relationship between a MULSEL signal and a multiple according to another embodiment of the present invention.

FIG. 4 is a configuration diagram of a main part of a computing device according to a conventional example.

FIG. 5 is a timing chart according to an example of interpolation processing.

FIG. 6 is a diagram illustrating an example of an extended single precision floating point format.

[Explanation of symbols]

1: function input value, 2: exponent part / mantissa part separation means, 6:
Multiplier, 7: Interpolation processing device, 7a: Look-up table, 9: Adder, 21: Function input value, 25: Logical product gate device, 27: Interpolation processing device, 27a: Look-up table, 29: Left shift device , 30, 31: AND gate device, 32: Adder, 33: Sign inverter, 3
5: adder,

Claims (8)

[Claims] 1. A computing device for computing a function input value provided as a floating-point format including an exponent part and a mantissa part, wherein the remaining mantissa part obtained by separating the exponent part from the function input value is used as an input value. Interpolation processing means for performing an interpolation approximation calculation with reference to a lookup table, multiplication means for multiplying an exponent part extracted from the function input value by a preset multiple, and an exponent part of an output value from the interpolation processing part And an adding unit that adds the value of the exponent part multiplied by the multiple. 2. The arithmetic unit according to claim 1, wherein the function input value is a function having a fast convergence in response to a mode instruction signal input depending on whether the function input value is a function having a fast convergence or a function having a slow convergence. In the case of the calculation mode instruction signal, the function input value including the input exponent part and mantissa part is output to the interpolation processing means, and zero is output as the exponent part to the multiplication means, which is a slow convergence function. When the calculation mode instruction signal is, the input exponent part is set to zero, the remaining function input value is output to the interpolation processing means, and the exponent part extracted from the function input value is output to the multiplication means. An arithmetic unit characterized by being provided. 3. The arithmetic unit according to claim 1, wherein the function input value is a function having a fast convergence in response to a mode instruction signal inputted depending on whether the function input value is a function having a fast convergence or a function having a slow convergence. In the case of the calculation mode instruction signal, the function input value including the input exponent part and mantissa part is output to the interpolation processing means, and the exponent part extracted from the function input value is output to the multiplication means. , If the calculation mode instruction signal is a function with slow convergence, the input exponent part is set to zero and the remaining function input value is output to the interpolation processing means, and the exponent part extracted from the function input value is input to the multiplication means. An arithmetic unit, comprising: a separating unit for outputting, wherein the multiplying unit performs a process of multiplying an input exponent part by zero in a calculation mode of a function with fast convergence. 4. A computing device for computing a function input value provided as a floating-point format including an exponent part and a mantissa part, wherein a remainder part obtained by separating the higher-order bit part of the exponent part from the function input value is used. Interpolation processing means for performing an interpolation approximation calculation with reference to a lookup table as an input value; multiplication means for multiplying a high-order bit part of an exponent part extracted from the function input value by a preset multiple; and the interpolation processing means. An arithmetic unit comprising: an adder unit for adding the value of the higher-order bit part of the exponent part multiplied by the multiple to the exponent part of the output value from. 5. The arithmetic unit according to claim 4, wherein the function input value is a function having a fast convergence in response to a mode instruction signal input depending on whether the function input value is a function having a fast convergence or a function having a slow convergence. In the case of the calculation mode instruction signal, the function input value including the input exponent part and mantissa part is output to the interpolation processing means, and zero is output to the multiplication means as the upper bit part of the exponent part. In the case of a calculation mode designating signal of a slow-converging function, the upper bit part of the exponent part is set to zero, the part including the lower bit part of the remaining exponent part and the mantissa part is output to the interpolation processing means, and the function input value An arithmetic unit comprising: a separating means for outputting the extracted high-order bit portion of the exponent portion to the multiplying means. 6. The arithmetic unit according to claim 4, wherein the function input value is a function having a fast convergence in response to a mode instruction signal input depending on whether the function input value is a function having a fast convergence or a function having a slow convergence. When the calculation mode instruction signal is, the function input value including the input exponent part and mantissa part is output to the interpolation processing means, and the higher-order bit part of the exponent part extracted from the function input value is multiplied. In the case of a calculation mode designating signal of a function having a slow convergence, the upper bit part of the input exponent part is set to zero, and the part including the lower bit part of the remaining exponent part and the mantissa part is supplied to the interpolation processing means. A separating means is provided for outputting to the multiplying means the upper bit part of the exponent part extracted from the function input value, and the multiplying means is inputted when the calculation mode of the function with fast convergence. Arithmetic apparatus characterized by performing a process of multiplying a zero to the upper bits of the number of parts. 7. A method for calculating a function input value provided as a floating point format including an exponent part and a mantissa part, wherein an exponent part is separated from the function input value and a lookup table stored in a memory is used. Interpolation approximation calculation of the residual mantissa part by the operation processing referred to, the exponent part extracted from the function input value is multiplied by a preset multiple, and the exponent part of the result value of the interpolation approximation calculation is multiplied by the multiple. An arithmetic method characterized by adding the values of the exponents. 8. A method for calculating a function input value provided as a floating point format including an exponent part and a mantissa part, wherein a high-order bit part of the exponent part is separated from the function input value,
Interpolation approximation calculation is performed on the remaining part of the exponent part whose upper bit part has been separated by arithmetic processing referring to a lookup table stored in the memory, and the upper bit part of the exponent part extracted from the function input value is preset. A calculation method characterized by multiplying by a multiple, and adding the value of the upper bit part of the exponent part multiplied by the multiple to the exponent part of the result value of the interpolation approximation calculation.