JP2003332679A - Semiconductor laser and its manufacturing method - Google Patents

Semiconductor laser and its manufacturing method

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Publication number
JP2003332679A
JP2003332679A JP2002138406A JP2002138406A JP2003332679A JP 2003332679 A JP2003332679 A JP 2003332679A JP 2002138406 A JP2002138406 A JP 2002138406A JP 2002138406 A JP2002138406 A JP 2002138406A JP 2003332679 A JP2003332679 A JP 2003332679A
Authority
JP
Japan
Prior art keywords
layer
inp
conductivity type
diffraction grating
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002138406A
Other languages
Japanese (ja)
Inventor
Junji Tanimura
純二 谷村
Yuichiro Okunuki
雄一郎 奥貫
Hiroyuki Murazaki
宏幸 村崎
Yasuo Nakajima
康雄 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2002138406A priority Critical patent/JP2003332679A/en
Publication of JP2003332679A publication Critical patent/JP2003332679A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor laser which is stable in element characteristics and superior in reliability. <P>SOLUTION: The semiconductor layer is equipped with: a first conductivity- type InP substrate; a first conductivity-type InP buffer layer and an active layer successively formed on the first conductivity-type InP substrate; a diffraction grating which is composed of a second conductivity-type InP barrier layer, a second conductivity-type InGaAs diffraction grating layer, and a second conductivity-type InP cap layer which are successively formed on the active layer and is continuously repeated at prescribed cycles along an optical waveguide direction; and a second conductivity-type first InP clad layer, a second conductivity-type second InP clad layer, and a second conductivity-type InP contact layer which are successively formed on the main surface of the substrate containing the diffraction grating. The side of the diffraction grating forms an angle of 70° to below 90° with the main surface of the wafer in the optical waveguide direction. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体レーザとその
製造方法に関するものであり、より詳細には、再現性よ
く結合定数を所望の値に制御できる結果、素子特性が安
定し、かつ素子が劣化しにくく信頼性の高い回折格子を
有する半導体レーザ、およびその製造方法を提供するた
めのものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser and a method for manufacturing the same, and more specifically, it is possible to control the coupling constant to a desired value with good reproducibility, resulting in stable device characteristics and deterioration of the device. It is intended to provide a semiconductor laser having a diffraction grating that is difficult to perform and has high reliability, and a manufacturing method thereof.

【0002】[0002]

【従来の技術】図7は特開昭60-164380号公報
に開示された回折格子を具備した従来の分布帰還型(以
下、DFB型と言う)半導体レーザの製造方法である。
以下、図7に基づき、回折格子を具備した従来のDFB
型半導体レーザの製造方法を説明する。図中、17はn
型InP基板、18はn型InPバッファ層、19はノ
ンドープIn0.72Ga0.28As0.61
0.39活性層、20はp型In0.85Ga0.15
As0.330.67光ガイド層、21はp型InP
キャップ層、22はp型InPクラッド層、をそれぞれ
示す。
2. Description of the Related Art FIG. 7 shows a method of manufacturing a conventional distributed feedback (hereinafter referred to as DFB) semiconductor laser provided with a diffraction grating disclosed in Japanese Patent Laid-Open No. 164380/60.
Hereinafter, a conventional DFB having a diffraction grating will be described with reference to FIG.
A method for manufacturing the semiconductor laser will be described. In the figure, 17 is n
Type InP substrate, 18 n-type InP buffer layer, 19 undoped In 0.72 Ga 0.28 As 0.61 P
0.39 active layer, 20 is p-type In 0.85 Ga 0.15
As 0.33 P 0.67 Light guide layer, 21 is p-type InP
A cap layer and 22 are p-type InP clad layers, respectively.

【0003】まず、エピタキシャル結晶成長法により、
n型InP基板上17にn型InPバッファ層18を5
μm、ノンドープIn0.72Ga0.28As
0.61 0.39活性層19を0.1μm、p型In
0.85Ga0.15As0.330.67光ガイド
層20を0.15μm、メルトバック耐性の高いp型I
nPキャップ層21を0.05μm、順次結晶成長す
る。
First, by the epitaxial crystal growth method,
The n-type InP buffer layer 18 is formed on the n-type InP substrate 17 by 5
μm, undoped In0.72Ga0.28As
0.61P 0.390.1 μm active layer 19 with p-type In
0.85Ga0.15As0.33P0.67Light guide
Layer 20 is 0.15 μm, p-type I with high meltback resistance
Crystal growth of the nP cap layer 21 is sequentially performed by 0.05 μm.
It

【0004】結晶成長後のウエハにリソグラフィ技術お
よびエッチング技術を適用して、p型InPキャップ層
21を完全に突き抜け、底部がp型In0.85Ga
0.1 As0.330.67光ガイド層20中に達
する回折格子12を形成する。この回折格子12上に2
回目のエピタキシャル結晶成長、つまり再結晶成長を行
い、p型InPクラッド層22を厚さ1μm程度結晶成
長させて、回折格子12を具備するDFB型半導体レー
ザ用のダブルヘテロ構造ウエハを得る。なお、p型In
Pクラッド層22は550℃の結晶成長温度で成長して
いる。エピタキシャル結晶成長後のダブルヘテロ構造ウ
エハに対して、メサエッチング、埋め込み結晶成長をさ
らに行い、両面をへき開し、両端面に端面反射膜を成膜
して(図示せず)、単一モード動作するDFB型半導体
レーザが得られた。
Lithography and etching techniques are applied to the wafer after crystal growth to completely penetrate the p-type InP cap layer 21 and the bottom part thereof is p-type In 0.85 Ga.
0.1 5 As 0.33 P 0.67 The diffraction grating 12 reaching the light guide layer 20 is formed. 2 on this diffraction grating 12
The epitaxial crystal growth for the second time, that is, recrystallization growth is performed, and the p-type InP cladding layer 22 is crystal-grown to a thickness of about 1 μm to obtain a double heterostructure wafer having a diffraction grating 12 for a DFB semiconductor laser. Note that p-type In
The P clad layer 22 is grown at a crystal growth temperature of 550 ° C. Mesa etching and buried crystal growth are further performed on the double heterostructure wafer after epitaxial crystal growth, both sides are cleaved, end face reflection films are formed on both end faces (not shown), and single mode operation is performed. A DFB type semiconductor laser was obtained.

【0005】かかる回折格子を具備する従来のDFB型
半導体レーザの製造方法では、回折格子12上にエピタ
キシャル結晶成長の一種である液相結晶成長(LPE
法)時に生じるメルトバックに対する耐性の高いp型I
nPキャップ層21が形成されているため、回折格子1
2のメルトバック、つまり液相結晶成長法における再結
晶成長時に下地の結晶成長層が液相中に溶けてしまうと
いう不具合を最小限に抑制できる。この結果、回折格子
12の深さが保存され、DFB型半導体レーザで極めて
重要な結合定数を大きな値に維持できた。ここで、結合
定数とは、光導波路内をおのおの反対方向に伝搬する光
が回折格子により回折されて単位長さ当たりに結合しあ
う度合いを表し、一般に回折格子の深さが大きくなるほ
ど、結合定数もまた大きくなる。
In the conventional method of manufacturing a DFB semiconductor laser having such a diffraction grating, liquid phase crystal growth (LPE), which is a kind of epitaxial crystal growth, is formed on the diffraction grating 12.
Method) p-type I having high resistance to meltback
Since the nP cap layer 21 is formed, the diffraction grating 1
The meltback of No. 2, that is, the problem that the underlying crystal growth layer is melted in the liquid phase during the recrystallization growth in the liquid phase crystal growth method can be minimized. As a result, the depth of the diffraction grating 12 was preserved, and a very important coupling constant in the DFB semiconductor laser could be maintained at a large value. Here, the coupling constant refers to the degree to which light propagating in the optical waveguide in opposite directions is diffracted by the diffraction grating and is coupled per unit length. Generally, as the depth of the diffraction grating increases, the coupling constant increases. Will also grow.

【0006】また、図8は特開平10−22558号公
報に開示された回折格子を備えた他の従来技術によるD
FB型半導体レーザの製造方法を示したものである。図
中、21はp型InPキャップ層、22はp型InPク
ラッド層、23はn型InGaAsPガイド層、24は
InGaAsP活性層、25はp型InGaAsPガイ
ド層、26はp型InP層、27はp型InGaAsP
回折格子層、28はp型InGaAsPコンタクト層、
をそれぞれ示す。
Further, FIG. 8 shows another conventional D having the diffraction grating disclosed in Japanese Patent Laid-Open No. 10-22558.
3 shows a method for manufacturing an FB type semiconductor laser. In the figure, 21 is a p-type InP cap layer, 22 is a p-type InP clad layer, 23 is an n-type InGaAsP guide layer, 24 is an InGaAsP active layer, 25 is a p-type InGaAsP guide layer, 26 is a p-type InP layer, and 27 is p-type InGaAsP
Diffraction grating layer, 28 is p-type InGaAsP contact layer,
Are shown respectively.

【0007】以下に、他の従来技術によるDFB型半導
体レーザの製造方法を説明する。n型InP基板17に
n型InGaAsPガイド層23、InGaAsP活性
層24、p型InGaAsPガイド層25を順次エピタ
キシャル結晶成長する(図8(a))。光閉じ込め・電
流ブロック構造を形成した後(図示せず)、p型InP
層26、p型InGaAsP回折格子層27、p型In
Pキャップ層21を順次エピタキシャル結晶成長する
(図8(b))。
A method of manufacturing a DFB semiconductor laser according to another conventional technique will be described below. An n-type InGaAsP guide layer 23, an InGaAsP active layer 24, and a p-type InGaAsP guide layer 25 are sequentially epitaxially grown on the n-type InP substrate 17 (FIG. 8A). After forming the optical confinement / current block structure (not shown), p-type InP
Layer 26, p-type InGaAsP diffraction grating layer 27, p-type In
The P cap layer 21 is sequentially epitaxially grown (FIG. 8B).

【0008】干渉露光技術(フォトリソグラフィ技
術)、エッチング技術等を用いて回折格子12を形成す
る(図8(c))。エッチング底部はp型InPキャッ
プ層21表面からInGaAsP回折格子層27を経
て、p型InP層26中に達しているが、p型InGa
AsPガイド層25には達していない箇所に位置してい
る。回折格子12上にp型InPクラッド層22をエピ
タキシャル結晶成長して、回折格子12を埋め込む。な
お、p型InPクラッド層22のエピタキシャル結晶成
長時の結晶成長温度については記述されていない。p型
InPクラッド層22上に、さらにp型InGaAsP
コンタクト層28をエピタキシャル結晶成長し(図8
(d))、上下ウエハ主面への電極の形成、劈開による
光共振器の形成(図示せず)によりDFB型半導体レー
ザを得る。
The diffraction grating 12 is formed by using an interference exposure technique (photolithography technique), an etching technique or the like (FIG. 8C). The etching bottom reaches the p-type InP layer 26 from the surface of the p-type InP cap layer 21 through the InGaAsP diffraction grating layer 27.
It is located at a position that does not reach the AsP guide layer 25. The p-type InP clad layer 22 is epitaxially grown on the diffraction grating 12 to embed the diffraction grating 12. Note that the crystal growth temperature during epitaxial crystal growth of the p-type InP clad layer 22 is not described. Further on the p-type InP clad layer 22, p-type InGaAsP
The contact layer 28 is epitaxially grown (FIG. 8).
(D)) A DFB semiconductor laser is obtained by forming electrodes on the upper and lower wafer main surfaces and forming an optical resonator by cleavage (not shown).

【0009】かかる他の従来技術によるDFB型半導体
レーザでは、p型InPクラッド層22を結晶成長する
際にウエハが結晶成長温度で加熱される影響によって回
折格子形状の変形を受ける部分がp型InPキャップ層
21のみに抑制され、回折格子として機能すべく設けら
れたInGaAsP回折格子層27の形状変化は起こら
なかった。これは、InGaAsP回折格子層27がそ
の上部に形成されたp型InPキャップ層21によって
保護されているからである。この結果、回折格子の深さ
の制御性が向上し、回折格子深さに強く依存する結合定
数を容易に制御できた。
In such another conventional DFB type semiconductor laser, when the crystal of the p-type InP cladding layer 22 is grown, the portion of the p-type InP that is deformed by the influence of heating of the wafer at the crystal growth temperature is deformed. The shape of the InGaAsP diffraction grating layer 27, which was suppressed only by the cap layer 21 and was provided to function as a diffraction grating, did not occur. This is because the InGaAsP diffraction grating layer 27 is protected by the p-type InP cap layer 21 formed thereon. As a result, the controllability of the depth of the diffraction grating was improved, and the coupling constant strongly dependent on the depth of the diffraction grating could be easily controlled.

【0010】[0010]

【発明が解決しようとする課題】DFB型半導体レーザ
では、光波と回折格子との結合が最も重要なパラメータ
であり、単一モード性、温度特性等の素子特性を安定化
させるため、結合定数を所望の値に作りこむことが最も
重要である。しかしながら、上述の従来技術では作製し
た回折格子の深さ制御の重要性が指摘されているのみ
で、回折格子の形状における重要な要素の一つである側
面角度、すなわち光導波方向における回折格子の側面と
ウエハ主面のなす角度については何ら言及されてなかっ
た。
In the DFB semiconductor laser, the coupling between the light wave and the diffraction grating is the most important parameter, and in order to stabilize the device characteristics such as single mode property and temperature characteristic, the coupling constant is Creating the desired value is of paramount importance. However, the above-mentioned prior art only points out the importance of controlling the depth of the manufactured diffraction grating, and the side angle, which is one of the important factors in the shape of the diffraction grating, that is, the diffraction grating in the optical waveguide direction. No mention was made of the angle between the side surface and the main surface of the wafer.

【0011】また、従来のDFB型半導体レーザの製造
方法では、かかる回折格子の側面角度の制御は困難であ
った。よって、従来のDFB型半導体レーザでは製造上
不可避な回折格子の周期性ばらつき、つまり回折格子の
底部の幅が個々の回折格子間で周期的にばらつくことに
起因する結合定数の制御性の悪化が生じ、この結果、素
子特性が安定しない問題があった。さらに、回折格子に
対する変形防止層を回折格子上に挿入したことにより埋
め込み成長時に段差が大きくなってしまい、この段差の
影響で埋め込み層に多数の結晶欠陥が発生し、素子の信
頼性が低下する不具合も生じた。
Further, in the conventional method of manufacturing a DFB type semiconductor laser, it is difficult to control the side surface angle of the diffraction grating. Therefore, in the conventional DFB type semiconductor laser, the periodicity variation of the diffraction grating, which is inevitable in manufacturing, that is, the controllability of the coupling constant is deteriorated due to the variation of the bottom width of the diffraction grating between the individual diffraction gratings. As a result, there is a problem that the device characteristics are not stable. Furthermore, since the deformation prevention layer for the diffraction grating is inserted on the diffraction grating, the step becomes large during the burying growth, and a large number of crystal defects occur in the buried layer due to the effect of the step, and the reliability of the device deteriorates. There was also a defect.

【0012】本発明の半導体レーザおよびその製造方法
は、回折格子の側面角度を所定の角度に制御することに
より、回折格子における底部の幅の周期性ばらつきに対
する結合定数の制御性が向上して、この結果、素子特性
の安定した半導体レーザを得ることを目的としている。
In the semiconductor laser and the method for manufacturing the same according to the present invention, by controlling the side surface angle of the diffraction grating to a predetermined angle, the controllability of the coupling constant with respect to the periodic variation of the width of the bottom of the diffraction grating is improved, As a result, the objective is to obtain a semiconductor laser with stable device characteristics.

【0013】また、本発明の半導体レーザおよびその製
造方法は、埋め込み層の結晶欠陥が低減された信頼性の
高い半導体レーザを得ることを目的としている。
Another object of the present invention is to provide a semiconductor laser and a method of manufacturing the same, which provides a highly reliable semiconductor laser in which crystal defects in the buried layer are reduced.

【0014】[0014]

【課題を解決するための手段】本発明に係る半導体レー
ザは、第1導電型のInP基板と、上記第1導電型のI
nP基板上に形成された第1導電型のInPバッファ層
と、上記第1導電型のInPバッファ層上に形成された
活性層と、上記活性層上に順次形成された第2導電型の
InPバリア層、第2導電型のInGaAsP回折格子
層および第2導電型のInPキャップ層からなる各層で
構成され、かつ光導波方向に沿って所定の周期で連続的
に繰り返された回折格子と、上記回折格子を含むウエハ
主面上に順次形成された第2導電型の第1InPクラッ
ド層、第2導電型の第2InPクラッド層および第2導
電型のInPコンタクト層と、を備え、光導波方向にお
ける上記回折格子の側面とウエハ主面のなす角を70度
以上90度未満とした。
A semiconductor laser according to the present invention includes a first conductivity type InP substrate and the first conductivity type IP substrate.
A first conductivity type InP buffer layer formed on an nP substrate, an active layer formed on the first conductivity type InP buffer layer, and a second conductivity type InP sequentially formed on the active layer. A diffraction grating which is composed of a barrier layer, a second conductivity type InGaAsP diffraction grating layer, and a second conductivity type InP cap layer, and which is continuously repeated at a predetermined cycle along the optical waveguide direction; A first conductivity type InP clad layer, a second conductivity type second InP clad layer, and a second conductivity type InP contact layer that are sequentially formed on the main surface of the wafer including the diffraction grating. The angle formed between the side surface of the diffraction grating and the main surface of the wafer is 70 degrees or more and less than 90 degrees.

【0015】また、本発明に係る半導体レーザは、上記
第2導電型の第1InPクラッド層の層厚を0.025
μm以上0.1μm以下とした。
Also, in the semiconductor laser according to the present invention, the layer thickness of the second conductivity type first InP cladding layer is 0.025.
It was set to be not less than μm and not more than 0.1 μm.

【0016】本発明に係る半導体レーザの製造方法は、
ウエハ主面に回折格子を形成する工程と、上記回折格子
を含むウエハ主面上に結晶成長温度TG1で第1の半導
体層をエピタキシャル結晶成長する工程と、上記第1の
半導体層上に結晶成長温度TG2で第2の半導体層をエ
ピタキシャル結晶成長する工程と、を含んでなり、上記
結晶成長温度TG1を上記結晶成長温度TG2より50
〜70℃低温とした。
A method of manufacturing a semiconductor laser according to the present invention is
A step of forming a diffraction grating on the main surface of the wafer; a step of epitaxially growing a first semiconductor layer on the main surface of the wafer including the diffraction grating at a crystal growth temperature TG1; and a crystal growth on the first semiconductor layer. A step of epitaxially growing the second semiconductor layer at a temperature TG2, wherein the crystal growth temperature TG1 is higher than the crystal growth temperature TG2 by 50.
The temperature was set at a low temperature of 70 ° C.

【0017】また、本発明に係る半導体レーザの製造方
法は、上記第2の半導体層をエピタキシャル結晶成長す
る工程後、光導波方向における上記回折格子の側面とウ
エハ主面のなす角を70度以上90度未満とした。
Further, in the method for manufacturing a semiconductor laser according to the present invention, after the step of epitaxially growing the second semiconductor layer, the angle between the side surface of the diffraction grating and the main surface of the wafer in the optical waveguide direction is 70 degrees or more. The angle is less than 90 degrees.

【0018】また、本発明に係る半導体レーザの製造方
法は、第1導電型のInP基板上に、第1導電型のIn
Pバッファ層、活性層、第2導電型のInPバリア層、
第2導電型のInGaAsP回折格子層および第2導電
型のInPキャップ層の各層を順次エピタキシャル結晶
成長する工程と、リソグラフィ技術とドライエッチング
技術によって上記第2導電型のInPバリア層、上記第
2導電型のInGaAsP回折格子層および上記第2導
電型のInPキャップ層に、光導波方向に沿って所定の
周期で連続的に繰り返された回折格子を形成する工程
と、上記回折格子を含むウエハ主面上に第2導電型の第
1InPクラッド層をエピタキシャル結晶成長する工程
と、上記第2導電型の第1InPクラッド層上に第2導
電型の第2InPクラッド層および第2導電型のInP
コンタクト層を順次エピタキシャル結晶成長する工程
と、を含んでなり、上記第2導電型の第1InPクラッ
ド層をエピタキシャル結晶成長する際の結晶成長温度T
G1を、上記第2導電型の第2InPクラッド層をエピ
タキシャル結晶成長する際の結晶成長温度TG2より5
0〜70℃低温とした。
In the method of manufacturing a semiconductor laser according to the present invention, the first conductivity type InP substrate is formed on the first conductivity type InP substrate.
P buffer layer, active layer, second conductivity type InP barrier layer,
A step of sequentially epitaxially growing each layer of the second conductivity type InGaAsP diffraction grating layer and the second conductivity type InP cap layer, and the second conductivity type InP barrier layer and the second conductivity by a lithography technique and a dry etching technique. Type InGaAsP diffraction grating layer and the second conductivity type InP cap layer, forming a diffraction grating continuously repeated at a predetermined period along the optical waveguide direction, and a wafer main surface including the diffraction grating A step of epitaxially growing a second conductivity type first InP clad layer thereon, and a second conductivity type second InP clad layer and a second conductivity type InP on the second conductivity type first InP clad layer.
A step of sequentially performing epitaxial crystal growth on the contact layer, and a crystal growth temperature T when epitaxially growing the second conductivity type first InP clad layer.
G1 is 5 from the crystal growth temperature TG2 at the time of epitaxial crystal growth of the second conductivity type second InP clad layer.
The temperature was set to a low temperature of 0 to 70 ° C.

【0019】また、本発明に係る半導体レーザの製造方
法は、第1導電型のInP基板上に、第1導電型のIn
Pバッファ層、活性層、第2導電型のInPバリア層、
第2導電型のInGaAsP回折格子層および第2導電
型のInPキャップ層の各層を順次エピタキシャル結晶
成長する工程と、リソグラフィ技術とドライエッチング
技術によって上記第2導電型のInPバリア層、上記第
2導電型のInGaAsP回折格子層および上記第2導
電型のInPキャップ層に、光導波方向に沿って所定の
周期で連続的に繰り返された回折格子を形成する工程
と、加熱処理によるマストランスポートによって上記第
2導電型のInPキャップ層を溶融させて上記回折格子
を含むウエハ主面を覆う第2導電型の第1InPクラッ
ド層を形成する工程と、上記第2導電型の第1InPク
ラッド層上に第2導電型の第2InPクラッド層および
第2導電型のInPコンタクト層を順次エピタキシャル
結晶成長する工程と、を含んでなり、上記第2導電型の
InPキャップ層を加熱処理する際の加熱処理温度TG
3を、上記第2導電型の第2InPクラッド層をエピタ
キシャル結晶成長する際の結晶成長温度TG2より50
〜70℃低温とした。
In the method of manufacturing a semiconductor laser according to the present invention, the first conductivity type InP substrate is formed on the first conductivity type InP substrate.
P buffer layer, active layer, second conductivity type InP barrier layer,
A step of sequentially epitaxially growing each layer of the second conductivity type InGaAsP diffraction grating layer and the second conductivity type InP cap layer, and the second conductivity type InP barrier layer and the second conductivity by a lithography technique and a dry etching technique. Type InGaAsP diffraction grating layer and the second conductivity type InP cap layer, a step of forming a diffraction grating that is continuously repeated at a predetermined period along the optical waveguide direction, and a mass transport by heat treatment. A step of melting the second conductivity type InP cap layer to form a second conductivity type first InP clad layer covering the main surface of the wafer including the diffraction grating; and a step of forming a second conductivity type first InP clad layer on the second conductivity type first InP clad layer. A step of sequentially epitaxially growing a second conductivity type second InP cladding layer and a second conductivity type InP contact layer; Comprise becomes, the heat treatment temperature TG at the time of heat treatment of the InP cap layer of the second conductivity type
3 is 50 from the crystal growth temperature TG2 when epitaxially growing the second conductivity type second InP clad layer.
The temperature was set at a low temperature of 70 ° C.

【0020】また、本発明に係る半導体レーザの製造方
法は、上記第2導電型のInPキャップ層を0.15μ
m以上0.3μm以下とした。
In the method of manufacturing a semiconductor laser according to the present invention, the second conductivity type InP cap layer is formed by 0.15 μm.
It was set to m or more and 0.3 μm or less.

【0021】また、本発明に係る半導体レーザの製造方
法は、上記結晶成長温度TG2を540〜580℃の範
囲とした。
In the method of manufacturing a semiconductor laser according to the present invention, the crystal growth temperature TG2 is set in the range of 540 to 580 ° C.

【0022】また、本発明に係る半導体レーザの製造方
法は、上記第2導電型の第2InPクラッド層および上
記第2導電型のInPコンタクト層を順次エピタキシャ
ル結晶成長する工程後、光導波方向における上記回折格
子の側面とウエハ主面のなす角を70度以上90度未満
とした。
Further, in the method of manufacturing a semiconductor laser according to the present invention, after the step of sequentially epitaxially growing the second conductivity type second InP cladding layer and the second conductivity type InP contact layer, the above-mentioned method in the optical waveguide direction is adopted. The angle formed between the side surface of the diffraction grating and the main surface of the wafer was 70 degrees or more and less than 90 degrees.

【0023】[0023]

【発明の実施の形態】実施の形態1.本発明の実施の形
態1における半導体レーザの製造方法を図1〜3に基づ
き説明する。ここで、図1は本発明の実施の形態1にお
ける半導体レーザの製造方法、図2は実施の形態1の半
導体レーザにおけるMQW活性層の構成を示す断面図、
図3は実施の形態1の半導体レーザにおける回折格子の
一部の断面図、をそれぞれ示している。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. A method of manufacturing a semiconductor laser according to the first embodiment of the present invention will be described with reference to FIGS. Here, FIG. 1 is a method for manufacturing a semiconductor laser according to the first embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a configuration of an MQW active layer in the semiconductor laser according to the first embodiment,
FIG. 3 is a sectional view of a part of the diffraction grating in the semiconductor laser of the first embodiment.

【0024】以下に、実施の形態1における半導体レー
ザの製造方法を説明する。図中、1はp型InP基板、
2はp型InPバッファ層、3は多重量子井戸活性層
(MQW活性層)、4はn型InPバリア層、5はn型
In0.8Ga0.2As0. 0.6回折格子層、
6はn型InPキャップ層、7はn型第1InPクラッ
ド層(第1の半導体層)、8はn型第2InPクラッド
層(第2の半導体層)、10はn電極、11はp電極、
12は回折格子、13は回折格子の側面角度、14はI
0.8Ga0.2As0.90.1ウエル層、15
はIn0.7Ga 0.3As0.60.4バリア層、
をそれぞれ示す。
The semiconductor laser of the first embodiment will be described below.
The manufacturing method of the z will be described. In the figure, 1 is a p-type InP substrate,
2 is a p-type InP buffer layer, 3 is a multiple quantum well active layer
(MQW active layer) 4, n-type InP barrier layer, 5 n-type
In0.8Ga0.2As0. FourP0.6Diffraction grating layer,
6 is an n-type InP cap layer, and 7 is an n-type first InP cladding layer.
Layer (first semiconductor layer), 8 is n-type second InP clad
Layer (second semiconductor layer), 10 is n-electrode, 11 is p-electrode,
12 is a diffraction grating, 13 is a side angle of the diffraction grating, and 14 is I
n0.8Ga0.2As0.9P0.1Well layer, 15
Is In0.7Ga 0.3As0.6P0.4Barrier layer,
Are shown respectively.

【0025】まず、p型InP基板1上にp型InPバ
ッファ層2を2μm厚積層し、次に図2の断面図に示さ
れるような0.01μm厚のIn0.7Ga0.3As
0. 0.4バリア層15と0.01μm厚のIn
0.8Ga0.2As0.9 0.1ウエル層14を9
層積層した多重量子井戸活性層(MQW活性層)3を積
層する。さらに、n型InPバリア層4を0.3μm、
n型In0.8Ga0. As0.40.6回折格子
層5を0.05μm、n型InPキャップ層6を0.0
5μm、順次積層する(図1(a))。ここで、エピタ
キシャル結晶成長方法としては、有機金属気相成長法、
いわゆるMOCVD(Metal Organic Chemical Vapor De
position)法を用いる。
First, a p-type InP substrate 1 is formed on the p-type InP substrate 1.
The buffer layer 2 is laminated to a thickness of 2 μm and then shown in the sectional view of FIG.
With a thickness of 0.01 μm0.7Ga0.3As
0. 6P0.4Barrier layer 15 and 0.01 μm thick In
0.8Ga0.2As0.9P 0.19 well layers 14
Multi-quantum well active layer (MQW active layer) 3 stacked
Layer. Furthermore, the n-type InP barrier layer 4 is 0.3 μm,
n-type In0.8Ga0. TwoAs0.4P0.6Diffraction grating
The layer 5 is 0.05 μm, and the n-type InP cap layer 6 is 0.0
Layers of 5 μm are sequentially laminated (FIG. 1A). Where epita
The axial crystal growth method includes a metal organic chemical vapor deposition method,
The so-called MOCVD (Metal Organic Chemical Vapor De
position) method is used.

【0026】上述のエピタキシャル結晶成長後、電子線
露光等のリソグラフィ技術およびドライエッチング技術
を用いて光導波方向に沿って所定周期で連続する回折格
子12を形成する。この場合のエッチング深さはn型I
nPキャップ層6、n型In 0.8Ga0.2As
0.40.6回折格子層5を経てn型InPバリア層
4の途中にまで達するようにする。また、n型In
0.8Ga0.2As0.4 0.6回折格子層5のド
ライエッチングでは容易にほぼ垂直方向にエッチングで
きるため、回折格子12のエッチング角度、つまり回折
格子の側面角度13(図3)はウエハ主面に対して80
度を中心に70度以上90度未満の範囲になる。ちなみ
に、このウエハ主面とはp型InP基板1表面に平行な
面を意味する。回折格子12形成後、回折格子12を含
むウエハ主面上にn型第1InPクラッド層7(第1の
半導体層)を0.05μm結晶成長し、さらにn型第2
InPクラッド層8(第2の半導体層)を0.5μm積
層する。
After the above epitaxial crystal growth, an electron beam
Lithography technology such as exposure and dry etching technology
Using a diffraction pattern that is continuous in a predetermined period along the optical waveguide direction.
Form the child 12. In this case, the etching depth is n-type I.
nP cap layer 6, n-type In 0.8Ga0.2As
0.4P0.6N-type InP barrier layer through the diffraction grating layer 5
Try to reach midway through 4. In addition, n-type In
0.8Ga0.2As0.4P 0.6The diffraction grating layer 5
It is easy to use ly etching to etch in a substantially vertical direction.
Therefore, the etching angle of the diffraction grating 12, that is, diffraction
The side surface angle 13 (FIG. 3) of the grating is 80 with respect to the main surface of the wafer.
The range is 70 degrees or more and less than 90 degrees centering on the degree. By the way
The main surface of the wafer is parallel to the surface of the p-type InP substrate 1.
Means a face. After forming the diffraction grating 12, the diffraction grating 12 is included.
The n-type first InP clad layer 7 (first
(Semiconductor layer) with a crystal growth of 0.05 μm, and the n-type second
0.5 μm product of InP clad layer 8 (second semiconductor layer)
Layer.

【0027】この際、n型第1InPクラッド層7の結
晶成長温度TG1は500℃とし、n型第2InPクラ
ッド層8の結晶成長温度TG2は560℃とする。すな
わち、意図的に結晶成長温度TG1に対して結晶成長温
度TG2を相対的に60℃程度高温に設定する。このと
き、n型第1InPクラッド層7は相対的に低温(TG
1)である結晶成長温度500℃で結晶成長しているた
め、熱の影響による回折格子12の形状の変形はn型I
nPキャップ層6のみに生じ、n型InPキャップ層6
下部のn型In0.8Ga0.2As0.40.6
折格子層5のエッチング形状は変形しない。つまり、回
折格子12の側面角度13はエッチング直後とほぼ同一
の値を示す。これは、n型In0.8Ga0.2As
0.4 .6回折格子層5の上部がn型InPキャッ
プ層6で覆われて保護されているからである。さらに、
n型第1InPクラッド層7の成長膜厚を0.05μm
と極めて薄くしているので、回折格子の段差部分での結
晶欠陥の発生も起こらない。なお、この段差部分とは、
台形状の回折格子の底辺部におけるエッジ部分と上辺部
のエッジ部分の計4個所を指す。結晶成長温度TG1、
つまり500℃でエピタキシャル結晶成長したn型第1
InPクラッド層7では、膜厚0.05μmの場合は、
透過電子顕微鏡による観察では結晶欠陥は全く観察され
なかった。これは、結晶欠陥密度が3×1017cm
−2以下であることを示唆している。一方、膜厚0.2
μmの場合は、観察された結晶欠陥密度は3×1019
cm−2に達し、素子特性、特に信頼性に悪影響を及ぼ
す。この観察結果から、n型第1InPクラッド層7の
膜厚が結晶欠陥密度に強く影響していることが判った。
At this time, the crystal growth temperature TG1 of the n-type first InP clad layer 7 is 500 ° C., and the crystal growth temperature TG2 of the n-type second InP clad layer 8 is 560 ° C. That is, the crystal growth temperature TG2 is intentionally set to a high temperature of about 60 ° C. with respect to the crystal growth temperature TG1. At this time, the n-type first InP cladding layer 7 has a relatively low temperature (TG
Since the crystal is grown at the crystal growth temperature of 500 ° C., which is 1), the deformation of the shape of the diffraction grating 12 due to the influence of heat is n-type I.
The n-type InP cap layer 6 occurs only in the nP cap layer 6.
The etching shape of the lower n-type In 0.8 Ga 0.2 As 0.4 P 0.6 diffraction grating layer 5 is not deformed. That is, the side surface angle 13 of the diffraction grating 12 has almost the same value as immediately after etching. This is n-type In 0.8 Ga 0.2 As
0.4 P 0 . This is because the upper part of the 6- diffraction grating layer 5 is covered and protected by the n-type InP cap layer 6. further,
The growth film thickness of the n-type first InP cladding layer 7 is 0.05 μm.
Since it is extremely thin, crystal defects do not occur at the step portion of the diffraction grating. In addition, this step portion is
It indicates a total of four places, the edge part at the bottom part and the edge part at the top part of the trapezoidal diffraction grating. Crystal growth temperature TG1,
That is, n-type first epitaxially grown at 500 ° C
In the InP clad layer 7, when the film thickness is 0.05 μm,
No crystal defect was observed by transmission electron microscopy. This has a crystal defect density of 3 × 10 17 cm
-2 or less is suggested. On the other hand, film thickness 0.2
In the case of μm, the observed crystal defect density is 3 × 10 19
cm −2 , which adversely affects device characteristics, especially reliability. From this observation result, it was found that the film thickness of the n-type first InP clad layer 7 strongly influences the crystal defect density.

【0028】上述の結晶成長温度は、MOCVD結晶成
長装置内でp型InP基板1を載置するサセプタの温度
を熱電対で測定する方法、あるいはサセプタを直接パイ
ロメータで測定する方法によって実測される。
The above-mentioned crystal growth temperature is measured by a method of measuring the temperature of the susceptor on which the p-type InP substrate 1 is mounted in the MOCVD crystal growth apparatus by a thermocouple or a method of directly measuring the susceptor by a pyrometer.

【0029】次に、n型第2InPクラッド層8の結晶
成長では結晶成長温度TG2は相対的に高温である56
0℃に設定しているが、回折格子12は既に全体をn型
第1InPクラッド層7で覆われているので形状変化は
生じず、エッチング直後の回折格子の側面角度13を良
好に保持できる。また、かかる結晶成長温度TG2は表
面拡散が充分に生じる程度に高温であるため、回折格子
12における段差部分での結晶欠陥は殆ど発生しない効
果がある。
Next, in the crystal growth of the n-type second InP cladding layer 8, the crystal growth temperature TG2 is relatively high 56.
Although the temperature is set to 0 ° C., the diffraction grating 12 is already entirely covered with the n-type first InP cladding layer 7, so that no shape change occurs, and the side surface angle 13 of the diffraction grating immediately after etching can be favorably maintained. Further, since the crystal growth temperature TG2 is high enough to cause surface diffusion, there is an effect that crystal defects at the step portion of the diffraction grating 12 hardly occur.

【0030】その後、光導波路形成を目的としたメサエ
ッチングを行い、次いで、電流狭窄を目的とした電流ブ
ロック構造(図示せず)を結晶成長し、さらにn型In
Pコンタクト層9を1μm厚積層してエピタキシャル結
晶成長を全て完了した後に、ウエハ表面側にn電極1
0、ウエハ裏面側にp電極11を真空蒸着法、スパッタ
法等の手段によって成膜して、ウエハプロセスが終了す
る。アセンブリ工程において、素子両端面をへき開によ
って形成し、その前後端面に端面反射膜を形成して、チ
ップ分離を施して単一モード動作する半導体レーザを得
る。
After that, mesa etching for the purpose of forming an optical waveguide is performed, then a current block structure (not shown) for the purpose of current confinement is crystal-grown, and n-type In is further added.
After the P contact layer 9 is laminated to a thickness of 1 μm to complete the epitaxial crystal growth, the n electrode 1 is formed on the wafer surface side.
0, the p-electrode 11 is formed on the back surface of the wafer by a method such as a vacuum evaporation method or a sputtering method, and the wafer process is completed. In the assembly process, both end faces of the device are formed by cleavage, end face reflection films are formed on the front and rear end faces thereof, and chip separation is performed to obtain a semiconductor laser that operates in a single mode.

【0031】このようにして得られた実施の形態1の半
導体レーザでは、回折格子12の形状がエッチング形状
のまま保持され、素子完成後の回折格子の側面角度13
がエッチング直後と同じほぼ80度となること、回折格
子を埋め込んだn型第1InPクラッド層7、n型第2
InPクラッド層8に結晶欠陥が殆ど発生しないことが
透過電子顕微鏡観察によって確認された。
In the semiconductor laser of the first embodiment thus obtained, the shape of the diffraction grating 12 is maintained as it is, and the side surface angle 13 of the diffraction grating after completion of the element is 13
Is about 80 degrees just after etching, the n-type first InP cladding layer 7 with the diffraction grating embedded, and the n-type second
It was confirmed by transmission electron microscope observation that almost no crystal defects were generated in the InP clad layer 8.

【0032】図4は回折格子幅/周期(以下、duty
と呼ぶ)に対する結合定数の変動を回折格子12の側面
角度13が40度と80度の場合に計算した結果であ
る。なお、回折格子幅は回折格子12の底部で規定され
る。結合定数はdutyに対して正弦曲線を描く。回折
格子12の側面角度13が小さくなるにつれて、正弦曲
線のピーク値はdutyの大きい方に移動する。回折格
子周期はおよそ0.2μm程度であるので、dutyが
50%以上の回折格子12を形成するためには加工幅が
0.1μm以下となり、加工自体が困難となる。それゆ
え、dutyは一般に50%近傍で設計されるが、製造
時にはウエハプロセス上必ずdutyのばらつきが生じ
る。
FIG. 4 shows the diffraction grating width / period (hereinafter referred to as duty).
This is the result of calculation of the variation of the coupling constant with respect to (when referred to as) when the side surface angle 13 of the diffraction grating 12 is 40 degrees and 80 degrees. The diffraction grating width is defined by the bottom of the diffraction grating 12. The coupling constant draws a sine curve with respect to duty. As the side surface angle 13 of the diffraction grating 12 becomes smaller, the peak value of the sine curve moves toward the larger duty. Since the diffraction grating period is about 0.2 μm, the processing width is 0.1 μm or less in order to form the diffraction grating 12 having a duty of 50% or more, which makes the processing itself difficult. Therefore, the duty is generally designed to be around 50%, but variations in the duty always occur in the wafer process during manufacturing.

【0033】dutyばらつきを50±10%とした場
合の結合定数の変動幅を、回折格子の側面角度13が4
0度と80度に対して計算した結果を図5に示す。同じ
dutyばらつきに対して結合定数変動は、回折格子の
側面角度13が80度の場合では側面角度40度の場合
の半分以下に低減されることが分かる。本発明の実施の
形態1の半導体レーザでは回折格子の側面角度13を7
0度以上90度未満、望ましくは75度以上85度以下
とし、その中心値を80度近傍としたので、製造工程上
不可避なdutyばらつきを低減できるため、結合定数
の変動が抑制され、この結果、結合定数の制御性が向上
して素子特性が安定する効果がある。
The variation width of the coupling constant when the duty variation is 50 ± 10% is obtained by setting the side surface angle 13 of the diffraction grating to 4
The results calculated for 0 and 80 degrees are shown in FIG. It can be seen that the variation of the coupling constant with respect to the same duty variation is reduced to less than half of the case where the side surface angle 13 of the diffraction grating is 80 degrees as compared with the case where the side surface angle is 40 degrees. In the semiconductor laser according to the first embodiment of the present invention, the side angle 13 of the diffraction grating is set to 7
Since 0 degree or more and less than 90 degrees, preferably 75 degrees or more and 85 degrees or less and the center value thereof is set to about 80 degrees, it is possible to reduce the variation in duty that is unavoidable in the manufacturing process. The effect of improving the controllability of the coupling constant and stabilizing the device characteristics is obtained.

【0034】また、一般に半導体レーザの製造工程で
は、製造工程終了後、へき開や放熱用ブロックへのはん
だ付等の工程で素子に応力がかかりやすい。埋め込み層
であるn型第1InPクラッド層7、n型第2InPク
ラッド層8に結晶欠陥が多数存在すると、その結晶欠陥
が応力によってすべり運動を起こし、MQW活性層3に
到達するまで伸長する。MQW活性層3に結晶欠陥が存
在すると非発光再結合中心となるので、通電中に素子劣
化を誘発する。実施の形態1の半導体レーザでは、上述
したようにn型第1InPクラッド層7、n型第2In
Pクラッド層8に結晶欠陥が殆ど発生しないので、素子
劣化が抑制され、素子の信頼性が向上する効果がある。
Further, in the manufacturing process of a semiconductor laser, stress is generally applied to the element after the completion of the manufacturing process, such as cleavage and soldering to a heat dissipation block. When a large number of crystal defects are present in the n-type first InP clad layer 7 and the n-type second InP clad layer 8 which are buried layers, the crystal defects cause a sliding motion due to stress and extend until reaching the MQW active layer 3. If a crystal defect is present in the MQW active layer 3, it becomes a non-radiative recombination center, so that device deterioration is induced during energization. In the semiconductor laser of the first embodiment, as described above, the n-type first InP cladding layer 7 and the n-type second In
Since almost no crystal defects occur in the P clad layer 8, the element deterioration is suppressed and the element reliability is improved.

【0035】上述の半導体レーザの製造方法では、一例
としてn型第1InPクラッド層7の結晶成長温度TG
1を500℃、n型第2InPクラッド層8の結晶成長
温度TG2を560℃としたが、結晶成長温度TG2が
540℃以上580℃以下で、結晶成長温度TG2と結
晶成長温度TG1との温度差が50〜70℃であれば、
同様の効果が得られる。
In the method of manufacturing the semiconductor laser described above, as an example, the crystal growth temperature TG of the n-type first InP cladding layer 7 is used.
1 was 500 ° C., and the crystal growth temperature TG2 of the n-type second InP clad layer 8 was 560 ° C., but the crystal growth temperature TG2 is 540 ° C. or higher and 580 ° C. or lower, and the temperature difference between the crystal growth temperature TG2 and the crystal growth temperature TG1. Is 50 to 70 ° C,
The same effect can be obtained.

【0036】なお、上述の半導体レーザの製造方法で
は、n型第1InPクラッド層(第1の半導体層)7の
層厚として0.05μmを一例として挙げたが、0.0
25μm以上0.1μm以下なら同様の効果が得られ
る。
In the method of manufacturing the semiconductor laser described above, the layer thickness of the n-type first InP clad layer (first semiconductor layer) 7 is 0.05 μm as an example.
Similar effects can be obtained if the thickness is 25 μm or more and 0.1 μm or less.

【0037】また、上述の半導体レーザの製造方法で
は、エピタキシャル結晶成長方法として、MOCVD法
を適用した場合を示したが、他のエピタキシャル結晶成
長方法(例えばMBE法)でも同様の効果が得られるこ
とは言うまでもない。
Further, in the above-described semiconductor laser manufacturing method, the case where the MOCVD method is applied as the epitaxial crystal growth method is shown, but the same effect can be obtained by another epitaxial crystal growth method (for example, MBE method). Needless to say.

【0038】以上、実施の形態1における半導体レーザ
とその製造方法によれば、回折格子層上にn型第1In
Pクラッド層を形成し、かつn型第1InPクラッド層
の結晶成長温度TG1をn型第2InPクラッド層の結
晶成長温度TG2に対して相対的に低温としたため、回
折格子の形状が保持されかつ段差部分において結晶欠陥
が殆ど発生しないので、製造工程上不可避なdutyば
らつきに対して結合定数の変動が抑制される結果、結合
定数の制御性が向上して、素子特性が安定する効果、及
び素子劣化が抑制され素子の信頼性が向上する効果があ
る。
As described above, according to the semiconductor laser and the method of manufacturing the same in the first embodiment, the n-type first In is formed on the diffraction grating layer.
Since the P clad layer is formed and the crystal growth temperature TG1 of the n-type first InP clad layer is set to be relatively lower than the crystal growth temperature TG2 of the n-type second InP clad layer, the shape of the diffraction grating is maintained and a step is formed. Almost no crystal defects are generated in the portion, so that variation of the coupling constant is suppressed against the duty variation that is unavoidable in the manufacturing process. As a result, the controllability of the coupling constant is improved, the element characteristics are stabilized, and the element is degraded. Is suppressed and the reliability of the device is improved.

【0039】実施の形態2.図6は本発明における実施
の形態2の半導体レーザの製造方法を示す図である。図
中、16は、マストランスポートによって形成されたn
型第1InPクラッド層である。
Embodiment 2. FIG. 6 is a diagram showing a method of manufacturing a semiconductor laser according to the second embodiment of the present invention. In the figure, 16 is an n formed by mass transport.
The first InP clad layer.

【0040】まず、p型InP基板1上にp型InPバ
ッファ層2を2μm厚積層し、0.01μm厚のIn
0.7Ga0.3As0.60.4バリア層15と
0.01μm厚のIn0.8Ga0.2As0.9
0.1ウエル層14を10層積層した多重量子井戸活性
層(MQW活性層)3を積層する。その後、n型InP
バリア層4を0.3μm厚、n型In0.8Ga0.2
As0.40.6回折格子層5を0.05μm、n型
InPキャップ層6を0.2μm積層する(図6
(a))。ここで、エピタキシャル結晶成長方法として
は、有機金属気相成長法、いわゆるMOCVD(Metal O
rganic Chemical Vapor Deposition)法を用いる。
First, a p-type InP buffer layer 2 is laminated on the p-type InP substrate 1 to a thickness of 2 μm, and an In layer having a thickness of 0.01 μm is formed.
0.7 Ga 0.3 As 0.6 P 0.4 barrier layer 15 and 0.01 μm thick In 0.8 Ga 0.2 As 0.9 P
A multiple quantum well active layer (MQW active layer) 3 in which ten 0.1 well layers 14 are stacked is stacked. After that, n-type InP
The barrier layer 4 has a thickness of 0.3 μm and n-type In 0.8 Ga 0.2.
The As 0.4 P 0.6 diffraction grating layer 5 and the n-type InP cap layer 6 are laminated in a thickness of 0.05 μm and 0.2 μm, respectively (FIG. 6).
(A)). Here, the epitaxial crystal growth method is a metal organic chemical vapor deposition method, so-called MOCVD (Metal Oxygen).
rganic Chemical Vapor Deposition) method is used.

【0041】次に、電子線露光等のリソグラフィ技術お
よびドライエッチング技術を用いて光導波方向に沿って
所定周期で連続する回折格子12を形成する(図6
(b))。この場合のエッチング深さはn型InPキャ
ップ層6、n型In0.8Ga .2As0.4
0.6回折格子層5を経てn型InPバリア層4の途中
まで達するようにする。また、n型In0.8Ga
0.2As0.40.6回折格子層5のドライエッチ
ングでは容易に70度以上90度未満の範囲内の側面角
度13でエッチング可能である。回折格子12の側面角
度13は典型的には約80度となる。
Next, the diffraction grating 12 which is continuous in a predetermined cycle along the optical waveguide direction is formed by using a lithography technique such as electron beam exposure and a dry etching technique (FIG. 6).
(B)). In this case, the etching depth is n-type InP cap layer 6, n-type In 0.8 Ga 0 . 2 As 0.4 P
0.6 through the diffraction grating layer 5 to reach the middle of the n-type InP barrier layer 4. In addition, n-type In 0.8 Ga
The dry etching of the 0.2 As 0.4 P 0.6 diffraction grating layer 5 can be easily performed with the side surface angle 13 within the range of 70 degrees or more and less than 90 degrees. The side surface angle 13 of the diffraction grating 12 is typically about 80 degrees.

【0042】回折格子12の形成後、n型第2InPク
ラッド層8を結晶成長する前に加熱処理温度(TG3)
500℃で5分間加熱処理を施すことにより、n型In
Pキャップ層6はマストランスポートによって、その構
成元素がウエハ表面に拡散して溶融する結果、回折格子
間の溝部分に移動した領域を一部に有するn型第1In
Pクラッド層16となる(図6(c))。かかるマスト
ランスポートでは、結晶面における凸部が丸くなるよう
に形状が変化する。しかしながら、実施の形態2におけ
る半導体レーザの製造方法ではn型InPキャップ層6
を0.2μmと厚く形成しているので、マストランスポ
ートによる形状の変化により回折格子12を構成するn
型InPバリア層4の一部とn型In0.8Ga0.2
As0. 0.6回折格子層5に施されたエッチング
形状は良好に保持される。さらに、n型InPキャップ
層6は0.2μmと厚く形成され充分な構成元素の供給
源となるので、回折格子12はマストランスポートによ
って形成されるn型第1InPクラッド層16によって
完全に覆われる。
After the diffraction grating 12 is formed and before the crystal growth of the n-type second InP cladding layer 8, the heat treatment temperature (TG3).
By performing heat treatment at 500 ° C. for 5 minutes, n-type In
The P cap layer 6 has an n-type first In region partially having a region moved to the groove portion between the diffraction gratings as a result of the constituent elements thereof being diffused and melted on the wafer surface by mass transport.
It becomes the P clad layer 16 (FIG. 6C). In such a mass transport, the shape changes so that the convex portion on the crystal plane becomes round. However, in the method of manufacturing the semiconductor laser according to the second embodiment, the n-type InP cap layer 6 is formed.
Is formed as thick as 0.2 μm, the diffraction grating 12 is formed by a change in shape due to mass transport.
Part of the n-type InP barrier layer 4 and n-type In 0.8 Ga 0.2
As 0. The etching shape applied to the 4 P 0.6 diffraction grating layer 5 is well retained. Further, since the n-type InP cap layer 6 is formed as thick as 0.2 μm and serves as a supply source of sufficient constituent elements, the diffraction grating 12 is completely covered by the n-type first InP clad layer 16 formed by mass transport. .

【0043】加熱処理後、n型第2InPクラッド層8
を560℃の結晶成長温度TG2で0.5μm積層す
る。回折格子12はマストランスポートによって形成さ
れたn型第1InPクラッド層16ですでに覆われてい
るので結晶成長温度TG2による加熱でも形状変化は生
じず、また、高温であるので十分な表面拡散が可能とな
り回折格子の段差部分での結晶欠陥は発生しない。
After the heat treatment, the n-type second InP clad layer 8
Is laminated at a crystal growth temperature TG2 of 560 ° C. for 0.5 μm. Since the diffraction grating 12 is already covered with the n-type first InP cladding layer 16 formed by mass transport, the shape change does not occur even when heated by the crystal growth temperature TG2, and since the temperature is high, sufficient surface diffusion is achieved. It becomes possible and no crystal defect occurs in the step portion of the diffraction grating.

【0044】n型第2InPクラッド層8の結晶成長
後、光導波路形成を目的としたメサエッチング、電流狭
窄を目的とした電流ブロック構造を形成し(図示せ
ず)、さらにその上からn型InPコンタクト層9を1
μm厚積層して、すべてのエピタキシャル結晶成長を終
了した後(図6(d))、ウエハ表面側にn電極10、
ウエハ裏面側にp電極11を積層してウエハプロセスが
終了する。その後、両面を劈開して前後端面に端面反射
膜を形成し、チップ分離を施して単一モード動作する半
導体レーザを得る。
After crystal growth of the n-type second InP clad layer 8, mesa etching for the purpose of forming an optical waveguide and a current block structure for the purpose of current confinement are formed (not shown). Contact layer 9 to 1
After stacking up to a thickness of μm and finishing all epitaxial crystal growth (FIG. 6D), the n-electrode 10,
The p-electrode 11 is laminated on the back side of the wafer, and the wafer process is completed. After that, both surfaces are cleaved to form end face reflection films on the front and rear end faces, and chip separation is performed to obtain a semiconductor laser operating in a single mode.

【0045】このようにして得られた実施の形態2の半
導体レーザでは、素子完成後の回折格子の形状がエッチ
ング直後とほぼ同一形状に保持される。素子完成後の回
折格子の側面角度13がエッチング後とほぼ同一である
70度以上90度未満で典型的には約80度となるこ
と、回折格子を埋め込んだn型第2InPクラッド層8
に結晶欠陥が殆ど発生しないことが透過電子顕微鏡観察
によって確認された。
In the thus obtained semiconductor laser of the second embodiment, the shape of the diffraction grating after the element is completed is kept substantially the same as that immediately after etching. The side surface angle 13 of the diffraction grating after the element is completed is substantially the same as that after etching and is 70 degrees or more and less than 90 degrees, and is typically about 80 degrees. The n-type second InP cladding layer 8 in which the diffraction grating is embedded is formed.
It was confirmed by transmission electron microscope observation that almost no crystal defects were generated in.

【0046】上述の半導体レーザの製造方法では、一例
として加熱処理温度TG3を500℃、n型第2InP
クラッド層8の結晶成長温度TG2を560℃とした
が、結晶成長温度TG2が540℃以上580℃以下
で、結晶成長温度TG2と加熱処理温度TG3との温度
差が50〜70℃であれば、同様の効果が得られる。
In the semiconductor laser manufacturing method described above, the heat treatment temperature TG3 is 500 ° C. and the n-type second InP is used as an example.
Although the crystal growth temperature TG2 of the cladding layer 8 is 560 ° C., if the crystal growth temperature TG2 is 540 ° C. or higher and 580 ° C. or lower and the temperature difference between the crystal growth temperature TG2 and the heat treatment temperature TG3 is 50 to 70 ° C. The same effect can be obtained.

【0047】なお、上述の半導体レーザの製造方法では
n型InPキャップ層6の層厚として0.2μmを一例
として挙げたが、0.15μm以上0.3μm以下なら
同様の効果が得られる。
In the method of manufacturing the semiconductor laser described above, the layer thickness of the n-type InP cap layer 6 is 0.2 μm as an example, but the same effect can be obtained if the layer thickness is 0.15 μm or more and 0.3 μm or less.

【0048】また、上述の半導体レーザの製造方法で
は、エピタキシャル結晶成長方法としてMOCVD法を
適用した場合を示したが、他のエピタキシャル結晶成長
方法(例えばMBE法)でも同様の効果が得られること
は言うまでもない。
Further, in the above-mentioned semiconductor laser manufacturing method, the case where the MOCVD method is applied as the epitaxial crystal growth method has been shown, but the same effect can be obtained by other epitaxial crystal growth methods (for example, MBE method). Needless to say.

【0049】以上、実施の形態2における半導体レーザ
とその製造方法によれば、回折格子層上にn型InPキ
ャップ層を形成し、かつ熱処理温度TG3をn型第2I
nPクラッド層の結晶成長温度TG2に対して相対的に
低温としたため、回折格子の形状が保持されかつ回折格
子の段差部分で結晶欠陥が殆ど発生しないので、製造工
程上不可避なdutyばらつきに対して結合定数の変動
が抑制される結果、結合定数の制御性が向上して素子特
性が安定する効果、及び素子劣化が抑制され素子の信頼
性が向上する効果がある。
As described above, according to the semiconductor laser and the method of manufacturing the same in the second embodiment, the n-type InP cap layer is formed on the diffraction grating layer, and the heat treatment temperature TG3 is set to the n-type second I2.
Since the temperature was set relatively low with respect to the crystal growth temperature TG2 of the nP clad layer, the shape of the diffraction grating was maintained and crystal defects were hardly generated in the step portion of the diffraction grating. As the fluctuation of the coupling constant is suppressed, the controllability of the coupling constant is improved and the element characteristics are stabilized, and the deterioration of the element is suppressed and the reliability of the element is improved.

【0050】[0050]

【発明の効果】本発明に係る半導体レーザでは、第1導
電型のInP基板と、上記第1導電型のInP基板上に
形成された第1導電型のInPバッファ層と、上記第1
導電型のInPバッファ層上に形成された活性層と、上
記活性層上に順次形成された第2導電型のInPバリア
層、第2導電型のInGaAsP回折格子層および第2
導電型のInPキャップ層からなる各層で構成され、か
つ光導波方向に沿って所定の周期で連続的に繰り返され
た回折格子と、上記回折格子を含むウエハ主面上に順次
形成された第2導電型の第1InPクラッド層、第2導
電型の第2InPクラッド層および第2導電型のInP
コンタクト層と、を備え、光導波方向における上記回折
格子の側面とウエハ主面のなす角を70度以上90度未
満としたので、製造工程上不可避なdutyばらつきに
対して結合定数の変動が抑制される結果、結合定数の制
御性が向上して素子特性が安定する。
According to the semiconductor laser of the present invention, a first conductivity type InP substrate, a first conductivity type InP buffer layer formed on the first conductivity type InP substrate, and the first conductivity type InP substrate are provided.
An active layer formed on the conductive InP buffer layer, a second conductive InP barrier layer sequentially formed on the active layer, a second conductive InGaAsP diffraction grating layer, and a second conductive layer.
A diffraction grating which is composed of conductive InP cap layers and which is continuously repeated at a predetermined period along the optical waveguide direction, and a second diffraction grating which is sequentially formed on the main surface of the wafer including the diffraction grating. Conductive type first InP clad layer, second conductive type second InP clad layer, and second conductive type InP
Since the contact layer is provided, and the angle between the side surface of the diffraction grating and the main surface of the wafer in the optical waveguide direction is 70 degrees or more and less than 90 degrees, fluctuations in the coupling constant are suppressed against variations in duty that are unavoidable in the manufacturing process. As a result, the controllability of the coupling constant is improved and the device characteristics are stabilized.

【0051】また、本発明に係る半導体レーザでは、上
記第2導電型の第1InPクラッド層の層厚を0.02
5μm以上0.1μm以下としたので、回折格子の段差
部分で結晶欠陥が殆ど発生しないため、素子劣化が抑制
され素子の信頼性が向上する効果がある。
In the semiconductor laser according to the present invention, the layer thickness of the second conductivity type first InP clad layer is 0.02.
Since the thickness is 5 μm or more and 0.1 μm or less, crystal defects are hardly generated in the step portion of the diffraction grating, so that the deterioration of the element is suppressed and the reliability of the element is improved.

【0052】本発明に係る半導体レーザの製造方法で
は、ウエハ主面に回折格子を形成する工程と、上記回折
格子を含むウエハ主面上に結晶成長温度TG1で第1の
半導体層をエピタキシャル結晶成長する工程と、上記第
1の半導体層上に結晶成長温度TG2で第2の半導体層
をエピタキシャル結晶成長する工程と、を含んでなり、
上記結晶成長温度TG1を、上記結晶成長温度TG2よ
り50〜70℃低温としたので、回折格子の形状が保持
されかつ回折格子の段差部分で結晶欠陥が殆ど発生しな
いので、製造工程上不可避なdutyばらつきに対して
結合定数の変動が抑制される結果、結合定数の制御性が
向上して素子特性が安定する効果、及び素子劣化が抑制
され素子の信頼性が向上する効果がある。
In the method of manufacturing a semiconductor laser according to the present invention, the step of forming a diffraction grating on the main surface of the wafer and the epitaxial crystal growth of the first semiconductor layer on the main surface of the wafer including the diffraction grating at the crystal growth temperature TG1. And a step of epitaxially growing a second semiconductor layer on the first semiconductor layer at a crystal growth temperature TG2.
Since the crystal growth temperature TG1 is set to be 50 to 70 ° C. lower than the crystal growth temperature TG2, the shape of the diffraction grating is maintained and crystal defects are hardly generated in the step portion of the diffraction grating, which is an unavoidable duty in the manufacturing process. As a result of suppressing the variation of the coupling constant with respect to the variation, the controllability of the coupling constant is improved and the element characteristics are stabilized, and the element deterioration is suppressed, and the element reliability is improved.

【0053】また、本発明に係る半導体レーザの製造方
法では、上記第2の半導体層をエピタキシャル結晶成長
する工程後、光導波方向における上記回折格子の側面と
ウエハ主面のなす角を70度以上90度未満としたの
で、製造工程上不可避なdutyばらつきに対して結合
定数の変動が抑制される結果、結合定数の制御性が向上
して素子特性が安定する。
In the method for manufacturing a semiconductor laser according to the present invention, after the step of epitaxially growing the second semiconductor layer, the angle between the side surface of the diffraction grating and the main surface of the wafer in the optical waveguide direction is 70 degrees or more. Since the angle is less than 90 degrees, the variation of the coupling constant is suppressed with respect to the duty variation which is unavoidable in the manufacturing process. As a result, the controllability of the coupling constant is improved and the element characteristics are stabilized.

【0054】また、本発明に係る半導体レーザの製造方
法では、第1導電型のInP基板上に、第1導電型のI
nPバッファ層、活性層、第2導電型のInPバリア
層、第2導電型のInGaAsP回折格子層および第2
導電型のInPキャップ層の各層を順次エピタキシャル
結晶成長する工程と、リソグラフィ技術とドライエッチ
ング技術によって上記第2導電型のInPバリア層、上
記第2導電型のInGaAsP回折格子層および上記第
2導電型のInPキャップ層に、光導波方向に沿って所
定の周期で連続的に繰り返された回折格子を形成する工
程と、上記回折格子を含むウエハ主面上に第2導電型の
第1InPクラッド層をエピタキシャル結晶成長する工
程と、上記第2導電型の第1InPクラッド層上に第2
導電型の第2InPクラッド層および第2導電型のIn
Pコンタクト層を順次エピタキシャル結晶成長する工程
と、を含んでなり、上記第2導電型の第1InPクラッ
ド層をエピタキシャル結晶成長する際の結晶成長温度T
G1を、上記第2導電型の第2InPクラッド層をエピ
タキシャル結晶成長する際の結晶成長温度TG2より5
0〜70℃低温としたので、回折格子の形状が保持され
かつ回折格子の段差部分で結晶欠陥が殆ど発生しないた
め、製造工程上不可避なdutyばらつきに対して結合
定数の変動が抑制される結果、結合定数の制御性が向上
して素子特性が安定する効果、及び素子劣化が抑制され
素子の信頼性が向上する効果がある。
In the method for manufacturing a semiconductor laser according to the present invention, the first conductivity type IP substrate is formed on the first conductivity type InP substrate.
nP buffer layer, active layer, second conductivity type InP barrier layer, second conductivity type InGaAsP diffraction grating layer, and second
A step of sequentially epitaxially growing each layer of the conductivity type InP cap layer, the second conductivity type InP barrier layer, the second conductivity type InGaAsP diffraction grating layer, and the second conductivity type by a lithography technique and a dry etching technique. In the InP cap layer, a step of forming a diffraction grating that is continuously repeated at a predetermined period along the optical waveguide direction, and a second conductivity type first InP clad layer on the main surface of the wafer including the diffraction grating. A step of growing an epitaxial crystal and a second step on the first conductivity type InP clad layer.
Second conductivity type InP cladding layer and second conductivity type In
A step of sequentially performing epitaxial crystal growth on the P contact layer, and a crystal growth temperature T when epitaxially growing the second conductivity type first InP clad layer.
G1 is 5 from the crystal growth temperature TG2 at the time of epitaxial crystal growth of the second conductivity type second InP clad layer.
Since the temperature is kept at 0 to 70 ° C., the shape of the diffraction grating is maintained and crystal defects are hardly generated in the step portion of the diffraction grating, so that the variation of the coupling constant is suppressed against the duty variation unavoidable in the manufacturing process. The effect of improving the controllability of the coupling constant and stabilizing the element characteristics, and the effect of suppressing element deterioration and improving the element reliability are obtained.

【0055】また、本発明に係る半導体レーザの製造方
法では、第1導電型のInP基板上に、第1導電型のI
nPバッファ層、活性層、第2導電型のInPバリア
層、第2導電型のInGaAsP回折格子層および第2
導電型のInPキャップ層の各層を順次エピタキシャル
結晶成長する工程と、リソグラフィ技術とドライエッチ
ング技術によって上記第2導電型のInPバリア層、上
記第2導電型のInGaAsP回折格子層および上記第
2導電型のInPキャップ層に、光導波方向に沿って所
定の周期で連続的に繰り返された回折格子を形成する工
程と、加熱処理によるマストランスポートによって上記
第2導電型のInPキャップ層を溶融させて上記回折格
子を含むウエハ主面を覆う第2導電型の第1InPクラ
ッド層を形成する工程と、上記第2導電型の第1InP
クラッド層上に第2導電型の第2InPクラッド層およ
び第2導電型のInPコンタクト層を順次エピタキシャ
ル結晶成長する工程と、を含んでなり、上記第2導電型
のInPキャップ層を加熱処理する際の加熱処理温度T
G3を、上記第2導電型の第2InPクラッド層をエピ
タキシャル結晶成長する際の結晶成長温度TG2より5
0〜70℃低温としたので、回折格子の形状が保持され
かつ回折格子の段差部分で結晶欠陥が殆ど発生しないた
め、製造工程上不可避なdutyばらつきに対して結合
定数の変動が抑制される結果、結合定数の制御性が向上
して素子特性が安定する効果、及び素子劣化が抑制され
素子の信頼性が向上する効果がある。
In the method for manufacturing a semiconductor laser according to the present invention, the first conductivity type IP substrate is formed on the first conductivity type InP substrate.
nP buffer layer, active layer, second conductivity type InP barrier layer, second conductivity type InGaAsP diffraction grating layer, and second
A step of sequentially epitaxially growing each layer of the conductivity type InP cap layer, the second conductivity type InP barrier layer, the second conductivity type InGaAsP diffraction grating layer, and the second conductivity type by a lithography technique and a dry etching technique. Forming a diffraction grating that is continuously repeated at a predetermined period along the optical waveguide direction on the InP cap layer, and melting the second conductivity type InP cap layer by mass transport by heat treatment. A step of forming a second conductivity type first InP cladding layer covering the main surface of the wafer including the diffraction grating, and the second conductivity type first InP
A step of sequentially epitaxially growing a second conductivity type second InP clad layer and a second conductivity type InP contact layer on the clad layer, wherein the second conductivity type InP cap layer is heat-treated. Heat treatment temperature T
From the crystal growth temperature TG2 when epitaxially growing the second conductivity type second InP clad layer, G3 is set to 5
Since the temperature is kept at 0 to 70 ° C., the shape of the diffraction grating is maintained and crystal defects are hardly generated in the step portion of the diffraction grating, so that the variation of the coupling constant is suppressed against the duty variation unavoidable in the manufacturing process. The effect of improving the controllability of the coupling constant and stabilizing the element characteristics, and the effect of suppressing element deterioration and improving the element reliability are obtained.

【0056】また、本発明に係る半導体レーザの製造方
法では、上記第2導電型のInPキャップ層を0.15
μm以上0.3μm以下としたので、回折格子の形状が
保持されるため、製造工程上不可避なdutyばらつき
に対して結合定数の変動が抑制される結果、結合定数の
制御性が向上して素子特性が安定する効果がある。
Further, in the method of manufacturing a semiconductor laser according to the present invention, the second conductivity type InP cap layer is formed by 0.15.
Since the size is set to be not less than μm and not more than 0.3 μm, the shape of the diffraction grating is maintained, so that the fluctuation of the coupling constant is suppressed against the duty variation that is unavoidable in the manufacturing process. It has the effect of stabilizing the characteristics.

【0057】また、本発明に係る半導体レーザの製造方
法では、上記結晶成長温度TG2を540〜580℃の
範囲としたので、回折格子の形状が保持されかつ回折格
子の段差部分で結晶欠陥が殆ど発生しないため、製造工
程上不可避なdutyばらつきに対して結合定数の変動
が抑制される結果、結合定数の制御性が向上して素子特
性が安定する効果、及び素子劣化が抑制され素子の信頼
性が向上する効果がある。
Further, in the method of manufacturing a semiconductor laser according to the present invention, the crystal growth temperature TG2 is set in the range of 540 to 580 ° C., so that the shape of the diffraction grating is maintained and crystal defects are hardly generated in the step portion of the diffraction grating. Since it does not occur, fluctuations in the coupling constant are suppressed against variations in duty that are unavoidable in the manufacturing process. As a result, the controllability of the coupling constant is improved and element characteristics are stabilized, and element deterioration is suppressed, and element reliability is reduced. Has the effect of improving.

【0058】また、本発明に係る半導体レーザの製造方
法では、上記第2導電型の第2InPクラッド層および
上記第2導電型のInPコンタクト層を順次エピタキシ
ャル結晶成長する工程後、光導波方向における上記回折
格子の側面とウエハ主面のなす角を70度以上90度未
満としたので、製造工程上不可避なdutyばらつきに
対して結合定数の変動が抑制される結果、結合定数の制
御性が向上して素子特性が安定する。
Further, in the method of manufacturing a semiconductor laser according to the present invention, after the step of sequentially epitaxially growing the second conductivity type second InP cladding layer and the second conductivity type InP contact layer, the above-mentioned process in the optical waveguide direction is performed. Since the angle between the side surface of the diffraction grating and the main surface of the wafer is set to 70 degrees or more and less than 90 degrees, the variation of the coupling constant is suppressed against the duty variation that is unavoidable in the manufacturing process. As a result, the controllability of the coupling constant is improved. Element characteristics are stable.

【図面の簡単な説明】[Brief description of drawings]

【図1】 実施の形態1の半導体レーザの製造方法を示
す図である。
FIG. 1 is a diagram showing the method of manufacturing the semiconductor laser according to the first embodiment.

【図2】 実施の形態1の半導体レーザにおけるMQW
活性層の構成を示す断面図である。
FIG. 2 is an MQW in the semiconductor laser according to the first embodiment.
It is sectional drawing which shows the structure of an active layer.

【図3】 実施の形態1の半導体レーザにおける回折格
子の一部の断面図である。
FIG. 3 is a sectional view of a part of a diffraction grating in the semiconductor laser according to the first embodiment.

【図4】 回折格子の側面角度が40度と80度の場合
における半導体レーザのdutyに対する結合定数変動
を示す図である。
FIG. 4 is a diagram showing a variation of a coupling constant with respect to a duty of a semiconductor laser when a side surface angle of a diffraction grating is 40 degrees and 80 degrees.

【図5】 回折格子の側面角度が40度と80度の場
合、半導体レーザのdutyが50±10%変動した場
合の結合定数変動を示す図である。
FIG. 5 is a diagram showing coupling constant fluctuations when the side angle of the diffraction grating is 40 degrees and 80 degrees and the duty of the semiconductor laser fluctuates by 50 ± 10%.

【図6】 実施の形態2の半導体レーザの製造方法を示
す図である。
FIG. 6 is a diagram showing the method of manufacturing the semiconductor laser according to the second embodiment.

【図7】 従来の半導体レーザの製造方法を示す図であ
る。
FIG. 7 is a diagram showing a conventional method for manufacturing a semiconductor laser.

【図8】 従来の他の半導体レーザの製造方法を示す図
である。
FIG. 8 is a diagram showing another conventional method for manufacturing a semiconductor laser.

【符号の説明】[Explanation of symbols]

1 p型InP基板、 2 p型InPバッファ層、
3 多重量子井戸層(MQW層)、 4 n型InPバリ
ア層、 5 n型In0.8Ga0.2As 0.4
0.6回折格子層、 6 n型InPキャップ層、 7
n型第1InPクラッド層、 8 n型第2InPク
ラッド層、 9 n型InPコンタクト層、 10 n
電極、 11 p電極、 12 回折格子、 13 回
折格子の側面角度、 14 In0.8Ga0.2As
0.90.1ウエル層、 15In0.7Ga0.3
As0.60.4バリア層、 16 マストランスポ
ートによって形成されたn型第1InPクラッド層、
17 n型InP基板上、18 n型InPバッファ
層、 19 In0.72Ga0.28As0.6
0.39活性層、 20 p型In0.85Ga
0.15As0.33 .67光ガイド層、 21
p型InPキャップ層、 22 p型InPクラッド
層、 23 n型InGaAsPガイド層、 24 I
nGaAsP活性層、25 p型InGaAsPガイド
層、 26 p型InP層、 27 p型InGaAs
P回折格子層、 28 p型InGaAsPコンタクト
層。
1 p-type InP substrate, 2 p-type InP buffer layer,
3 multiple quantum well layers (MQW layers), 4 n-type InP burrs
A layer, 5 n-type In0.8Ga0.2As 0.4P
0.6Diffraction grating layer, 6 n-type InP cap layer, 7
  n-type first InP cladding layer, 8 n-type second InP cladding layer
Rad layer, 9 n-type InP contact layer, 10 n
Electrode, 11 p electrode, 12 diffraction grating, 13 times
Side angle of folded grid, 14 In0.8Ga0.2As
0.9P0.1Well layer, 15In0.7Ga0.3
As0.6P0.4Barrier layer, 16 mass transfer
N-type first InP cladding layer formed by
18 n-type InP buffer on 17 n-type InP substrate
Layer, 19 In0.72Ga0.28As0.6 1P
0.39Active layer, 20 p-type In0.85Ga
0.15As0.33P0 . 67Light guide layer, 21
p-type InP cap layer, 22 p-type InP clad
Layer, 23 n-type InGaAsP guide layer, 24 I
nGaAsP active layer, 25p type InGaAsP guide
Layer, 26 p-type InP layer, 27 p-type InGaAs
P diffraction grating layer, 28 p-type InGaAsP contact
layer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 村崎 宏幸 東京都千代田区丸の内二丁目2番3号 三 菱電機株式会社内 (72)発明者 中島 康雄 東京都千代田区丸の内二丁目2番3号 三 菱電機株式会社内 Fターム(参考) 5F073 AA13 AA64 AA74 CA12 DA05 EA28    ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroyuki Murasaki             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Yasuo Nakajima             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. F term (reference) 5F073 AA13 AA64 AA74 CA12 DA05                       EA28

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 第1導電型のInP基板と、前記第1導
電型のInP基板上に形成された第1導電型のInPバ
ッファ層と、前記第1導電型のInPバッファ層上に形
成された活性層と、前記活性層上に順次形成された第2
導電型のInPバリア層、第2導電型のInGaAsP
回折格子層および第2導電型のInPキャップ層からな
る各層で構成され、かつ光導波方向に沿って所定の周期
で連続的に繰り返された回折格子と、前記回折格子を含
むウエハ主面上に順次形成された第2導電型の第1In
Pクラッド層、第2導電型の第2InPクラッド層およ
び第2導電型のInPコンタクト層と、を備え、光導波
方向における前記回折格子の側面とウエハ主面のなす角
が70度以上90度未満であることを特徴とする半導体
レーザ。
1. A first-conductivity-type InP substrate, a first-conductivity-type InP buffer layer formed on the first-conductivity-type InP substrate, and a first-conductivity-type InP buffer layer. An active layer and a second layer sequentially formed on the active layer.
Conductive InP barrier layer, second conductive InGaAsP
A diffraction grating which is composed of a diffraction grating layer and a second conductivity type InP cap layer and which is continuously repeated at a predetermined period along the optical waveguide direction, and on the wafer main surface including the diffraction grating. Sequentially formed second conductivity type first In
A P-cladding layer, a second conductivity-type second InP clad layer, and a second conductivity-type InP contact layer, and an angle between the side surface of the diffraction grating and the wafer main surface in the optical waveguide direction is 70 degrees or more and less than 90 degrees. A semiconductor laser characterized by:
【請求項2】 前記第2導電型の第1InPクラッド層
の層厚が、0.025μm以上0.1μm以下であるこ
とを特徴とする請求項1記載の半導体レーザ。
2. The semiconductor laser according to claim 1, wherein a layer thickness of the second conductivity type first InP cladding layer is 0.025 μm or more and 0.1 μm or less.
【請求項3】 ウエハ主面に回折格子を形成する工程
と、前記回折格子を含むウエハ主面上に結晶成長温度T
G1で第1の半導体層をエピタキシャル結晶成長する工
程と、前記第1の半導体層上に結晶成長温度TG2で第
2の半導体層をエピタキシャル結晶成長する工程と、を
含んでなり、前記結晶成長温度TG1が、前記結晶成長
温度TG2より50〜70℃低温であることを特徴とす
る半導体レーザの製造方法。
3. A step of forming a diffraction grating on the main surface of the wafer, and a crystal growth temperature T on the main surface of the wafer including the diffraction grating.
G1 comprises epitaxially growing a first semiconductor layer on the first semiconductor layer, and G2 is a second semiconductor layer grown on the first semiconductor layer at a crystal growth temperature TG2. A method for manufacturing a semiconductor laser, wherein TG1 is 50 to 70 ° C. lower than the crystal growth temperature TG2.
【請求項4】 前記第2の半導体層をエピタキシャル結
晶成長する工程後、光導波方向における前記回折格子の
側面とウエハ主面のなす角が70度以上90度未満であ
ることを特徴とする請求項3記載の半導体レーザの製造
方法。
4. After the step of epitaxially growing the second semiconductor layer, the angle between the side surface of the diffraction grating and the main surface of the wafer in the optical waveguide direction is 70 degrees or more and less than 90 degrees. Item 3. A method of manufacturing a semiconductor laser according to item 3.
【請求項5】 第1導電型のInP基板上に、第1導電
型のInPバッファ層、活性層、第2導電型のInPバ
リア層、第2導電型のInGaAsP回折格子層および
第2導電型のInPキャップ層の各層を順次エピタキシ
ャル結晶成長する工程と、リソグラフィ技術とドライエ
ッチング技術によって前記第2導電型のInPバリア
層、前記第2導電型のInGaAsP回折格子層および
前記第2導電型のInPキャップ層に、光導波方向に沿
って所定の周期で連続的に繰り返された回折格子を形成
する工程と、前記回折格子を含むウエハ主面上に第2導
電型の第1InPクラッド層をエピタキシャル結晶成長
する工程と、前記第2導電型の第1InPクラッド層上
に第2導電型の第2InPクラッド層および第2導電型
のInPコンタクト層を順次エピタキシャル結晶成長す
る工程と、を含んでなり、前記第2導電型の第1InP
クラッド層をエピタキシャル結晶成長する際の結晶成長
温度TG1が、前記第2導電型の第2InPクラッド層
をエピタキシャル結晶成長する際の結晶成長温度TG2
より50〜70℃低温であることを特徴とする半導体レ
ーザの製造方法。
5. An InP buffer layer of the first conductivity type, an active layer, an InP barrier layer of the second conductivity type, an InGaAsP diffraction grating layer of the second conductivity type, and a second conductivity type on an InP substrate of the first conductivity type. Step of sequentially performing epitaxial crystal growth on each of the InP cap layers, the second conductivity type InP barrier layer, the second conductivity type InGaAsP diffraction grating layer, and the second conductivity type InP by a lithography technique and a dry etching technique. A step of forming a diffraction grating which is continuously repeated at a predetermined period along the optical waveguide direction on the cap layer, and an epitaxial crystal of a second conductivity type first InP clad layer on the main surface of the wafer including the diffraction grating. Growing step and second conductivity type second InP cladding layer and second conductivity type InP contact layer on the second conductivity type first InP cladding layer And a step of sequentially performing epitaxial crystal growth on the first conductivity type InP of the second conductivity type.
The crystal growth temperature TG1 for epitaxially growing the cladding layer is the same as the crystal growth temperature TG2 for epitaxially growing the second conductivity type second InP cladding layer.
A method of manufacturing a semiconductor laser, wherein the temperature is lower by 50 to 70 ° C.
【請求項6】 第1導電型のInP基板上に、第1導電
型のInPバッファ層、活性層、第2導電型のInPバ
リア層、第2導電型のInGaAsP回折格子層および
第2導電型のInPキャップ層の各層を順次エピタキシ
ャル結晶成長する工程と、リソグラフィ技術とドライエ
ッチング技術によって前記第2導電型のInPバリア
層、前記第2導電型のInGaAsP回折格子層および
前記第2導電型のInPキャップ層に、光導波方向に沿
って所定の周期で連続的に繰り返された回折格子を形成
する工程と、加熱処理によるマストランスポートによっ
て前記第2導電型のInPキャップ層を溶融させて前記
回折格子を含むウエハ主面を覆う第2導電型の第1In
Pクラッド層を形成する工程と、前記第2導電型の第1
InPクラッド層上に第2導電型の第2InPクラッド
層および第2導電型のInPコンタクト層を順次エピタ
キシャル結晶成長する工程と、を含んでなり、前記第2
導電型のInPキャップ層を加熱処理する際の加熱処理
温度TG3が、前記第2導電型の第2InPクラッド層
をエピタキシャル結晶成長する際の結晶成長温度TG2
より50〜70℃低温であることを特徴とする半導体レ
ーザの製造方法。
6. An InP buffer layer of the first conductivity type, an active layer, an InP barrier layer of the second conductivity type, an InGaAsP diffraction grating layer of the second conductivity type, and a second conductivity type on an InP substrate of the first conductivity type. Step of sequentially performing epitaxial crystal growth on each of the InP cap layers, the second conductivity type InP barrier layer, the second conductivity type InGaAsP diffraction grating layer, and the second conductivity type InP by a lithography technique and a dry etching technique. A step of forming a diffraction grating that is continuously repeated at a predetermined period along the optical waveguide direction in the cap layer, and melting the second conductivity type InP cap layer by mass transport by heat treatment to perform the diffraction. First conductivity type second In covering the main surface of the wafer including the lattice
Forming a P clad layer, and forming a first clad layer of the second conductivity type
A step of sequentially epitaxially growing a second conductivity type second InP clad layer and a second conductivity type InP contact layer on the InP clad layer.
The heat treatment temperature TG3 for heat treatment of the conductivity type InP cap layer is the crystal growth temperature TG2 for epitaxial crystal growth of the second conductivity type second InP clad layer.
A method of manufacturing a semiconductor laser, wherein the temperature is lower by 50 to 70 ° C.
【請求項7】 前記第2導電型のInPキャップ層が
0.15μm以上0.3μm以下であることを特徴とす
る請求項6記載の半導体レーザの製造方法。
7. The method of manufacturing a semiconductor laser according to claim 6, wherein the InP cap layer of the second conductivity type has a thickness of 0.15 μm or more and 0.3 μm or less.
【請求項8】 前記結晶成長温度TG2が540〜58
0℃の範囲であることを特徴とする請求項3ないし7の
いずれか1項記載の半導体レーザの製造方法。
8. The crystal growth temperature TG2 is 540 to 58.
8. The method for manufacturing a semiconductor laser according to claim 3, wherein the temperature is in the range of 0 ° C.
【請求項9】 前記第2導電型の第2InPクラッド層
および前記第2導電型のInPコンタクト層を順次エピ
タキシャル結晶成長する工程後、光導波方向における前
記回折格子の側面とウエハ主面のなす角が70度以上9
0度未満であることを特徴とする請求項5ないし8のい
ずれか1項記載の半導体レーザの製造方法。
9. The angle formed between the side surface of the diffraction grating and the main surface of the wafer in the optical waveguide direction after the step of sequentially epitaxially growing the second conductivity type second InP cladding layer and the second conductivity type InP contact layer. Is over 70 degrees 9
9. The method for manufacturing a semiconductor laser according to claim 5, wherein the angle is less than 0 degree.
JP2002138406A 2002-05-14 2002-05-14 Semiconductor laser and its manufacturing method Pending JP2003332679A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042759A (en) * 2005-08-01 2007-02-15 Sumitomo Electric Ind Ltd Method of manufacturing semiconductor light emitting device
JP2013191589A (en) * 2012-03-12 2013-09-26 Fujitsu Ltd Semiconductor device and manufacturing method of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007042759A (en) * 2005-08-01 2007-02-15 Sumitomo Electric Ind Ltd Method of manufacturing semiconductor light emitting device
JP2013191589A (en) * 2012-03-12 2013-09-26 Fujitsu Ltd Semiconductor device and manufacturing method of the same

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