JP2003332140A - Chip common mode choke coil - Google Patents

Chip common mode choke coil

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Publication number
JP2003332140A
JP2003332140A JP2002139544A JP2002139544A JP2003332140A JP 2003332140 A JP2003332140 A JP 2003332140A JP 2002139544 A JP2002139544 A JP 2002139544A JP 2002139544 A JP2002139544 A JP 2002139544A JP 2003332140 A JP2003332140 A JP 2003332140A
Authority
JP
Japan
Prior art keywords
common mode
mode choke
choke coil
chip
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002139544A
Other languages
Japanese (ja)
Inventor
Tomokazu Ito
知一 伊藤
Yoshikazu Fujishiro
義和 藤城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP2002139544A priority Critical patent/JP2003332140A/en
Publication of JP2003332140A publication Critical patent/JP2003332140A/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip common mode choke coil superior in mechanical strength of an outside electrode at the same time by solving an electrical connection problem of the outside electrode and a coil conductor. <P>SOLUTION: The chip common mode choke coil forms the same shaped first and second conductors 11 and 12 making pairs on the front and rear of an insulating layer 1, sandwiches the first and second conductors 11 and 12 with magnetic components 4 and 5 from an upper layer, and has a structure forming a coil conductor making the pairs only by the conductors 11 and 12. Both ends 11a, 11b, 12a and 12b selves of each conductor 11 and 12 constitute mounting outside electrodes respectively, which are formed so that the formation face of each conductor 11 and 12 is vertical to a mounting surface. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、各種電子機器に侵
入するノイズ対策に用いられる電子部品に係り、特に容
易に作製でき、安価なチップ型コモンモードチョークコ
イルに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component used as a countermeasure against noise that enters various electronic devices, and more particularly to a chip type common mode choke coil which can be easily manufactured and is inexpensive.

【0002】[0002]

【従来の技術】従来、チップ型のコモンモードチョーク
コイルとしては、積層タイプが知られている。この部品
はフェライト等の磁性体シート表面にコイル導体パター
ンが形成されて第1コイルを形成する第1コイル用磁性
シートと、同様に第2コイルを形成する第2コイル用磁
性シートとを交互に積層した構造である。
2. Description of the Related Art Conventionally, a laminated type is known as a chip type common mode choke coil. In this component, a magnetic sheet for a first coil, in which a coil conductor pattern is formed on the surface of a magnetic sheet such as ferrite to form a first coil, and a magnetic sheet for a second coil, which similarly forms a second coil, are alternately arranged. It is a laminated structure.

【0003】また、薄膜工法を使用したものとして、特
開平8−203737号公報に示されたコイル部品が知
られている。このコイル部品は図10及び図11に示す
ように、磁性基板40上に、絶縁層41、引出電極5
3,54、絶縁層42、第1コイル導体51、絶縁層4
3、第2コイル導体52、絶縁層44を順に配し、その
上面より磁性基板45で挟み込んだ構造である。また、
外部電極(端子電極)55は図11のように磁性基板4
0,45の側面に形成されている。なお、スルーホール
56は第1コイル導体51と引出電極53とを接続して
第1のコイル巻線を形成するためのものであり、スルー
ホール57a,57bは第2コイル導体52と引出電極
54とを接続して第2のコイル巻線を形成するためのも
のである。
A coil component disclosed in Japanese Patent Laid-Open No. 8-203737 is known as one using a thin film method. As shown in FIGS. 10 and 11, this coil component includes a magnetic substrate 40, an insulating layer 41, and an extraction electrode 5 on the magnetic substrate 40.
3, 54, insulating layer 42, first coil conductor 51, insulating layer 4
3, the second coil conductor 52 and the insulating layer 44 are sequentially arranged and sandwiched by the magnetic substrate 45 from the upper surface thereof. Also,
The external electrode (terminal electrode) 55 is formed on the magnetic substrate 4 as shown in FIG.
It is formed on the side surface of 0, 45. The through hole 56 is for connecting the first coil conductor 51 and the extraction electrode 53 to form a first coil winding, and the through holes 57a and 57b are the second coil conductor 52 and the extraction electrode 54. And to connect to form a second coil winding.

【0004】[0004]

【発明が解決しようとする課題】上記従来の積層タイ
プ、薄膜タイプの製品は、複数個の素子をシート又は基
板上に同時に形成し、パターン形成完了後にチップ状に
切断し、この切断時に露出するチップ素体の導体部が外
部電極(端子電極)との接続に使用される。
In the conventional laminated type and thin film type products described above, a plurality of elements are simultaneously formed on a sheet or a substrate, cut into chips after pattern formation is completed, and exposed at the time of cutting. The conductor part of the chip body is used for connection with the external electrode (terminal electrode).

【0005】このとき、外部電極との接続に使用される
前記導体部の接続面は面積が小さく、電気的コンタクト
の点で不具合が発生しやすい。また、チップ素体を構成
する基板、シートによっては、外部電極材料との密着力
を確保することが難しく、実装時に外部電極部の剥離等
の不具合が発生し易い。また、チップ素体に使用する材
料によっては外部電極形成時の温度に制約が大きい。
At this time, the connecting surface of the conductor portion used for connection with the external electrode has a small area, and a problem easily occurs in terms of electrical contact. In addition, depending on the substrate and the sheet that form the chip body, it is difficult to secure the adhesion with the external electrode material, and problems such as peeling of the external electrode portion during mounting are likely to occur. Further, depending on the material used for the chip body, there are large restrictions on the temperature when forming the external electrodes.

【0006】本発明は、上記問題点に鑑み、外部電極と
コイル導体の電気的接続の問題を解消し、同時に外部電
極の機械的強度も優れたチップ型コモンモードチョーク
コイルを提供することを目的とする。
In view of the above problems, it is an object of the present invention to solve the problem of electrical connection between an external electrode and a coil conductor and to provide a chip type common mode choke coil which is excellent in mechanical strength of the external electrode at the same time. And

【0007】本発明のその他の目的や新規な特徴は後述
の実施の形態において明らかにする。
Other objects and novel features of the present invention will be clarified in the embodiments described later.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に、本願請求項1の発明に係るチップ型コモンモードチ
ョークコイルは、絶縁層の表裏面に対をなす同一形状の
第1及び第2導体を形成し、前記第1及び第2導体を上
層より磁性体で挟み込み、前記導体のみで対をなすコイ
ル導体を形成した構造であり、各導体の両端部自体が実
装用外部電極をそれぞれ構成し、前記実装用外部電極は
各導体の形成面が実装表面と垂直になるように形成され
ていることを特徴としている。
In order to achieve the above-mentioned object, a chip type common mode choke coil according to the invention of claim 1 of the present application comprises a first and a second having the same shape which are paired on the front and back surfaces of an insulating layer. This is a structure in which a conductor is formed, the first and second conductors are sandwiched by a magnetic material from the upper layer, and a coil conductor that forms a pair only with the conductor is formed, and both ends of each conductor themselves constitute mounting external electrodes. The mounting external electrode is characterized in that the surface on which each conductor is formed is perpendicular to the mounting surface.

【0009】本願請求項2の発明に係るチップ型コモン
モードチョークコイルは、請求項1において、前記実装
用外部電極の表面にめっき等によるはんだ接続用層が形
成されてなることを特徴としている。
A chip-type common mode choke coil according to a second aspect of the present invention is characterized in that, in the first aspect, a solder connection layer is formed on the surface of the mounting external electrode by plating or the like.

【0010】本願請求項3の発明に係るチップ型コモン
モードチョークコイルは、請求項1又は2において、前
記絶縁層の厚さが100μm以上であることを特徴とし
ている。
The chip-type common mode choke coil according to the invention of claim 3 is characterized in that, in claim 1 or 2, the insulating layer has a thickness of 100 μm or more.

【0011】本願請求項4の発明に係るチップ型コモン
モードチョークコイルは、請求項1,2又は3におい
て、前記絶縁層がポリイミド、エポキシ樹脂等の絶縁樹
脂シートであることを特徴としている。
The chip type common mode choke coil according to the invention of claim 4 of the present application is characterized in that, in claim 1, 2, or 3, the insulating layer is an insulating resin sheet of polyimide, epoxy resin or the like.

【0012】本願請求項5の発明に係るチップ型コモン
モードチョークコイルは、請求項1,2又は3におい
て、前記絶縁層がガラス基材のエポキシ樹脂基板等の絶
縁基板であることを特徴としている。
The chip type common mode choke coil according to the invention of claim 5 is characterized in that, in claim 1, 2 or 3, the insulating layer is an insulating substrate such as a glass-based epoxy resin substrate. .

【0013】本願請求項6の発明に係るチップ型コモン
モードチョークコイルは、請求項1,2,3,4又は5
において、前記磁性体を含む閉磁路により前記第1及び
第2導体の一部を覆ってなることを特徴としている。
The chip-type common mode choke coil according to the invention of claim 6 of the present application is the invention of claim 1, 2, 3, 4 or 5.
In the above, a part of the first and second conductors is covered with a closed magnetic circuit including the magnetic body.

【0014】本願請求項7の発明に係るチップ型コモン
モードチョークコイルは、請求項1,2,3,4,5又
は6において、前記対をなす同一形状の第1及び第2導
体の組が複数対設けられていることを特徴としている。
A chip-type common mode choke coil according to a seventh aspect of the present invention is the chip-type common mode choke coil according to the first, second, third, fourth, fifth or sixth aspect, in which the pair of first and second conductors of the same shape forming the pair is formed. The feature is that a plurality of pairs are provided.

【0015】[0015]

【発明の実施の形態】以下、本発明に係るチップ型コモ
ンモードチョークコイルの実施の形態を図面に従って説
明する。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a chip type common mode choke coil according to the present invention will be described below with reference to the drawings.

【0016】図1及び図2は本発明に係るチップ型コモ
ンモードチョークコイルの第1の実施の形態を示す。実
際の作製時は複数個のチップ型コモンモードチョークコ
イルを同時に基板上で作製するが、本実施の形態では1
素子分で説明する。
1 and 2 show a first embodiment of a chip type common mode choke coil according to the present invention. In the actual production, a plurality of chip type common mode choke coils are simultaneously produced on the substrate.
It will be described in terms of elements.

【0017】図1及び図2において、チップ型コモンモ
ードチョークコイルは、絶縁層1の表裏両面に同一形状
の第1及び第2コイル導体11,12を形成し、絶縁層
1及び第1及び第2コイル導体11,12を挟み込むよ
うに磁性体(磁性基板等)4,5を設け、第1及び第2
コイル導体11,12の端部11a,11b,12a,
12bを図2のチップ素体10における実装用外部電極
(端子電極)として露出させた構成を有する。
1 and 2, the chip-type common mode choke coil has first and second coil conductors 11 and 12 of the same shape formed on both front and back surfaces of the insulating layer 1, and the insulating layer 1 and the first and second coil conductors are formed. The magnetic bodies (magnetic substrate etc.) 4 and 5 are provided so as to sandwich the two coil conductors 11 and 12, and
End portions 11a, 11b, 12a of the coil conductors 11, 12;
12b is exposed as a mounting external electrode (terminal electrode) in the chip body 10 of FIG.

【0018】このチップ型コモンモードチョークコイル
においては、絶縁層1の表裏面の導体11,12のみで
対をなす第1及び第2コイル導体を構成しており、かつ
その両端部自体が実装用外部電極を兼ねる構成であり、
前記第1コイル導体11は直線状導体部の両側に逆L字
状に形成された導体端部11a,11bを実装用外部電
極として一体に有し、同様に、前記第2コイル導体12
は直線状導体部の両側に逆L字状に形成された導体端部
12a,12bを実装用外部電極として一体に有する。
In this chip-type common mode choke coil, only the conductors 11 and 12 on the front and back surfaces of the insulating layer 1 constitute the pair of first and second coil conductors, and both ends thereof are for mounting. It is a structure that also serves as an external electrode,
The first coil conductor 11 integrally has conductor ends 11a and 11b formed in an inverted L shape on both sides of a linear conductor portion as mounting external electrodes, and similarly, the second coil conductor 12 is also provided.
Has conductor end portions 12a and 12b formed in an inverted L shape on both sides of the linear conductor portion integrally as mounting external electrodes.

【0019】前記対をなす第1及び第2コイル導体1
1,12間の絶縁層1は加工性、絶縁性、導体への耐食
性等を考慮しポリイミド樹脂、エポキシ樹脂等の樹脂シ
ート、FR−4(耐熱性ガラス基材のエポキシ樹脂積層
基板)等が使用される。
The pair of first and second coil conductors 1
The insulating layer 1 between 1 and 12 is made of a resin sheet of polyimide resin, epoxy resin, or the like, FR-4 (epoxy resin laminated substrate of heat-resistant glass base material), etc. in consideration of workability, insulation properties, corrosion resistance to conductors, etc. used.

【0020】また、第1及び第2コイル導体11,12
の材料はCu,Ag,Al等の優れた電気伝導度を有す
る金属が採用される。各コイル導体11,12の肉厚
は、実装用外部電極を兼ねるために、絶縁層1よりも厚
く、数100μm程度あることが望ましい。
Further, the first and second coil conductors 11 and 12
As the material, a metal having excellent electric conductivity such as Cu, Ag and Al is adopted. It is desirable that the thickness of each coil conductor 11, 12 is thicker than the insulating layer 1 and about several hundreds μm in order to serve also as an external electrode for mounting.

【0021】また、対をなす第1及び第2コイル導体1
1,12を両側より挟み込む磁性体4,5は焼結フェラ
イト、複合フェライト、磁性薄膜等の磁性材料が採用さ
れる。これらの磁性体4,5の一体化には必要に応じ接
着剤、樹脂封止(複合フェライト自体による封止も含ま
れる)等の絶縁性の接着乃至封止部材6を併用する。
Further, the first and second coil conductors 1 forming a pair
Magnetic materials such as sintered ferrite, composite ferrite, and magnetic thin films are used for the magnetic bodies 4 and 5 that sandwich the magnetic materials 1 and 12 from both sides. In order to integrate the magnetic bodies 4 and 5, an insulating adhesive or sealing member 6 such as an adhesive agent or resin sealing (including sealing by the composite ferrite itself) is used together, if necessary.

【0022】図2に示すように、第1及び第2コイル導
体11,12の導体端部11a,11b,12a,12
bは、前記磁性体4,5を一体化した後、チップサイズ
に切断してチップ素体10としたときに、その側面及び
底面に露出する実装用外部電極として構成され、各コイ
ル導体形成面が実装面(相手側の実装基板に装着される
面)と垂直になるように設けられる。
As shown in FIG. 2, conductor end portions 11a, 11b, 12a and 12 of the first and second coil conductors 11 and 12 are shown.
b is configured as a mounting external electrode exposed on the side surface and the bottom surface when the magnetic bodies 4 and 5 are integrated and then cut into a chip size to form a chip body 10. Are provided so as to be perpendicular to the mounting surface (the surface to be mounted on the mounting board of the other side).

【0023】次に、本実施の形態に係るチップ型コモン
モードチョークコイルの製造手順を図1及び図2を参照
し説明する。
Next, a manufacturing procedure of the chip type common mode choke coil according to the present embodiment will be described with reference to FIGS.

【0024】絶縁層1(シート又は基板)の両面(表裏
面)に対をなす第1及び第2コイル導体11,12を形
成する。形成工法はスパッタ、蒸着、めっき等の薄膜形
成工法を採用するか、又は銅張り積層板を使用する。パ
ターンニングにはフォトリソグラフィー工法を使用した
方法がある。フォトリソグラフィー工法では感光性レジ
ストを使用し露光現像後、不要金属部分をエッチング
し、その後前記レジストは剥離する。または、導体を厚
くしたい場合はレジストパターンニング後、アディティ
ブ工法でパターンを形成し、その後前記レジストを剥離
する方法もある。なお、この時の成膜は表裏同時処理で
効率良く行うことが可能であり、パターンニングも表裏
両面同時露光、現像で効率良くかつ精度良くコイル導体
のパターン形成を行う事ができる。
A pair of first and second coil conductors 11 and 12 are formed on both surfaces (front and back surfaces) of the insulating layer 1 (sheet or substrate). As a forming method, a thin film forming method such as sputtering, vapor deposition, plating or the like is adopted, or a copper clad laminate is used. For patterning, there is a method using a photolithography method. In the photolithography method, a photosensitive resist is used and after exposure and development, unnecessary metal portions are etched, and then the resist is peeled off. Alternatively, if the conductor is desired to be thick, there is also a method in which after resist patterning, a pattern is formed by an additive method and then the resist is peeled off. The film formation at this time can be efficiently performed by the front and back simultaneous processing, and the patterning can also be performed by the simultaneous front and back simultaneous exposure and development to efficiently and accurately form the coil conductor pattern.

【0025】なお、図中では省略しているが、導体保護
のため必要に応じコイル導体11,12と磁性体4,5
間に絶縁層を形成する場合もある。
Although not shown in the drawing, the coil conductors 11 and 12 and the magnetic bodies 4 and 5 are provided as necessary for conductor protection.
An insulating layer may be formed between them.

【0026】上述の工法により作製されたコイル形成部
(絶縁層1及びコイル導体11,12を含む部分)を磁
性体4,5で挟み込んだ後、封止(樹脂封止,あるいは
磁性材として樹脂を含む複合材料を用いて封止)した
り、又は磁性体として両面より磁性薄膜を成膜すること
によりチップ型コモンモードチョークコイルの層構造が
完成する。
After the coil forming portion (the portion including the insulating layer 1 and the coil conductors 11 and 12) manufactured by the above-mentioned method is sandwiched by the magnetic bodies 4 and 5, sealing (resin sealing or resin as a magnetic material) is performed. The layered structure of the chip-type common mode choke coil is completed by encapsulating with a composite material containing (1) or by forming magnetic thin films on both sides as magnetic bodies.

【0027】上記説明は1個の素子での説明であるが実
際は複数個の素子が同時にシートもしくは基板上に作製
される。このシート、基板上に作製されたものを1素子
形状に切断後、側面部及び底面部に露出する導体端部を
外部電極としたチップ型コモンモードチョークコイルが
完成する。
Although the above description is for one element, in reality, a plurality of elements are simultaneously formed on a sheet or substrate. After cutting this sheet or the one produced on the substrate into one element shape, a chip type common mode choke coil having the conductor end exposed on the side surface and the bottom surface as an external electrode is completed.

【0028】尚、このとき実装用外部電極としての導体
端部11a,11b,12a,12bにより、コイル導
体形成面(第1及び第2コイル導体11,12を形成し
た面)は相手側実装基板に対する実装面と垂直になる。
また、チップ型コモンモードチョークコイルの実装時の
はんだ付け性を考慮して、実装用外部電極としての導体
端部11a,11b,12a,12bの少なくとも露出
面に錫又ははんだめっき等の処理によってはんだ接続用
層を形成することが有効である。
At this time, the conductor end portions 11a, 11b, 12a, 12b serving as mounting external electrodes cause the coil conductor forming surface (the surface on which the first and second coil conductors 11 and 12 are formed) to be on the opposite side mounting substrate. It becomes perpendicular to the mounting surface for.
Further, in consideration of solderability at the time of mounting the chip type common mode choke coil, at least the exposed surface of the conductor end portions 11a, 11b, 12a, 12b as the mounting external electrodes is soldered by a treatment such as tin or solder plating. It is effective to form a connection layer.

【0029】また、所要の実装用外部電極間距離を確保
するため、絶縁層1の厚さは、 L1−(100μm×2)≧t1≧100μm …(1) 但し、tl:コイル導体間絶縁層厚 Ll:チップ素体の幅(外部電極形成面の全幅:図2参
照) を満足する必要がある。ここで100μmを下限の基準
値とした理由は以下の通りである。
Further, in order to secure the required distance between the mounting external electrodes, the thickness of the insulating layer 1 is L1- (100 μm × 2) ≧ t1 ≧ 100 μm (1) where tl is the insulating layer between coil conductors It is necessary to satisfy the thickness Ll: the width of the chip element body (the entire width of the external electrode forming surface: see FIG. 2). The reason why 100 μm is set as the lower limit reference value is as follows.

【0030】一般的な電子部品実装機の実装位置精度は
±100μm程度であり、実装時の位置ずれを考慮した
場合、外部電極間隔は最低でも100μm以上必要であ
る。このためには、外部電極間距離となる絶縁層1の厚
さが最低値100μm以上である必要がある。
The mounting position accuracy of a general electronic component mounter is about ± 100 μm, and in consideration of the positional deviation at the time of mounting, the external electrode interval needs to be at least 100 μm or more. For this purpose, the thickness of the insulating layer 1 which is the distance between the external electrodes needs to be 100 μm or more as a minimum value.

【0031】また、(1)式の上限の基準値がLl−
(100μm×2)である理由は、チップ素体10の両
側の磁性体4,5としての基板又はコーティング厚が各
々100μm以上必要であるためである(磁性基板の場
合は割れ等の不具合を考えた生産性、磁性コーティング
の場合は磁気特性を確保するために必要)。例えば、L
1=1mmの場合、L1−(100μm×2)=800μ
mとなり、(1)式は800μm≧t1≧100μmと
なる。
Further, the upper limit reference value of the equation (1) is Ll-
The reason for being (100 μm × 2) is that the substrate or coating thickness as the magnetic bodies 4 and 5 on both sides of the chip body 10 is required to be 100 μm or more, respectively. Productivity, in the case of magnetic coating it is necessary to ensure the magnetic properties). For example, L
When 1 = 1 mm, L1- (100 μm × 2) = 800 μ
m, and the equation (1) is 800 μm ≧ t1 ≧ 100 μm.

【0032】この第1の実施の形態によれば、コイル導
体11,12の端部が外部電極を兼ねており、コイル導
体と外部電極の接続部が存在せず、品質的に優れ、工程
数も少なく容易に作製でき、安価なチップ型コモンモー
ドチョークコイルが得られる。また、各コイル導体1
1,12の外部電極となる端部以外を直線状に形成する
ことで、コイル導体部分相互間の容量を減じ、コモンモ
ードインピーダンスの共振周波数を高めて、高速伝送特
性の良好なものが得られる。
According to the first embodiment, the ends of the coil conductors 11 and 12 also serve as external electrodes, there is no connecting portion between the coil conductor and the external electrodes, and the quality is excellent and the number of steps is large. The chip-type common mode choke coil is inexpensive and can be easily manufactured. Also, each coil conductor 1
By forming the portions other than the end portions of the external electrodes 1 and 12 which are to be external electrodes in a linear shape, the capacitance between the coil conductor portions is reduced, the resonance frequency of the common mode impedance is increased, and good high-speed transmission characteristics can be obtained. .

【0033】図3及び図4は本発明の第2の実施の形態
であって、閉磁路構造となっている場合を示す。この場
合、主な構成及び製造手順は前述の第1の実施の形態と
同様である。異なる点は、絶縁層1の両側に第1及び第
2コイル導体11,12を設けてなるコイル形成部の外
周(図示の例では上側と下側)に磁性材7を充填し、磁
性体4,5と共に閉磁路を形成している点である。な
お、磁性材7が充填されない残りの空間には第1の実施
の形態と同じく絶縁性の接着乃至封止部材6を設ければ
よい。
FIGS. 3 and 4 show a second embodiment of the present invention in which a closed magnetic circuit structure is provided. In this case, the main configuration and manufacturing procedure are the same as in the first embodiment described above. The difference is that the magnetic material 7 is filled in the outer periphery (upper and lower sides in the illustrated example) of the coil forming portion provided with the first and second coil conductors 11 and 12 on both sides of the insulating layer 1. , 5 form a closed magnetic circuit. Insulating adhesive or sealing member 6 may be provided in the remaining space not filled with magnetic material 7 as in the first embodiment.

【0034】第2の実施の形態によれば、前記第1の実
施の形態の作用に加えて閉磁路構造となることにより、
コモンモードインピーダンスのさらなる増大が可能とな
り、コモンモードノイズ抑圧効果のいっそうの向上が得
られる。
According to the second embodiment, a closed magnetic circuit structure is provided in addition to the operation of the first embodiment,
The common mode impedance can be further increased, and the common mode noise suppression effect can be further improved.

【0035】図5及び図6は本発明の第3の実施の形態
であって、閉磁路構造とした他の例である。この場合、
主な構成及び製造手順は前述の第1の実施の形態と同様
であるが、異なる点は、コイル形成部を挟み込む磁性体
の一方を、凹部8aを有する磁性基板8で構成し、他方
の磁性基板9に突き合わせ一体化することで、閉磁路構
造を形成している点である。なお、閉磁路内側の空間に
は、必要に応じて第1の実施の形態と同じく絶縁性の接
着乃至封止部材6を設ければよい。
FIGS. 5 and 6 show a third embodiment of the present invention, which is another example of the closed magnetic circuit structure. in this case,
The main configuration and manufacturing procedure are the same as those of the first embodiment described above, except that one of the magnetic bodies sandwiching the coil forming portion is formed of the magnetic substrate 8 having the recessed portion 8a, and the other magnetic body is formed. The point is that a closed magnetic circuit structure is formed by abutting and integrating with the substrate 9. If necessary, an insulating adhesive or sealing member 6 may be provided in the space inside the closed magnetic circuit as in the first embodiment.

【0036】この構造でもコモンモードインピーダンス
の増大、即ちコモンモードノイズの抑圧効果のいっそう
の向上が得られる。
Even with this structure, the common mode impedance can be increased, that is, the effect of suppressing common mode noise can be further improved.

【0037】なお、上記第3の実施の形態では、一方の
磁性体となる磁性基板のみに凹部を形成したが、両側の
磁性体に凹部を形成してもよい。
In the third embodiment described above, the recess is formed only in the magnetic substrate which is one of the magnetic bodies, but the recess may be formed in the magnetic bodies on both sides.

【0038】図7及び図8は本発明の第4の実施の形態
を示す。この場合、第1の実施の形態のコイル導体の形
状を変更したものであり、対をなすコイル導体13,1
4は全体が略H字形状であり、すなわち横向きの直線状
導体部の両端部に実装用外部電極となる上下方向導体端
部13a,13b,14a,14bを有している。この
場合、導体端部13a,13b,14a,14bはチッ
プ素体10の側面及び底面に加えて上面にも露出する。
その他の構成は前述の第1の実施の形態と同様である。
7 and 8 show a fourth embodiment of the present invention. In this case, the shape of the coil conductor of the first embodiment is changed, and the coil conductors 13, 1 forming a pair are changed.
4 is substantially H-shaped as a whole, that is, it has vertical conductor end portions 13a, 13b, 14a, 14b, which are external electrodes for mounting, at both end portions of a lateral straight conductor portion. In this case, the conductor end portions 13a, 13b, 14a, 14b are exposed not only on the side surface and the bottom surface of the chip body 10 but also on the upper surface.
Other configurations are similar to those of the first embodiment described above.

【0039】この第4の実施の形態では、実装用外部電
極としての導体端部13a,13b,14a,14bは
チップ素体10の側面及び底面に加えて上面にも露出す
るから、実装面がチップ素体10の上下両面となり、電
子部品実装機側においてチップ型コモンモードチョーク
コイルの上下を判別する処理が不要となる。
In the fourth embodiment, the conductor end portions 13a, 13b, 14a, 14b serving as the mounting external electrodes are exposed not only on the side surface and the bottom surface of the chip body 10 but also on the upper surface thereof. Since the upper and lower surfaces of the chip body 10 are provided, the electronic component mounting machine side does not need to perform the processing for determining the upper and lower sides of the chip common mode choke coil.

【0040】また、いままで述べた実施の形態では、1
素子に一対のコイル導体を設けたが、1素子中にコイル
導体が複数対含まれた部品であっても本発明は適用可能
である。この場合を本発明の第5の実施の形態として図
9に示す。この図9の第5の実施の形態では、前記第1
の実施の形態の構造を有する一対のコイル導体を内蔵し
たチップ構造体30を非磁性層2を介して複数個一体化
した構成である。なお、図9中、前述の第1の実施の形
態と同一又は相当部分に同一符号を付して説明を省略す
る。
In the above-described embodiments, 1
The element is provided with a pair of coil conductors, but the present invention can be applied to a component in which a plurality of pairs of coil conductors are included in one element. This case is shown in FIG. 9 as a fifth embodiment of the present invention. In the fifth embodiment of FIG. 9, the first
This is a configuration in which a plurality of chip structures 30 having a pair of coil conductors having the structure of the embodiment are integrated via the nonmagnetic layer 2. In FIG. 9, the same or corresponding parts as those of the first embodiment described above are designated by the same reference numerals and the description thereof will be omitted.

【0041】この第5の実施の形態によれば、1素子中
に複数個のコモンモードチョークコイルが含まれた複合
部品を実現できる。
According to the fifth embodiment, it is possible to realize a composite component including a plurality of common mode choke coils in one element.

【0042】なお、第5の実施の形態では、前記第1の
実施の形態の構造を有するチップ構造体を非磁性層を介
して複数個一体化したが、前記第2乃至4の実施の形態
の構造を有するチップ構造体を非磁性層を介して複数個
一体化して複合部品を構成してもよい。
In the fifth embodiment, a plurality of chip structures having the structure of the first embodiment are integrated via the nonmagnetic layer, but the second to fourth embodiments are integrated. A plurality of chip structures having the above structure may be integrated via a non-magnetic layer to form a composite component.

【0043】以上本発明の実施の形態について説明して
きたが、本発明はこれに限定されることなく請求項の記
載の範囲内において各種の変形、変更が可能なことは当
業者には自明であろう。例えば、製造手順のついて、前
述の第1の実施の形態における製造手順ではコイル間絶
縁層より開始しているが、これに限定せず一方の磁性体
上にコイル導体11を形成し順次(絶縁層1、コイル導
体12、磁性体の順に)形成する手順でも良い。
Although the embodiment of the present invention has been described above, it is obvious to those skilled in the art that the present invention is not limited to this and various modifications and changes can be made within the scope of the claims. Ah For example, regarding the manufacturing procedure, in the manufacturing procedure in the above-described first embodiment, the inter-coil insulating layer is started. However, the manufacturing procedure is not limited to this, and the coil conductor 11 is formed on one magnetic body in sequence (insulation A procedure of forming the layer 1, the coil conductor 12, and the magnetic material in this order) may be used.

【0044】[0044]

【発明の効果】以上説明したように、本発明によれば、
対をなすコイル導体の端部自体で実装用外部電極を構成
することにより、コイル導体と外部電極の接続部を無く
し、品質的に優れ、工程数も少なく容易に作製でき、安
価なチップ型コモンモードチョークコイルを実現でき
る。
As described above, according to the present invention,
By constructing the external electrodes for mounting by the ends of the paired coil conductors themselves, the connection parts between the coil conductors and external electrodes are eliminated, which is excellent in quality, can be easily manufactured with a small number of steps, and is an inexpensive chip-type common. A mode choke coil can be realized.

【0045】また、コイル形成部を磁性材で挟み込み閉
磁路構造とする場合、より高いコモンモードインピーダ
ンスを得ることが可能となりコモンモードノイズ抑圧効
果の更なる向上を図ることができる。
When the coil forming portion is sandwiched by magnetic materials to have a closed magnetic circuit structure, a higher common mode impedance can be obtained, and the common mode noise suppressing effect can be further improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るチップ型コモンモードチョークコ
イルの第1の実施の形態を示す分解斜視図である。
FIG. 1 is an exploded perspective view showing a first embodiment of a chip type common mode choke coil according to the present invention.

【図2】同斜視図である。FIG. 2 is a perspective view of the same.

【図3】本発明の第2の実施の形態を示す分解斜視図で
ある。
FIG. 3 is an exploded perspective view showing a second embodiment of the present invention.

【図4】同斜視図である。FIG. 4 is a perspective view of the same.

【図5】本発明の第3の実施の形態を示す分解斜視図で
ある。
FIG. 5 is an exploded perspective view showing a third embodiment of the present invention.

【図6】同斜視図である。FIG. 6 is a perspective view of the same.

【図7】本発明の第4の実施の形態を示す分解斜視図で
ある。
FIG. 7 is an exploded perspective view showing a fourth embodiment of the present invention.

【図8】同斜視図である。FIG. 8 is a perspective view of the same.

【図9】本発明の第5の実施の形態を示す斜視図であ
る。
FIG. 9 is a perspective view showing a fifth embodiment of the present invention.

【図10】従来技術の分解斜視図である。FIG. 10 is an exploded perspective view of a conventional technique.

【図11】同斜視図である。FIG. 11 is a perspective view of the same.

【符号の説明】[Explanation of symbols]

1 絶縁層 2 非磁性層 4,5 磁性体 7 磁性材 8a 凹部 8,9 磁性基板 10 チップ素体 11,12,13,14 コイル導体 11a,11b,12a,12b,13a,13b,1
4a,14b 導体端部 30 チップ構造体
DESCRIPTION OF SYMBOLS 1 Insulating layer 2 Non-magnetic layer 4, 5 Magnetic body 7 Magnetic material 8a Recessed portion 8, 9 Magnetic substrate 10 Chip element bodies 11, 12, 13, 14 Coil conductors 11a, 11b, 12a, 12b, 13a, 13b, 1
4a, 14b conductor end 30 chip structure

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 絶縁層の表裏面に対をなす同一形状の第
1及び第2導体を形成し、前記第1及び第2導体を上層
より磁性体で挟み込み、前記導体のみで対をなすコイル
導体を形成した構造であり、各導体の両端部自体が実装
用外部電極をそれぞれ構成し、前記実装用外部電極は各
導体の形成面が実装表面と垂直になるように形成されて
いることを特徴とするチップ型コモンモードチョークコ
イル。
1. A coil having a pair of first and second conductors of the same shape formed on the front and back surfaces of an insulating layer, the first and second conductors being sandwiched by a magnetic material from an upper layer, and a pair of only the conductors. It is a structure in which conductors are formed, and both ends of each conductor themselves constitute mounting external electrodes, and the mounting external electrodes are formed such that the formation surface of each conductor is perpendicular to the mounting surface. Characteristic chip type common mode choke coil.
【請求項2】 前記実装用外部電極の表面にめっき等に
よるはんだ接続用層が形成されてなる請求項1記載のチ
ップ型コモンモードチョークコイル。
2. The chip type common mode choke coil according to claim 1, wherein a solder connecting layer is formed on the surface of the mounting external electrode by plating or the like.
【請求項3】 前記絶縁層の厚さが100μm以上であ
る請求項1又は2記載のチップ型コモンモードチョーク
コイル。
3. The chip-type common mode choke coil according to claim 1, wherein the insulating layer has a thickness of 100 μm or more.
【請求項4】 前記絶縁層がポリイミド、エポキシ樹脂
等の絶縁樹脂シートである請求項1,2又は3記載のチ
ップ型コモンモードチョークコイル。
4. The chip-type common mode choke coil according to claim 1, wherein the insulating layer is an insulating resin sheet made of polyimide, epoxy resin or the like.
【請求項5】 前記絶縁層がガラス基材のエポキシ樹脂
基板等の絶縁基板である請求項1,2又は3記載のチッ
プ型コモンモードチョークコイル。
5. The chip-type common mode choke coil according to claim 1, wherein the insulating layer is an insulating substrate such as a glass-based epoxy resin substrate.
【請求項6】 前記磁性体を含む閉磁路により前記第1
及び第2導体の一部を覆ってなる請求項1,2,3,4
又は5記載のチップ型コモンモードチョークコイル。
6. The closed magnetic circuit including the magnetic body forms the first magnetic field.
And a part of the second conductor is covered,
Alternatively, the chip type common mode choke coil as described in 5 above.
【請求項7】 前記対をなす同一形状の第1及び第2導
体の組が複数対設けられている請求項1,2,3,4,
5又は6記載のチップ型コモンモードチョークコイル。
7. A plurality of pairs of the first and second conductors of the same shape forming the pair are provided.
5. The chip type common mode choke coil as described in 5 or 6.
JP2002139544A 2002-05-15 2002-05-15 Chip common mode choke coil Pending JP2003332140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002139544A JP2003332140A (en) 2002-05-15 2002-05-15 Chip common mode choke coil

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002139544A JP2003332140A (en) 2002-05-15 2002-05-15 Chip common mode choke coil

Publications (1)

Publication Number Publication Date
JP2003332140A true JP2003332140A (en) 2003-11-21

Family

ID=29700656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002139544A Pending JP2003332140A (en) 2002-05-15 2002-05-15 Chip common mode choke coil

Country Status (1)

Country Link
JP (1) JP2003332140A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015079958A (en) * 2013-10-16 2015-04-23 サムソン エレクトロ−メカニックス カンパニーリミテッド. Chip electronic component, and mounting board and packaging unit of chip electronic component
US20160099100A1 (en) * 2014-10-02 2016-04-07 Samsung Electro-Mechanics Co., Ltd. Chip component and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015079958A (en) * 2013-10-16 2015-04-23 サムソン エレクトロ−メカニックス カンパニーリミテッド. Chip electronic component, and mounting board and packaging unit of chip electronic component
US20160099100A1 (en) * 2014-10-02 2016-04-07 Samsung Electro-Mechanics Co., Ltd. Chip component and manufacturing method thereof

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