JP2003316749A5 - - Google Patents

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Publication number
JP2003316749A5
JP2003316749A5 JP2003079913A JP2003079913A JP2003316749A5 JP 2003316749 A5 JP2003316749 A5 JP 2003316749A5 JP 2003079913 A JP2003079913 A JP 2003079913A JP 2003079913 A JP2003079913 A JP 2003079913A JP 2003316749 A5 JP2003316749 A5 JP 2003316749A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003079913A
Other versions
JP2003316749A (ja
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Publication date
Priority claimed from US10/109,480 external-priority patent/US7194651B2/en
Application filed filed Critical
Publication of JP2003316749A publication Critical patent/JP2003316749A/ja
Publication of JP2003316749A5 publication Critical patent/JP2003316749A5/ja
Withdrawn legal-status Critical Current

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JP2003079913A 2002-03-28 2003-03-24 分散型のリンク・モジュール Withdrawn JP2003316749A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/109,480 2002-03-28
US10/109,480 US7194651B2 (en) 2002-03-28 2002-03-28 Distributed link module architecture

Publications (2)

Publication Number Publication Date
JP2003316749A JP2003316749A (ja) 2003-11-07
JP2003316749A5 true JP2003316749A5 (ja) 2006-04-06

Family

ID=28789764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003079913A Withdrawn JP2003316749A (ja) 2002-03-28 2003-03-24 分散型のリンク・モジュール

Country Status (2)

Country Link
US (1) US7194651B2 (ja)
JP (1) JP2003316749A (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7599489B1 (en) * 2004-02-09 2009-10-06 Sun Microsystems Inc. Accelerating cryptographic hash computations
US7512204B1 (en) * 2005-03-18 2009-03-31 Altera Corporation Multi-phase-locked loop (PLL) solution for multi-link multi-rate line card applications
US7877710B1 (en) * 2005-10-17 2011-01-25 Altera Corporation Method and apparatus for deriving signal activities for power analysis and optimization
JP4846486B2 (ja) * 2006-08-18 2011-12-28 富士通株式会社 情報処理装置およびその制御方法
US20080270653A1 (en) * 2007-04-26 2008-10-30 Balle Susanne M Intelligent resource management in multiprocessor computer systems

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4849751A (en) * 1987-06-08 1989-07-18 American Telephone And Telegraph Company, At&T Bell Laboratories CMOS Integrated circuit digital crossbar switching arrangement
WO1999014876A1 (en) * 1997-09-19 1999-03-25 Fujitsu Network Communications, Inc. Constant phase crossbar switch
US6636932B1 (en) * 1998-05-27 2003-10-21 Micron Technology, Inc. Crossbar switch and control for data networks switching
ATE526792T1 (de) * 2001-08-15 2011-10-15 Sound Design Technologies Ltd Rekonfigurierbare hörhilfevorrichtung mit niedrigem leistungsverbrauch

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