JP2003298077A - Solar cell - Google Patents

Solar cell

Info

Publication number
JP2003298077A
JP2003298077A JP2002096228A JP2002096228A JP2003298077A JP 2003298077 A JP2003298077 A JP 2003298077A JP 2002096228 A JP2002096228 A JP 2002096228A JP 2002096228 A JP2002096228 A JP 2002096228A JP 2003298077 A JP2003298077 A JP 2003298077A
Authority
JP
Japan
Prior art keywords
silicon layer
solar cell
silicon
carbon
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002096228A
Other languages
Japanese (ja)
Inventor
Takahiro Mishima
孝博 三島
Naoki Ishikawa
直揮 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ebara Corp
Original Assignee
Ebara Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebara Corp filed Critical Ebara Corp
Priority to JP2002096228A priority Critical patent/JP2003298077A/en
Priority to PCT/JP2003/002474 priority patent/WO2003083953A1/en
Priority to AU2003210011A priority patent/AU2003210011A1/en
Publication of JP2003298077A publication Critical patent/JP2003298077A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H01L31/1812Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System including only AIVBIV alloys, e.g. SiGe
    • H01L31/1816Special manufacturing methods for microcrystalline layers, e.g. uc-SiGe, uc-SiC
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02529Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solar cell whose electric characteristics such as power generation efficiency or the like are appropriate and that can be manufactured in high productivity. <P>SOLUTION: A silicon layer containing carbon formed by a hot wire CVD is formed on a single crystal or polycrystal silicon layer. It is preferable that there exist fine columnar crystals in the silicon layer containing the carbon, and the silicon layer containing the carbon has a high conductivity. In addition, a high hydrogen containing layer is preferably provided on a boundary between the silicon layer containing the carbon and the single crystal or polycrystal silicon layer. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は太陽電池に係り、特
に2つの異なるバンドギャップを有する半導体を接合し
た、いわゆるヘテロ接合型の太陽電池に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell, and more particularly to a so-called heterojunction type solar cell in which semiconductors having two different band gaps are joined.

【0002】[0002]

【従来の技術】太陽電池の一般的な構造は、アモルファ
ス(非晶質)シリコンに不純物をドープしてPN接合を
形成したものである。この形式の太陽電池は、量産性が
高く比較的低い製造コストで製造が可能であるが、発電
効率が比較的低いという問題がある。これに対して、単
結晶または多結晶シリコン基板に不純物をドープしてP
N接合を形成した太陽電池が知られている。係る構造の
太陽電池によれば、太陽電池を構成する基板の厚さが厚
くなり、生産性は上述したアモルファスシリコンの太陽
電池と比較して低いが、発電効率が高くなる。
2. Description of the Related Art The general structure of a solar cell is one in which amorphous silicon is doped with impurities to form a PN junction. This type of solar cell has high mass productivity and can be manufactured at a relatively low manufacturing cost, but has a problem of relatively low power generation efficiency. On the other hand, a single crystal or polycrystalline silicon substrate is doped with impurities to form P
A solar cell having an N-junction is known. According to the solar cell having such a structure, the thickness of the substrate forming the solar cell becomes thicker, and the productivity is lower than that of the amorphous silicon solar cell described above, but the power generation efficiency is high.

【0003】さらに、2つの異なるバンドギャップを有
する半導体を接合させた、いわゆるヘテロ接合型の太陽
電池が知られている。この太陽電池は、例えば、シリコ
ンと、バンドギャップがシリコンよりも広いSiC等の
半導体膜を組み合わせて接合を形成することで、より高
い発電効率が期待できる。このようなヘテロ接合型太陽
電池の製造方法として、アモルファスシリコン膜上にプ
ラズマCVD法またはECR(Electron Cyclotron Res
onance)CVD法等でバンドギャップが異なる材料を堆
積する技術が知られている。しかしながら、これらのヘ
テロ接合型太陽電池の製造方法は、成膜速度が低いこ
と、装置が非常に高価であること等から生産効率及び製
造コスト面で問題があった。
Further, a so-called heterojunction type solar cell in which semiconductors having two different band gaps are joined is known. In this solar cell, for example, higher power generation efficiency can be expected by forming a junction by combining silicon and a semiconductor film such as SiC having a band gap wider than that of silicon. As a method of manufacturing such a heterojunction solar cell, a plasma CVD method or an ECR (Electron Cyclotron Res
Onance) CVD method or the like for depositing materials having different band gaps is known. However, these methods for manufacturing a heterojunction solar cell have problems in terms of production efficiency and manufacturing cost due to a low film forming rate, an extremely expensive apparatus, and the like.

【0004】[0004]

【発明が解決しようとする課題】本発明は上述した事情
に鑑みてなされたもので、発電効率等の電気的な特性が
良好で、かつ良好な生産性で製造が可能な太陽電池を提
供することを目的とする。
The present invention has been made in view of the above circumstances, and provides a solar cell which has good electrical characteristics such as power generation efficiency and which can be manufactured with good productivity. The purpose is to

【0005】[0005]

【課題を解決するための手段】本発明の太陽電池は、ホ
ットワイヤーCVDで形成した炭素を含むシリコン層
を、単結晶または多結晶シリコン層上に形成したことを
特徴とする。
A solar cell of the present invention is characterized in that a silicon-containing silicon layer formed by hot wire CVD is formed on a single crystal or polycrystalline silicon layer.

【0006】ここで、前記炭素を含むシリコン層には、
微細なシリコンの柱状結晶が存在していることが好まし
い。また、前記炭素を含むシリコン層は、高導電率の導
電性を備えることが好ましい。さらに、前記炭素を含む
シリコン層の単結晶または多結晶シリコン層との界面に
高水素含有層を備えることが好ましい。
Here, the silicon layer containing carbon includes
It is preferable that fine columnar crystals of silicon are present. Further, it is preferable that the silicon layer containing carbon has high conductivity. Further, it is preferable to provide a high hydrogen content layer at the interface between the silicon layer containing carbon and the single crystal or polycrystalline silicon layer.

【0007】上述した本発明によれば、ホットワイヤー
CVDで形成した炭素を含むシリコン層を単結晶または
多結晶シリコン層上に形成するので、ヘテロ接合型の太
陽電池を容易に形成することができる。この太陽電池
は、ヘテロ接合型の太陽電池であるので、高い開放電圧
および短絡電流特性と、高い発電効率等の良好な電気的
特性が得られる。また、炭素を含むシリコン層をホット
ワイヤーCVDで形成するので、良好な膜質の太陽電池
を比較的高い生産性で形成することができる。
According to the present invention described above, since the silicon-containing silicon layer formed by hot wire CVD is formed on the single crystal or polycrystalline silicon layer, a heterojunction solar cell can be easily formed. . Since this solar cell is a heterojunction type solar cell, it has high open-circuit voltage and short-circuit current characteristics and good electrical characteristics such as high power generation efficiency. Further, since the silicon layer containing carbon is formed by hot wire CVD, it is possible to form a solar cell having a good film quality with relatively high productivity.

【0008】[0008]

【発明の実施の形態】以下、本発明の実施形態について
添付図面を参照しながら説明する。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the accompanying drawings.

【0009】図1は、本発明の第1の実施形態の太陽電
池を示す。この太陽電池は、単結晶または多結晶のシリ
コン基板11にホットワイヤーCVDで形成した炭素を
含むシリコン層12を被着している。これにより、ヘテ
ロ接合型の太陽電池が形成される。ここで、単結晶また
は多結晶シリコン基板11は、例えば厚さが150μm
以下のデンドリックウェブ(リボン結晶)から形成した
ものであることが好ましい。係る単結晶又は多結晶シリ
コン基板は、所定温度に調整されたシリコン原料を溶融
したるつぼから、所定方位の結晶軸に沿って種結晶を引
上げることで、薄い帯状(シート状)の結晶を成長させ
て生産することができる。即ち、この結晶をエンドレス
ベルトに挟んで引上げることで、長尺の結晶を連続的に
引上げることができる。そして、薄い帯状の結晶を適当
な寸法で裁断することにより、厚さ150μm以下の矩
形シート形状の単結晶又は多結晶シリコン基板が得られ
る。この詳細については、本出願人の特願2000−2
75315号を参照されたい。
FIG. 1 shows a solar cell according to a first embodiment of the present invention. In this solar cell, a silicon layer 12 containing carbon formed by hot wire CVD is deposited on a monocrystalline or polycrystalline silicon substrate 11. Thereby, a heterojunction solar cell is formed. Here, the single crystal or polycrystalline silicon substrate 11 has, for example, a thickness of 150 μm.
It is preferably formed from the following dendritic web (ribbon crystal). Such a single crystal or polycrystalline silicon substrate grows a thin band-shaped (sheet-shaped) crystal by pulling a seed crystal from a crucible obtained by melting a silicon raw material adjusted to a predetermined temperature along a crystal axis of a predetermined orientation. Can be produced. That is, a long crystal can be continuously pulled up by sandwiching this crystal between endless belts and pulling it up. Then, a thin band-shaped crystal is cut into an appropriate size to obtain a rectangular sheet-shaped single crystal or polycrystalline silicon substrate having a thickness of 150 μm or less. For more details, see Japanese Patent Application No. 2000-2 of the applicant.
See 75315.

【0010】シリコン基板11は、面方位<100>の
単結晶シリコン基板であり、N型にドープされ、抵抗率
は一例として2Ωcmである。シリコン基板11上に
は、ホットワイヤーCVDで形成した炭素を含むシリコ
ン層12が形成されている。このシリコン層12はアモ
ルファス(非結晶)炭化ケイ素(a−SiC)に微結晶
シリコン(μc−Si)を含むもので、a−SiCと微
結晶Siとが混在したヘテロ構造導電膜となっている。
この炭素を含むシリコン層12の厚さは1〜50nm程
度であり、シリコン基板11と反対導電型(P型)に不
純物がドープされている。従って、シリコン基板11と
シリコン層12との間にPN接合が形成され、太陽電池
としての発電動作を行う。
The silicon substrate 11 is a single crystal silicon substrate having a plane orientation of <100>, is N-type doped, and has a resistivity of 2 Ωcm as an example. A silicon layer 12 containing carbon formed by hot wire CVD is formed on a silicon substrate 11. The silicon layer 12 contains amorphous (non-crystalline) silicon carbide (a-SiC) and microcrystalline silicon (μc-Si), and is a heterostructure conductive film in which a-SiC and microcrystalline Si are mixed. .
The thickness of the carbon-containing silicon layer 12 is about 1 to 50 nm, and the opposite conductivity type (P type) to the silicon substrate 11 is doped with impurities. Therefore, a PN junction is formed between the silicon substrate 11 and the silicon layer 12, and a power generation operation as a solar cell is performed.

【0011】炭素を含むシリコン層12には、図3に示
すように、微細なシリコンの柱状結晶である微結晶シリ
コン柱12bが存在している。この微結晶シリコン柱1
2bは、アモルファス状態の炭素を含むシリコン層(S
iC層)12中に存在し、成膜面に垂直な柱状の結晶体
である。この微結晶シリコン柱は直径が1〜50nm程
度であり、10〜20nmが代表的である。そして、こ
の微結晶シリコン柱12bはその周囲のアモルファス状
態のSiC層に対して高い導電性を呈する。なお、微結
晶シリコン柱の含有率は0.1%〜80%程度までその
含有率を調整することができる。従って、この含有率に
より導電性の調整が可能である。
As shown in FIG. 3, the silicon layer 12 containing carbon has microcrystalline silicon columns 12b which are fine columnar crystals of silicon. This microcrystalline silicon pillar 1
2b is a silicon layer containing carbon in an amorphous state (S
It is a columnar crystal body existing in the iC layer) 12 and perpendicular to the film formation surface. This microcrystalline silicon column has a diameter of about 1 to 50 nm, and 10 to 20 nm is typical. The microcrystalline silicon column 12b exhibits high conductivity with respect to the surrounding SiC layer in the amorphous state. The content of the microcrystalline silicon pillar can be adjusted to about 0.1% to 80%. Therefore, the conductivity can be adjusted by this content rate.

【0012】さらに、炭素を含むシリコン層12におけ
る炭素の含有比率は広い範囲で調整が可能であり、例え
ば0.1%〜70%程度に調整が可能である。炭素の含
有量により、導電性に大きな影響が与えられる。
Further, the carbon content in the carbon-containing silicon layer 12 can be adjusted in a wide range, for example, about 0.1% to 70%. The carbon content has a great influence on the conductivity.

【0013】上述したように、微結晶シリコン柱15の
含有率および炭素の含有率が制御可能であり、更にドー
プ材の濃度の調整が可能であるので、これによりシリコ
ン層12の導電率と実効的なバンドギャップを広範囲に
調整することができる。例えば、P型のシリコン層12
の場合には、導電率を5×10−6〜5×10(S/
cm)程度、実効的なバンドギャップを1.7〜2.6
eV程度に調整することが可能である。これにより、ヘ
テロ接合型の太陽電池において、シリコン層12に高い
導電性が得られ、発電効率、短絡電流、開放電圧等の電
気的特性を改善することができる。
As described above, the content rate of the microcrystalline silicon pillars 15 and the content rate of carbon can be controlled, and the concentration of the doping material can be adjusted. Therefore, the conductivity of the silicon layer 12 and effective A wide band gap can be adjusted. For example, a P-type silicon layer 12
In the case of, the conductivity is 5 × 10 −6 to 5 × 10 0 (S /
cm), and an effective band gap of 1.7 to 2.6
It can be adjusted to about eV. As a result, in the heterojunction solar cell, high conductivity can be obtained in the silicon layer 12, and electrical characteristics such as power generation efficiency, short circuit current, open circuit voltage, etc. can be improved.

【0014】ホットワイヤーCVD法は、図3(a)に
示すように、減圧可能な真空容器内にガス供給系装置2
1、高温ホットワイヤー22、成膜対象の基板23、基
板ホルダ24等を備える。ここで、高温ホットワイヤー
22は、タングステンまたはモリブデン等の線材を15
00〜2400℃に加熱して、対象ガスを活性化して基
板23の表面に気相成長被膜を形成するものであり、触
媒CVDとして一般的に知られているものと、装置の基
本構造等は同一である。なお、ホットワイヤーとは熱線
の総称であり、その形状は、面形状その他の2次元、3
次元の形状を取り得るものである。これに対して、図3
(b)に比較例として示すプラズマCVD装置は、電極
25,26間に高周波電源27より高周波電圧を供給す
ることで、成膜対象のガス分子28をプラズマ化して図
中の矢印方向に振動させ、これにより成膜対象の基板2
3の表面上に気相成長被膜を形成するものである。
In the hot wire CVD method, as shown in FIG. 3 (a), a gas supply system device 2 is provided in a vacuum container capable of depressurizing.
1, a high temperature hot wire 22, a substrate 23 to be film-formed, a substrate holder 24 and the like. Here, the high temperature hot wire 22 is made of a wire material such as tungsten or molybdenum.
It is heated to 00 to 2400 ° C. to activate a target gas to form a vapor phase growth film on the surface of the substrate 23. What is generally known as catalytic CVD and the basic structure of the apparatus are It is the same. Note that the hot wire is a general term for heat rays, and its shape is a two-dimensional shape such as a surface shape or
It can have a dimensional shape. On the other hand, FIG.
The plasma CVD apparatus shown in (b) as a comparative example supplies a high-frequency voltage from the high-frequency power source 27 between the electrodes 25 and 26 to make the gas molecules 28 to be film-formed into plasma and vibrate in the arrow direction in the figure. , By this, the substrate 2 to be film-formed
3 is to form a vapor growth film on the surface of No. 3.

【0015】この図3(a)に示すホットワイヤーCV
D法は、図3(b)に示すプラズマCVD法と比較する
と、成膜対象基板へのプラズマダメージがほとんど存在
しない、装置の構造が簡単でかつ低コストとなる、スケ
ールアップが容易である等の特徴がある。特に、成膜速
度が、例えば5〜10nm/秒程度と比較的高く、アモ
ルファスシリコン膜や微結晶シリコン膜等の形成で品質
が高い膜が比較的短時間で得られる。
The hot wire CV shown in FIG. 3 (a)
Compared to the plasma CVD method shown in FIG. 3B, the D method has almost no plasma damage to the film formation target substrate, the structure of the device is simple and the cost is low, and the scale-up is easy. There is a feature of. In particular, the film formation rate is relatively high, for example, about 5 to 10 nm / sec, and a film of high quality can be obtained in a relatively short time by forming an amorphous silicon film or a microcrystalline silicon film.

【0016】このシリコン層12の下側は高水素P層で
あり、上側はP層である。高水素P層を形成するガス比
は、一例として、 CH:0.9、SiH:0.1、H:9、B
:0.002、 であり、ホットワイヤーの温度は2100℃であり、基
板温度は150℃である。また、反応圧力は10Paで
あり、膜厚は5nmである。なお、高水素濃度P層の膜
中水素濃度は6at%以上である。
The lower side of the silicon layer 12 is a high hydrogen P layer and the upper side is a P layer. Gas ratio to form a high hydrogen P layer is, for example, CH 4: 0.9, SiH 4 : 0.1, H 2: 9, B 2 H
6 : 0.002, the hot wire temperature is 2100 ° C., and the substrate temperature is 150 ° C. The reaction pressure is 10 Pa and the film thickness is 5 nm. The hydrogen concentration in the film of the high hydrogen concentration P layer is 6 at% or more.

【0017】この高水素P層12aの上側にP層12が
形成され、ガス比は、 CH:0.1、SiH:0.1、H:1、B
:0.005、 であり、ホットワイヤーの温度は2100℃であり、基
板温度は250℃である。また、この時の反応圧力は1
0Paであり、膜厚は15nmである。
[0017] The P layer 12 on the upper side of the high hydrogen P layer 12a is formed, gas ratio, CH 4: 0.1, SiH 4 : 0.1, H 2: 1, B 2 H
6 : 0.005, the hot wire temperature is 2100 ° C., and the substrate temperature is 250 ° C. The reaction pressure at this time is 1
It is 0 Pa and the film thickness is 15 nm.

【0018】シリコン基板11の裏面側には、高濃度シ
リコン層(N層)11aを同様にホットワイヤーCV
D法で形成している。このときのガス比は、 SiH:0.1、H:9、PH:0.005、 であり、ホットワイヤーの温度が1800℃であり、基
板温度が200℃である。また、反応圧力は10Paで
あり、膜厚は20nmである。炭素を含むシリコン層1
2の上部には反射防止膜15が形成され、この反射防止
膜15はITO膜からなり、厚さが0.05μm程度で
ある。また、表面電極はAlの蒸着膜が用いられ、厚さ
が3μm程度である。裏面側の電極としては、同様にA
1の蒸着膜が用いられ、厚さが5μm程度である。
A high-concentration silicon layer (N + layer) 11a is similarly formed on the back surface of the silicon substrate 11 by a hot wire CV.
It is formed by the D method. At this time, the gas ratios are SiH 4 : 0.1, H 2 : 9, PH 3 : 0.005, the hot wire temperature is 1800 ° C., and the substrate temperature is 200 ° C. The reaction pressure is 10 Pa and the film thickness is 20 nm. Silicon layer containing carbon 1
An antireflection film 15 is formed on the upper part of 2, and the antireflection film 15 is made of an ITO film and has a thickness of about 0.05 μm. Further, a vapor deposition film of Al is used for the surface electrode and has a thickness of about 3 μm. Similarly, for the back side electrode, A
The vapor deposition film No. 1 is used, and the thickness is about 5 μm.

【0019】図2は、本発明の第2の実施形態の太陽電
池を示す。上記第1の実施形態と同様の構成を備え、相
違するのは単結晶または多結晶シリコン基板11がP型
であり、炭素を含むシリコン層12がN型に不純物ドー
プされている点である。このシリコン層12のドーピン
グガスとしては、PHが用いられ、導電率は5×10
−6〜8×10(S/cm)に調整することが可能で
ある。また、シリコン基板11としてN型基板を用いる
場合には、裏面電極としてTi/Pd/Ag層が用いら
れている。
FIG. 2 shows a solar cell according to the second embodiment of the present invention. The structure is similar to that of the first embodiment, except that the single crystal or polycrystalline silicon substrate 11 is P-type, and the carbon-containing silicon layer 12 is N-type impurity-doped. PH 3 is used as a doping gas for the silicon layer 12, and has a conductivity of 5 × 10 5.
It is possible to adjust to −6 to 8 × 10 1 (S / cm). When an N type substrate is used as the silicon substrate 11, a Ti / Pd / Ag layer is used as the back electrode.

【0020】これらの太陽電池の製造においては、炭素
を含むシリコン層12の形成に、シリコン系の原料ガス
として、SiH、Si等が用いられ、炭素系原
料ガスとして、CH、C、C等が用いら
れ、N型またはP型の不純物をドープするドーピングガ
スとして、PH、B等が用いられる。これらの
原料ガスが熱線(ホットワイヤー)の触媒的分解作用に
より活性化して、a−SiC/μc−Si柱ヘテロ構造
導電膜がシリコン基板11上に形成される。これによ
り、炭素を含むシリコン層12は、2eV程度の広いバ
ンドギャップが得られて、シリコン基板11との間に、
ヘテロ接合が形成される。
In the production of these solar cells, SiH 4 , Si 2 H 6, etc. are used as the silicon-based source gas for forming the carbon-containing silicon layer 12, and CH 4 , C 2 H 4 , C 2 H 2 or the like is used, and PH 3 , B 2 H 6 or the like is used as a doping gas for doping N-type or P-type impurities. These source gases are activated by the catalytic decomposition action of the hot wire (hot wire), and the a-SiC / μc-Si pillar heterostructure conductive film is formed on the silicon substrate 11. As a result, the carbon-containing silicon layer 12 has a wide bandgap of about 2 eV,
A heterojunction is formed.

【0021】成膜対象の基板として、例えば単結晶また
は多結晶シリコン基板を用いてヘテロ接合を形成する場
合に、シリコン基板の表面付近には一般に界面準位が多
数形成されている。従って、ホットワイヤーCVD法に
より薄膜を被着する際に、最初に高水素濃度層の薄膜1
2aを形成することで、シリコン基板11に対してダメ
ージを与えずに効果的に基板及びその表面を水素パッシ
ベーションしてバルク及び界面の欠陥準位を低減するこ
とができる。このときの水素濃度としては、6〜24a
t(atomic)%が適当であり、8at(atomic)%以上
が好ましい。
When a heterojunction is formed by using, for example, a single crystal or polycrystal silicon substrate as a film formation target substrate, a large number of interface states are generally formed near the surface of the silicon substrate. Therefore, when depositing a thin film by the hot wire CVD method, first, the thin film 1 of the high hydrogen concentration layer is formed.
By forming 2a, it is possible to effectively passivate the substrate and its surface by hydrogen without damaging the silicon substrate 11 and reduce the defect levels of the bulk and the interface. The hydrogen concentration at this time is 6 to 24a.
t (atomic)% is suitable, and 8 at (atomic)% or more is preferable.

【0022】次に、上記原料ガスの好ましい構成比につ
いて説明する。シリコンを含む原料ガスとしてSiH
を用い、炭素を含む原料ガスとしてCHを用い、不純
物のドーピングガスとしてPHまたはBを用
い、希釈ガスとしてHガスを用いた場合について説明
する。原料ガスにおける炭素系ガスの比率は、 CH/(SiH+CH)=0.01〜95% とすることが好ましい。また水素ガスの希釈率として
は、 H/(SiH+CH)=0〜50(注:%で言う
と0〜5000%) 程度が好ましい。また、P型ドーピングガスの原料ガス
に対する比率は、 B/(SiH+CH)=0.001〜1% 程度が好ましい。また、N型ドーピングガスの原料ガス
に対する比率は、 PH/(SiH+CH)=0.001〜1% 程度が好ましい。
Next, a preferable composition ratio of the raw material gas will be described. SiH 4 as a source gas containing silicon
The case where CH 4 is used as a source gas containing carbon, PH 3 or B 2 H 6 is used as an impurity doping gas, and H 2 gas is used as a diluent gas will be described. The ratio of the carbon-based gas in the raw material gas is preferably CH 4 / (SiH 4 + CH 4 ) = 0.01 to 95%. As the dilution ratio of hydrogen gas, H 2 / (SiH 4 + CH 4) = 0~50 ( Note: 0 to 5,000% in terms of the%) is preferably about. Further, the ratio of the P-type doping gas to the source gas is preferably B 2 H 6 / (SiH 4 + CH 4 ) = 0.001 to 1%. The ratio of the N-type doping gas to the raw material gas is preferably PH 3 / (SiH 4 + CH 4 ) = 0.001 to 1%.

【0023】このホットワイヤーCVD装置の運転条件
としては、以下の通りである。 成膜圧力:10−1〜10Pa ホットワイヤーの温度(タングステンまたはモリブデン
線):1750〜2400℃ 基板温度:150〜500℃ 基板−ホットワイヤー間距離:1〜10cm 成膜速度:0.1〜10nm/秒
The operating conditions of this hot wire CVD apparatus are as follows. Deposition pressure: 10 −1 to 10 2 Pa Hot wire temperature (tungsten or molybdenum wire): 1750 to 2400 ° C. Substrate temperature: 150 to 500 ° C. Substrate-hot wire distance: 1 to 10 cm Deposition rate: 0.1 -10 nm / sec

【0024】上記条件によるホットワイヤーCVD法で
形成したシリコン層の特性は次の通りである。まず、高
水素濃度P層(水素濃度>8at%)の成膜面の平行方
向の電気伝導度は、5×10−6〜5×10(S/c
m)であり、P層の成膜面平行方向の電気伝導度は5×
10−6〜8×10(S/cm)である。また、膜中
の炭素濃度は0.1〜60at%であるが、炭素濃度4
2at%以下で微結晶シリコン柱が析出する。また、析
出した微結晶シリコン柱の直径は1〜50nmであり、
ラマン分光法により測定した結晶化率は60〜90%で
ある。膜中水素濃度は2〜24at%であり、光学的に
測定したバンドギャップは1.9〜2.6(eV)であ
る。ただし、このバンドギャップは炭素含有率が30〜
40%程度の場合のシリコン層12についてのものであ
る。
The characteristics of the silicon layer formed by the hot wire CVD method under the above conditions are as follows. First, the electrical conductivity in the parallel direction of the film formation surface of the high hydrogen concentration P layer (hydrogen concentration> 8 at%) is 5 × 10 −6 to 5 × 10 0 (S / c
m), and the electric conductivity of the P layer in the direction parallel to the film formation surface is 5 ×
It is 10 −6 to 8 × 10 1 (S / cm). The carbon concentration in the film is 0.1 to 60 at%, but the carbon concentration is 4
Microcrystalline silicon columns are precipitated at 2 at% or less. The diameter of the precipitated microcrystalline silicon columns is 1 to 50 nm,
The crystallization rate measured by Raman spectroscopy is 60 to 90%. The hydrogen concentration in the film is 2 to 24 at%, and the band gap optically measured is 1.9 to 2.6 (eV). However, this band gap has a carbon content of 30 to
This is for the silicon layer 12 in the case of about 40%.

【0025】上記実施例の太陽電池においては、従来例
と比較して、変換効率が10.8%から12.2%に、
短絡電流密度が27.8(mA/cm)から30.1
(mA/cm)に、開放電圧が0.54(mV)から
0.55(mV)にそれぞれ向上している。
In the solar cell of the above-mentioned embodiment, the conversion efficiency is increased from 10.8% to 12.2% as compared with the conventional example.
Short-circuit current density is 27.8 (mA / cm 2 ) to 30.1
(MA / cm 2 ), the open circuit voltage is improved from 0.54 (mV) to 0.55 (mV).

【0026】なお、ヘテロ構造型太陽電池においては、
同一導電型の半導体層を接合し、バンドギャップの大き
さの相違による接合(High-Low接合)を用いることもで
きる。また、上述したホットワイヤーCVD法によるa
−SiC/μc−Si柱ヘテロ構造導電膜は、太陽電池
以外でもディスプレイデバイスのTFT等のデバイスの
形成に用いることができる。
In the heterostructure type solar cell,
It is also possible to join semiconductor layers of the same conductivity type and use a junction (high-low junction) due to a difference in bandgap size. In addition, a by the above-mentioned hot wire CVD method
The -SiC / [mu] c-Si pillar heterostructure conductive film can be used for forming devices such as TFTs of display devices other than solar cells.

【0027】これまで本発明の一実施形態について説明
したが、本発明は上述の実施形態に限定されず、その技
術的思想の範囲内において種々異なる形態にて実施され
てよいことは言うまでもない。
Although one embodiment of the present invention has been described so far, it goes without saying that the present invention is not limited to the above-described embodiment and may be implemented in various different forms within the scope of the technical idea thereof.

【0028】[0028]

【発明の効果】以上説明したように、本発明によれば、
開放電圧および短絡電流等の電気的特性が改良されたヘ
テロ接合型太陽電池を提供することが可能となる。
As described above, according to the present invention,
It is possible to provide a heterojunction solar cell having improved electrical characteristics such as open circuit voltage and short circuit current.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施形態の太陽電池の構成例を
示す図である。
FIG. 1 is a diagram showing a configuration example of a solar cell according to a first embodiment of the present invention.

【図2】本発明の第2の実施形態の太陽電池の構成例を
示す図である。
FIG. 2 is a diagram showing a configuration example of a solar cell according to a second embodiment of the present invention.

【図3】シリコン微結晶柱についての説明のための図で
ある。
FIG. 3 is a diagram for explaining a silicon microcrystalline column.

【図4】(a)はホットワイヤーCVD法を示す図であ
り、(b)はプラズマCVD法を示す図である。
4A is a diagram showing a hot wire CVD method, and FIG. 4B is a diagram showing a plasma CVD method.

【符号の説明】[Explanation of symbols]

11 シリコン基板 11a N層 11b P層 12 炭素を含むシリコン層 12a 高水素含有層 13 裏面電極 15 反射防止膜/透明電極 16 表面電極11 Silicon Substrate 11a N + Layer 11b P + Layer 12 Carbon-containing Silicon Layer 12a High Hydrogen Content Layer 13 Back Electrode 15 Antireflection Film / Transparent Electrode 16 Front Electrode

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F051 AA02 AA03 AA04 AA05 CA02 CA05 CA14 DA03 DA07 DA20 FA04 FA23    ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5F051 AA02 AA03 AA04 AA05 CA02                       CA05 CA14 DA03 DA07 DA20                       FA04 FA23

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 ホットワイヤーCVDで形成した炭素を
含むシリコン層を、単結晶または多結晶シリコン層上に
形成したことを特徴とする太陽電池。
1. A solar cell, wherein a silicon-containing silicon layer formed by hot wire CVD is formed on a single crystal or polycrystalline silicon layer.
【請求項2】 前記炭素を含むシリコン層には、微細な
シリコンの柱状結晶が存在していることを特徴とする請
求項1記載の太陽電池。
2. The solar cell according to claim 1, wherein fine columnar crystals of silicon are present in the carbon-containing silicon layer.
【請求項3】 前記炭素を含むシリコン層は、高導電率
の導電性を備えたことを特徴とする請求項1記載の太陽
電池。
3. The solar cell according to claim 1, wherein the carbon-containing silicon layer has high conductivity.
【請求項4】 前記炭素を含むシリコン層の単結晶また
は多結晶シリコン層との界面に高水素含有層を備えたこ
とを特徴とする請求項1記載の太陽電池。
4. The solar cell according to claim 1, wherein a high hydrogen content layer is provided at the interface between the silicon layer containing carbon and the single crystal or polycrystalline silicon layer.
JP2002096228A 2002-03-29 2002-03-29 Solar cell Pending JP2003298077A (en)

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