JP2003289449A - Image processor and method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processor and method thereof for realizing high speed color conversion. <P>SOLUTION: In applying color conversion to image data by using a three- dimensional lookup table and tetrahedron interpolation, the output values of the grating points of a rectangular solid including the image data and defined by the lookup table are cached (S6). Further, the output values of the grating points of a tetrahedron including the image data and defined by the rectangular solid are cached (S11). <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus and method, for example, color conversion processing of image data.

[0002]

2. Description of the Related Art Among software such as applications and device drivers that operate on a personal computer, especially software that handles images,
The process of converting color data from one color space to another is often performed. For example, when printing an image represented by RGB image data, cyan, magenta,
Conversion to the CMYK color space composed of yellow and black is performed. If the characteristics of the same RGB color space, such as the scanner and monitor RGB color spaces, are different, color conversion is performed. Specifically, when displaying an image read by a scanner on a monitor, conversion from the scanner RGB color space to the monitor RGB color space is required for color matching.

As a method of such color conversion processing, there is a color conversion method which combines a three-dimensional lookup table (3D LUT) and interpolation calculation. Among many interpolation calculation methods, JP-A No. 53-123201 and JP-A No. 1231203 have been proposed because of their excellent color continuity and gray line reproduction characteristics between adjacent rectangular parallelepipeds.
The tetrahedral interpolation disclosed in, for example, 0-22973 is known as an excellent interpolation calculation method.

On the other hand, as the number of pixels processed by digital cameras and scanners increases, the size of image data tends to increase. Along with this, the time required for color conversion also increases, which is one of the causes of reducing the usability of the system.

Since the color conversion processing is performed as a simple repetitive calculation for each pixel of the image, the processing time T1 is expressed by the equation (1). T1 = n × t1 + c1 (1) where n: number of processed pixels t1: color conversion processing time per pixel c1: time required for initialization of color conversion processing (constant)

In general, the constant c1 is small and can be ignored especially when the number of processed pixels n is sufficiently large. For example, when performing color conversion on an image of A4 recording paper size (210 × 297 mm) and 600 dpi, the number of processed pixels n is about 35 million pixels. If the color conversion processing time t1 per pixel is 0.5 μsec, the color conversion processing time T1 requires 17.5 seconds.

In order to eliminate such troublesomeness, there are methods for speeding up color conversion using a cache mechanism disclosed in Japanese Patent Laid-Open No. 8-279030 and Japanese Patent Laid-Open No. 11-85969. These methods hold the operation result in the cache table for the once input data, and when the same data is input again, the operation result is read from the cache table without performing the same operation. The processing time is shortened. When color conversion is performed using the cache mechanism, the total processing time T2 can be approximated by equation (2). T2 = n × {ts + (1-r) × t2 + r × tc} + c2 (2) where n: number of processed pixels ts: per pixel required to check whether cache hit or not Average time t2: Color conversion processing time when there is no cache hit and time to store the conversion result in the cache table tc: Average acquisition time of color conversion result at cache hit r: Cache hit for all pixels Rate (0 ≦ r1 <1) c2: Time required for initialization of color conversion processing (constant)

Also in this case, the constant c2 can often be ignored. Here, if formula (2) is rewritten so as to be easily compared with formula (1), formula (3) is obtained. T2 = n × {t2 + ts-r × (t2-tc)} + c2… (3)

Focusing on the coefficient of the number of processed pixels n, it can be seen that the following elements are necessary to shorten the total processing time T2. (1) Time required to confirm whether or not there is a cache hit
Shortening ts (2) Improving cache hit ratio r (3) Shortening data output time at cache hit, that is, tc is as small as possible compared to t2

In the method of caching the output pixel data with respect to the input pixel data, the output result is cached as it is, and the tc is made small to increase the speed. Such a cache method has a hit rate for images including text objects and images including graphics objects.
Since r is large and tc is small, it operates at sufficiently high speed.

Further, increasing the speed of reading data from the lookup table is important for shortening the processing time. Reading the output value from the look-up table greatly affects t1 and t2.

In recent computer systems, the processing speed of the processor has been greatly increased, while the memory access speed is far below the internal speed of the processor, and reducing the frequency of memory access is one of the speed improvements. It is a requirement.

In order to reduce the memory access frequency, the number of CPUs having a cache mechanism is increasing. Such a cache will be called a "CPU cache" to distinguish it from the cache in the color conversion algorithm. C
A system with a PU cache is designed to improve the processing speed of the entire system by arranging a high-speed cache memory inside or near the CPU. The capacity of such cache memory is often composed of about 16KB to 128KB. The cache memory is divided and managed in a minimum unit called a cache line of several bytes to several tens of bytes. Therefore, even if the data size to be accessed is
Even with 1 byte, the cache line capacity will use the cache memory.

In the case of a system that operates by multitasking,
Since multiple tasks share the cache memory, one task cannot use all the cache memory. Considering optimizing the speed of the entire multitasking system, faster throughput is often realized when the size of the cache used by each task is smaller.

[0015]

Although the conventional cache method can reduce the average color conversion result acquisition time tc when a cache hit occurs, the cache hit rate r However, there is a problem that the total processing time T2 cannot be shortened. Furthermore, if the hit ratio r is low, depending on the cache algorithm, the time ts for checking whether the input data hit the cache, the color conversion processing time when the input data does not hit the cache, and the conversion result are stored in the cache table. There is a problem that the storage time of the conversion result of the storage time t2 exceeds the shortening time of T2 due to the cache effect, and the total processing time T2 rather increases.

This is a problem that a photographic image has a lower autocorrelation between adjacent pixels than a graphic image, and the frequency of inputting data of the same value between adjacent pixels decreases. .

Further, an image taken under exposure or overexposure may contain a lot of noise components, and since such an image has a lower autocorrelation, the hit ratio r of the cache is lowered, which causes further problems. It will be noticeable.

On the other hand, the three-dimensional lookup table generally has a size of several tens of kilobytes to one hundred and several tens of kilobytes. When referring to the output data of each lattice point from the look-up table, it is often the case that discrete addresses are accessed. Therefore, the usage rate of the cache memory of the CPU cache is often high relative to the actual amount of data that needs to be accessed. In such a case, there is a problem that the performance of the entire multitasking system deteriorates.

The present invention is for solving the above-mentioned problems individually or collectively, and an object thereof is to realize high-speed color conversion.

[0020]

The present invention has the following structure as one means for achieving the above object.

An image processing method according to the present invention is an image processing method for color-converting an input value by a three-dimensional look-up table and tetrahedral interpolation, including the input value.
An output value of a grid point of a rectangular parallelepiped defined by the lookup table is cached, and an output value of a grid point of a tetrahedron defined by the rectangular parallelepiped including the input value is cached.

An image processing apparatus according to the present invention is an image processing apparatus for color-converting an input value by a three-dimensional lookup table and tetrahedral interpolation, and including the input value.
First cache means for caching output values of rectangular parallelepiped grid points defined by the three-dimensional lookup table, and cache output values of tetrahedral grid points defined by the rectangular parallelepiped including the input values. And a second cache means.

[0023]

DETAILED DESCRIPTION OF THE INVENTION An image processing apparatus according to an embodiment of the present invention will be described in detail below with reference to the drawings.

[0024]

First Embodiment [Arrangement] FIG. 1 is a block diagram showing an arrangement example of an image processing apparatus according to the embodiment, and FIG. 2 is a flowchart showing an example of image processing in the image processing apparatus according to the embodiment.

In FIG. 1, a CPU 1 controls each component via a bus 11 using a RAM 5 as a work memory according to a program stored in a storage device 6 such as a ROM 4 or a hard disk. For example, the CPU 1 performs image processing on the image read from the external storage device 9 according to various instructions of the operator input from the pointing device 8 such as the keyboard 3 and mouse, and displays the image on the display 2 such as a CRT. The external storage device 9 is a drive device for removable media such as a floppy disk, a magneto-optical disk, a CD-ROM, a CD-R.

The image to be image-processed by the CPU 1 may be stored not only in the external storage device 9 but also in the storage device 6, or may be externally stored via the communication interface 7 and the communication line 10. It may be input from the device. As the communication interface 7, USB, IEEE1394 serial bus, SCSI,
Interfaces such as GPIB and Ethernet are preferably used. The external devices connected via the communication interface 7 include a data storage device such as a file server, an image input device such as a digital camera, an image scanner, and a film scanner.

The CPU 1 loads the program code from the storage device 6 or the like into the program storage area 500 of the RAM 5 in order to execute the processing shown in FIG. The program code may be stored in the storage device 6, the ROM 4, the external storage device 9, or the like. And the CPU 1 uses the program storage area 5
Start execution of the program held at 00. that time,
The program code that realizes the cache of this embodiment is also loaded in the storage area 500 as cache codes 501 and 502.

[Operation] Next, the operation of the image processing apparatus will be described.

First, various initialization processes are performed (S1).
The initialization process is a process of securing an initialization buffer (not shown) for the image data, a work area used for the image processing, and the like in the RAM 5, and performing initialization. Further, areas of the cache tables 503 and 504 are secured in the RAM 5 and initialized.

Next, the pixel data of the image data to be color-converted is read from the storage device 6, the external storage device 9 or the communication interface 7 into the input buffer (S2), and the minimum stereoscopic image including the input pixel data P0 is read. C0 (see FIG. 3) is determined (S3).

In the present embodiment, the image data composed of RGB will be described as an example. However, as long as an operation based on a three-dimensional lookup table (3D LUT) using tetrahedral interpolation is used, the input color space is This embodiment can be applied regardless.

When the RGB values each have a value normalized to the range of 0 to 1, the RGB color space can be represented by a cube as shown in FIG. The vertices O of the cube in Fig. 3 are R, G, B.
All are zeros, that is, points that represent black. Also, the vertex ma
x is a point where R, G, and B are all 1, that is, white. The output color information corresponding to each grid point of the grid formed by dividing each axis of this cube evenly or unevenly is the 3D LUT.
Held in.

Generally, the 3D LUT stores information indicating the color after conversion at each grid point of a predetermined grid defined in a predetermined color space before color conversion (RGB color space in this embodiment). To do. That is, the coordinates of the grid point correspond to the input value in the input color space, and the information stored in the grid point is the output value corresponding to the input value. For example, CIE XYZ color space and CIEL *
When converting a * b * or a three-dimensional color defined in a predetermined RGB color space into the color space of a printer using four-color ink composed of CMYK, CIE XYZ, L * a * b *, A three-dimensional grid is defined in the RGB color space, and the converted CMYK output value is held as each grid point data. Although the output color space is described as CMYK also in this embodiment, a 3D LUT using tetrahedral interpolation is used.
This embodiment can be applied regardless of the output color space, as long as the calculation based on is used.

FIG. 4 is an enlarged view of the solid C0 shown in FIG. Solid C0 has eight grid points V000, V001, V010, V0
11, V100, V101, V110 and V111. At these grid points, V000 is the point corresponding to the minimum input value (Fig.
3 is a point near the vertex O), and V111 is a point corresponding to the maximum input value (a point near the vertex max in FIG. 3).

When the axes of the RGB color space are divided at equal intervals when the 3D LUT data is generated, the solid C0 is always a cube,
It may become a rectangular parallelepiped when it divides unevenly. In the following, the solid C0 is described as a cube, but even in the case of a rectangular parallelepiped, the relative coordinates of P0 when the origin is V000 are normalized according to the length of each side, so that Can be treated similarly.

Next, it is checked whether or not the cache table 503 contains information about the solid C0. At the initial stage, since the cache table 503 does not hold any information, the process proceeds to step S5, and the two vertices related to the solid C0 from the 3D LUT, that is, the point V0 at which the input becomes the minimum and the maximum.
Read the output value of 00 and V111. This is because, in the tetrahedral interpolation, when the solid body including the conversion target point P0 is determined, the information of the two vertices V000 and V111 is always used.

Next, the output value information of the two vertices V000 and V111 is written in the cache table 503 according to the algorithm of the program code 501.

There are various methods for the cache algorithm, and typical methods include a method using a hash table and an LRU (Least Recently Used) method. Whatever method is used for the cache algorithm is effective in this embodiment. However, it is necessary to consider the processing time required for checking whether the cache is hit in step S4 and the processing time required for storing the data in the cache table in step S6.

If the memory area required for the cache is unnecessarily large, the pollution rate of the CPU cache 101 of the CPU 1 increases, and the operation efficiency of the CPU cache 101 decreases. Therefore, a cache algorithm that makes the size of the cache table 503 as small as possible is preferable.
Particularly, if the start address and data of the cache table 503 can be accommodated in one cache line of the CPU cache 101, the pollution rate of the CPU cache 101 can be minimized, which is effective.

As a cache algorithm satisfying the above conditions, a method based on the known LRU method and having a small cache capacity is extremely effective. Also, very simply, the cache capacity is the information for one solid, that is, the solid
Index indicating C0, and two vertices V000 and V111
It is also effective to limit the size to the size required to store the output value information of. In this case, the time required to check whether or not the cache is hit and the time to write the data in the cache table can be minimized.

In the present embodiment, the output value is not cached at the level of a point as in the conventional case, but is cached in the range (volume) of a solid, so that image data having a low autocorrelation such as a photographic image is cached. Increase the hit ratio r. Furthermore, by limiting the data to be cached to the minimum required two vertices instead of all the vertices of the solid, the writing time to the cache table is minimized.

In the execution of step S4 from the second time onward, the cache table 503 may contain information on the solid C0 and may hit the cache. As described above, since the volume is cached in three dimensions, the hit rate r for a photographic image is high. If the cache is hit, the process moves to step S7 and the cache table 503
Obtain the output values of vertices V000 and V111 from.

If no such cache exists,
The data is read from the 3D LUT stored in the area (not shown) of the RAM 5, but the information of the two vertices V000 and V111 is often stored discretely in the 3D LUT, and as a result, the CPU cache 101 The pollution rate increases. If the output values of the two vertices are cached in a partial area of the RAM 5 like the cache table 503 of this embodiment, it is necessary to cache the discrete data of the 3D LUT in the CPU cache 101 in the subsequent access. Lost, CPU cache 101
The pollution rate of can be minimized. Further, since the cache table 503 is frequently accessed, the data is always cached in the CPU cache 101, and the utilization efficiency of the CPU cache 101 is higher than that when the entire 3D LUT is accessed to increase the pollution rate of the CPU cache 101. It will be extremely high, and improvement in processing speed can be expected.

Next, in step S8, a tetrahedron including the input value point P0 is calculated. For tetrahedral interpolation, see the solid C0 in Figure 5.
Are divided into six tetrahedrons indicated by T0 to T5, and the remaining two points used for interpolation calculation are determined depending on which tetrahedron the input value P0 is included in. When the relative coordinates of the input value P0 when the vertex V000 is the origin is (r, g, b), which tetrahedron P0 is included in is determined by the following comparison. Step S8
Let Tn be the tetrahedron determined in. If r>g> b then T0 r>b> g if T1 b>r> g if T2 g>r> b then T3 g>b> r then T4 b>g> r Then T5

Next, in step S9, the cache table
Check whether 504 contains information about the tetrahedron Tn. At the initial stage, since the cache table 504 does not contain any information, the process proceeds to step S10.

In step S10, the output values of the two vertices other than V000 and V111 regarding the tetrahedron Tn are read from the 3D LUT. That is, when the tetrahedron Tn is T0, V100 and V110,
V100 and V101 for T1, V001 and V10 for T2
1, V10 and V110 for T3, V010 and V for T4
In the case of 011 and T5, they are V001 and V011.

Then, in step S11, the read output values of the two vertices are written in the cache table 504 according to the algorithm of the cache code 502. The description regarding the cache code 501 and the cache table 503 can be directly applied to the cache method used here.

As described above, by limiting the cache data to the minimum required two vertices (the minimum required four vertices if the cache contents of the cache table 503 are included) instead of all the vertices of the solid C0, the cache data can be stored in the cache table. Write time can be minimized.

When step S9 is executed after the second time,
The cache table 504 may contain information about the tetrahedron Tn, that is, it may hit the cache. As described above, since the cache is performed as the volume of the tetrahedron, the hit rate r for the photographic image is high. If the cache is hit, the process proceeds to step S12, and the output values of the two vertices are obtained from the cache table 504.

If no such cache exists,
Although the data is read from the 3D LUT stored in the RAM 5, the output values of the two vertices are often discretely stored in the 3D LUT, which increases the pollution rate of the CPU cache 101. Like the cache table 504 of this embodiment, R
If the output values of two vertices are cached in a partial area of AM 5, 3D L will be stored in the CPU cache 101 in subsequent accesses.
There is no need to cache the discrete data of UT,
The pollution rate of the CPU cache 101 can be minimized.
Furthermore, since the cache table 504 is frequently accessed, data is always cached in the CPU cache 101, and the utilization efficiency of the CPU cache 101 is higher than that when the entire 3D LUT is accessed to increase the pollution rate of the CPU cache 101. It will be extremely high, and improvement in processing speed can be expected.

Next, in step S13, tetrahedral interpolation is performed based on the obtained output values of the four vertices to calculate an output value corresponding to the input value P0, and in step S14, the output value is output for image output. Write to the output buffer. The output value is stored in the storage device 6, the external storage device 9 or the communication interface 7 as necessary.
Is output via.

Then, in step S15, it is checked whether or not the color conversion processing is completed for all pixels to be processed,
If not completed, the process returns to step S2, and if completed, the color conversion process ends.

As described above, by caching the solid C0 and the tetrahedron Tn as the volume, the cache hit ratio r
And the input / output to the cache memory can be minimized, and the speed of color conversion processing can be improved.

[0054]

[Second Embodiment] An image processing apparatus according to a second embodiment of the present invention will be described below. In the second embodiment,
The same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

The second embodiment further speeds up the method of the first embodiment. FIG. 6 is a flowchart showing an example of image processing of the second embodiment. Steps that perform the same processing as in FIG. 2 are assigned the same reference numerals and detailed description thereof is omitted.

In step S101, it is checked whether or not the cache table 505 secured in the RAM 5 has an output value corresponding to the input value P0. Since no information is recorded in the cache table 505 in the initial process, the process proceeds to step S3.

When the interpolation calculation in step S13 is completed, the output value obtained by the interpolation calculation and its original input value are cached in the cache table 505 in step S103.

In the processing of step S101 from the second time onward, the input value P0 may hit the cache table 505. If hit, the processing moves to step S102. In step S102, the output value corresponding to the input value P0 is read from the cache table 505, and output in step S14.

As described above, according to the second embodiment, not only the photographic image data but also the input image data having many continuous portions of the same color data such as graphics data can be efficiently used. Color conversion can be performed.

[0060]

Third Embodiment An image processing apparatus according to the third embodiment of the present invention will be described below. Incidentally, in the third embodiment,
The same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

The third embodiment further speeds up the method of the first embodiment. FIG. 7 is a flowchart showing an example of image processing of the third embodiment. Steps that perform the same processing as in FIG. 2 are assigned the same reference numerals and detailed description thereof is omitted.

In step S201, it is checked whether or not the grid point and the input value P0 match, and if they do not match, the process proceeds to step S4. On the other hand, if they match, the process proceeds to step S202, and the output value of the grid point that matches the input value P0 is 3D.
It is read from the LUT and output in step S14.

As described above, according to the third embodiment, when the input value coincides with the lattice point of the 3D LUT, unnecessary interpolation calculation is omitted to speed up the color conversion process.

In each of the above-described embodiments, FIG.
The example in which the color conversion process is executed by the image processing apparatus shown in FIG. 2 has been described. However, as long as the image processing shown in FIG. 2, FIG. 6 or FIG. Of the DSP (Digital Signal Proc
It may be a dedicated processing circuit such as an essor) or an ASIC.

According to each of the above-described embodiments, the hit rate r can be remarkably increased as compared with the conventional point unit cache by forming the cache unit of a rectangular parallelepiped or a tetrahedron. Therefore, it is possible to perform color conversion at high speed.

In particular, in the tetrahedral interpolation calculation, the output values of the two vertices that are always used when the rectangular parallelepiped is determined and the rectangular parallelepiped are associated and cached, so that writing and reading of unnecessary information to the cache table can be avoided. , It becomes possible to perform color conversion at higher speed.

Further, in the tetrahedral interpolation calculation, the output values of the two vertices, which can be used for the calculation for the first time when the tetrahedron is determined, and the tetrahedron are cached in association with each other. Writing and reading can be avoided, and color conversion can be performed at higher speed.

Further, by caching the output value of the 3D LUT, discrete memory access can be reduced, and the CPU cache 101 can be efficiently used to realize high-speed color conversion.

Further, by managing the information of the rectangular parallelepiped and the information of the tetrahedron by different caches, the writing and reading of the grid point output values which are not used for the calculation in the cache table can be reduced, and the speed of the color conversion can be increased.

Further, by limiting the start address and the cache size of the cache table to one cache line of the CPU cache 101, the CPU cache 101
The use rate of the cache is suppressed, and the confirmation, writing, and reading of hits to the cache are simplified, and the speed of color conversion is increased.

[0071]

Other Embodiments Even when the present invention is applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), an apparatus including one device (for example, a copying machine). Machine, facsimile machine, etc.).

Further, an object of the present invention is to supply a storage medium (or recording medium) recording a program code of software for realizing the functions of the above-described embodiments to a system or apparatus, and to supply a computer of the system or apparatus ( Needless to say, this can also be achieved by the CPU or MPU) reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention. Also,
By executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also an operating system (OS) running on the computer based on the instructions of the program code.
Needless to say, this also includes the case where the above-mentioned processes perform part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.

Further, after the program code read from the storage medium is written in the memory provided in the function expansion card inserted in the computer or the function expansion unit connected to the computer, based on the instruction of the program code, Needless to say, this also includes a case where a CPU or the like included in the function expansion card or the function expansion unit performs a part or all of the actual processing and the processing realizes the functions of the above-described embodiments.

When the present invention is applied to the above storage medium, the storage medium stores the program code corresponding to the above-described flowchart.

[0075]

As described above, according to the present invention,
High-speed color conversion can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of an image processing apparatus according to an embodiment,

FIG. 2 is a flowchart showing an example of image processing in the image processing apparatus according to the embodiment,

FIG. 3 is a diagram illustrating a solid defined by a 3D LUT,

FIG. 4 is an enlarged view of the solid body shown in FIG. 3;

FIG. 5 is a diagram illustrating a tetrahedron;

FIG. 6 is a flowchart showing an example of image processing of the second embodiment,

FIG. 7 is a flowchart illustrating an example of image processing according to the third embodiment.

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5B057 AA20 CA01 CA08 CA16 CB01                       CB08 CB16 CE16 CH01 CH11                       CH14 DA16                 5C077 LL18 MP08 PP32 PP33 PP36                       PP37 PQ12 PQ22 PQ23 RR19                 5C079 HB01 HB03 HB05 HB08 HB11                       HB12 MA01 MA04 MA11 NA11

Claims (10)

[Claims] 1. An image processing method for color-converting an input value by using a three-dimensional lookup table and tetrahedral interpolation, the output value of a rectangular parallelepiped grid point defined by the lookup table including the input value. And an output value at a grid point of a tetrahedron defined by the rectangular parallelepiped that includes the input value is cached. 2. The image according to claim 1, wherein the cache related to the rectangular parallelepiped caches output values corresponding to two vertices of the rectangular parallelepiped whose input values correspond to a minimum and a maximum, respectively. Processing method. 3. The cache related to the tetrahedron caches output values corresponding to two vertices of the tetrahedron different from the two vertices corresponding to the minimum and maximum input values. The image processing method according to claim 1 or claim 2. 4. The start address and cache size of a cache table used for the cache related to the rectangular parallelepiped are within one cache line of a processor that performs an operation related to the color conversion.
4. The image processing method according to claim 3. 5. The start address and the cache size of a cache table used for the cache related to the tetrahedron fit within one cache line of a processor that performs an operation related to the color conversion.
5. The image processing method according to claim 4. 6. The output value corresponding to the color-converted input value is further cached.
6. The image processing method according to claim 5. 7. When the input value matches a grid point of the three-dimensional lookup table, the output value corresponding to the grid point is set as a color conversion result of the input value. 7. The image processing method according to claim 6. 8. An image processing device for color-converting an input value by a three-dimensional lookup table and tetrahedral interpolation, the method comprising: a rectangular parallelepiped grid point defined by the three-dimensional lookup table including the input value. Image processing comprising: first cache means for caching an output value; and second cache means for caching an output value of a grid point of a tetrahedron defined by the rectangular parallelepiped including the input value. apparatus. 9. A program for controlling an image processing apparatus to execute the image processing according to any one of claims 1 to 7. 10. A recording medium on which the program according to claim 9 is recorded.