JP2003289107A - Capacitive element and hybrid coupler and power distributor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitive element effective for circuit design and layout design by reducing the deterioration of performance at a high frequency. <P>SOLUTION: A capacitive element, formed on a monolithic microwave integrated circuit board 1000, is constituted of a first electrode conductor film 101 and a second electrode conductor film 103 and an insulating film 102; the board 1000 is provided with a main face and a back face located opposite to the main face; a ground conductor film 1001 is formed on the back face of the board 1000; and the first electrode conductor film 101 is formed on the main face of the board 1000; an insulating film 102 is formed on the board 1000 and the first electrode conductor film 101; a conductor wiring part 100 constituted of the second electrode conductor film 103 and 108 and 109 is formed on the insulating film 102; the second electrode conductor film 103 is configured as a part of the conductor wiring part 100; and the first electrode conductor film 101 is connected through a through-hole 104, having a conductor wall face 105 put through the board 1000 to a ground conductor film 1001. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention uses a semiconductor substrate, and in particular, a gallium arsenide (GaAs) monolithic microwave integrated circuit (MMIC) capacitive element and the capacitive element.
The present invention relates to a hybrid coupler and a power distributor which are passive functional circuits for MMIC.

[0002]

2. Description of the Related Art Capacitive elements are widely used as matching passive elements in gallium arsenide (GaAs) monolithic microwave integrated circuits (MMICs). Conductive film / insulating film / conductive film (MIM) capacitive element consisting of a conductor electrode and an insulating film has a small occupied area on a semiconductor substrate, and is therefore used as an impedance matching element in MMIC. Figure 20 (a) shows a MIM capacitive element as a conventional capacitive element, and (b)
Shows the cross-sectional structure at XX. The MIM capacitive element is a MIM capacitive element formed on a monolithic microwave integrated circuit substrate 17000, and the MIM capacitive element is formed on the substrate.
A conductor film 1701 which is a lower electrode of a capacitive element and an insulating film 1702 are formed, and a conductor film 1703 which is an upper electrode is spatially separated from the conductor film 1701 by being formed on the insulating film 1702. 1701 is a through conductor rod 1704 that penetrates the insulating film 1702.
Is connected to the connection conductor film 1705. Conductor wiring or other passive elements and transistors are connected to the connection surfaces 1706 and 1707 of the MIM capacitive element. FIG. 20A shows an example of the connection between the connection surfaces 1706 and 1707 and the conductor wirings 1708 and 1709. The MIM capacitive element is often shunted for impedance matching in a high frequency circuit. FIG. 21 shows an example of a conventional high frequency circuit. Capacitors 1801 and 1802, which are matching capacitive elements, are shunted for impedance matching. In the following, a capacitor in which one connection portion is grounded, such as 1801 and 1802 in FIG. 21, is referred to as a shunt capacitive element, and
A capacitive element having an MIM structure that is an insulating film / conductor film is
M Shunt Capacitive element. Generally, an MIM shunt capacitive element having a small occupied area on a semiconductor substrate is widely used as an impedance matching shunt capacitive element in a high frequency circuit. FIG. 22 shows an example of a conventional MIM shunt capacitive element on a semiconductor substrate. M in Figure 22
The IM shunt capacitive element is
Corresponding to the capacitor 1801 or 1802. Since the MIM capacitive element section 1900 in FIG. 22 is the same as the capacitive element in FIG. 20 (a), the notation numbers are the same. Conventionally MIM capacitive element section 1
To connect other passive elements or transistors to 900, connect surface of conductor film 1703, which is the upper electrode, as shown in FIG. 22.
A T-branch 1920 including conductor wirings 1901 and 1902 is connected to 1706, and other passive elements or transistors are connected to the connecting portions 1903 and 1904 of the conductor wiring 1902. An example thereof is shown in FIG. The shunt capacitor 1801 in FIG. 21 is connected to the capacitor 1803 and the inductor 1804, and the shunt capacitor 1802 is connected to the transistor 1805 and the inductor 1806.
Are connected. The inductor 1807 is a gate feed inductor, the inductor 1808 is a drain feed inductor, and the inductor 1809 is a matching inductor.

Further, in the conventional MIM shunt capacitive element of FIG. 22, the conductor wiring 1908 is connected to the connection surface 1707 of the connection conductor film 1705, and the conductor wiring 1908 is connected to the conductor ground pad 1909 to which the ground potential is supplied. The conductor ground pad 1909 is connected to an external ground terminal via a bonding wire 1910.
As can be seen from FIG. 20B showing the cross-sectional structure, the conductor film 1701 which is the lower electrode is connected to the connection conductor film 17 by the through conductor rod 1704.
Since it is connected to 05, the ground potential is supplied to the conductor film 1701 which is the lower electrode. However, the conventional MIM shunt capacitive element of FIG. 22 has the following problems.

(1) The MIM shunt capacitive element is a MIM
For connecting the capacitive element portion 1900 to another passive element or transistor, a T-branch 1920 including conductor wirings 1901 and 1902 is provided, and a conductor is provided for supplying a ground potential to the conductor film 1701 which is the lower electrode. Since the ground potential supply unit 1930 including the wiring 1908, the conductor ground pad 1909, and the bonding wire 1910 is included, the area occupied on the semiconductor substrate is large.

(2) When the MIM shunt capacitive element is used, the parasitic inductance of the conductor wiring 1908 and the bonding wire 1910, the parasitic capacitance and parasitic inductance of the contact portion between the bonding wire 1910 and the conductor ground pad 1909, and the conductor film 1703. The performance at high frequencies deteriorates due to the coupling that occurs between the conductor wiring 1902 and the conductor wiring 1902. For example, a conductor wiring 190 having a width of 20 μm and a length of 100 to 1000 μm is formed on a gallium arsenide (GaAs) substrate having a thickness of 100 μm.
From 8, a parasitic inductance of about 0.06 to 3 nH is generated, and from a bonding wire 1910 made of Au having a length of 500 to 1000 μm, a parasitic inductance of about 0.5 to 1 nH is generated.

(3) Further, due to the parasitic component and the coupling, the MIM shunt capacitive element has a high frequency, especially K.
In the band (18 to 26.5 GHz) or higher, it cannot be expressed by a simple lumped capacitor like 1801 or 1802 in FIG. Therefore, in order to perform layout and circuit design efficiently, a separate lumped constant equivalent circuit and its mathematical model are required. However, in the case of the MIM shunt capacitive element, it is difficult to construct a lumped constant equivalent circuit and a mathematical model because it has a complicated structure in which parasitic components and coupling occur. Therefore, if the MIM shunt capacitive element is used, circuit design and layout design cannot be performed efficiently at high frequencies.

To explain the above-mentioned problem (3) in detail, FIG.
Figure 2 shows a flow chart of the work contents when performing circuit design and layout design using a conventional MIM shunt capacitive element. As can be seen from FIG. 23, for example, when performing a circuit design as shown in FIG. 21 using the conventional MIM shunt capacitive element as shown in FIG. 22, first, as the MIM shunt capacitive element, as shown in 1801 or 1802 in FIG. The circuit design is performed using one lumped constant capacitor until the desired performance is obtained (step 1). As a result, for example, when the capacitance value of 0.2 pF is determined as the optimum value, the MIM capacitive element unit 1900 shown in FIG. Layout the pattern of the MIM shunt capacitive element in Figure 22 so that has a capacitance value of 0.2 pF (step
2). Then, electromagnetic field analysis is performed on the MIM shunt capacitive element of FIG. 22 (step 3). After that, the electromagnetic field analysis result is reflected in the circuit analyzed in step 1 (step
Four). In step 1, the circuit is designed with a simple capacitor without considering the parasitic component of the MIM shunt capacitive element in FIG. Therefore, normally, the circuit performance when the electromagnetic field analysis result is reflected in the circuit in step 4 is largely deviated from the performance obtained in step 1. In this case, until the desired performance (circuit performance obtained in step 1) is obtained,
It is necessary to repeatedly perform layout design, electromagnetic field analysis, and circuit design while changing the shape of the shunt capacitive element. Therefore, if the MIM shunt capacitive element is used, circuit design and layout design cannot be performed efficiently at high frequencies.

Due to the above-mentioned problem (3) in the conventional MIM shunt capacitive element, an open stub is often used as a matching shunt capacitive element at a high frequency, particularly at a frequency of K band or higher. FIG. 24 (a) shows an open stub as a conventional shunt capacitive element on a semiconductor substrate, and FIG. 24 (b) shows a sectional structure taken along line XX. The conductor open line 2001 on the semiconductor substrate 20000 is connected to the conductor wiring 2002. Other passive elements, transistors, or the like are connected to the connecting portions 2003 and 2004 of the conductor wiring 2002. Length L'as seen from the connecting surface 2005 between the conductor open line 2001 and the conductor wiring 2002
The input admittance of the open line 2001 having the following is expressed by the following (Equation 1).

[0009]

[Equation 1]

In the above (Formula 1), Y _C is the characteristic admittance of the open line 2001, λg is the wavelength at the operating frequency, and L'is the length of the open line. When the capacitance value of the open line 2001 is represented by C ′, the capacitance value C ′ is represented by (Equation 2).

[0011]

[Equation 2]

In the above (Formula 2), f is the operating frequency. L '
If There is lambda] g / 4 or less, 'for (/ lambda _g is having a positive value, C tan 2πL)' is positive, the capacity of the open stub (number 2) of C 'shown in FIG. 24 (a) Has a value. As can be seen from (Equation 2), the capacitance value C ′ can be adjusted by adjusting the length L ′ of the open line. When the open stub is used as the matching shunt capacitive element at high frequency, the problem of parasitic components is eliminated, so that the problem of performance deterioration at high frequency does not occur.
Also, the behavior of the input admittance at high frequency is simply expressed as in (Equation 1), and the lumped constant equivalent circuit has a shunt having a capacitance value C'which is a function of L'as in (Equation 2). It is easily expressed by a capacitor, and the circuit design and layout design can be easily matched. For example, the capacitor 1801 or 1802 determined by the result of the circuit design of FIG.
When the optimum capacitance value of C is C ', the length L'of the open line 2001 in FIG. 24 (a) is determined from (Equation 2), and this length is shown in FIG. 24 (a).
You can lay out the open stubs. However, using the open stub has the advantages described above, but has the following problems.

(4) Since the open stub occupies a larger area on the semiconductor chip for the monolithic microwave integrated circuit than the MIM shunt capacitive element, the chip size is large and the manufacturing cost is high. For example, on a gallium arsenide (GaAs) substrate having a thickness of 100 μm, a capacitance value of 0.1
When an open stub with 0.5 to 0.5 pF is produced and the width is 20 μm, the length L'of the open line in Fig. 24 (a) is 600 to 1000 μm.
Is.

[0014]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention (1)
Due to (3), the conventional MIM shunt capacitive element as a matching shunt capacitive element has a problem that the semiconductor chip occupies a large area, a problem of performance deterioration due to parasitic components at high frequencies, and concentration at high frequencies. Since it is difficult to construct a constant equivalent circuit and a mathematical model, there is a problem that circuit design and layout design cannot be performed efficiently.
Further, due to the above-mentioned reason (4), the conventional open stub as the matching shunt capacitive element has a problem that the occupied area on the semiconductor chip is large.

The present invention is a MIM shunt effective for circuit design and layout design because it occupies a small area on a semiconductor chip, has little performance deterioration at high frequencies, and can easily construct a lumped constant equivalent circuit and a mathematical model. An object of the present invention is to realize a capacitive element and a small passive function circuit for MMIC using the capacitive element.

[0016]

A capacitive element formed on a monolithic microwave integrated circuit substrate, wherein the capacitive element is a lower conductor film that is a first electrode and a conductor that is a second electrode. The substrate includes a wiring and an insulating film, the substrate has a main surface and a back surface that is a surface opposite to the main surface, and a ground conductor film is formed on the back surface of the substrate, and the main surface of the substrate The lower conductor film is formed on the substrate, the insulating film is formed on the substrate and the lower conductor film, the conductor wiring is formed on the insulating film, and a transistor or a passive element on the substrate is formed. The capacitive element is connected to each other by the conductor wiring, the capacitive element has a capacitance value generated from an intersection of the lower conductor film and the conductor wiring, and the lower conductor film penetrates the main surface and the back surface of the substrate. Through the through hole having the conductor wall surface A capacitive element, characterized in that connected to the body layer. By using the capacitive element, the occupied area on the semiconductor chip is reduced, the performance degradation at high frequencies due to parasitic components is reduced, and the lumped constant equivalent circuit and the mathematical model can be easily constructed. The advantage is that layout design can be performed efficiently.

[0017]

The advantages of the present invention will be better understood with reference to the following description and accompanying drawings. The present invention has a small occupied area on a semiconductor chip, has a small performance deterioration at high frequency, and is easy to construct a lumped constant equivalent circuit and a mathematical model. We propose a device and a small passive function circuit for MMIC using the capacitive device. If a part of the conductor wiring 1902 in FIG. 22 is used as the upper electrode and the MIM capacitive element portion 1900 and the ground potential supply portion 1930 in FIG. 22 are formed below the conductor wiring 1902, the area occupied on the semiconductor substrate is small. Becomes
Since the parasitic component is reduced, the above-mentioned problems can be solved.

FIG. 1A shows a MIM shunt capacitive element according to an embodiment of the present invention, and FIG.
The cross-sectional structure at X is shown. In FIGS. 1A and 1B, the MIM capacitive element unit 1900 and the ground potential supply unit 1930 of FIG.
Is formed under the conductor wiring portion 100, and the conductor film 103 as the upper electrode is a part of the conductor wiring portion 100. Conductor wiring part 10
Of 0, the portion related to the capacitance value of the MIM shunt capacitive element is the conductor film 103, and the conductor film 103 has a length L that is the same value as the length of the conductor film 101 that is the lower electrode. The capacitive element is a MIM shunt capacitive element formed on a monolithic microwave integrated circuit substrate, for example, a substrate 1000 made of GaAs has a main surface and a back surface that is a surface opposite to the main surface, A ground conductor film 1001 made of, for example, gold (Au) is formed on the back surface of the substrate. A ground potential is supplied to the ground conductor film 1001. On the main surface of the substrate 1000, a conductor film 101 which is a lower electrode of the MIM shunt capacitive element,
An insulating film 102 made of silicon nitride- (SiN) is formed. A part of the conductor wiring on the semiconductor substrate, and
The conductor film 103, which is the upper electrode of the MIM shunt capacitive element, is formed on the insulating film 102. The conductor film 101 is connected to the ground conductor film 1001 by a through hole 104 penetrating the main surface and the back surface of the substrate 1000 and a conductor wall surface 105. The upper electrode of the MIM shunt capacitive element consists of a part of the conductor wiring. That is, the conductor film 10
Reference numeral 3 denotes an upper electrode of the MIM shunt capacitive element, and the conductor wiring portion 100 including the conductor film 103 and the conductor wirings 108 and 109 connects the passive element and the transistor on the semiconductor substrate to each other. Therefore, other passive elements and transistors are connected to the connection surfaces 106 and 107 of the MIM shunt capacitive element. In order to reduce the occupied area of the MIM shunt capacitive element on the substrate as shown in FIG. 1A, it is necessary to form the conductor film 101 and the through hole 104 immediately below the conductor film 103. The diameter of the through hole is preferably 20 to 100 μm. The capacitance component of the MIM shunt capacitive element is obtained from the capacitance portion including the conductor film 103, the conductor film 101, and the insulating film 102, which is a part of the conductor wiring. Therefore, the capacitance value of the MIM shunt capacitive element is determined by the size of the conductor films 101 and 103. If the widths of the conductor films 101 and 103 are fixed, the capacitance value is determined by the length L of the conductor film 101.

Using the MIM shunt capacitive element,
The occupied area on the semiconductor substrate is reduced, and the deterioration of performance at high frequencies due to parasitic components is reduced. The reason will be described below. Compared with the conventional MIM shunt capacitive element of FIG. 22, in the case of the MIM shunt capacitive element of FIG. 1 (a), the MIM capacitive element section 1900 and the ground potential supply section 193 of FIG.
0 is formed under the conductor film 103 corresponding to the conductor wiring 1902,
Further, the conductor film 103 corresponding to the conductor wiring 1902 in FIG. 22 is used as the upper electrode. Therefore, in the case of the MIM shunt capacitive element of FIG. 1 (a), compared to the conventional MIM shunt capacitive element of FIG. 22, the MIM capacitive element section 1900 and the ground potential supply section 1
The area occupied by the 930 on the semiconductor substrate is eliminated. Therefore,
The MIM shunt capacitive element of FIG. 1 (a) has a small occupied area on the semiconductor substrate. For example, as an insulating film on a gallium arsenide (GaAs) substrate having a thickness of 100 μm, a 200 nm high S
MIM with capacitance value of 0.1 to 0.5 pF using iN insulating film
When making a shunt capacitive element, its size is 20X2
0 to 20 × 120 μm ² . Further, in the case of the MIM shunt capacitive element of FIG. 1 (a), since it does not have a T-branch like 1920 in FIG. 22, parasitic capacitance such as coupling between the conductor wiring 1902 and the conductor film 1703 in FIG. No ingredients occur. In addition, in Figure 1 (a)
In the MIM shunt capacitive element, when the ground potential is supplied to the conductor film 101 which is the lower electrode, since it is supplied from the ground conductor film 1001 on the back surface only through the conductor wall surface 105 of the through hole 104, parasitic of the ground potential supply unit Inductance is through hole 10
It arises only from the conductor wall 105 of the four. Therefore, in Figure 1 (a)
The parasitic inductance of the ground potential supply section in the MIM shunt capacitive element is smaller than that in the conventional MIM shunt capacitive element shown in FIG. Having a thickness of eg 100 μm
When a conductor wall surface and a through hole penetrating the GaAs substrate are formed on the GaAs substrate, a parasitic inductance of about 0.02 to 0.03 nH is generated.

The construction of a lumped constant equivalent circuit and a mathematical model for the MIM shunt capacitive element will be described below. In the case of the conventional MIM shunt capacitive element of FIG. 22, due to parasitic components and coupling, high frequencies, especially K
It is difficult to construct a lumped parameter equivalent circuit and a mathematical model in a band or higher frequency bands. However, due to the above-mentioned reason, the MIM shunt capacitive element of FIG. 1 (a) has few parasitic components and coupling, so that the scattering coefficient characteristic at high frequency can be expressed by a simple lumped constant equivalent circuit and mathematical model. Therefore, there is good correlation between the circuit design and the layout design, and both can be efficiently performed. In Figure 2 (a),
Fig. 1 (a) shows a lumped constant equivalent circuit of the MIM shunt capacitive element. For convenience of explanation, MIM is shown in Fig. 2 (b).
A lumped constant equivalent circuit is shown in the cross-sectional structure of the shunt capacitive element. In FIG. 2 (b), the numbers designating the respective elements forming the MIM shunt capacitive element are the same as those in FIG. 1 (b).
In the MIM shunt capacitive element of FIG. 2B, the conductor film 101
The insulating film capacitance portion between the conductors 103 and 103 is represented by the capacitor 200, and the parasitic capacitance portion between the conductor film 101 and the ground conductor film 1001 is represented by the capacitor 201. The insulating film capacitor 200 is a shunt capacitor required for matching in circuit design, like the capacitor 1801 or 1802 in FIG. In order to adjust the capacitance value of the shunt capacitor 200 required for matching, the height of the insulating film 102 or the conductor film 101
The area of the intersection of 103 may be adjusted. Also, with the conductor film 101
The parasitic inductance generated from 103 is represented by the inductor 202, and the parasitic inductance generated from the conductor wall surface 105 of the through hole 104 is represented by the inductor 203.
The terminals 204 and 205 correspond to the terminals 204 'and 205' for designating both end surfaces of the conductor film 101 which is the lower electrode, respectively. Conductor films 101 and 103
If the width and the size of the through hole 104 are fixed, the
The values of the capacitors and the inductors of the lumped constant equivalent circuit of are dependent only on the length L of the conductor film 101.

Although the conductor film 103 is formed integrally with the conductor wirings 108 and 109 in FIG. 1, the conductor wirings 108 and 109 may be continuously formed and the conductor film 103 may be formed under the conductor wirings.

FIGS. 3A and 3B show two ports at terminals 204 and 205 when calculated using the lumped constant equivalent circuit of FIG. 2A and the model formula representing the value of each capacitor and inductor. The scattering coefficient and the two-port scattering coefficient at terminals 204 ′ and 205 ′ when electromagnetic field analysis is performed on the MIM shunt capacitive element of FIG. 1 (a) are shown. Scattering coefficient is 0.5-40 GHz
It is the calculation result up to. The circle in FIG. 3 (a) is calculated when the length L of the conductor film 101 is 50 μm and is calculated using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor. Is the scattering coefficient (S ₁₁ ) indicating the reflection loss at the terminal 204 of FIG.
It is S ₁₁ calculated from the electromagnetic field analysis at the terminal 204 ′ of the MIM shunt capacitive element of (a). The circle in FIG. 3 (b) is calculated when the length L of the conductor film 101 is 50 μm and is calculated using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor. Scattering coefficient (S ₂₁ ) showing the insertion loss between terminals 204 and 205 of the solid line is shown in Figure 1 (a) MIM shunt capacitive element terminals 204 ′ and 20
It is S ₂₁ calculated from electromagnetic field analysis during 5 '. Figure 3
As can be seen from (a) and (b), the two are in good agreement. FIGS. 4 (a) and 4 (b) show the scattering coefficient when the length L of the conductor film 101 is 65 μm. The scattering coefficient is the calculation result from 0.5 to 40 GHz. The circle in Figure 4 (a) is shown in Figure 2 (a).
S ₁₁ at terminal 204 when calculated using the lumped constant equivalent circuit of and the model formula expressing the value of each capacitor and inductor, and the solid line is the terminal 204 ′ of the MIM shunt capacitive element of FIG. 1 (a). Calculated from electromagnetic field analysis in
It is S ₁₁ . The circle in Fig. 4 (b) is the S ₂₁ between terminals 204 and 205 when calculated using the lumped constant equivalent circuit of Fig. 2 (a) and the model formula representing the value of each capacitor and inductor.
And the solid line is S ₂₁ calculated from electromagnetic field analysis between the terminals 204 ′ and 205 ′ of the MIM shunt capacitive element in FIG. 1 (a). As can be seen from Figs. 4 (a) and 4 (b), the two agree well. FIGS. 5A and 5B show the scattering coefficient when the length L of the conductor film 101 is 80 μm. The scattering coefficient is
The result is from 0.5 to 40 GHz. The circle in FIG. 5 (a) is S ₁₁ at the terminal 204 when calculated using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor, and the solid line is Figure 1 (a)
Is S ₁₁ calculated from electromagnetic field analysis at terminal 204 ′ of the MIM shunt capacitive element of. The circle in Figure 5 (b) is
Pin 204 when calculated using the lumped constant equivalent circuit of Fig. 2 (a) and the model formula that expresses the values of each capacitor and inductor
And the S ₂₁ between 205 and 205, the solid line is shown in Figure 1 (a).
S ₂₁ calculated from electromagnetic field analysis between terminals 204 ′ and 205 ′ of the MIM shunt capacitive element. As can be seen from Fig. 5 (a) and (b), the two agree well. 6 (a) and 6 (b) show the scattering coefficient when the length L of the conductor film 101 is 100 μm. Scattering results are from 0.5 to 40 GHz. The circle in FIG. 6 (a) is S ₁₁ at the terminal 204 when calculated using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor,
The solid line is S ₁₁ calculated from electromagnetic field analysis at terminal 204 ′ of the MIM shunt capacitive element of FIG. 1 (a). Circle in FIG. 6 (b) is a S ₂₁ between FIGS. 2 (a) of the lumped constant equivalent circuit the capacitors and the terminal 204 in the case of calculation using a model expression representing the value of the inductor and 205,
The solid line was calculated from the electromagnetic field analysis between terminals 204 'and 205' of the MIM shunt capacitive element of Figure 1 (a).
It is S ₂₁ . As can be seen from Figs. 6 (a) and 6 (b), the two agree well.

As can be seen from the above results, the MI of FIG.
The scattering coefficient results calculated using the lumped constant equivalent circuit of Fig. 2 (a) for the M shunt capacitive element are in good agreement with the electromagnetic field analysis results. Therefore, by using the MIM shunt capacitive element of FIG. 1A, which is an embodiment of the present invention, circuit design and layout design can be performed efficiently. This advantage will be clearly explained below. FIG. 7 is a flowchart showing the work contents in the case of performing circuit design and layout design using the MIM shunt capacitive element of FIG. 1 (a), which is an embodiment of the present invention. When the circuit design and layout design are performed using the MIM shunt capacitive element of FIG. 1 (a), the work content becomes simple as shown in FIG. For example, when performing a circuit design as shown in FIG. 21, as the shunt capacitor 1801 or 1802, desired performance can be obtained by using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor. Perform circuit design up to (step 1).
The model formula is a function of only the length L of the conductor film 101. Therefore, for example, from the results of circuit design, L
Figure 1 (a) with a length L of 100 μm, where is 100 μm
The work is completed simply by laying out the pattern of the MIM shunt capacitive element (step 2). In FIG. 7, in step 1, the circuit design is performed using the lumped constant equivalent circuit of FIG. 2 (a) and the model formula representing the value of each capacitor and inductor, so the electromagnetic field analysis work is not required, and in FIG. It is not necessary to repeat such electromagnetic field analysis, layout, and circuit design. As a result, compared with the work contents (explained in FIG. 23) when performing the circuit design and layout design using the conventional MIM shunt capacitive element, the MIM shunt capacitive element in FIG. 1 (a) is used. The work contents when performing the circuit design and the layout design are simplified, and the time required for the circuit design is shortened.

Further, FIG. 1 (a), which is an embodiment of the present invention,
The MIM shunt capacitive element occupies a smaller area on the semiconductor substrate than a conventional open stub. This will be explained below. For example, the substrate 1000 is 100 μm
Consider a case where a GaAs substrate having a thickness of 2 is used and a 200 nm-high SiN insulating film having a relative dielectric constant of 7 is used as the insulating film 102. The width of the conductor wiring including the conductor film 103 is 20 μm,
When the length of the conductor film 101 is 50 μm, the capacitance value C ₂₀₀ of the insulating film capacitor 200 of FIG. 2A is about 0.22 pF.
In this case, the width and length of the conductor film 103, which is the effective size of the MIM shunt capacitive element in FIG. 1 (a), are 20 μm and 50 μm, respectively.
Is. However, FIG. 24 (a) with the capacitance value of 0.22 pF.
When the open stub of is formed on the GaAs substrate under the above conditions, the width
In the case of 20 μm, the length of the open line 2001 is 860 μm.
In addition, when the GaAs substrate and the insulating film are the above-mentioned conditions and the length of the conductor film 101 is 100 μm, the capacitance value C ₂₀₀ of the insulating film capacitor 200 of FIG. 2A is 0.44 pF. In this case, the width and length of the conductor film 103, which is the effective size of the MIM shunt capacitive element in FIG. 1A, are 20 μm and 100 μm, respectively. However, when the open stub of FIG. 24 (a) having the capacitance value of 0.44 pF is formed on the GaAs substrate under the above conditions, the width of 20 μm is obtained.
In the case of m, the length of the open line 2001 is 980 μm.

For the above reason, using the MIM shunt capacitive element of FIG. 1 (a), which is an embodiment of the present invention,
The occupied area on the semiconductor chip is small, the performance deterioration at high frequencies due to parasitic components is small, and the lumped constant equivalent circuit and mathematical model can be easily constructed, so circuit design and layout design at high frequencies can be performed efficiently. The advantage is obtained.

FIG. 8 (a) shows an MIM shunt capacitive element according to another embodiment of the present invention, and FIG. 8 (b) shows
The cross-sectional structure in XX of (a) is shown. The MIM shunt capacitive element is a MIM shunt capacitive element formed on a monolithic microwave integrated circuit substrate, and a substrate 8000 made of, for example, GaAs has a main surface and a back surface opposite to the main surface. On the back side of the substrate, for example, gold (A
A ground conductor film 8001 made of u) is formed. A ground potential is supplied to the ground conductor film 8001. On the main surface of the substrate 8000, the conductor film 801 which is the lower electrode of the MIM shunt capacitive element is formed.
Then, for example, the insulating film 802 made of silicon nitride- (SiN) is formed, and the conductive film 803 which is a part of the conductive wiring and is the upper electrode is formed on the insulating film 802. The conductor film 801 is connected to the ground conductor film 8001 by the conductor connecting portion. The conductor connecting portion includes a through hole 804 penetrating the substrate 8000 and the insulating film 802, a conductor wall surface 805, and a through conductor rod 808.
And a connection conductor film 809 and a connection conductor film 810. The MI
Other passive elements or transistors are connected to the connection surfaces 811 and 812 of the M shunt capacitive element. MIM in Figure 1 (a)
In the case of the shunt capacitive element, the through hole 104 exists below the conductor film 103, but in the case of the MIM shunt capacitive element of FIG. 8A, the through hole 804 is separated from the conductor film 803 in a plane. Exists in place. Therefore, the size of the MIM shunt capacitive element of FIG. 8 (a) is slightly larger than that of the MIM shunt capacitive element of FIG. 1 (a). However, in the structure like the MIM shunt capacitive element of FIG. 8A, the through hole 804 can be formed not from the back surface of the substrate 8000 but from the surface of the substrate 8000 and the insulating film 802. . for that reason,
The use of the MIM shunt capacitive element of FIG. 8 (a) has the advantage of preventing the substrate 8000 from cracking that occurs in the conventional manufacturing process and improving the yield rate. The above advantages will be briefly described below. 9 (a) to 9 (c) show the MIM of FIG. 1 (a).
The conventional manufacturing method for the through hole 104 and the conductor wall surface 105 of the shunt capacitive element is shown. For convenience of explanation,
The numbers are the same as in Fig. 1 (a) or (b). Figure 9 (a)
As described above, the conductor film 101 and the insulating film 102 are formed on the substrate 1000 made of GaAs, and then the conductor film 103 and the conductor wiring 10 are formed.
8 and 109 are formed. Then, as shown in Fig. 9 (b), the substrate 10
00 is thinly polished. Then, as shown in FIG. 9 (c), the substrate 10
A through hole 104 penetrating 00 and a conductor wall surface 105 are formed from the back surface of the substrate 1000, and then a ground conductor film 1001 is formed.
However, in the manufacturing method, the substrate 1000 may be cracked in the process of forming the through hole 104 from the back surface of the thinly polished substrate 1000, which causes a reduction in the yield rate. However, when the through hole 804 exists at a position apart from the conductive film 801 as in the MIM shunt capacitive element of FIGS. 8A and 8B, the through hole 804 is not polished to form the through hole 804. And the surface of the insulating film 802. Therefore, it is possible to prevent the breakage of the substrate 8000 that occurs in the conventional manufacturing process, and obtain an advantage that the yield rate is improved. Figure 10 (a)
8C show a method of manufacturing the through hole 804 and the conductor wall surface 805 of the MIM shunt capacitive element of FIG. 8A. For convenience of explanation, the numbers are the same as those in FIG. 8 (a) or (b). As shown in FIG. 10A, a conductor film 801 and an insulating film 802 are formed on a substrate 8000 made of, for example, GaAs, and then,
As shown in FIG. 10B, a through hole 804 penetrating a part of the substrate 8000 and the insulating film 802 and a conductor wall surface 805 are formed from the surface of the insulating film 802, and thereafter, as shown in FIG. Is thinly polished, and a ground conductor film 8001 is formed on the back surface. Thus, in the case of the MIM shunt capacitive element of FIG. 8 (a), the substrate 800
Since the through hole 804 and the conductor wall surface 805 are formed from the insulating film 802 and the surface of the substrate 8000 without polishing 0, cracks of the substrate 8000 that occur in the conventional manufacturing process can be prevented and the yield rate can be improved. To be

FIG. 11 shows a lumped constant equivalent circuit of the MIM shunt capacitive element of FIG. 8 (a). In this case, the capacitor 201 ′ is composed of the conductor film 801 and the ground conductor film 8001 shown in FIG.
When the shape of the MIM shunt capacitive element of FIG. 8 (a) is determined, the capacitance value of the capacitor 201 ′ is fixed. The inductor 203 ′ has a ground potential supply unit 820 including a through hole 804, a conductor wall surface 805, a through conductor rod 808, a connection conductor film 809, and a connection conductor film 810 in FIG. 8A.
It is a parasitic inductor generated from. For example, a GaAs substrate having a thickness of 100 μm is used as the substrate 1000, and the insulating film 102
When using a SiN insulating film with a relative permittivity of 7 and a height of 200 nm, the inductance value of the parasitic inductor 203 ′ is about
It is 0.3 nH. Others are the same as those in FIG. 2 (a), and the numbers are not changed. Also in this case, if only the length of the conductor film 801 is changed and other conditions are fixed, all capacitor values and inductor values of the lumped constant equivalent circuit of FIG. 11 depend only on the length of the conductor film 801.

By using the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a), a 90 ° hybrid coupler having a small occupation area on a semiconductor substrate can be manufactured. FIG. 25 shows a branch line coupler as a conventional 90 ° hybrid coupler. The branch line coupler is a rectangular conductor line 2110, 21.
Four terminals 2101, 2102, 2103, 21 on 20, 2130, 2140
Have 04. The length of the conductor lines 2110, 2120, 2130, 2140 is a quarter wavelength with respect to the center frequency.
The characteristic impedance of 10 and 2130 is Zo, and the conductor line 2120
The characteristic impedance of and 2140 is Zo / √2. Terminal 2101,
2102, 2103 and 2104 are present at the connecting portions of the conductor lines. The important functions of the branch line coupler as a conventional 90 ° hybrid coupler are an output function of two signals having a 90 ° phase difference and an isolation function between terminals. That is, the signal input to the terminal 2101 is transferred to the terminal 2102.
And 2103, the signal output from the terminal 2102 has the same amplitude as the signal output from the terminal 2103, and the phase differs by 90 °. Similarly, when the signal input to the terminal 2102 is extracted from the terminals 2101 and 2104, the signal output from the terminal 2101 has the same amplitude as that of the signal output from the terminal 2104 and a phase difference of 90 °. Further, the terminals 2101 and 2104 are isolated, and the terminals 2102 and 2103 are also isolated. For a description and example of a lunch line coupler, see “Microwave Engineerin” by David M. Pozar.
g ”, 1st Edition, Addison-Wesley Publishing Company, In
c., Section 8.5, 1990, pages 411-415. However, the conventional 90 ° hybrid coupler occupies an extremely large area on the semiconductor chip for monolithic microwave integrated circuits, so that, for example, gallium arsenide (GaAs) is used.
When a conventional 90 ° hybrid coupler is formed on a semiconductor chip made of, the chip size increases and the chip cost increases. Ga with a thickness of 100 μm, for example
If a conventional 90 ° hybrid coupler as shown in Fig. 25 with an operating frequency of 25 GHz is produced on an As substrate, it will be a quarter.
Since the length of the conductor lines 2110, 2120, 2130, 2140 having a wavelength is about 1000 μm, the size thereof is 1000 × 1000 μm ² .

However, the conductor lines 2110, 2120, 2130, and 2140 having the length of a quarter wavelength are equivalent to the lines having two shunt capacitors, and the values of the shunt capacitor and the line impedance are appropriately selected. For example, conductor line 211
The lengths of 0, 2120, 2130, and 2140 are 1/8 wavelength to 1/23
It becomes smaller by the wavelength. In this case, by using the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a) as the shunt capacitor, a 90 ° hybrid coupler having a small occupied area on the semiconductor substrate can be manufactured.

FIG. 12A shows a small 90 ° hybrid coupler according to an embodiment of the present invention. The miniature 90 ° hybrid coupler is formed on a semiconductor substrate and has terminals 1201, 1202, 1203 and 1204. The conductor line 1210 has a length of 1/12 wavelength with respect to the line impedance of 100Ω and the center frequency, and the conductor line 1220 has a length of 1/8 wavelength with respect to the line impedance of 100Ω and the center frequency. However, the conductor line 1230 has a length of 1/12 wavelength with respect to the line impedance of 100Ω and the center frequency, and the conductor line 1240 has a length of 1/8 wavelength with respect to the line impedance of 100Ω and the center frequency. Have. Capacitors 1211 and 1212
And 1213 and 1214 are MIM shunt capacitive elements or open stubs, and are preferably MIM shunt capacitive elements of FIG. 1 (a) or FIG. 8 (a) in order to reduce the occupied area on the semiconductor substrate. . Capacitors 1211 and 1212 and 1213
A suitable value for 1214 is 0.15 to 0.25 pF. For example, when the 90 ° hybrid coupler is formed on a substrate made of GaAs having a thickness of 100 μm, for example,
The conductor lines 1210 and 1230 made of Au have a length of about 300 μm, and the conductor lines 1220 and 1240 made of Au have a length of about 20 μm.
It is 0 μm. Compared with this, using the conventional 90 ° hybrid coupler of FIG. 25, Ga having a thickness of, for example, 100 μm is used.
When making a 90 ° hybrid coupler operating near 25 GHz on a substrate made of As, the conductor lines 2110, 2120, 2130, and 2140 of FIG.
It is 1000 μm. In the case of the 90 ° hybrid coupler of FIG. 12 (a), for example, the signal input to the terminal 1201 is
When the signals are output from 1202 and 1203, the signals output from 1202 and 1203 have the same amplitude and a 90 ° phase difference. Terminal 1204 is isolated from terminal 1201, so terminal 1204
There is no signal output from. Also, for example, when extracting the signal input to the terminal 1202 from the terminals 1201 and 1204,
The signals output from the 1204 have the same amplitude and the phases differ by 90 °. Since the terminal 1203 is isolated from the terminal 1202, there is no signal output from the terminal 1204.

In fact, in realizing the small 90 ° hybrid coupler, capacitors 1211, 1212, 12
FIG. 1A according to an embodiment of the present invention as 13 and 1214.
Alternatively, the use of the MIM shunt capacitive element of FIG. 8 (a) is more effective for downsizing the hybrid coupler.
Figure 12 (b) shows the layout of the small 90 ° hybrid coupler of Figure 12 (a) fabricated on a GaAs substrate. The conductor lines, terminals and capacitors in Fig. 12 (b) are
It corresponds to each element of the 90 ° hybrid coupler in Fig. 12 (a) as follows. In the layout diagram of the 90 ° hybrid coupler in Fig. 12 (b), terminals 1201 ', 1202' and 12
03 'and 1204' are the terminals 1201, 1202 and 120 of FIG. 12 (a), respectively.
Applies to 3 and 1204. Conductor lines 1210 'and 1220' and 1230 'and 12
40 'indicates the conductor lines 1210, 1220 and 1230 of FIG. 12 (a), respectively.
It corresponds to 1240. The connecting surfaces between the conductor lines or between the conductor lines and the terminals are indicated by dashed lines. Capacitors 1211 ', 1212', 1213 ', and 1214' surrounded by dashed lines
Are the capacitors 1211, 1212, 1213 and 1 of FIG. 12 (a), respectively.
It corresponds to 214. In Fig. 12 (b), the structure shown in Fig.
The small 90 ° hybrid coupler in (a) has been fabricated, and capacitors 1211 ', 1212', 1213 ', and 1214' are shown in Fig. 1.
(A) MIM shunt capacitive element. Capacitor 121
1'is formed under the conductor lines 1210 'and 1220', the capacitor 1212 'is formed under the conductor lines 1220' and 1230 ', and the capacitor 1213' is formed under the conductor lines 1230 'and 1240'. Capacitor 1214 'is formed below conductor lines 1240' and 1210 '. When the conventional 90 ° hybrid coupler of FIG. 25 is manufactured on a GaAs substrate having a thickness of 100 μm, the occupied area is 1000 μm × 1000 μm, but in the case of the small 90 ° hybrid coupler, it is shown in FIG. As shown in, the occupied area is 350 μm × 450 μm.

FIGS. 17 (a) to 17 (c) show the small size 9 of FIG. 12 (b).
The electromagnetic field analysis results for the 0 ° hybrid coupler are shown. The solid line in Fig. 17 (a) has terminals 1201 '.
Is the insertion loss when the signal input to the terminal 1202 'is extracted from the terminal 1202', and the circle indicates the signal input to the terminal 1201 '.
Insertion loss when taking out from 203 '. In the vicinity of 25 GHz, both show the same power distribution characteristics with values of −3.5 to −4 dB. FIG. 17B shows the phase difference between the signal output from the terminal 1202 ′ and the signal output from the terminal 1203 ′ when a signal is input to the terminal 1201 ′. Approx. 25 GHz
It shows a 90 ° phase difference. FIG. 17C shows isolation between the terminals 1201 'and 1204'. 25 GHz
Isolation value of 25 dB or more is shown in the vicinity.
As can be seen from the above results, the small 90 ° hybrid coupler in Fig. 12 (b) has the function of a normal 90 ° hybrid coupler in the vicinity of 25 GHz and has the advantage that it occupies a small area on the semiconductor substrate. is doing.

FIG. 13 shows a layout pattern of a compact 90 ° hybrid coupler according to another embodiment of the present invention having the same structure as that of FIG. 12 (a). The miniature 90 ° hybrid coupler is a 90 ° hybrid coupler that operates near 25 GHz, is formed on a semiconductor substrate, and has terminals 1301 ′, 1302 ′, 1303 ′, and 1304 ′. The conductor lines 1310 'and 1330' have a line impedance of 130Ω and a length of 1/16 wavelength with respect to the center frequency.
The conductor lines 1320 'and 1340' have a line impedance of 130Ω and a length of 1/23 wavelength with respect to the center frequency. The connecting surfaces between the conductor lines or between the conductor lines and the terminals are indicated by dashed lines. Capacitors 1311 ', 1312', 1313 'and 1314' surrounded by the one-dot chain line are the MIMs of FIG. 1 (a).
It consists of a shunt capacitive element. Capacitors 1311 'and 1312'
Suitable values of 1313 'and 1314' are 0.15 to 0.25 pF. For example, when the 90 ° hybrid coupler is formed on a GaAs substrate having a thickness of 100 μm, for example,
The conductor lines 1310 'and 1330' made of Au have a length of about 250 μm, and the conductor lines 1320 'and 1340' made of Au have a length of about 250 μm.
170 μm. In the case of the 90 ° hybrid coupler of FIG. 13, for example, the signal input to the terminal 1301 ′ is input to the terminal 1302 ′.
And 1303 ', the signals output from 1302' and 1303 'have the same amplitude and a 90 ° phase difference. Terminal 1304 '
Is isolated from terminal 1301 ', so terminal 1
No signal is output from 304 '. Also, for example, terminal 1302 '
When extracting the signal input to the terminals 1301 'and 1304', the signals output from 1301 'and 1304' have the same amplitude,
90 ° out of phase. Since the terminal 1303 'is isolated from the terminal 1302', there is no signal output from the terminal 1304 '. Therefore, the small 90 ° hybrid coupler in FIG. 13 also has a function as a normal 90 ° hybrid coupler near 25 GHz. The footprint of the small 90 ° hybrid coupler on a GaAs substrate having a thickness of 100 μm is about 270 μm × 330 μm.

Besides, in the small 90 ° hybrid coupler having the same structure as that shown in FIG.
1210 and 1230 consist of conductor impedance having a line impedance of 70 Ω and 1/8 wavelength with respect to the center frequency, and conductor lines 1220 and 1240 have line impedance of 70 Ω and twelfth with respect to the center frequency. It consists of a conductor line having a length of one wavelength, and the capacitors 1211, 1212, 1213 and 1214 are shown in FIG.
A small 90 ° hybrid coupler having the feature of the MIM shunt capacitive element of (a) or FIG. 8 (a) is also conceivable. The small 90 ° hybrid coupler is also a standard 90
° Functions as a hybrid coupler. or,
When the small 90 ° hybrid coupler with the MIM shunt capacitive element shown in Fig. 1 (a) is manufactured for 25 GHz operation on a GaAs substrate with a thickness of 100 μm, the occupied area on the substrate is about 500 μm × 600 μm. is there.

The MIM shunt of FIG. 1 (a) or FIG. 8 (a)
A small occupying area on a semiconductor substrate when using a capacitive element
A 180 ° hybrid coupler with
You can Figure 26 shows a conventional 180 ° hybrid cup.
The rat race is shown as Ra. Rat race
Has four terminals on the conductor lines 2210, 2220, 2230 and 2240.
It has 2201, 2202, 2203 and 2204. With the conductor line 2210
The length of the 2220 and 2240 is a quarter wavelength with respect to the center frequency.
Yes, and the characteristic impedance is √2Zo. The conductor line 2
The length of 230 is 3/4 wavelength with respect to the center frequency,
The characteristic impedance is √2Zo. Terminals 2201 and 2202 and 220
3 and 2204 are present at the connection of each conductor line. Conventional 180 °
The weight of the rat race as a hybrid coupler
The essential function is to output two signals with a phase difference of 180 °
And the function to output two signals with the same phase
And the isolation function between terminals. That is, the terminal
If you want to extract the signal input to 2202 from terminals 2201 and 2203
The signal output from terminal 2201 is output from terminal 2203
The amplitude of the signal is the same as that of the signal and the phase is different by 180 °. or,
Extract the signal input to terminal 2204 from terminals 2201 and 2203
In this case, the signal output from terminal 2201 is output from terminal 2203.
The applied signal has the same amplitude and phase. Also, terminals 2202 and 22
Isolation is made between 04 and between terminals 2201 and 2203.
Is also isolated. Explanation of rat race
And an example is “Microwave Engineerin by David M. Pozar
g ”, 1st Edition, Addison-Wesley Publishing Company, In
c., Section 8.8, 1990, pages 435-445.
It However, the conventional 180 ° hybrid coupler is
Storage on semiconductor chips for monolithic microwave integrated circuits
The area is extremely large. Ga with a thickness of 100 μm, for example
As shown in Fig. 26, the operating frequency is 25 GHz on the As substrate.
If you make a conventional 180 ° hybrid coupler,
The length of the conductor lines 2210, 2220 and 2240 having one wavelength is about 100.
The length of the conductor line 2230, which is 0 μm and has three-quarter wavelength, is
It is about 3000 μm and its size is 1000 × 2000 μm ²In
It

However, the conductor lines 2210, 2220, and 2240 having the length of a quarter wavelength are equivalent to the lines having two shunt capacitors, and if the values of the shunt capacitor and the line impedance are appropriately selected, Conductor lines 2210 and 2220
And the length of 2240 is reduced from 1 / 8th to 1 / 12th wavelength. Also, a conductor line 2230 having a length of 3/4 wavelength
Is equivalent to a line having two shunt capacitors, and if the values of the shunt capacitor and the line impedance are appropriately selected, the length of the conductor line 2230 can be reduced to 5/8 wavelength. In this case, if the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a) is used as the shunt capacitor, it has a small occupied area of 180 ° on the semiconductor substrate.
Hybrid couplers can be made.

FIG. 14A shows a compact 180 ° hybrid coupler according to an embodiment of the present invention.
The miniature 180 ° hybrid coupler is formed on a semiconductor substrate and has terminals 1401, 1402, 1403 and 1404. Conductor lines 1410, 1420 and 1440 have a length of 1/12 wavelength for a line impedance of 140 Ω and a center frequency, and conductor line 1430 has a length of 5/8 for a line impedance of 100 Ω and a center frequency. Has a length of. Capacitors 1411 and 1412
And 1413 and 1414 are composed of MIM shunt capacitive elements or open stubs, and are preferably made of the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a) in order to reduce the occupied area on the semiconductor substrate. . Capacitors 1411 and 1412 and 1413
A suitable value for 1414 is 0.15 to 0.25 pF. For example, the above 180 on a GaAs substrate having a thickness of 100 μm.
° When a hybrid coupler is manufactured, for example, the conductor lines 1410, 1420 and 1440 made of Au have a length of about 300 μm, and the conductor line 1430 made of Au has a length of about 2500 μm.
Is. Compared to this, using the conventional 180 ° hybrid coupler of FIG. 26, for example, GaAs having a thickness of 100 μm is used.
When making a 180 ° hybrid coupler operating near 25 GHz on a substrate, the length of the conductor lines 2210, 2220, and 2240, which have a length of 1/4 wavelength, is about 1000 μm, and
The length of the conductor line 2230 having three wavelengths is about 3000 μm.
In the case of the 180 ° hybrid coupler of FIG. 14 (a),
For example, when extracting the signal input to the terminal 1402 from the terminals 1401 and 1403, the signal output from the terminal 1401 is the terminal 1403.
Amplitude is the same as the signal output from, but the phase is different by 180 °. When the signal input to the terminal 1404 is extracted from the terminals 1401 and 1403, the signal output from the terminal 1401 is the terminal 14
The signal output from 03 has the same amplitude and phase. Also, the terminal
Isolation between 1402 and 1404, terminal 1401
And 1403 are also isolated.

Actually, in realizing the compact 180 ° hybrid coupler, capacitors 1411, 1412,
FIG. 1 according to an embodiment of the present invention as 1413 and 1414.
The use of the MIM shunt capacitive element of (a) or FIG. 8 (a) is more effective for downsizing of the hybrid coupler. FIG. 14 (b) shows the structure of FIG.
The layout of the small 180 ° hybrid coupler in (a) is shown. The conductor lines, terminals, and capacitors in Fig. 14 (b) correspond to the components of the 180 ° hybrid coupler in Fig. 14 (a) as follows. In the layout diagram of the 180 ° hybrid coupler in Fig. 14 (b), the terminal 1401 '
And 1402 ', 1403', and 1404 'are the terminals 1401 in Fig. 14 (a), respectively.
And 1402, 1403 and 1404. Conductor lines 1410 'and 1420'
And 1430 'and 1440' correspond to the conductor lines 1410 and 1 of FIG. 14 (a), respectively.
Corresponds to 420, 1430 and 1440. The connecting surfaces between the conductor lines or between the conductor lines and the terminals are indicated by dashed lines. Capacitors 1411 'and 1412' and 14 surrounded by the dashed line
13 'and 1414' are the capacitors 1411 and 141 of FIG. 14 (a), respectively.
It corresponds to 2 and 1413 and 1414. In Fig. 14 (b), the small 180 ° hybrid coupler of Fig. 14 (a) is fabricated on a GaAs substrate, and capacitors 1411 ', 1412', 1413 'and 1414' are formed.
Is the MIM shunt capacitive element of FIG. 1 (a). The capacitor 1411 'is formed under the conductor lines 1410' and 1420 ',
Capacitor 1412 'is formed under conductor lines 1420' and 1430 ', capacitor 1413' is formed under conductor lines 1430 'and 1440', and capacitor 1414 'is formed under conductor lines 1440' and 1410 '.
Is formed at the bottom of. When the conventional 180 ° hybrid coupler of FIG. 26 is manufactured on a GaAs substrate having a thickness of 100 μm, the occupied area is 1000 μm × 2000 μm, but in the case of the small 180 ° hybrid coupler,
As shown in FIG. 14 (b), it has an occupied area of 320 μm × 580 μm.

FIGS. 18 (a) to 18 (d) show the small size 1 of FIG. 14 (b).
The electromagnetic field analysis results for the 80 ° hybrid coupler are shown. The solid line in Fig. 18 (a) is the terminal 1402 '.
Is the insertion loss when the signal input to the terminal 1403 'is extracted from the terminal 1403', and the circle indicates the signal input to the terminal 1402 '.
Insertion loss when extracting from 401 '. In the vicinity of 25 GHz, both show the same power distribution characteristics with a value of approximately -4 dB. The solid line in Figure 18 (b) is the insertion loss when the signal input to terminal 1404 'is extracted from terminal 1401', and the circle is the insertion loss when the signal input to terminal 1404 'is extracted from terminal 1403'. is there. In the vicinity of 25 GHz, both show the same power distribution characteristics with a value of approximately -4 dB.
The solid line in FIG. 18C shows the phase difference between the signal output from the terminal 1401 ′ and the signal output from the terminal 1403 ′ when a signal is input to the terminal 1404 ′. In-phase distribution characteristics near 0 ° are shown near 25 GHz. The circle in Fig. 18 (c) indicates that when a signal is input to terminal 1402 ',
The phase difference between the signal output from 1'and the signal output from the terminal 1403 'is shown. It shows the antiphase distribution characteristics near 180 ° near 25 GHz. The circle in Figure 18 (d)
The isolation characteristics of the terminals 1401 'and 1403' are shown, and the solid line shows the isolation characteristics of the terminals 1402 'and 1404'. Due to the vertically symmetrical structure of FIG. 14 (b), the isolation characteristics between the terminals 1402 ′ and 1404 ′ are exactly the same as the isolation characteristics between the terminals 1401 ′ and 1403 ′. As can be seen from Fig. 18 (d), the isolation value near 25 GHz is about 20 dB. As can be seen from the above results, the small 180 ° in Fig. 14 (b)
Hybrid couplers are typically 180 ° near 25 GHz
It has an advantage that it has a function as a hybrid coupler and that it occupies a small area on a semiconductor substrate.

In addition, in the small 180 ° hybrid coupler having the same structure as in FIG. 14 (a), the conductor lines 1410, 1420, and 1440 have a line impedance of 100Ω and a length of 1/8 wavelength with respect to the center frequency. The conductor line 1430 has a line impedance of 100Ω and a conductor line having a length of 5/8 wavelength with respect to the center frequency, and the capacitors 1411, 1412, 1413, and 1414 have
A miniature 180 ° hybrid coupler having the feature of the MIM shunt capacitive element of (a) or FIG. 8 (a) is also conceivable. The small 180 ° hybrid coupler also has a function as an ordinary 180 ° hybrid coupler. In addition, as shown in Fig. 1 (a) on a GaAs substrate with a thickness of 100 μm.
When making the miniature 180 ° hybrid coupler with MIM shunt capacitive element for 25 GHz operation,
The occupied area on the substrate is about 650 μm × 400 μm.

Further, in the small 180 ° hybrid coupler of FIG. 14 (a), instead of the two-terminal circuit consisting of the conductor line 1430, the capacitor 1412 and the capacitor 1413, the terminal 1402 is used.
A single 180 ° hybrid coupler having the same function as a conventional 180 ° hybrid coupler can also be realized by connecting a series capacitor between the above and 1403.

FIG. 15 shows a compact 180 ° hybrid coupler according to an embodiment of the present invention. The miniature 180 ° hybrid coupler is formed on a semiconductor substrate and has terminals 1501, 1502, 1503 and 1504. Conductor track
1510, 1520 and 1540 have a line impedance of 140 Ω and a length of 1/12 wavelength with respect to the center frequency. Capacitors 1511 and 1514 are MIM shunt capacitive elements or open stubs, and are preferably MIM shunt capacitive elements of FIG. 1 (a) or FIG. 8 (a) in order to reduce the occupied area on the semiconductor substrate. . A suitable range for the capacitors 1511 and 1514 is 0.15 to 0.25 pF. Also, terminal 1502
A capacitor 1530 is connected between and 1503. A suitable value for the capacitor 1530 is 0.1 to 0.2 pF. For example, the above 18 is formed on a GaAs substrate having a thickness of 100 μm.
The size of a 0 ° hybrid coupler is 280 μm × 300 μm. In the case of the 180 ° hybrid coupler of FIG. 15, for example, when the signal input to the terminal 1502 is taken out from the terminals 1501 and 1503, the signal output from the terminal 1501 has the same amplitude as the signal output from the terminal 1503, and the phase is the same. 180 ° different. When the signal input to the terminal 1504 is extracted from the terminals 1501 and 1503, the signal output from the terminal 1501 has the same amplitude and phase as the signal output from the terminal 1503. Further, the terminals 1502 and 1504 are isolated, and the terminals 1501 and 1503 are also isolated.

Besides, the small structure having the same structure as in FIG.
Conductor line 1510 in 180 ° hybrid coupler
, 1520 and 1540 are composed of a conductor impedance having a line impedance of 100Ω and a wavelength of 1/8 of the center frequency, and capacitors 1411, 1412, 1413 and 1414 are shown in FIG. 1 (a).
Alternatively, a small 180 ° hybrid coupler having the feature of the MIM shunt capacitive element of FIG. 8 (a) is also conceivable. The small 180 ° hybrid coupler is also a standard one
Functions as an 80 ° hybrid coupler.
On the GaAs substrate with a thickness of 100 μm, the MI of Fig. 1 (a)
When the miniature 180 ° hybrid coupler having the M shunt capacitive element is manufactured for 25 GHz operation, the occupied area on the substrate is about 350 μm × 400 μm.

By using the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a), a power distributor having a small occupied area on a semiconductor substrate can be manufactured. FIG. 27 shows a Will-Kinson power divider as a conventional power divider. The Wil-Kinson power distributor has three terminals 2301, 2302 and 2303 on conductor lines 2310 and 2320. The lengths of the conductor lines 2310 and 2320 are a quarter wavelength with respect to the center frequency, and the characteristic impedance is √2Zo. A resistor 2330 having a resistance value of 2Zo is connected between the terminals 2302 and 2303. The important functions of the conventional Wil-Kinson power distributor as a conventional power distributor are the same power and same phase distribution function and the isolation function between terminals. That is, the signal input to the terminal 2301 is input to the terminals 2302 and 23
When taking out from 03, the signal output from the terminal 2302 is
The signal output from the terminal 2303 has the same amplitude and phase.
Further, the terminals 2302 and 2303 are isolated.
A description and example of a Will-Kinson power divider is given by David M.
"Microwave Engineering" by Pozar, 1st Edition, Add
ison-Wesley Publishing Company, Inc., 1990, 8.
See Section 3, Pages 395-400. However, the conventional Wil-Kinson power divider occupies an extremely large area on the semiconductor chip for monolithic microwave integrated circuits. For example, on a GaAs substrate having a thickness of 100 μm, when a conventional Wil-Kinson power distributor as shown in FIG. 27 having an operating frequency of 25 GHz is manufactured, the lengths of the conductor lines 2310 and 2320 having a quarter wavelength are lengthened. Is about 1000 μm.

However, the conductor lines 2310 and 2320 having a length of a quarter wavelength are equivalent to a line having two shunt capacitors, and if the values of the shunt capacitor and the line impedance are appropriately selected, the conductor lines are The lengths of 2310 and 2320 are reduced from 1 / 8th to 1 / 12th wavelength. In this case, when the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a) is used as the shunt capacitor, a power distributor having a small occupied area on the semiconductor substrate can be manufactured.

FIG. 16 (a) shows a small power distributor according to an embodiment of the present invention. The small power distributor is formed on a semiconductor substrate and has terminals 1601, 1602 and 1603. The conductor lines 1610 and 1620 have a line impedance of 140Ω and a length of 1/12 wavelength with respect to the center frequency. A resistor 1630 having a resistance value of 100 Ω is provided between terminals 1602 and 1603.
Are connected. Capacitors 1611, 1612 and 1613 are MI
The MIM shunt capacitive element or the open stub is used, and the MIM shunt capacitive element of FIG. 1A or 8A is preferably used to reduce the occupied area on the semiconductor substrate. The value of the capacitors 1611, 1612 and 1613 is 0.15 to
0.25 pF is a suitable range. For example, when the power distributor is formed on a GaAs substrate having a thickness of 100 μm,
The length of the conductor lines 1610 and 1620 made of Au is about 300 μm. Compared to this, using the conventional power divider of Figure 27, for example, 25 GHz on a substrate made of GaAs with a thickness of 100 μm.
When making a power distributor operating in the vicinity, the length of the conductor lines 2310 and 2320 of FIG.
It is 00 μm. In the case of the power distributor of FIG. 16 (a), the terminals
When the signal input to 1601 is extracted from the terminals 1602 and 1603, the signal output from the terminal 1602 has the same amplitude and phase as the signal output from the terminal 1603. Also, terminals 1602 and 16
Between 03 is isolated.

In practice, the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a) according to an embodiment of the present invention is used as the capacitors 1611, 1612 and 1613 in realizing the small power divider. And, it is more effective for downsizing the power distributor. FIG. 16 (b) shows a layout diagram of the small power distributor of FIG. 16 (a) fabricated on a GaAs substrate. The conductor lines, terminals, capacitors and resistors in FIG. 16 (b) correspond to the respective elements of the power distributor in FIG. 16 (a) as follows. In the layout diagram of the power distributor in FIG. 16B, terminals 1601 ′, 1602 ′ and 1603 ′ correspond to the terminals 1601, 1602 and 1603 in FIG. 16A, respectively. Conductor lines 1610 'and 1620'
Correspond to the conductor lines 1610 and 1620 of FIG. 16 (a), respectively. The resistor 1630 ′ corresponds to the resistor 1630 of FIG. The connecting surfaces between the conductor lines or between the conductor lines and the terminals are indicated by dashed lines. Capacitors 1611 ', 1612' and 1613 'surrounded by the one-dot chain line correspond to the capacitors 1611, 1612 and 1613 of FIG. 16 (a), respectively. In Fig. 16 (b), GaA
s The small power distributor of Fig. 16 (a) is fabricated on the substrate, and the capacitors 1611 ', 1612' and 1613 'are the MIM of Fig. 1 (a).
It is a shunt capacitive element. The capacitor 1611 'is formed under the conductor lines 1610' and 1620 ', the capacitor 1612' is formed under the conductor line 1610 ', and the capacitor 1613' is formed under the conductor line 1620 '. When the conventional power distributor shown in FIG. 27 is manufactured on a GaAs substrate having a thickness of 100 μm, the occupied area is 500 μm × 1000 μm, but in the case of the small power distributor, it is as shown in FIG. 16 (b). 140 μm x 2
It has an occupied area of 20 μm.

FIGS. 19 (a) to 19 (c) show the electromagnetic field analysis results for the small power distributor of FIG. 16 (b). Figure 19
The solid line in (a) is the insertion loss when the signal input to the terminal 1601 ′ is extracted from the terminal 1602 ′, and the circle is the insertion loss when the signal input to the terminal 1601 ′ is extracted from the terminal 1603 ′. Both are almost the same, and show the same power distribution characteristics with a value of approximately -3.6 dB near 25 GHz.
Figure 19 (b) shows that when a signal is input to terminal 1601 ',
The phase difference between the signal output from 02 'and the signal output from the terminal 1603' is shown, and the in-phase distribution characteristic of 0 ° is shown over a wide band. Figure 19 (c) shows terminal 1602 'and terminal
Shows isolation characteristics with 1603 ', 25 GHz
The isolation value is about 14 dB in the vicinity. As can be seen from the above results, the small power distributor in FIG. 16 (b) has the function of a normal Wilkinson power distributor in the vicinity of 25 GHz and has the advantage that it occupies a small area on the semiconductor substrate. Have

Besides, in the small power distributor having the same structure as that shown in FIG. 16A, the conductor lines 1610 and 1620 are
It consists of a conductor line having a line impedance of 0Ω and a length of 1/8 wavelength with respect to the center frequency.
1612 and 1613 are also conceivable miniature power dividers that feature the MIM shunt capacitive element of FIG. 1 (a) or FIG. 8 (a). The small power divider also functions as a conventional Wilkinson power divider. Moreover, when the small power distributor having the MIM shunt capacitive element of Fig. 1 (a) is manufactured for 25 GHz operation on a GaAs substrate having a thickness of 100 μm, the occupied area on the substrate is approximately 200 μm × 220 μm.

[0050]

As described above, according to the present invention, when the MIM shunt capacitive element is manufactured on the semiconductor substrate, the area occupied by the semiconductor chip is reduced, the performance deterioration at high frequency is reduced, and the high frequency The advantageous effect that the circuit design and layout design in can be efficiently performed can be obtained. Moreover, when the passive functional circuit is manufactured on the semiconductor substrate, the occupied area on the semiconductor chip becomes small, and
The advantageous effect is that it can be integrated on a monolithic microwave integrated circuit substrate such as As.

[Brief description of drawings]

1A is a plan view showing an MIM shunt capacitive element according to an embodiment of the present invention, FIG. 1B is a view showing a cross-sectional structure taken along line XX of FIG.

FIG. 2 (a) is a diagram showing a lumped constant equivalent circuit of the MIM shunt capacitive element of FIG. 1 (a). FIG. 2 (b) is a diagram showing a lumped constant equivalent circuit in the cross-sectional structure of the MIM shunt capacitive element.

3A is a diagram showing a scattering coefficient S ₁₁ ; FIG. 3B is a diagram showing a scattering coefficient S ₂₁ .

4A is a diagram showing a scattering coefficient S ₁₁ ; FIG. 4B is a diagram showing a scattering coefficient S ₂₁ .

5A is a diagram showing a scattering coefficient S ₁₁ ; FIG. 5B is a diagram showing a scattering coefficient S ₂₁ .

6A is a diagram showing a scattering coefficient S ₁₁ ; FIG. 6B is a diagram showing a scattering coefficient S ₂₁ .

FIG. 7 is a diagram showing work contents when a circuit design and a layout design are performed using the MIM shunt capacitive element (FIG. 1A) which is an embodiment of the present invention.

FIG. 8A is a plan view showing a MIM shunt capacitive element according to an embodiment of the present invention, and FIG. 8B is a view showing a cross-sectional structure taken along line XX.

9 is a through hole 1 of the MIM shunt capacitive element of FIG. 1 (a).
Diagram showing manufacturing method of 04 and conductor wall surface 105

10 is a diagram showing a method of manufacturing the through hole 804 and the conductor wall surface 805 of the MIM shunt capacitive element of FIG. 8 (a).

11 is a diagram showing a lumped constant equivalent circuit of the MIM shunt capacitive element of FIG. 8 (a).

FIG. 12 (a) A small 90 ° according to an embodiment of the present invention.
The figure which shows a hybrid coupler (b) The figure which shows a layout pattern

FIG. 13 is a layout pattern diagram of a compact 90 ° hybrid coupler according to an embodiment of the present invention.

FIG. 14 (a) is a small 180 according to an embodiment of the present invention.
° Diagram showing hybrid coupler (b) Layout pattern diagram

FIG. 15 is a diagram showing a compact 180 ° hybrid coupler according to an embodiment of the present invention.

FIG. 16A is a diagram showing a small power distributor according to an embodiment of the present invention, and FIG. 16B is a layout pattern diagram.

FIG. 17A is a diagram showing an electromagnetic field calculation result of insertion loss of the small 90 ° hybrid coupler of FIG. 12B, FIG. 17B is a diagram showing an electromagnetic field calculation result of a phase difference, and FIG. 17C is an isolation electromagnetic field. Figure showing calculation results

FIG. 18A is a diagram showing an electromagnetic field calculation result of insertion loss of the small 180 ° hybrid coupler of FIG. 14B, and FIG. 18B is an electromagnetic field calculation of insertion loss of the small 180 ° hybrid coupler of FIG. 14B. The figure which shows a result (c) The figure which shows the electromagnetic field calculation result of a phase difference (d) The figure which shows the electromagnetic field calculation result of isolation

19A is a diagram showing an electromagnetic field calculation result of insertion loss of the small power distributor of FIG. 16B, FIG. 19B is a diagram showing an electromagnetic field calculation result of a phase difference, and FIG. 19C is an electromagnetic field analysis of isolation. Figure showing results

20A is a diagram showing a MIM capacitive element on a semiconductor substrate as a conventional capacitive element, and FIG. 20B is a sectional view taken along line XX.

FIG. 21 is a diagram showing an example of a conventional high frequency circuit.

FIG. 22 is a diagram showing an example of a conventional MIM shunt capacitive element on a semiconductor substrate.

FIG. 23 is a flowchart showing the work contents when performing circuit design and layout design using a conventional MIM shunt capacitive element.

FIG. 24 (a) is a view showing an open stub on a semiconductor substrate as a conventional shunt capacitive element, and FIG. 24 (b) is a view showing a sectional structure taken along line XX.

FIG. 25 is a view showing a conventional 90 ° hybrid coupler.

FIG. 26 is a view showing a conventional 180 ° hybrid coupler.

FIG. 27 is a diagram showing a conventional power distributor.

[Explanation of symbols]

100 conductor wiring portion 101, 103, 801, 803, 1701, 1703 conductor film 102, 802, 1702 insulating film 104, 804 through hole 105, 805 conductor wall surface 106, 107, 811, 812, 1706, 1707 connection surface 108, 109 , 806, 807, 1708, 1709, 1901, 1902, 1908,
2002 Conductor wiring 200, 201, 201 ', 1211, 1212, 1213, 1214, 1211', 121
2 ', 1213', 1214 ', 1311', 1312 ', 1313', 1314 ', 141
1, 1412, 1413, 1414, 1411 ', 1412', 1413 ', 1414', 1
511, 1514, 1530, 1611, 1612, 1613, 1611 ', 1612', 1
613 ', 1801, 1802 capacitors 202, 203, 203', 1804, 1806, 1807, 1808, 1809 inductors 204, 205, 204 ', 205', 1201, 1202, 1203, 1204, 120
1 ', 1202', 1203 ', 1204', 1301 ', 1302', 1303 ', 130
4 ', 2101, 2102, 2103, 2104, 2201, 2202, 2203, 220
4,1401,1402,1403,1404,1401 ', 1402', 1403 ', 14
04 ', 1501, 1502, 1503, 1504, 1601, 1602, 1603, 160
1 ', 1602', 1603 ', 2301, 2302, 2303 Terminal 808, 1704 Through conductor rod 809, 810, 1705 Connection conductor film 820, 1930 Ground potential supply unit 1000, 8000, 17000, 20000 Substrate 1001, 8001 Ground conductor film 1210, 1220, 1230, 1240, 1210 ', 1220', 1230 ', 124
0 ', 1310', 1320 ', 1330', 1340 ', 1410, 1420, 1430,
1440, 1410 ', 1420', 1430 ', 1440', 1510, 1520, 154
0, 1610, 1620, 1610 ', 1620', 2110, 2120, 2130, 214
0, 2210, 2220, 2230, 2240, 2310, 2320 Conductor line 1630, 1630 ', 2330 Resistor 1805 Transistor 1900 MIM Capacitive element section 1903, 1904, 2003, 2004 Connection section 1909 Conductor ground pad 1910 Bonding wire 1920 T branch 2001 Open track 2005 Connection surface

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) H03F 3/60 F term (reference) 5F038 AC02 AC15 AZ04 CD04 DF02 EZ01 EZ02 EZ20 5J067 AA04 CA91 CA92 HA09 HA25 HA29 HA33 KA47 KA68 KS03 KS04 KS11 LS05 MA21 QA02 QA03 QA04 QS04 QS05 QS09 TA03 TA05

Claims (16)

[Claims] 1. A monolithic microwave integrated circuit substrate having a first electrode conductor film, an insulating film, and a second electrode conductor film sequentially formed on the substrate, wherein the second electrode conductor film is formed on the substrate. A capacitive element characterized in that it is constituted by a part of a conductor wiring for transmitting the formed microwave, or the second electrode conductor film is constituted below the conductor wiring. 2. A capacitive element formed on a main surface of a monolithic microwave integrated circuit substrate, wherein the capacitive element comprises a first electrode conductor film, a second electrode conductor film and an insulating film. The first electrode conductor film and the insulating film are formed under the conductor wiring on the main surface of the substrate, the second electrode conductor film is formed of the conductor wiring on the main surface of the substrate, The substrate has a back surface that is a surface opposite to the main surface, and a ground conductor film is formed on the back surface of the substrate.
2. The capacitive element according to claim 1, wherein the electrode conductor film is connected to the ground conductor film through a through hole having a conductor wall surface that penetrates the main surface and the back surface of the substrate. 3. A capacitive element formed on a main surface of a monolithic microwave integrated circuit substrate, wherein the capacitive element comprises a first electrode conductor film, a second electrode conductor film and an insulating film. The first electrode conductor film and the insulating film are formed under the conductor wiring on the main surface of the substrate, the second electrode conductor film is formed of the conductor wiring on the main surface of the substrate, The substrate has a back surface that is a surface opposite to the main surface, and a ground conductor film is formed on the back surface of the substrate.
The electrode conductor film is a through hole having a conductor wall surface that penetrates the main surface, the back surface, and the insulating film of the substrate, and a conductor connection that connects the conductor wall surface of the through hole and the first electrode conductor film. A capacitive element connected to the ground conductor film by a portion. 4. Consisting of four conductor lines and four capacitors
A 90 ° hybrid coupler, wherein the hybrid coupler has four terminals, and the first terminal has a length of one-eighth wavelength with respect to the center frequency and a first line having a line impedance of 70Ω. A first connection, a first connection of a second line having a length of 1/12 wavelength with respect to the center frequency and a line impedance of 70Ω, and a first connection in which the first connection is grounded. A second connection portion of the capacitor is connected, and a second terminal has a second connection portion of the second line, a second line portion having a length of ⅛ wavelength with respect to the center frequency and a line impedance of 70Ω. The first connection part of the line 3 and the second connection part of the second capacitor whose first connection part is grounded are connected, and the second connection of the third line is connected to the third terminal. Section, a first connecting portion of a fourth line having a length of 1/12 wavelength with respect to the center frequency and a line impedance of 70Ω, and a first connection. The second connection of the third capacitor is connected to part of which is grounded, 4th
The terminal has a second connection portion of the first line, a second connection portion of the fourth line, and a second connection portion of a fourth capacitor whose first connection portion is grounded. A 90 ° hybrid coupler, wherein the 90 ° hybrid coupler is connected, and the first to fourth capacitors are the capacitive elements according to claim 2 or 3. 5. Consisting of four conductor lines and four capacitors
A 90 ° hybrid coupler, wherein the hybrid coupler has four terminals, and the first terminal has a length of 1/12 wavelength with respect to the center frequency and a first line having a line impedance of 100Ω. A first connecting part, a first connecting part of a second line having a length of 1/8 wavelength with respect to the center frequency and a line impedance of 100Ω, and a first connecting part in which the first connecting part is grounded. The second connection of the capacitor is connected and the second
The terminal of the second line of the second connection portion, the first connection portion of the third line having a length of 1/12 wavelength with respect to the center frequency and a line impedance of 100Ω, the first The second connection of the second capacitor, whose connection is grounded, is connected to the
At the terminal of 3, the second connection portion of the third line, the first connection portion of the fourth line having a length of 1/8 wavelength with respect to the center frequency and a line impedance of 100Ω, The second connection of the third capacitor, whose first connection is grounded, is connected,
The fourth terminal has a second connecting portion of the first line and the fourth connecting portion.
The second connection of the track and the fourth connection with the first connection grounded
The 90 ° hybrid coupler, wherein the second connection part of the capacitor is connected, and the first to fourth capacitors are the capacitive element according to claim 2 or 3. 6. Consisting of four conductor lines and four capacitors
A 90 ° hybrid coupler, wherein the hybrid coupler has four terminals, and the first terminal has a length of 1/16 wavelength with respect to the center frequency and a first line having a line impedance of 130Ω. A first connecting part, a first connecting part of a second line having a length of 1/3 wavelength with respect to the center frequency and a line impedance of 130 Ω, and a first connecting part in which the first connecting part is grounded. The second connection of the capacitor is connected and the second
The terminal of the second line, the second connection portion, the first connection portion of the third line having a length of 1/16 wavelength with respect to the center frequency and a line impedance of 130Ω, the first The second connection of the second capacitor, whose connection is grounded, is connected to the
The third terminal has a second connection part of the third line, a first connection part of a fourth line having a line impedance of 1/23 wavelength with respect to the center frequency and a line impedance of 130Ω, and The second connection of the third capacitor, whose first connection is grounded, is connected,
The fourth terminal has a second connecting portion of the first line and the fourth connecting portion.
The second connection of the track and the fourth connection with the first connection grounded
The 90 ° hybrid coupler, wherein the second connection part of the capacitor is connected, and the first to fourth capacitors are the capacitive element according to claim 2 or 3. 7. The 90 ° hybrid coupler according to claim 4, wherein the first to fourth capacitors are open stubs. 8. Comprised of four conductor lines and four capacitors
180 ° hybrid coupler, the hybrid coupler has four terminals, the first terminal of the first line having a length of 1/8 wavelength with respect to the center frequency and a line impedance of 100Ω. A first connecting part, a first connecting part of a second line having a length of 5/8 wavelength with respect to the center frequency and a line impedance of 100Ω, and a first connecting part in which the first connecting part is grounded. The second connection of the capacitor is connected and the
The second terminal has a second connection portion of the second line, a first connection portion of a third line having a length of 1/8 wavelength with respect to the center frequency and a line impedance of 100Ω, and The second connection of the second capacitor, whose first connection is grounded, is connected,
A second connection portion of the third line to the third terminal, a first connection portion of a fourth line having a length of 1/8 wavelength and a line impedance of 100Ω with respect to the center frequency, The second connection portion of the third capacitor, the first connection portion of which is grounded, is connected, the second connection portion of the first line and the second connection portion of the fourth line at the fourth terminal. And a second connection part of a fourth capacitor, the first connection part of which is grounded, and the first connection part
4. A 180 ° hybrid coupler, wherein the capacitors of 4 to 4 are the capacitive elements according to claim 2 or 3. 9. Consisting of four conductor lines and four capacitors
A 180 ° hybrid coupler, wherein the hybrid coupler has four terminals, and the first terminal has a length of 1/12 wavelength with respect to the center frequency and a first line having a line impedance of 140Ω. A first connecting part, a first connecting part of a second line having a length of 5/8 wavelength with respect to the center frequency and a line impedance of 100Ω, and a first connecting part in which the first connecting part is grounded. The second connection of the capacitor is connected and the
The second terminal has a second connection portion of the second line, a first connection portion of a third line having a line impedance of 1/12 wavelength with respect to the center frequency and a line impedance of 140Ω, and The second connection of the second capacitor, whose first connection is grounded, is connected,
A second terminal of the third line at the third terminal, a first terminal of a fourth line having a line impedance of 1/12 wavelength and 140Ω with respect to the center frequency, The second connection portion of the third capacitor, the first connection portion of which is grounded, is connected, the second connection portion of the first line and the second connection portion of the fourth line at the fourth terminal. And a second connection part of a fourth capacitor, the first connection part of which is grounded, and the first connection part
4. A 180 ° hybrid coupler, wherein the capacitors of 4 to 4 are the capacitive elements according to claim 2 or 3. 10. The 180 according to claim 8, wherein the first to fourth capacitors are all open stubs.
° Hybrid coupler. 11. A 180 ° hybrid coupler composed of three conductor lines and three capacitors, wherein the hybrid coupler has four terminals, and the first terminal has a center frequency of 8 minutes. The first connection part of the first line having a length of one wavelength of and a line impedance of 100Ω, the first connection part of the first capacitor is connected, the second terminal of the first capacitor of For the second connection and the center frequency
The first connection part of the second line having a length of 1/8 wavelength and a line impedance of 100Ω is connected, and the third terminal is connected to the second connection part of the second line and the center frequency. Third with a length of 1/8 wavelength and a line impedance of 100Ω
The first connection of the track and the second connection with the first connection grounded
The second connection part of the capacitor is connected, the second connection part of the first line, the second connection part of the third line, and the first connection part to the fourth terminal. A second connection portion of a grounded third capacitor is connected, and the second and third capacitors are the capacitive element according to claim 2 or 3.
180 ° hybrid coupler. 12. A 180 ° hybrid coupler composed of three conductor lines and three capacitors, wherein the hybrid coupler has four terminals, and the first terminal has a center frequency of 12 minutes. The first connection part of the first line having a length of one wavelength of and a line impedance of 140 Ω is connected to the first connection part of the first capacitor, and the second terminal is connected to the first connection part of the first capacitor. For the second connection and the center frequency
The first connection part of the second line having a line length of 1/12 wavelength and a line impedance of 140 Ω is connected, and the third terminal has the second connection part of the second line and the center frequency. Third with a length of 1/12 wavelength and a line impedance of 140Ω
The first connection of the track and the second connection with the first connection grounded
The second connection part of the capacitor is connected, the second connection part of the first line, the second connection part of the third line, and the first connection part to the fourth terminal. A second connection portion of a grounded third capacitor is connected, and the second and third capacitors are the capacitive element according to claim 2 or 3.
180 ° hybrid coupler. 13. The 180 of claim 11 or 12, wherein the second or third capacitor comprises an open stub.
° Hybrid coupler. 14. A power distributor comprising two conductor lines, three capacitors and one resistor, wherein the power distributor is
It has three terminals and the first terminal has 8
The first with a wavelength of one-half wavelength and a line impedance of 100Ω.
The first connection part of the line 1 and the first connection part of the second line having a length of 1/8 wavelength with respect to the center frequency and the line impedance of 100Ω, and the first connection part are grounded. The second connection part of the first capacitor is connected, and the second terminal is connected to the second connection part.
The second connection of the line of 1 and the second with the first connection grounded
The second connection part of the capacitor and the first connection part of the resistor having a resistance value of 100Ω are connected, and the second terminal is connected to the third terminal.
The second connection of the track and the third with the first connection grounded
The second connection portion of the capacitor and the second connection portion of the resistor are connected, and the first to third capacitors are the capacitive element according to claim 2 or 3, vessel. 15. A power distributor comprising two conductor lines, three capacitors and one resistor, wherein the power distributor is
It has three terminals and the first terminal has 12
The first with a length of one-half wavelength and a line impedance of 140 Ω
1st line 1 connection and 1 / 12th of the center frequency
The first connection of the second line, which has a wavelength length and a line impedance of 140 Ω, and the second connection of the first capacitor, whose first connection is grounded, are connected to the second terminal. Is connected to the second connection part of the first line, the second connection part of the second capacitor whose first connection part is grounded, and the first connection part of the resistor having a resistance value of 100Ω. The third terminal has a second connection portion of the second line, a second connection portion of a third capacitor whose first connection portion is grounded, and a second connection portion of the resistor. Is connected, and the first to third capacitors are the capacitive elements according to claim 2 or 3. 16. The power distributor according to claim 14, wherein the first capacitor, the second capacitor, or the third capacitor is an open stub.