JP2003273292A - Sealing frame member and silicon elastomer sheet - Google Patents

Sealing frame member and silicon elastomer sheet

Info

Publication number
JP2003273292A
JP2003273292A JP2002072241A JP2002072241A JP2003273292A JP 2003273292 A JP2003273292 A JP 2003273292A JP 2002072241 A JP2002072241 A JP 2002072241A JP 2002072241 A JP2002072241 A JP 2002072241A JP 2003273292 A JP2003273292 A JP 2003273292A
Authority
JP
Japan
Prior art keywords
layer
frame member
sealing frame
sealing
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002072241A
Other languages
Japanese (ja)
Other versions
JP3920672B2 (en
Inventor
Hirobumi Iida
博文 飯田
Takeyuki Tsunekawa
武幸 恒川
Muneyoshi Sakota
宗由 迫田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Plastics Inc
Nissan Packing Co Ltd
Original Assignee
Mitsubishi Plastics Inc
Nissan Packing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Plastics Inc, Nissan Packing Co Ltd filed Critical Mitsubishi Plastics Inc
Priority to JP2002072241A priority Critical patent/JP3920672B2/en
Publication of JP2003273292A publication Critical patent/JP2003273292A/en
Application granted granted Critical
Publication of JP3920672B2 publication Critical patent/JP3920672B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Laminated Bodies (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a sealing frame member capable of being effectively manufactured suitably for a sealing method for adhering the sealing frame member in advance formed in a specific profile to a substrate, pouring a liquid-like sealing resin into the frame to seal a semiconductor chip, and separating the sealing frame member from the substrate after the sealing resin is cured. <P>SOLUTION: A sealing frame member 11 is constituted of a two-layer silicon elastomer layer composed of a first layer 11a coming into contact with a substrate which mounts a semiconductor chip and a second layer 11b laminated thereon. As for the first layer 11a, an elastic modulus G' measured by a shear method at a frequency of 10 Hz and a temperature of 20°C in a dynamic viscoelasticity measurement is in a range of 3.0×10<SP>4</SP>Pa to 5.0×10<SP>5</SP>Pa. As for the second layer 11b, an elastic modulus E' measured by a stretch method at a frequency of 10 Hz and a temperature of 20°C in the dynamic viscoelasticity measurement is in a range of 3.0×10<SP>6</SP>Pa to 2.0×10<SP>7</SP>Pa. The thickness of the first layer 11a is formed to be 30 μm to 200 μm. The sealing frame member 11 is formed by a punching process of a silicon elastomer sheet 14. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体チップ封止
用の封止枠部材及びシリコーンエラストマーシートに係
り、詳しくは半導体チップを液状樹脂を硬化させて封止
する際に、半導体チップの周囲を取り囲むように配置す
る封止枠部材及び該封止枠部材を形成するのに適したシ
リコーンエラストマーシートに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sealing frame member for sealing a semiconductor chip and a silicone elastomer sheet, and more specifically, when the semiconductor chip is cured by hardening a liquid resin, the periphery of the semiconductor chip is sealed. The present invention relates to a sealing frame member arranged so as to surround it and a silicone elastomer sheet suitable for forming the sealing frame member.

【0002】[0002]

【従来の技術】現在の電子部品の大半は半導体チップの
形で集積化されている。この半導体チップは樹脂で封止
されており、その封止形態にはBGA(ボール・グリッ
ド・アレイ)、CSP(チップサイズ・パッケージ)、
QFP、PLCC(プラスチック・リード・チップ・キ
ャリヤ)等が、また、COB(チップオンボード)、T
AB、フリップチップ、LCDモジュール及びLEDモ
ジュール等がある。
2. Description of the Related Art Most of current electronic components are integrated in the form of semiconductor chips. This semiconductor chip is sealed with resin, and its sealing form is BGA (ball grid array), CSP (chip size package),
QFP, PLCC (plastic lead chip carrier), COB (chip on board), T
There are ABs, flip chips, LCD modules and LED modules.

【0003】半導体チップを封止する工程は、半導体チ
ップの目的、形状等に応じてスクリーン印刷を用いて液
状封止樹脂を印刷して封止する方法や金型を用いて液状
封止樹脂を射出成形する方法、所定量の液状封止樹脂を
吐出してポッティング方法により封止を行う方法等がと
られる。また、金型を使用しない場合の液状封止樹脂の
封止に関しては、半導体チップの周囲を囲むように塗布
する高粘度樹脂と、高粘度樹脂塗布後にその内側に流し
込んで半導体そのものを封止する低粘度樹脂との2種類
の粘度の異なる樹脂を用いる場合が多い。また、この工
程には、液状封止樹脂を硬化させる工程も含まれていお
り、通常は封止後の半導体チップを所定時間加熱させて
硬化させる。
The step of encapsulating the semiconductor chip is performed by a method of printing and encapsulating the liquid encapsulating resin by screen printing or by using a die in accordance with the purpose and shape of the semiconductor chip. An injection molding method, a method of discharging a predetermined amount of liquid sealing resin and sealing by a potting method, or the like is used. Further, regarding the sealing of the liquid sealing resin when the mold is not used, the high-viscosity resin which is applied so as to surround the periphery of the semiconductor chip and the high-viscosity resin is applied and then poured inside to seal the semiconductor itself. In many cases, two types of resins having different viscosities, that is, a low viscosity resin, are used. In addition, this step also includes a step of curing the liquid encapsulating resin, and normally, the semiconductor chip after encapsulation is heated and cured for a predetermined time.

【0004】特開平5−144858号公報には、封止
枠を使用して樹脂封止を行った後、必要に応じて封止枠
を取り外す封止方法が開示されている。この封止方法で
は、図6に示すように、成型されたゲル状の封止枠31
を、プリント基板32上に実装した半導体チップ33を
囲むように、かつプリント基板32に密着するようにプ
リント基板32に搭載する。そして、該封止枠31内に
液状の封止樹脂34を流し込み、該封止樹脂34を硬化
させる。封止枠31は硬化剤を含有したゾル状のシリコ
ンゴムを成型用金型に流し込んで或る時間が経過した
後、該シリコンゴムが硬化することによりゲル状に形成
されたものである。
Japanese Unexamined Patent Publication No. 5-144858 discloses a sealing method in which a sealing frame is used for resin sealing and then the sealing frame is removed as necessary. In this sealing method, as shown in FIG. 6, a molded gel-shaped sealing frame 31 is used.
Is mounted on the printed circuit board 32 so as to surround the semiconductor chip 33 mounted on the printed circuit board 32 and to be in close contact with the printed circuit board 32. Then, a liquid sealing resin 34 is poured into the sealing frame 31 to cure the sealing resin 34. The sealing frame 31 is formed in a gel state by pouring a sol-like silicone rubber containing a curing agent into a molding die and curing the silicone rubber after a lapse of a certain time.

【0005】[0005]

【発明が解決しようとする課題】ところが、高粘度樹脂
及び低粘度樹脂の2種類の粘度の異なる樹脂を用いる方
法は、樹脂の塗布工程が2工程となるため生産効率が悪
く、また、封止枠の役割となる高粘度樹脂自体も封止材
の一部となるため、小面積部の封止には適さないという
問題があった。
However, the method using two kinds of resins having different viscosities, that is, a high-viscosity resin and a low-viscosity resin, has a low production efficiency because the resin coating step requires two steps, and the sealing is also difficult. Since the high-viscosity resin itself, which serves as a frame, is also a part of the sealing material, there is a problem that it is not suitable for sealing a small area.

【0006】一方、特開平5−144858号公報に開
示された方法では、封止樹脂34の硬化後に封止枠31
を取り外すことにより、小面積部においても半導体チッ
プ33を封止できる。しかし、特開平5−144858
号公報に開示された封止枠31は、硬化剤を含有したゾ
ル状のシリコンゴムを成型用金型に流し込んで形成する
ため、製造に手間が掛かる。また、封止枠31全体が同
じ物性のゲル状のシリコンゴムで形成されているため、
封止枠31のプリント基板32に対する密着性を高める
と、封止枠31の形状保持機能が低くなり、プリント基
板32に貼付する際に封止樹脂34の形状を精度良く形
成することができないという問題もある。
On the other hand, in the method disclosed in Japanese Unexamined Patent Publication No. 5-144858, the sealing frame 31 is cured after the sealing resin 34 is cured.
By removing, the semiconductor chip 33 can be sealed even in a small area. However, JP-A-5-144858
Since the sealing frame 31 disclosed in the publication is formed by pouring a sol-like silicon rubber containing a curing agent into a molding die, it takes time to manufacture. Moreover, since the entire sealing frame 31 is formed of the gel-like silicon rubber having the same physical properties,
If the adhesion of the sealing frame 31 to the printed circuit board 32 is increased, the shape retaining function of the sealing frame 31 is lowered, and the shape of the sealing resin 34 cannot be accurately formed when the sealing frame 31 is attached to the printed circuit board 32. There are also problems.

【0007】本発明は前記の問題点に鑑みてなされたも
のである。そして、第1の目的は所定形状の封止枠部材
を基板に貼付し、液状封止樹脂をその枠内に流し込んで
半導体チップを封止し、封止樹脂の硬化後に封止枠部材
を基板から剥がす封止方法に好適で、小面積部において
も精度良く半導体チップを封止でき、効率よく製造可能
な封止枠部材を提供することにある。また、第2の目的
は前記封止枠部材を打ち抜き加工により簡単に精度良く
製造することができるシリコーンエラストマーシートを
提供することにある。
The present invention has been made in view of the above problems. Then, a first purpose is to attach a sealing frame member having a predetermined shape to the substrate, pour a liquid sealing resin into the frame to seal the semiconductor chip, and after the sealing resin is cured, the sealing frame member is placed on the substrate. An object of the present invention is to provide a sealing frame member that is suitable for a sealing method of peeling from a semiconductor chip, can accurately seal a semiconductor chip even in a small area portion, and can be manufactured efficiently. A second object is to provide a silicone elastomer sheet which can easily and accurately manufacture the sealing frame member by punching.

【0008】[0008]

【課題を解決するための手段】前記第1の目的を達成す
るため、請求項1に記載の発明は、半導体チップを樹脂
封止する工程で、半導体チップを取り囲むようにして基
板上に貼り付けて使用される封止枠部材であって、前記
基板に接する第1層と、該第1層上に積層された第2層
との2層構成に形成され、第1層は基板に対する密着性
を確保できる物性を備え、第2層は封止枠部材の形状保
持の役割を果たす物性を備えている。
In order to achieve the first object, the invention according to claim 1 is a step of resin-sealing a semiconductor chip, in which the semiconductor chip is attached to a substrate so as to surround the semiconductor chip. A sealing frame member used as a substrate, which has a two-layer structure including a first layer in contact with the substrate and a second layer laminated on the first layer, the first layer being adhesive to the substrate. The second layer has a physical property that plays a role of maintaining the shape of the sealing frame member.

【0009】この発明の封止枠部材は、基板に接する第
1層により基板に対する密着性が確保され、その上に積
層された第2層により封止枠部材の形状保持がなされ
る。従って、精度良く半導体チップを封止でき、封止樹
脂の硬化後、基板上に糊を残すことなく剥がすことがで
きる。
In the sealing frame member of the present invention, the adhesion to the substrate is secured by the first layer in contact with the substrate, and the shape of the sealing frame member is maintained by the second layer laminated thereon. Therefore, the semiconductor chip can be accurately sealed and can be peeled off without leaving any glue on the substrate after the sealing resin is cured.

【0010】請求項2に記載の発明は、半導体チップを
樹脂封止する工程で、半導体チップを取り囲むようにし
て基板上に貼り付けて使用される封止枠部材であって、
前記基板に接する第1層と、該第1層上に積層された第
2層との2層のシリコーンエラストマー層により構成さ
れ、第1層及び第2層が下記の条件を満たす。第1層:
動的粘弾性測定により、周波数10Hz、温度20℃で
せん断法で測定した弾性率(G’)が3.0×104
a〜5.0×105Paの範囲にある。第2層:動的粘
弾性測定により、周波数10Hz、温度20℃で引張法
で測定した弾性率(E’)が3.0×106Pa〜2.
0×107Paの範囲にある。
According to a second aspect of the present invention, there is provided a sealing frame member which is used by being attached to a substrate so as to surround the semiconductor chip in a step of resin-sealing the semiconductor chip.
It is composed of two silicone elastomer layers, a first layer in contact with the substrate and a second layer laminated on the first layer, and the first layer and the second layer satisfy the following conditions. First layer:
By dynamic viscoelasticity measurement, the elastic modulus (G ′) measured by the shear method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × 10 4 P.
It is in the range of a to 5.0 × 10 5 Pa. Second layer: Dynamic viscoelasticity measurement, elastic modulus (E ′) measured by a tensile method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × 10 6 Pa to 2.
It is in the range of 0 × 10 7 Pa.

【0011】この発明の封止枠部材は、シリコーンエラ
ストマーで形成されて、基板に接する第1層が基板に対
する密着性を確保できる物性を備え、その上に積層され
た第2層が封止枠部材の形状保持の役割を果たす物性を
備える。また、封止枠部材を前記第1層及び第2層の物
性を備えた2層構成のシリコーンエラストマーシートの
打ち抜き加工によって容易に製造することができる。
The sealing frame member of the present invention is formed of a silicone elastomer, and the first layer in contact with the substrate has physical properties capable of ensuring adhesion to the substrate, and the second layer laminated thereon has the sealing frame. It has physical properties that play a role of maintaining the shape of the member. Further, the sealing frame member can be easily manufactured by punching out a two-layered silicone elastomer sheet having the physical properties of the first layer and the second layer.

【0012】請求項3に記載の発明は、請求項2に記載
の発明において、前記第1層の厚みを30μm〜200
μmとした。この発明では、基板に対する充分な密着性
の確保や、打ち抜き加工等の加工で所定の寸法精度を出
すのが容易となる。
A third aspect of the invention is the invention according to the second aspect, wherein the thickness of the first layer is 30 μm to 200 μm.
μm. According to the present invention, it becomes easy to secure sufficient adhesion to the substrate and to obtain a predetermined dimensional accuracy by processing such as punching.

【0013】第2の目的を達成するため、請求項4に記
載の発明は、動的粘弾性測定により、周波数10Hz、
温度20℃でせん断法で測定した弾性率(G’)が3.
0×104Pa〜5.0×105Paの範囲にあるシリコ
ーンエラストマー層によりシート状に形成された第1層
と、該第1層上に積層されるとともに、動的粘弾性測定
により、周波数10Hz、温度20℃で引張法で測定し
た弾性率(E’)が3.0×106Pa〜2.0×107
Paの範囲にあるシリコーンエラストマー層によりシー
ト状に形成された第2層とからなる。
In order to achieve the second object, the invention according to claim 4 uses a dynamic viscoelasticity measurement to obtain a frequency of 10 Hz,
The elastic modulus (G ′) measured by the shear method at a temperature of 20 ° C. is 3.
A first layer formed in a sheet shape by a silicone elastomer layer in the range of 0 × 10 4 Pa to 5.0 × 10 5 Pa, and a layer laminated on the first layer, and by dynamic viscoelasticity measurement, The elastic modulus (E ') measured by the tensile method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × 10 6 Pa to 2.0 × 10 7.
The second layer is formed in a sheet shape by the silicone elastomer layer having a range of Pa.

【0014】この発明のシリコーンエラストマーシート
は、打ち抜き加工で所望の形状の封止枠部材を寸法精度
良く形成することができる。請求項5に記載の発明は、
請求項4に記載の発明において、前記第1層の厚みを3
0μm〜200μmとした。この発明では、打ち抜き加
工等の加工で所定の寸法精度を出すのが容易となる。
The silicone elastomer sheet of the present invention can be punched to form a sealing frame member having a desired shape with high dimensional accuracy. The invention according to claim 5 is
In the invention according to claim 4, the thickness of the first layer is 3
It was set to 0 μm to 200 μm. According to the present invention, it becomes easy to obtain a predetermined dimensional accuracy by processing such as punching.

【0015】[0015]

【発明の実施の形態】(第1の実施形態)以下、本発明
を具体化した一実施の形態を図1〜図3に従って説明す
る。
BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) An embodiment of the present invention will be described below with reference to FIGS.

【0016】図1(a)は封止枠部材の模式斜視図を示
し、図1(b)は封止枠部材の形成に使用するシリコー
ンエラストマーシートの部分模式正面図である。図2は
半導体チップを封止した状態の模式断面図、図3は半導
体チップの封止位置に封止枠部材を配置した状態の模式
平面図である。
FIG. 1 (a) is a schematic perspective view of a sealing frame member, and FIG. 1 (b) is a partial schematic front view of a silicone elastomer sheet used for forming the sealing frame member. FIG. 2 is a schematic cross-sectional view showing a state in which a semiconductor chip is sealed, and FIG. 3 is a schematic plan view showing a state in which a sealing frame member is arranged at a sealing position of the semiconductor chip.

【0017】図1(a)に示すように、封止枠部材11
は四角枠状に形成され、図2に示すように、半導体チッ
プ12を実装した基板としてのプリント配線板13に接
するように配置される第1層11aと、第1層11a上
に積層された第2層11bとの2層のシリコーンエラス
トマー層により構成されている。
As shown in FIG. 1A, the sealing frame member 11
Is formed in a rectangular frame shape, and is laminated on the first layer 11a and the first layer 11a arranged so as to contact the printed wiring board 13 as a substrate on which the semiconductor chip 12 is mounted, as shown in FIG. The second layer 11b and the two silicone elastomer layers are included.

【0018】封止枠部材11は図1(b)に示すよう
に、シリコーンエラストマー層によりシート状に構成さ
れた第1層14aと、該第1層14a上に積層されたシ
リコーンエラストマー層により構成された第2層14b
とからなるシリコーンエラストマーシート14の打ち抜
き加工により形成される。
As shown in FIG. 1 (b), the sealing frame member 11 is composed of a first layer 14a formed in a sheet shape by a silicone elastomer layer, and a silicone elastomer layer laminated on the first layer 14a. Second layer 14b
It is formed by punching the silicone elastomer sheet 14 made of.

【0019】本発明の封止枠部材11を構成するシリコ
ーンエラストマーは、第1層11a及び第2層11bと
も次式で表されるシロキサン骨格を有するポリオルガノ
シロキサンを架橋することにより得られるエラストマー
である。
The silicone elastomer constituting the sealing frame member 11 of the present invention is an elastomer obtained by crosslinking a polyorganosiloxane having a siloxane skeleton represented by the following formula in both the first layer 11a and the second layer 11b. is there.

【0020】[0020]

【化1】 Rの全てがメチル基であるポリジメチルシロキサンをは
じめ、メチル基の一部が他のアルキル基、ビニル基、フ
ェニル基、フルオロアルキル基等の一種あるいはそれ以
上と置換された各種のポリオルガノシロキサンを単独で
用いても、あるいは二種類以上ブレンドして用いてもよ
い。
[Chemical 1] Various polyorganosiloxanes including polydimethylsiloxane in which all R groups are methyl groups, and some of the methyl groups are substituted with one or more of other alkyl groups, vinyl groups, phenyl groups, fluoroalkyl groups, etc. They may be used alone or in a blend of two or more.

【0021】本発明で適用できる架橋方法としては特に
限定されるものではなく、従来より公知の方法が適用で
きる。例えば、ポリオルガノシロキサンのメチル基ある
いはビニル基をラジカル反応で架橋する方法、シラノー
ル末端ポリオルガノシロキサンと加水分解可能な官能基
を有するシラン化合物との縮合反応で架橋させる方法、
ビニル基へのヒドロシリル基の付加反応で架橋する方法
等が挙げられる。
The crosslinking method applicable in the present invention is not particularly limited, and a conventionally known method can be applied. For example, a method of crosslinking a methyl group or a vinyl group of polyorganosiloxane by a radical reaction, a method of crosslinking by a condensation reaction of a silanol-terminated polyorganosiloxane and a silane compound having a hydrolyzable functional group,
Examples thereof include a method of crosslinking by a reaction of adding a hydrosilyl group to a vinyl group.

【0022】さらに、本発明のシリコーンエラストマー
には、シリコーンエラストマー組成物に従来添加するこ
とが知られている添加剤を本発明の物性を損なわない範
囲で添加してもよい。これら添加剤として、ヒュームド
シリカ、沈降性シリカ、石英粉等の酸化ケイ素の他、ケ
イソウ土、炭酸カルシウム、カーボンブラック、アルミ
ナ、酸化マグネシウム、酸化亜鉛、窒化ホウ素、酸化鉄
等が挙げられる。
Further, to the silicone elastomer of the present invention, additives known to be conventionally added to silicone elastomer compositions may be added within the range not impairing the physical properties of the present invention. Examples of these additives include fumed silica, precipitated silica, silica powder, and other silicon oxides, as well as diatomaceous earth, calcium carbonate, carbon black, alumina, magnesium oxide, zinc oxide, boron nitride, iron oxide, and the like.

【0023】第1層11aのシリコーンエラストマーの
物性は、動的粘弾性測定により、周波数10Hz、温度
20℃でせん断法で測定した弾性率(G’)が3.0×
10 4Pa〜5.0×105Paの範囲にあることが重要
である。さらに液状樹脂を加熱硬化させる工程で150
℃程度まで温度が上昇する可能性があるので、この温度
範囲まで動的粘弾性の性質が本発明の範囲にあることが
望ましい。
Of the first layer 11a of the silicone elastomer
Physical properties are measured by dynamic viscoelasticity, frequency 10Hz, temperature
Elastic modulus (G ') measured by shearing method at 20 ° C is 3.0 x
10 FourPa ~ 5.0 x 10FiveIt is important to be in the range of Pa
Is. Further, in the process of heating and curing the liquid resin, 150
Since the temperature may rise up to about ℃, this temperature
To the extent the dynamic viscoelastic properties are within the scope of the invention.
desirable.

【0024】前記弾性率(G’)が低すぎると、シリコ
ーンエラストマーが軟らかすぎて打ち抜き加工時に変形
を起こし易かったり、プリント配線板13に貼付すると
きに変形し過ぎてしまって、所定の形状に封止できな
い。反対に前記弾性率(G’)が高すぎるとシリコーン
エラストマーが硬すぎて、プリント配線板13との密着
力が充分でなく、液状の封止樹脂がプリント配線板13
と封止枠部材11の間から漏れてしまう。
If the elastic modulus (G ') is too low, the silicone elastomer is too soft and easily deformed during punching, or too much when it is attached to the printed wiring board 13, resulting in a predetermined shape. Cannot be sealed. On the other hand, if the elastic modulus (G ′) is too high, the silicone elastomer is too hard and the adhesive force with the printed wiring board 13 is insufficient, so that the liquid sealing resin is used as the printed wiring board 13.
And the sealing frame member 11 leaks.

【0025】第2層11bのシリコーンエラストマーの
物性は、動的粘弾性測定により、周波数10Hz、温度
20℃で引張法で測定した弾性率(E’)が3.0×1
6Pa〜2.0×107Paの範囲にあることが重要で
ある。また、前記の理由により、約150℃程度まで動
的粘弾性の性質が前記範囲にあることが望ましい。
The physical properties of the second layer 11b of the silicone elastomer are determined by dynamic viscoelasticity such that the elastic modulus (E ') measured by the tensile method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × 1.
It is important to be in the range of 0 6 Pa to 2.0 × 10 7 Pa. For the above reason, it is desirable that the dynamic viscoelastic property is within the above range up to about 150 ° C.

【0026】前記弾性率(E’)が低すぎると、シリコ
ーンエラストマーが軟らかすぎて基板に封止枠部材11
を貼付する時に、封止枠部材11に伸びが生じて、所定
の位置に貼付することができず、封止樹脂の形状も精度
がでない。反対に前記弾性率(E’)が高すぎると第1
層11aのシリコーンエラストマーとの硬さの差が大き
すぎて、打ち抜き加工等の加工で寸法精度が出ない等の
不具合が生じる。
If the elastic modulus (E ') is too low, the silicone elastomer is too soft and the sealing frame member 11 is attached to the substrate.
When being attached, the sealing frame member 11 is stretched and cannot be attached at a predetermined position, and the shape of the sealing resin is not accurate. On the contrary, if the elastic modulus (E ') is too high, the first
Since the difference in hardness between the layer 11a and the silicone elastomer is too large, there arises a problem that the dimensional accuracy is not obtained by a punching process or the like.

【0027】上述の通り、第1層11aはプリント配線
板13に密着する役割を果たし、第2層11bは形状保
持の役割を果たす。前記のような動的粘弾性の性質を持
つシリコーンエラストマーシート14を得るための方法
について以下に説明する。弾性率(G’),(E’)に
ついてはポリオルガノシロキサンの種類、分子量、補強
性フィラー等シリコーンエラストマーの組成と架橋度を
適当に調整することによって目的の弾性率(G’),
(E’)にすることが可能である。また、複数の市販の
シリコーンコンパウンドをブレンドすることによっても
可能である。
As described above, the first layer 11a plays a role of adhering to the printed wiring board 13, and the second layer 11b plays a role of maintaining the shape. A method for obtaining the silicone elastomer sheet 14 having the above-described dynamic viscoelasticity will be described below. Regarding the elastic moduli (G ′) and (E ′), the desired elastic modulus (G ′), by adjusting the type and molecular weight of polyorganosiloxane, the composition of the silicone elastomer such as the reinforcing filler, and the degree of crosslinking appropriately,
It can be (E '). It is also possible to blend a plurality of commercially available silicone compounds.

【0028】第1層14aと第2層14bとの接着は、
第1層14a及び第2層14bのシリコーンエラストマ
ーが未架橋状態で両層14a,14bを積層し、加硫接
着させるのが一般的であるが、この方法に限定されるも
のではない。
The adhesion between the first layer 14a and the second layer 14b is
It is general that both layers 14a and 14b are laminated and vulcanized and adhered in a state where the silicone elastomers of the first layer 14a and the second layer 14b are uncrosslinked, but the method is not limited to this.

【0029】第1層11a,14aの厚みは30μm〜
200μmの範囲にあるものが好適である。厚さが薄す
ぎると、プリント配線板13に貼付する時に必要な変形
量が得られず、プリント配線板13への充分な密着性が
得られない。また、厚さが厚すぎると、打ち抜き加工等
の加工で収容邸の寸法精度を出すのが困難である。
The thickness of the first layers 11a and 14a is from 30 μm to
Those in the range of 200 μm are preferable. If the thickness is too thin, the required amount of deformation cannot be obtained when the printed wiring board 13 is attached, and sufficient adhesion to the printed wiring board 13 cannot be obtained. Further, if the thickness is too thick, it is difficult to obtain the dimensional accuracy of the house by punching or the like.

【0030】前記のように構成された封止枠部材11を
使用した封止方法を説明する。図2及び図3に示すよう
に、封止枠部材11は、プリント配線板13上に形成さ
れた半導体チップ搭載電極15上にダイボンド材15a
を介して接着され、ボンディングワイヤ16によりリー
ド電極17に接続された状態の半導体チップ12を囲む
ように、プリント配線板13上に貼り付けられる。封止
枠部材11はプリント配線板13の上面の周囲に設けら
れた絶縁材13a上に密着状態で貼付される。第1層1
1aは、動的粘弾性測定により、周波数10Hz、温度
20℃でせん断法で測定した弾性率(G’)が3.0×
104Pa〜5.0×105Paの範囲にあるため、自身
の密着力によりプリント配線板13に対して隙間無く貼
付される。次に硬化前の液状の封止樹脂18が封止枠部
材11内に流し込まれ、その後、加熱されて封止樹脂1
8が硬化された後、封止枠部材11がプリント配線板1
3上から剥がされて半導体チップ12の封止が完了す
る。
A sealing method using the sealing frame member 11 configured as described above will be described. As shown in FIGS. 2 and 3, the sealing frame member 11 has a die-bonding material 15 a on the semiconductor chip mounting electrode 15 formed on the printed wiring board 13.
The semiconductor chip 12 is bonded to the lead electrode 17 by the bonding wire 16 and is attached to the printed wiring board 13 so as to surround the semiconductor chip 12. The sealing frame member 11 is attached in close contact with the insulating material 13a provided around the upper surface of the printed wiring board 13. 1st layer 1
1a has a modulus of elasticity (G ′) of 3.0 × measured by a shear method at a frequency of 10 Hz and a temperature of 20 ° C. by dynamic viscoelasticity measurement.
Since it is in the range of 10 4 Pa to 5.0 × 10 5 Pa, it is adhered to the printed wiring board 13 with no gap due to its own adhesive force. Next, the liquid encapsulating resin 18 before curing is poured into the encapsulating frame member 11 and then heated to form the encapsulating resin 1.
After 8 is cured, the sealing frame member 11 is attached to the printed wiring board 1.
3 is peeled off from above, and the sealing of the semiconductor chip 12 is completed.

【0031】(実施例)以下、実施例及び比較例により
さらに詳しく説明するが、本発明はこれらに限定される
ものではない。
(Examples) Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples, but the present invention is not limited thereto.

【0032】実施例1 厚み100μm、周波数10Hz、温度20℃でせん断
法で測定した弾性率(G’)が8.3×104Paの第
1層14aと、厚み450μm、周波数10Hz、温度
20℃で引張法で測定した弾性率(E’)が8.0×1
6Paの第2層14bとからなるシリコーンエラスト
マーシート14を作製した。このシリコーンエラストマ
ーシート14から、封止面積が5mm×5mmとなるよ
うに打ち抜き加工して封止枠部材11を得た。
Example 1 A first layer 14a having a thickness of 100 μm, a frequency of 10 Hz and a modulus of elasticity (G ′) measured by a shearing method at a temperature of 20 ° C. of 8.3 × 10 4 Pa, a thickness of 450 μm, a frequency of 10 Hz and a temperature of 20. Elastic modulus (E ') measured by tensile method at ℃ is 8.0 × 1
A silicone elastomer sheet 14 composed of the second layer 14b of 0 6 Pa was prepared. This silicone elastomer sheet 14 was punched into a sealing area of 5 mm × 5 mm to obtain a sealing frame member 11.

【0033】次いでその封止枠部材11を図2に示すよ
うに半導体チップ12を取り囲むようにプリント配線板
13上に貼り付け、封止枠部材11内に液状のエポキシ
樹脂を流し込み、150℃で12時間熱処理後に封止枠
部材11を剥がした。液状のエポキシ樹脂が封止枠部材
11とプリント配線板13との間から漏れることはな
く、所定の形状に封止することができた。
Then, the sealing frame member 11 is attached to the printed wiring board 13 so as to surround the semiconductor chip 12 as shown in FIG. 2, and a liquid epoxy resin is poured into the sealing frame member 11 at 150 ° C. After the heat treatment for 12 hours, the sealing frame member 11 was peeled off. The liquid epoxy resin did not leak from between the sealing frame member 11 and the printed wiring board 13 and could be sealed in a predetermined shape.

【0034】比較例1 第1層14aを構成するシリコーンエラストマーの物性
が、周波数10Hz、温度20℃でせん断法で測定した
弾性率(G’)が1.0×106Paであることを除い
て実施例1と同様なシリコーンエラストマーシート14
から封止枠部材11を得た。そして、実施例1と同様に
して封止枠部材11をプリント配線板13に貼付し、液
状のエポキシ樹脂で半導体チップ12を封止した。その
結果、封止枠部材11とプリント配線板13との間から
液状のエポキシ樹脂が漏れてしまい、所定の形状に封止
することができなかった。
Comparative Example 1 Except that the physical properties of the silicone elastomer constituting the first layer 14a are such that the elastic modulus (G ') measured by the shear method at a frequency of 10 Hz and a temperature of 20 ° C. is 1.0 × 10 6 Pa. The same silicone elastomer sheet 14 as in Example 1
The sealing frame member 11 was obtained from. Then, the sealing frame member 11 was attached to the printed wiring board 13 in the same manner as in Example 1, and the semiconductor chip 12 was sealed with a liquid epoxy resin. As a result, the liquid epoxy resin leaked from between the sealing frame member 11 and the printed wiring board 13, and it was not possible to seal the liquid epoxy resin into a predetermined shape.

【0035】この実施の形態では以下の効果を有する。 (1) 半導体チップ12を取り囲むようにして基板
(プリント配線板13)上に貼り付けて使用される封止
枠部材11が、基板に対する密着性を確保できる物性を
備えた第1層11aと、封止枠部材11の形状保持の役
割を果たす物性を備える第2層11bとの2層構成とな
っている。従って、精度良く半導体チップ12を封止で
き、封止樹脂18の硬化後、基板上に糊を残すことなく
剥がすことができる。
This embodiment has the following effects. (1) A sealing frame member 11 used by being attached on a substrate (printed wiring board 13) so as to surround the semiconductor chip 12, and a first layer 11a having physical properties capable of ensuring adhesion to the substrate, It has a two-layer structure with the second layer 11b having physical properties that play a role of maintaining the shape of the sealing frame member 11. Therefore, the semiconductor chip 12 can be accurately sealed and can be peeled off after the sealing resin 18 is cured without leaving any glue on the substrate.

【0036】(2) 封止枠部材11は、動的粘弾性測
定により、周波数10Hz、温度20℃で測定したせん
断弾性率(G')及び引張弾性率(E')が所定の範囲にあ
る第1層11a(G’=3.0×104Pa〜5.0×
105Pa)と、第2層11b(E’=3.0×106
a〜2.0×107Pa)の2層構成となっている。従
って、基板に対して隙間無く密着状態で貼付されるとと
もに、樹脂封止終了後、基板に糊を残すことなく容易に
剥がすことができる。
(2) The sealing frame member 11 has a shear elastic modulus (G ') and a tensile elastic modulus (E') in a predetermined range measured by a dynamic viscoelasticity measurement at a frequency of 10 Hz and a temperature of 20 ° C. First layer 11a (G '= 3.0 × 10 4 Pa to 5.0 ×
10 5 Pa) and the second layer 11b (E '= 3.0 × 10 6 P)
It has a two-layer structure of a to 2.0 × 10 7 Pa). Therefore, it can be adhered to the substrate in a close contact state without a gap, and can be easily peeled off without leaving glue on the substrate after the resin sealing is completed.

【0037】(3) 第1層11a及び第2層11bが
シリコーンエラストマー層で構成されているため、封止
樹脂18の硬化させる際の加熱時に封止枠部材11が劣
化するのを抑制できる。また、封止枠部材11を第1層
11a及び第2層11bの物性を備えた2層構成のシリ
コーンエラストマーシート14の打ち抜き加工によって
容易に製造することができる。
(3) Since the first layer 11a and the second layer 11b are composed of the silicone elastomer layer, it is possible to suppress the deterioration of the sealing frame member 11 during heating when the sealing resin 18 is cured. Further, the sealing frame member 11 can be easily manufactured by punching the two-layered silicone elastomer sheet 14 having the physical properties of the first layer 11a and the second layer 11b.

【0038】(4) 第1層11aの厚みを30μm〜
200μmとしたので、基板に対する充分な密着性の確
保や、打ち抜き加工等の加工で所定の寸法精度を出すの
が容易となる。
(4) The thickness of the first layer 11a is from 30 μm to
Since the thickness is set to 200 μm, it becomes easy to secure sufficient adhesion to the substrate and to obtain a predetermined dimensional accuracy by processing such as punching.

【0039】(5) シリコーンエラストマーシート1
4は、動的粘弾性測定により、周波数10Hz、温度2
0℃で測定したせん断弾性率(G')及び引張弾性率
(E')が所定の範囲にある第1層11a(G’=3.0
×104Pa〜5.0×105Pa)と、第2層11b
(E’=3.0×106Pa〜2.0×107Pa)の2
層構成となっている。従って、打ち抜き加工で所望の形
状の封止枠部材11を寸法精度良く形成することができ
る。
(5) Silicone elastomer sheet 1
4 is frequency 10 Hz, temperature 2 by dynamic viscoelasticity measurement.
The first layer 11a (G '= 3.0) in which the shear elastic modulus (G') and the tensile elastic modulus (E ') measured at 0 ° C are within a predetermined range.
X10 < 4 > Pa-5.0 * 10 < 5 > Pa) and the 2nd layer 11b.
2 of (E '= 3.0 × 10 6 Pa to 2.0 × 10 7 Pa)
It has a layered structure. Therefore, the sealing frame member 11 having a desired shape can be formed by punching with high dimensional accuracy.

【0040】(6) シリコーンエラストマーシート1
4は第1層14aの厚みが30μm〜200μmに設定
されている。従って、打ち抜き加工等の加工で所定の寸
法精度を出して封止枠部材11を形成するのが容易とな
る。
(6) Silicone elastomer sheet 1
In No. 4, the thickness of the first layer 14a is set to 30 μm to 200 μm. Therefore, it becomes easy to form the sealing frame member 11 with a predetermined dimensional accuracy by punching or the like.

【0041】実施の形態は前記に限定されるものではな
く、例えば、次のように具体化してもよい。 〇 第1層11a及び第2層11bは、必ずしもシリコ
ーンエラストマー層で構成される必要はない。例えば、
基板(プリント配線板13)に接する第1層11aが基
板に対する密着性を確保できる物性を備え、第2層11
bが封止枠部材11の形状保持の役割を果たす物性を備
え、両層11a,11bがエポキシ樹脂を熱硬化させる
際の耐熱性を備えていればよい。
The embodiment is not limited to the above, but may be embodied as follows, for example. The first layer 11a and the second layer 11b do not necessarily have to be composed of a silicone elastomer layer. For example,
The first layer 11a in contact with the substrate (printed wiring board 13) has physical properties capable of ensuring adhesion to the substrate, and the second layer 11a
It suffices that b has physical properties that play a role of retaining the shape of the sealing frame member 11, and that both layers 11a and 11b have heat resistance when the epoxy resin is thermoset.

【0042】〇 第1層11aをシリコーンエラストマ
ー層で構成し、第2層11bを他の樹脂で形成してもよ
い。 ○ 封止枠部材11の形状は正方形に限らず、長方形、
楕円形等、封止すべき相手の形状に対応して適宜変更し
てもよい。
The first layer 11a may be made of a silicone elastomer layer and the second layer 11b may be made of another resin. The shape of the sealing frame member 11 is not limited to a square, but a rectangle,
You may change suitably according to the shape of the other party to seal, such as an ellipse.

【0043】○ 図4に示すように、封止枠部材11内
に複数個の半導体チップ12を封止可能な構成としても
よい。 ○ 図5に示すように、封止枠部材11として複数の封
止枠が連続した形状としてもよい。
As shown in FIG. 4, a plurality of semiconductor chips 12 may be sealed in the sealing frame member 11. As shown in FIG. 5, the sealing frame member 11 may have a shape in which a plurality of sealing frames are continuous.

【0044】○ シリコーンエラストマーシート14か
ら封止枠部材11を作製する場合、打ち抜きではなく切
り抜きで作製してもよい。例えば、枠の部分をレーザー
ビームぎ切り抜くように加工したり、カッターで切り抜
くようにしてもよい。
When the sealing frame member 11 is produced from the silicone elastomer sheet 14, it may be produced by cutting instead of punching. For example, the frame portion may be processed so as to be cut out with a laser beam, or may be cut out with a cutter.

【0045】前記実施の形態から把握される技術的思想
(発明)について、以下に記載する。 (1) 請求項2又は請求項3に記載の発明において、
前記第1層及び第2層は、前記弾性率(G’),
(E’)が温度150℃まで前記範囲となるように形成
されている。
The technical idea (invention) understood from the above embodiment will be described below. (1) In the invention according to claim 2 or 3,
The first layer and the second layer have the elastic modulus (G ′),
(E ′) is formed so that the temperature is within the above range up to 150 ° C.

【0046】(2) 請求項2〜請求項5に記載の発明
において、前記第1層及び第2を構成するシリコーンエ
ラストマーは複数のシリコーンコンパウンドをブレンド
することによりその弾性率(G’),(E’)が前記所
定の範囲の値となるように形成されている。
(2) In the invention described in any one of claims 2 to 5, the silicone elastomers constituting the first layer and the second layer are made by blending a plurality of silicone compounds to obtain elastic moduli (G '), ( E ') is formed to have a value within the predetermined range.

【0047】(3) 請求項1〜請求項3のいずれか一
項に記載の封止枠部材を使用して、その第1層が基板に
密着する状態で封止すべき半導体チップを囲むように封
止枠部材を基板に貼付し、液状の封止樹脂を封止枠部材
内に流し込んで、半導体チップを封止し、封止樹脂の硬
化後に封止枠部材を基板から剥がす半導体チップの封止
方法。
(3) The sealing frame member according to any one of claims 1 to 3 is used to surround a semiconductor chip to be sealed with its first layer in close contact with the substrate. The sealing frame member is attached to the substrate, the liquid sealing resin is poured into the sealing frame member to seal the semiconductor chip, and the sealing frame member is peeled off from the substrate after the sealing resin is cured. Sealing method.

【0048】[0048]

【発明の効果】以上詳述したように請求項1〜請求項3
に記載の発明によれば、予め所定の形状に加工した封止
枠部材を基板に貼付し、液状封止樹脂をその枠内に流し
込んで半導体チップを封止し、封止樹脂の硬化後に封止
枠部材を基板から剥がす封止方法に好適で効率よく製造
できる。また、請求項4及び請求項5に記載の発明によ
れば、前記封止枠部材を打ち抜き加工により簡単に精度
良く製造することができる。
As described in detail above, the first to third aspects of the invention are described.
According to the invention described in 1), a sealing frame member processed in advance into a predetermined shape is attached to the substrate, the liquid sealing resin is poured into the frame to seal the semiconductor chip, and the sealing resin is sealed after curing. It is suitable for a sealing method for peeling the stop frame member from the substrate and can be efficiently manufactured. Further, according to the invention described in claims 4 and 5, it is possible to easily and accurately manufacture the sealing frame member by punching.

【図面の簡単な説明】[Brief description of drawings]

【図1】 (a)は封止枠部材の模式斜視図、(b)は
シリコーンエラストマーシートの部分模式図。
FIG. 1A is a schematic perspective view of a sealing frame member, and FIG. 1B is a partial schematic view of a silicone elastomer sheet.

【図2】 半導体チップを封止した状態の模式断面図。FIG. 2 is a schematic cross-sectional view of a state in which a semiconductor chip is sealed.

【図3】 半導体チップの封止位置に封止枠部材を配置
した模式平面図。
FIG. 3 is a schematic plan view in which a sealing frame member is arranged at a sealing position of a semiconductor chip.

【図4】 別の実施の形態の封止枠部材の模式平面図。FIG. 4 is a schematic plan view of a sealing frame member according to another embodiment.

【図5】 別の実施の形態の封止枠部材の模式斜視図。FIG. 5 is a schematic perspective view of a sealing frame member according to another embodiment.

【図6】 従来技術の半導体チップを封止した状態の模
式断面図。
FIG. 6 is a schematic cross-sectional view showing a state in which a conventional semiconductor chip is sealed.

【符号の説明】[Explanation of symbols]

11…封止枠部材、11a,14a…第1層、11b,
14b…第2層、12…半導体チップ、13…基板とし
てのプリント配線板、14…シリコーンエラストマーシ
ート。
11 ... Sealing frame member, 11a, 14a ... 1st layer, 11b,
14b ... 2nd layer, 12 ... Semiconductor chip, 13 ... Printed wiring board as a substrate, 14 ... Silicone elastomer sheet.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 恒川 武幸 滋賀県長浜市三ツ矢町5番8号 三菱樹脂 株式会社長浜工場内 (72)発明者 迫田 宗由 京都府京都市伏見区深草下川原町130番地 の3 日産パッキング 株式会社内 Fターム(参考) 4M109 AA01 BA03 CA06 DB07 5F061 AA01 BA03 CA06    ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Takeyuki Tsunekawa             5-8 Mitsuyacho, Nagahama-shi, Shiga Mitsubishi Plastics               Nagahama Factory Co., Ltd. (72) Inventor Muneyoshi Sakoda             130 Fukakusa Shimogawaracho, Fushimi-ku, Kyoto-shi, Kyoto Prefecture             No. 3 Nissan Packing Co., Ltd. F-term (reference) 4M109 AA01 BA03 CA06 DB07                 5F061 AA01 BA03 CA06

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップを樹脂封止する工程で、半
導体チップを取り囲むようにして基板上に貼り付けて使
用される封止枠部材であって、前記基板に接する第1層
と、該第1層上に積層された第2層との2層構成に形成
され、第1層は基板に対する密着性を確保できる物性を
備え、第2層は封止枠部材の形状保持の役割を果たす物
性を備えている封止枠部材。
1. A sealing frame member which is used by being stuck on a substrate so as to surround the semiconductor chip in a step of sealing the semiconductor chip with a resin, the first layer being in contact with the substrate; It is formed in a two-layer structure with a second layer laminated on one layer, the first layer has physical properties capable of ensuring adhesion to the substrate, and the second layer has physical properties that play a role of retaining the shape of the sealing frame member. A sealing frame member including.
【請求項2】 半導体チップを樹脂封止する工程で、半
導体チップを取り囲むようにして基板上に貼り付けて使
用される封止枠部材であって、前記基板に接する第1層
と、該第1層上に積層された第2層との2層のシリコー
ンエラストマー層により構成され、第1層及び第2層が
下記の条件を満たす封止枠部材。 第1層:動的粘弾性測定により、周波数10Hz、温度
20℃でせん断法で測定した弾性率(G’)が3.0×
104Pa〜5.0×105Paの範囲にある。 第2層:動的粘弾性測定により、周波数10Hz、温度
20℃で引張法で測定した弾性率(E’)が3.0×1
6Pa〜2.0×107Paの範囲にある。
2. A sealing frame member which is used by being stuck on a substrate so as to surround the semiconductor chip in the step of sealing the semiconductor chip with a resin, the first frame being in contact with the substrate, and the first layer. A sealing frame member constituted by two layers of silicone elastomer layers, one layer being a second layer and the other being a second layer, wherein the first layer and the second layer satisfy the following conditions. First layer: The elastic modulus (G ′) measured by the shear method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × by dynamic viscoelasticity measurement.
It is in the range of 10 4 Pa to 5.0 × 10 5 Pa. Second layer: Dynamic viscoelasticity measurement, the elastic modulus (E ') measured by the tensile method at a frequency of 10 Hz and a temperature of 20 ° C. is 3.0 × 1.
It is in the range of 0 6 Pa to 2.0 × 10 7 Pa.
【請求項3】 前記第1層の厚みを30μm〜200μ
mとした請求項2に記載の封止枠部材。
3. The thickness of the first layer is 30 μm to 200 μm.
The sealing frame member according to claim 2, wherein m is m.
【請求項4】 動的粘弾性測定により、周波数10H
z、温度20℃でせん断法で測定した弾性率(G’)が
3.0×104Pa〜5.0×105Paの範囲にあるシ
リコーンエラストマー層によりシート状に形成された第
1層と、該第1層上に積層されるとともに、動的粘弾性
測定により、周波数10Hz、温度20℃で引張法で測
定した弾性率(E’)が3.0×106Pa〜2.0×
107Paの範囲にあるシリコーンエラストマー層によ
りシート状に形成された第2層とからなるシリコーンエ
ラストマーシート。
4. A frequency of 10H is measured by dynamic viscoelasticity measurement.
z, a first layer formed in a sheet shape by a silicone elastomer layer having an elastic modulus (G ′) measured by a shearing method at a temperature of 20 ° C. in the range of 3.0 × 10 4 Pa to 5.0 × 10 5 Pa And the elastic modulus (E ′) measured by a tensile method at a frequency of 10 Hz and a temperature of 20 ° C. by a dynamic viscoelasticity measurement while being laminated on the first layer, is 3.0 × 10 6 Pa to 2.0. ×
A silicone elastomer sheet comprising a second layer formed in a sheet shape by a silicone elastomer layer having a range of 10 7 Pa.
【請求項5】 前記第1層の厚みを30μm〜200μ
mとした請求項4に記載のシリコーンエラストマーシー
ト。
5. The thickness of the first layer is 30 μm to 200 μm.
The silicone elastomer sheet according to claim 4, wherein m is m.
JP2002072241A 2002-03-15 2002-03-15 Sealing frame member and silicone elastomer sheet for sealing frame member Expired - Fee Related JP3920672B2 (en)

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KR20140007840A (en) 2011-02-18 2014-01-20 제이엔씨 주식회사 Curable resin composition and colour conversion material using same
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Cited By (13)

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Publication number Priority date Publication date Assignee Title
CN100444359C (en) * 2004-06-25 2008-12-17 松下电工株式会社 Electronic part and method of manufacturing the same
US7348681B2 (en) 2004-06-25 2008-03-25 Matsushita Electric Works, Ltd. Electronic component and manufacturing method of the electronic component
WO2006001211A1 (en) * 2004-06-25 2006-01-05 Matsushita Electric Works, Ltd. Electronic part and method of manufacturing the same
CN101636837B (en) * 2007-03-23 2011-07-27 富士通株式会社 Electronic device, electronic apparatus mounting electronic device, article mounting electronic device, and method for manufacturing electronic device
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US7960215B2 (en) 2007-03-23 2011-06-14 Fujitsu Limited Electronic device, electronic apparatus mounted with electronic device, article equipped with electronic device and method of producing electronic device
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KR20140007840A (en) 2011-02-18 2014-01-20 제이엔씨 주식회사 Curable resin composition and colour conversion material using same
US9279078B2 (en) 2011-02-18 2016-03-08 Jnc Corporation Hardening resin composition and color conversion material using the same
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