JP2003264519A - Data transmission system, multiple repeater and phase matching method used in the sames - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data transmission system which uses even a J1 byte as a data channel and can perform phase matching for non-instantaneous interruptive switching with the J1 byte. <P>SOLUTION: In a multiple repeater 2, a J1 data inserting part 21 inserts data into a J1 byte as a user channel, and a J1 encoding part 22 encodes its J1 multiframe. A J1 byte inserting part 23 adds a synchronous frame pattern for non-instantaneous interruptive switching to the end of the encoded J1 multiframe, and multiplexer parts 24 and 25 multiplex the J1 multiframe and transmit the multiplexed J1 multiframe to transmission lines 31 and 32. In a multiple repeater 4, demultiplexer parts 41 and 42 separate signals to write the separated signals in static memories 45 and 46, and J1 byte extracting parts 43 and 44 retrieve the position of a fixed pattern for J1 synchronization. A selector 47 selects a current system and a preliminary system, and a J1 decoding part 48 decodes the encoded J1 data. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission system, a multiple repeater, and a phase matching method used for them, and more particularly to a phase matching method of a non-interruptible switching apparatus suitable for a multiple repeater with a non-interruptive switching function.

[0002]

2. Description of the Related Art Conventionally, as a phase adjusting method of this kind of hitless switching apparatus, for example, there is a method disclosed in Japanese Unexamined Patent Publication No. 5-183469. As shown in FIG. 3, the data transmission system using the phase adjustment method of the hitless switching device includes a pair of opposing devices 5a and 5b connected to opposing endpoints # 1 and # 2, and an opposing device 1a. , 1b, and multiple repeaters 6, 8
8 and different delay times (DLY # 1, DL
Y # 2) is included in the transmission lines 71 and 72.

The multiplex relay device 6 has a J1 byte insertion circuit (J
1 INS) 61 and a pair of multiplexers (MUX)
62 and 63, and the multiplexers 62 and 63 are connected to transmission lines 71 and 72 having different delays, respectively.

On the other hand, each of the multiple repeaters 8 has a transmission line 7
A pair of demultiplexers (DMUX) 81 and 82 connected to the output side of the terminals 1, 72 and a J1 byte extraction circuit (J1
DROP) 83, 84, static (or elastic) memory 85, 86, selector (SEL)
And 87.

In the hitless switching device described above, the J1 byte in the POH (path overhead) input from the opposite device 5a connected to the end point # 1 to the multiplex relay device 6 is used. This J1 byte is 0 to 0 as shown in FIG.
This is a 63-byte multi-frame structure of 64 bytes. That is, the ALL "1" area of 0 to 61 and fixed patterns CR (Carriage Return) and LF, respectively.
62 and 63 regions having (Line Feed).

Using 2 bytes for every 64 multiframes,
After inserting a fixed pattern into this pattern, data redundancy is provided, and a transmission path for the active system and a protection system is passed between the multiplex relay devices 6 and 8. During this time, the transmission lines 71 and 72 cause different delay amounts (DLY # 1, DLY #) for the active system and the standby system.
2) is added. As a result, they reach the demultiplexers 81 and 82 of the multiplex relay device 8 with different phase differences.

Next, after demultiplexing by the demultiplexers 81 and 82 of the multi-repeater 8, the J1 byte extracting circuit 8 is separated.
The location of the fixed pattern of J1 is searched at 3 and 84, and the multiframe phase of the other system is compared with the own system multiframe as a reference. The selector 87 applies the data written in the static memories 85 and 86 with a phase difference.
To eliminate the phase difference at the position of the selector 87,
It achieves non-instantaneous switching between the active system and the standby system.

[0008]

In the phase adjustment method of the conventional hitless switching device described above, a fixed pattern is inserted in 2 bytes of the J1 byte and ALL "1" is inserted in the other J1 bytes. Therefore, data transmission using the J1 byte cannot be performed between the terminal stations.

Further, in the conventional phase adjustment method of the hitless switching device, since the last 2 bytes of the J1 byte for 64 multi-frames are used for the synchronization pattern, other J1 bytes are also fixed to ALL "1". Therefore, the bytes available to the user in data transmission are wasted.

Therefore, an object of the present invention is to solve the above problems, the J1 byte for inserting a synchronization pattern for phase adjustment can also be used as a user data channel, and the J1 byte can be used for switching without interruption. It is an object of the present invention to provide a data transmission system capable of performing phase matching, a multiple repeater, and a phase matching method used for them.

[0011]

In the data transmission system according to the present invention, a frame signal is generated and transmitted, and the J1 byte of the input signal is used to generate two redundant signals without interruption. A data transmission system including a multi-repeater having a non-interruption switching function for switching between the two, wherein the multi-repeater has means for performing multi-frame synchronization for phase matching using a fixed byte.

Another data transmission system according to the present invention is
What is claimed is: 1. A data transmission system including a first and a second multiplex relay device connected to each other by two different transmission lines, comprising:
Inserting means for inserting data in bytes, encoding means for encoding the data in which the J1 bytes are inserted, adding means for adding a synchronization pattern for phase adjustment to the encoded J1 multi-frame, and the J1 multi The first multiplex relay device is provided with a pair of multiplexing means for multiplexing frames, means for demultiplexing the signals of the two transmission lines, and retrieval of the synchronization pattern from the demultiplexed signals. The second multiplex relay apparatus is provided with means, memory for storing the demultiplexed signal, and means for decoding the J1 byte encoded from the signal read from the memory.

The multiplex repeater according to the present invention generates and transmits a frame signal, and uses the J1 byte of the input signal to switch two signals having a redundant configuration without interruption. A multi-repeater having a disconnection switching function, comprising means for performing multi-frame synchronization for phase adjustment using a fixed byte.

The phase matching method according to the present invention uses the J1 byte of the signal input to the multiplex repeater that generates and transmits a frame signal to switch between two redundant signals without interruption. This is a phase alignment method used when performing, and multiframe synchronization for phase alignment is performed using fixed bytes.

That is, the first phase matching method of the present invention is an NNI (Network Node Interf).
ace) In a multiple repeater with a non-interruptive switching function for generating and transmitting a frame signal and switching two signals having a redundant configuration by using the J1 byte of the input signal without instantaneous interruption, The feature is that multi-frame synchronization for phase matching is performed using a fixed byte.

The second phase matching method of the present invention is NNI.
A fixed value CR (Carri) is applied to the J1 multiframe input to the multiplex relay device that generates and transmits a frame signal.
age Return), LF (Line Feed)
The feature is that it has a function of encoding and decoding that does not generate the same pattern as.

The third phase matching method of the present invention is characterized in that the lead phase or the lag phase of the signals of the active system and the standby system of the redundant configuration are judged by the synchronization pattern inserted in the encoded J1 byte. .

The fourth phase matching method of the present invention uses, as a fixed byte, the last two bytes added to the multi-frame encoded so that the same pattern as the fixed values CR and LF does not occur in the J1 multi-frame. It is characterized by that.

A fifth phase matching method of the present invention has first and second multiplex relay devices connected to each other through two different transmission lines, and the first multiplex relay device has data of J1 bytes. J1 data insertion part (J1 DATA I
NS) and a J1 encoder (J1) that encodes the data.
CPT), a J1 byte insertion unit (J1 INS) that adds a synchronization pattern for phase matching to the encoded J1 multiframe after encoding, and a pair of multiplexer units (MUX) that multiplexes the data. And a demultiplexer unit (DMUX) for demultiplexing signals on two transmission lines, and a J1 byte extraction unit (J1 DROP) for searching a synchronization pattern in the second multiplex relay device.
And a memory for storing signals and a J1 decoding unit (J1 EXP) for decoding the encoded J1 byte.

According to the present invention, which has the above-described structure and operates as described above, not only is the J1 byte used for inserting the phase-matching synchronization pattern for non-instantaneous interruption switching, but also as a data channel. The data of J1 can be transmitted, and efficient data transmission can be realized.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a data transmission system applied to a phase alignment method of a multiple repeater with a hitless switching function according to an embodiment of the present invention. In FIG. 1, this transmission system is shown in FIG.
a and 1b are respectively connected to the end points # 1 and # 2, and the multi-repeater devices 2 and 4 are connected between the both end points # 1 and # 2.

The multiplex relay device 2 inserts a user data into the J1 byte by a J1 data insertion section (J1 DATA IN).
S) 21 and a J1 encoding unit (J1) for encoding the inserted user data into about 64 frames to 62 frames.
CPT) 22 and J1 encoded in about 62 frames
J1 byte insertion part (J1IN
S) 23 and a pair of multiplexer units (MUX) 24,
And 25.

The multiplex relay device 4 includes a pair of demultiplexers (DMUX) 41 and 42 and a J1 byte extractor (J1).
DROP) 43 and 44, static (or elastic) memories 45 and 46 connected to the output sides of the demultiplexer units 41 and 42, and outputs of both static memories 45 and 46, and end point # 2 is selected. Selector (SEL) 47 for outputting to the opposite device 1b via the
And a J1 decoding unit (J1EXP) that decodes the J1 bytes encoded in about 62 frames in the latter stage of the selector 47.
And 48.

Here, different delay amounts (DLY # 1, DLY) are provided between the output sides of the multiplexer units 24 and 25 of the multiplex relay device 2 and the input sides of the demultiplexer units 41 and 42 of the multiplex relay device 4, respectively. Transmission line 3 having # 2)
1, 32 are connected.

FIG. 2 is a diagram showing the structure of a J1 multiframe in one embodiment of the present invention. In FIG. 2, a J1 multi-frame according to an embodiment of the present invention has a 64-byte multi-frame structure of 0 to 63, a region of compressed user data J1 of 0 to 61, and a fixed pattern CR (Carriage Return). , LF
62 and 63 regions having (Line Feed).

In the present embodiment, the J1 byte in the POH (path overhead) of the data input from the opposite device 1a connected to the end point # 1 to the multiplex relay device 2 is used. The J1 data insertion unit 21 of the multiplex device 2 inserts data into the J1 byte as a user data channel. In the J1 encoding unit 22 in the next stage, the J1 data insertion unit 21
Then, the J1 multiframe in which the data is inserted in the J1 byte is encoded from 64 bytes to about 62 bytes.

Next, the J1 byte insertion unit 23 adds a sync frame pattern for switching without interruption to the end of the J1 multi-frame coded by the J1 coding unit 22 to about 62 bytes.

After this fixed pattern for synchronization is added to 2 bytes for every 64 multi-frames, a redundant configuration is made in the multiplex relay device 2 so as to provide data redundancy, and then the multiplexer units 24 and 25 use the J1 multi-frame. Frames are multiplexed, and transmission lines 31 and 32 of the active system and the standby system, which are different from each other
Pass through.

During this time, the transmission lines 31 and 32 cause different delay amounts (DLY # 1, DLY #) in the active system and the standby system.
2) is added. As a result, they reach the demultiplexers 41 and 42 of the multiplex relay device 4 with different phase differences.

Demultiplexer section 4 of multiplex relay device 4
1, 42 separates the signals, and J1 byte extraction units 43, 4
4 and the signal is written in the static memories 45 and 56. J1 byte extraction unit 43, 4
At 4, the position of the fixed pattern for J1 synchronization is searched, the signal phases of the active system and the standby system are detected, and the multiframe phase comparison of the other system side is performed with reference to the multiframe of the own system side.

The data written in the static memories 45 and 46 are read with a difference in phase difference. That is, the read phases from the static memories 45 and 46 are determined so as to have a difference in phase difference, and the data written in the static memories 45 and 46 are read at this timing.

At this point, that is, at the input side of the selector 47, the phase difference from both the active system and the standby system becomes 0 (there is a phase), and the selector 47 at the subsequent stage selects the active system and the standby system. By doing so, non-instantaneous switching can be realized.

Thereafter, the J1 decoding unit 48 decodes the J1 data coded by the J1 coding unit 22 of the multiplex relay device 2 and sends it to the opposite device 1b, so that the J1 byte as user data is transmitted. Has realized.

The coding in the J1 coding unit 22 will be described with an example. The most frequent code is represented by 1 bit, and all other symbols are represented by 9 bits.
(1 bit representing uncoded symbol added to 8 bit data) +10 bits including CR and LF determination bits are output.

At the time of decoding, 1 bit is acquired to check whether it is an uncoded symbol. If this is a decoded symbol, 1 byte of the most frequent code is output, and if it is an uncoded symbol, 9 bits are read. , And CR, LF
CR and LF judgments are made according to the judgment bit. This CR,
Even if the code having the same pattern as the fixed values CR and LF is generated by the compression by the LF determination bit, the pseudo synchronization can be avoided.

As described above, in the present embodiment, not only the J1 byte is used for inserting the phase matching synchronization pattern for switching without interruption, but also the data of J1 can be transmitted as a data channel, which is efficient. Data transmission can be realized. Therefore, in the present embodiment, the J1 byte for inserting the synchronization pattern for phase adjustment can also be used as the user's data channel, and the J1 byte can be used for phase adjustment for non-instantaneous interruption switching.

[0037]

As described above, the present invention uses the J1 byte of the signal input to the multiplex repeater that generates and transmits a frame signal, and instantaneously disconnects two redundant signals. By performing multi-frame synchronization for phase adjustment using a fixed byte when switching is performed with J, the J1 byte for inserting the synchronization pattern for phase adjustment can also be used as a user data channel, and J
It is possible to obtain the effect that the phase adjustment for switching without interruption can be performed with 1 byte.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a data transmission system applied to a phase alignment method of a multiple repeater with a hitless switching function according to an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a J1 multiframe according to an embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional data transmission system.

FIG. 4 is a diagram showing a configuration of a conventional J1 multiframe.

[Explanation of symbols]

1a, 1b Opposite device 2, 4 Multiplex relay device 21 J1 data insertion unit 22 J1 encoding unit 23 J1 byte insertion unit 24, 25 Multiplexer unit 31, 32 Transmission line 41, 42 Demultiplexer unit 43, 44 J1 byte extraction unit 45 , 46 static (or elastic) memory 47 selector 48 J1 decoding unit

Claims (11)

[Claims] 1. A frame signal is generated and transmitted, and a redundant structure is formed by using the J1 byte of the input signal.
A data transmission system including a multi-repeater having a non-interruption switching function for switching two signals without non-interruption,
A data transmission system characterized in that the multi-repeater has means for performing multi-frame synchronization for phase matching using fixed bytes. 2. The multi-repeater includes means for encoding and decoding a J1 multi-frame input to the multi-repeater so that the same pattern as the fixed pattern forming the J1 multi-frame does not occur. The data transmission system according to claim 1, wherein: 3. A method of connecting either of the multiple repeaters and determining either the lead phase or the lag phase of a signal in a working system and a backup system having a redundant configuration by a synchronization pattern inserted in an encoded J1 byte. Claim 2 characterized by the above-mentioned.
The described data transmission system. 4. The fixed byte uses the last 2 bytes added to a multi-frame encoded so that the same pattern as the fixed pattern does not occur in the J1 multi-frame. Claim 3
The described data transmission system. 5. A data transmission system including first and second multiplex relay devices connected to each other by two different transmission paths, wherein an inserting means for inserting data into a J1 byte and the J1 byte are inserted. Encoding means for encoding the encoded data; addition means for adding a synchronization pattern for phase adjustment to the encoded J1 multiframe; and a pair of multiplexing means for multiplexing the J1 multiframe. And a means for demultiplexing the signals of the two transmission lines, a means for searching the synchronization pattern from the demultiplexed signals, and a memory for storing the demultiplexed signals. And a means for decoding the J1 byte encoded from the signal read from the memory, in the second multiplex relay device. 6. A frame signal is generated and transmitted, and a redundant configuration is taken by using the J1 byte of the input signal.
A multi-repeater having a non-interruption switching function for switching two signals without interruption, wherein the multi-repeater has means for performing multi-frame synchronization for phase adjustment using a fixed byte. apparatus. 7. The method according to claim 6, further comprising means for encoding and decoding the inputted J1 multi-frame so that the same pattern as the fixed pattern constituting the J1 multi-frame does not occur. Multiple repeater. 8. A phase used when switching two signals having a redundant configuration without interruption using the J1 byte of the signal input to the multiplex relay device for generating and transmitting a frame signal. A phase matching method characterized by performing multi-frame synchronization for phase matching using a fixed byte. 9. The J1 multiframe input to the multiplex relay device is encoded and decoded so that the same pattern as the fixed pattern forming the J1 multiframe does not occur. The described phase adjustment method. 10. The phase according to claim 9, wherein either the lead phase or the lag phase of the signals in the active system and the standby system of the redundant configuration is judged by the synchronization pattern inserted in the encoded J1 byte. Matching method. 11. The fixed byte uses the last 2 bytes added to a multi-frame encoded so that the same pattern as the fixed pattern does not occur in the J1 multi-frame. The phase matching method according to claim 10.