JP2003264159A5 - - Google Patents
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- Publication number
- JP2003264159A5 JP2003264159A5 JP2002065969A JP2002065969A JP2003264159A5 JP 2003264159 A5 JP2003264159 A5 JP 2003264159A5 JP 2002065969 A JP2002065969 A JP 2002065969A JP 2002065969 A JP2002065969 A JP 2002065969A JP 2003264159 A5 JP2003264159 A5 JP 2003264159A5
- Authority
- JP
- Japan
- Prior art keywords
- catalyst
- wiring material
- wiring
- electroless plating
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Claims (10)
前記配線材料と非固溶で、該配線材料と合金化しても電気抵抗率が上がらない金属触媒で触媒処理を行うことを特徴とする触媒処理方法。Prior to forming a plating film by electroless plating on at least a part of a semiconductor device having an embedded wiring structure,
A catalyst treatment method comprising performing a catalyst treatment with a metal catalyst that is insoluble in the wiring material and does not increase in electrical resistivity even when alloyed with the wiring material.
前記配線材料と非固溶で、該配線材料と合金化しても電気抵抗率が上がらない金属の金属イオンを含むことを特徴とする触媒処理液。Prior to forming a plating film by electroless plating on at least a part of a semiconductor device having an embedded wiring structure, a catalyst treatment liquid used for applying a catalyst for electroless plating,
A catalyst treatment liquid comprising a metal ion which is insoluble in the wiring material and does not increase in electrical resistivity even when alloyed with the wiring material.
前記配線材料と非固溶で、該配線材料と合金化しても電気抵抗率が上がらない金属触媒で触媒処理を行い、この触媒処理後の基板表面に無電解めっきを施したことを特徴とする半導体装置。Prior to embedding the wiring material in the recess by forming a plating film by electroless plating on the surface of the substrate provided with fine recesses for wiring,
A catalyst treatment is performed with a metal catalyst that is non-solid solution with the wiring material and does not increase in electrical resistivity even when alloyed with the wiring material, and electroless plating is applied to the substrate surface after the catalyst treatment. Semiconductor device.
前記配線材料と非固溶で、該配線材料と合金化しても電気抵抗率が上がらない金属触媒で触媒処理を行い、この触媒処理後の基板表面に無電解めっきを施して前記保護膜を形成したことを特徴とする半導体装置。Prior to selectively forming a protective film made of a plating film by electroless plating on at least a part of the exposed surface of a semiconductor device having a buried wiring structure,
A catalytic treatment is performed with a metal catalyst that is non-solid solution with the wiring material and does not increase in electrical resistivity even when alloyed with the wiring material, and electroless plating is performed on the surface of the substrate after the catalyst treatment to form the protective film A semiconductor device characterized by that.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002065969A JP2003264159A (en) | 2002-03-11 | 2002-03-11 | Catalyst treatment method and catalyst treatment solution |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002065969A JP2003264159A (en) | 2002-03-11 | 2002-03-11 | Catalyst treatment method and catalyst treatment solution |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003264159A JP2003264159A (en) | 2003-09-19 |
| JP2003264159A5 true JP2003264159A5 (en) | 2005-07-14 |
Family
ID=29198018
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002065969A Pending JP2003264159A (en) | 2002-03-11 | 2002-03-11 | Catalyst treatment method and catalyst treatment solution |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003264159A (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005206905A (en) * | 2004-01-23 | 2005-08-04 | Ebara Corp | Substrate treatment method and device, and treatment liquid |
| KR100578976B1 (en) | 2004-10-15 | 2006-05-12 | 삼성에스디아이 주식회사 | Multilayer having an excellent adhesion and a methof for fabricating method the same |
| JP2006302972A (en) * | 2005-04-15 | 2006-11-02 | Alps Electric Co Ltd | Wiring board and manufacturing method thereof |
| CN101466869A (en) * | 2006-06-16 | 2009-06-24 | 乔治洛德方法研究和开发液化空气有限公司 | Electroless plating NiP adhering and/or covering layer for copper wiring layer |
| US20080226826A1 (en) * | 2006-06-26 | 2008-09-18 | Tokyo Electon Limited | Substrate Processing Method and Substrate Processing Apparatus |
| FR2982877B1 (en) | 2011-11-18 | 2014-10-03 | Alchimer | MACHINE SUITABLE FOR METALLIZING A CAVITY OF A SEMICONDUCTOR OR CONDUCTIVE SUBSTRATE SUCH AS A VIA-TYPE VIA STRUCTURE |
| JP2013213263A (en) * | 2012-04-03 | 2013-10-17 | Tokyo Electron Ltd | Plating apparatus, plating method, and storage medium |
| JP2013249495A (en) * | 2012-05-30 | 2013-12-12 | Tokyo Electron Ltd | Plating process device, plating process method, and storage medium |
| JP7011388B2 (en) * | 2016-12-28 | 2022-01-26 | エスアイアイ・プリンテック株式会社 | Groove structure plating method |
-
2002
- 2002-03-11 JP JP2002065969A patent/JP2003264159A/en active Pending
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