JP2003249970A - Modulation signal generator and reverse rotated signal generator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a modulation signal generator and a reverse rotated signal generator which can reduce a required memory capacity. <P>SOLUTION: Address generation parts 104 and 105 generate addresses from a symbol parameter outputted from a symbol parameter generation part 102 and a symbol number outputted from a symbol number generation part 103. Modulation pattern storage parts 106 and 107 read out stored modulation patterns on the basis of the generated addresses. A positive/negative inversion decision part 108 outputs the positive/negative decision result of the modulation patterns in accordance with the symbol parameter and the symbol number. A modulation signal generation part 109 generate a modulation signal on the basis of the modulation patterns read out from the modulation pattern storage parts 106 and 107 and the positive/negative decision result of the positive/ negative inversion decision part 108. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to EDGE (Enhanc
3π / 8 rotation 8PSK (Phase Shift Keyi) adopted as a standard for ed Data rates for Global Evolution
ng) modulation signal generator and reverse rotation signal generator.

[0002]

2. Description of the Related Art PSK is a modulation method that changes the phase of a carrier wave in accordance with a transmission signal. The modulation method that rotates 8PSK, which is one of PSKs, by 3π / 8 (3π / 8 rotation 8PSK) is EDGE. Will be adopted as a standard for the next generation GSM mobile phone.

The total number of patterns of the modulation signal of 3π / 8 rotation 8PSK is shown in FIG. 20 with eight symbol patterns of transmission symbols (transmission data in 3-bit units) based on the symbol parameter generation table shown in FIG. 3π / 8
The symbol mapping position by the phase rotation of is calculated from 16 patterns and two types of in-phase components and quadrature components, and is 8 × 16 × 2 = 256 patterns. Therefore, 1
When the modulation signal is stored in one word, a 256-word memory is required to store the entire pattern of the modulation signal.

Next, when demodulating a modulation signal of 3π / 8 rotation 8PSK, it is necessary to apply a reverse rotation signal of the phase rotation applied at the time of modulation to the received signal. The total number of patterns of the reverse rotation signal is calculated from 16 patterns of the symbol mapping positions by the phase reverse rotation of 3π / 8 shown in FIG. 20 and two ways of the cosine component and the sine component, and is 16 × 2.
= 32 patterns. Therefore, if one reverse rotation signal is stored in one word, a memory of 32 words is required to store all patterns of the reverse rotation signal.

Therefore, in the conventional modulation signal generator, a 256-word memory is required to generate the modulation signal. Further, in the conventional reverse rotation signal generation device, a 32 word memory is required to generate the reverse rotation signal.

[0006]

However, the conventional modulation signal generator and reverse rotation signal generator have a memory capacity because they store signals of all patterns necessary for calculation when generating the modulation signal and the reverse rotation signal. There is a problem that the number of devices increases, which hinders miniaturization of the device.

The present invention has been made in view of the above points, and an object of the present invention is to provide a modulation signal generation device and a reverse rotation signal generation device which can reduce a required memory amount.

[0008]

A modulated signal generation apparatus of the present invention comprises a storage means for storing a modulation pattern selected from modulated signals of all patterns for a transmission symbol based on a predetermined regularity, and a bit of the transmission symbol. Symbol parameter generating means for generating a symbol parameter from a pattern, symbol number generating means for counting transmitted symbols to generate a symbol number, symbol parameters generated by the symbol parameter generating means and the symbol number generating means. Address generating means for generating an address of the modulation pattern stored in the storage means based on the symbol number, the symbol parameter generated by the symbol parameter generating means, and the symbol number generated by the symbol number generating means. Based on the determination means for determining whether the modulation pattern stored in the storage means is inverted, and the modulation pattern read from the storage means in association with the address generated by the address generation means, and Modulation signal generating means for generating a modulated signal of a transmission symbol based on the determination result of the determining means.

According to this structure, only the modulation pattern selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity is stored, the address is generated using the symbol parameter and the symbol number, Since a modulation signal is generated by performing positive / negative inversion according to the symbol parameter and the symbol number on the modulation pattern read in association with the generated address, it is possible to reduce the required memory amount. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the modulation signal generating apparatus of the present invention having the above-mentioned configuration, the storage means stores the modulation pattern for the in-phase component selected based on a predetermined regularity from the modulation signals of all the patterns for the transmission symbols. 1 storage means,
Second storage means for storing a modulation pattern for orthogonal components selected from modulation signals of all patterns for transmission symbols based on a predetermined regularity, wherein the address generation means is generated by the symbol parameter generation means. First address generation means for generating an address of the modulation pattern for the in-phase component stored in the first storage means based on the generated symbol parameter and the symbol number generated by the symbol number generation means, and the symbol parameter. Second address generation means for generating an address of the modulation pattern for the quadrature component stored in the second storage means, based on the symbol parameter generated by the generation means and the symbol number generated by the symbol number generation means. And the determination means includes the symbol parameter. Based on the generated symbol number by the symbol parameters and the symbol number generation unit generated by the generating means, the modulation pattern and the second for the in-phase component stored in said first storage means
The presence or absence of positive / negative inversion of the quadrature component modulation pattern stored in the storage means is determined, and the modulation signal generation means reads from the first storage means in association with the address generated by the first address generation means. The obtained modulation pattern for the in-phase component, the modulation pattern for the quadrature component read from the second storage means in association with the address generated by the second address generation means, and the determination result of the determination means Based on this, a configuration is adopted in which a modulated signal of transmission symbols is generated.

According to this configuration, the modulation patterns for the in-phase component and the quadrature component selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity are stored for each component, and the symbol parameter and the symbol are stored. Numbers are used to generate the modulation pattern addresses for the in-phase component and quadrature component, and the positive / negative sign corresponding to the symbol parameter and the symbol number for the modulation pattern for the in-phase component and quadrature component read corresponding to the generated address Since the modulation signal is generated by performing the inversion, the required memory amount can be reduced. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the modulated signal generating device of the present invention, in the above configuration, the address generating means is based on the symbol parameter generated by the symbol parameter generating means and the symbol number generated by the symbol number generating means. First address generation means for generating an address of a modulation pattern to be used for the in-phase component among the modulation patterns stored in the storage means, the symbol parameter generated by the symbol parameter generation means, and the symbol number generated by the symbol number generation means. A second address generating means for generating an address of a modulation pattern for an orthogonal component among the modulation patterns stored in the storing means based on a symbol number, and the determining means is configured to use the symbol parameter generating means. Generated symbol pad On the basis of the symbol number generated by the meter and the symbol number generation means, it is determined whether the modulation pattern stored in the storage means for the in-phase component and the quadrature component is inverted, and the modulation signal generation means , A modulation pattern for the in-phase component read from the storage means in association with the address generated by the first address generation means, and associated with an address generated by the second address generation means from the storage means Modulation pattern for the read quadrature component,
And, the modulation signal of the transmission symbol is generated based on the judgment result of the judgment means.

According to this structure, the modulation pattern selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity is stored, and for the in-phase component and the quadrature component using the symbol parameter and the symbol number. Generate a modulation pattern address for each of the modulation patterns to be generated, and perform positive / negative inversion according to the symbol parameter and symbol number for the modulation pattern to be used for the in-phase component and quadrature component read in association with the generated address to generate the modulation signal. Therefore, the required memory amount can be reduced.
Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the modulation signal generating apparatus of the present invention, in the above configuration, each modulation pattern stored in the storage means is
A configuration is adopted in which modulation patterns for the in-phase component and for the quadrature component selected from the modulation signals of all patterns based on a predetermined regularity are combined.

According to this structure, each stored modulation pattern is formed by combining the modulation patterns for the in-phase component and the quadrature component selected from the modulation signals of all the patterns based on the predetermined regularity. Therefore, the required memory amount can be further reduced.

The mobile station apparatus of the present invention has a configuration having any one of the above-mentioned modulated signal generation apparatuses.

According to this structure, it is possible to provide a mobile station apparatus having the same effects as the above.

The base station apparatus of the present invention has a configuration having any one of the above-described modulated signal generation apparatuses.

With this configuration, it is possible to provide a base station device having the same effects as the above.

The modulated signal generation method of the present invention comprises a symbol parameter generation step of generating symbol parameters from a bit pattern of transmission symbols, a symbol number generation step of counting transmission symbols to generate a symbol number, and the symbol parameter generation. Based on the symbol parameter generated in the step and the symbol number generated in the symbol number generation step, the modulation pattern selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity is stored in the storage means. An address generation step of generating an address of the modulation pattern, a symbol parameter generated in the symbol parameter generation step, and a symbol number generated in the symbol number generation step are stored in the storage means. Based on the determination step of determining whether the modulation pattern is positive or negative inversion, the modulation pattern read from the storage means in association with the address generated in the address generation step, and the determination result in the determination step, modulation of the transmission symbol is performed. And a modulation signal generating step of generating a signal.

According to this method, only the modulation pattern selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity is stored, the address is generated using the symbol parameter and the symbol number, Since a modulation signal is generated by performing positive / negative inversion according to the symbol parameter and the symbol number on the modulation pattern read in association with the generated address, it is possible to reduce the required memory amount. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

The reverse rotation signal generating apparatus of the present invention includes a storage means for storing a reverse rotation pattern selected from the reverse rotation signals of all patterns for the received symbol based on a predetermined regularity, and a symbol for counting received symbols by counting the received symbols. Symbol number generation means for generating a number, address generation means for generating an address of the reverse rotation pattern stored in the storage means based on the symbol number generated by the symbol number generation means, and the symbol number generation means Determination means for determining whether or not the reverse rotation pattern stored in the storage means is inverted based on the symbol number generated by the storage means, and read from the storage means in association with the address generated by the address generation means. The received symbol is based on the reverse rotation pattern issued and the determination result of the determination means. A configuration that includes a reverse rotation signal generating means for generating a reverse rotation signal.

According to this structure, only the reverse rotation pattern selected from the reverse rotation signals of all the patterns for the received symbol based on the predetermined regularity is stored, and the address is generated by using the symbol number. Since a reverse rotation signal is generated by performing positive / negative inversion according to the symbol number on the reverse rotation pattern read in association with the address, the required memory amount can be reduced. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the inverse rotation signal generating device of the present invention, in the above configuration, the storage means stores the inverse rotation pattern for the cosine component selected based on a predetermined regularity from the inverse rotation signals of all patterns for the received symbol. The first addressing means for storing, and the second addressing means for storing the inverse rotation pattern for the sine component selected based on a predetermined regularity from the inverse rotation signals of all patterns for the received symbol, and the address generation Means for generating an address of the reverse rotation pattern for the cosine component stored in the first storage means based on the symbol number generated by the symbol number generation means; and the symbol number generation. Generating an address of the reverse rotation pattern for the sine component stored in the second storage means, based on the symbol number generated by the means. And a second address generating means that,
The determining means, based on the symbol number generated by the symbol number generating means, the reverse rotation pattern for the cosine component stored in the first storage means and the second rotation pattern.
The presence / absence of positive / negative inversion of the reverse rotation pattern for the sine component stored in the storage means is determined, and the reverse rotation signal generation means is associated with the address generated by the first address generation means from the first storage means. Reverse rotation pattern for the cosine component read out, the reverse rotation pattern for the sine component read out from the second storage means in association with the address generated by the second address generation means, and the determination means. On the basis of the result of the determination, the reverse rotation signal of the received symbol is generated.

According to this structure, the reverse rotation pattern for the cosine component and the sine component selected based on a predetermined regularity from the reverse rotation signals of all patterns for the received symbol is stored for each component, and the symbol number is stored. Generate the address of the reverse rotation pattern for the cosine component and the sine component respectively using, and perform positive / negative inversion according to the symbol number for the reverse rotation pattern for the cosine component and the sine component read in association with the generated address. Since the reverse rotation signal is generated by performing the operation, the required memory amount can be reduced. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the reverse rotation signal generating device of the present invention, in the above structure, the address generating means is based on the symbol number generated by the symbol number generating means,
Based on the symbol number generated by the first address generating means for generating the address of the reverse rotation pattern for the cosine component of the reverse rotation pattern stored in the storage means, and the symbol number generated by the symbol number generation means. Second address generating means for generating the address of the reverse rotation pattern for the sine component of the modulation pattern stored in the, and the determining means based on the symbol number generated by the symbol number generating means. Determining whether or not the reverse rotation pattern for the cosine component and the sine component stored in the storage means is inverted, and the reverse rotation signal generation means is generated from the storage means by the first address generation means. The reverse rotation pattern for the cosine component read out in association with the address, the second address generator from the storage means. Reverse rotation pattern for sinusoidal components read in association with the generated address by,
And a configuration in which an inverse rotation signal of the received symbol is generated based on the determination result of the determination means.

According to this structure, the reverse rotation pattern selected from the reverse rotation signals of all the patterns for the received symbol based on the predetermined regularity is stored, and the symbol number is used for the cosine component and the sine component. The respective addresses of the reverse rotation patterns to be generated are generated, and the positive / negative inversion according to the symbol number is performed on the reverse rotation patterns for the cosine component and the sine component read corresponding to the generated addresses to generate the reverse rotation signal. Therefore, the required memory amount can be reduced. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

In the reverse rotation signal generating device of the present invention, in the above configuration, each reverse rotation pattern stored in the storage means is for a cosine component selected from the reverse rotation signals of all patterns based on a predetermined regularity. And a reverse rotation pattern for the sine component are combined.

According to this structure, each of the stored reverse rotation patterns is formed by combining the reverse rotation patterns for the cosine component and the sine component selected from the reverse rotation signals of all the patterns based on a predetermined regularity. Therefore, the required memory amount can be further reduced.

The mobile station apparatus of the present invention has a configuration including any one of the above-described reverse rotation signal generation apparatuses.

With this configuration, it is possible to provide a mobile station apparatus having the same effects as the above.

The base station apparatus of the present invention has a configuration including the reverse rotation signal generation apparatus described in any of the above.

With this configuration, it is possible to provide a base station device having the same effects as the above.

The reverse rotation signal generation method of the present invention is a symbol number generation step of counting received symbols to generate a symbol number, and based on the symbol number generated in the symbol number generation step, all patterns for the received symbols are generated. An address generation step of generating an address of the reverse rotation pattern stored in the storage means for storing the reverse rotation pattern selected from the reverse rotation signal based on a predetermined regularity, and a symbol number generated in the symbol number generation step. A determination step for determining whether or not the reverse rotation pattern stored in the storage means is inverted, and a reverse rotation pattern read from the storage means in association with the address generated in the address generation step, and the determination step. The reverse rotation signal of the received symbol based on the judgment result in A reverse rotation signal generating step of generating, and so comprises a.

According to this method, only the reverse rotation pattern selected based on the predetermined regularity from the reverse rotation signals of all patterns for the received symbol is stored, the address is generated using the symbol number, and the generated address is generated. Since a reverse rotation signal is generated by performing positive / negative inversion according to the symbol number on the reverse rotation pattern read in association with the address, the required memory amount can be reduced. Further, when it is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale can be reduced.

[0036]

BEST MODE FOR CARRYING OUT THE INVENTION The first gist of the present invention is to store only a modulation pattern selected from modulation signals of all patterns for transmission symbols based on a predetermined regularity,
An address is generated using the symbol parameter and the symbol number, and a modulation signal is generated by performing positive / negative inversion according to the symbol parameter and the symbol number on the modulation pattern read in association with the generated address. To reduce the amount of memory.

The second gist of the present invention is to store only the reverse rotation pattern selected from the reverse rotation signals of all patterns for the received symbol based on a predetermined regularity, and generate the address using the symbol number. Then, the reverse rotation signal read out in association with the generated address is subjected to positive / negative inversion according to the symbol number to generate the reverse rotation signal, thereby reducing the required memory amount.

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing the configuration of a modulated signal generating apparatus according to Embodiment 1 of the present invention.

The modulated signal generator 100 shown in FIG. 1 has an input terminal 101, a symbol parameter generator 102,
Symbol number generation unit 103, in-phase component address generation unit 104, quadrature component address generation unit 105, positive / negative inversion determination unit 108, in-phase component modulation pattern storage unit 1
06, a quadrature component modulation pattern storage unit 107, a modulation signal generation unit 109, and output terminals 110 and 111.

The symbol parameter generation unit 102 extracts a transmission symbol from the transmission data input through the input terminal 101, and in accordance with the symbol parameter generation table shown in FIG. 19, obtains the symbol parameter corresponding to the bit string of the transmission symbol as the in-phase component. Address generation unit 104, orthogonal component address generation unit 105, and positive / negative inversion determination unit 108.

The symbol number generation unit 103 uses the input terminal 1
A transmission symbol is extracted from the transmission data input via 01, and the symbol number obtained by counting the transmission symbols is used as the in-phase component address generation unit 104, the quadrature component address generation unit 105, and the positive / negative inversion determination unit 108. Output to and respectively.

The in-phase component address generation unit 104 generates an address based on the input symbol parameter and symbol number, and outputs the generated address to the in-phase component modulation pattern storage unit 106.

The orthogonal component address generation unit 105 generates an address based on the input symbol parameter and symbol number, and outputs the generated address to the orthogonal component modulation pattern storage unit 107.

The in-phase component modulation pattern storage unit 106
The modulation pattern for the in-phase component is stored in correspondence with the address generated based on the symbol parameter and the symbol number, and when the address is input from the in-phase component address generation unit 104, it is stored at the address. The modulation pattern for the in-phase component is output to the modulation signal generation unit 109.

The quadrature component modulation pattern storage unit 107
The orthogonal component modulation pattern is stored corresponding to the address generated based on the symbol parameter and the symbol number, and when the address is input from the orthogonal component address generation unit 105, it is stored at the address. The modulated pattern for the orthogonal component is output to the modulated signal generation unit 109.

2A and 2B show examples of the memory contents in the in-phase component modulation pattern storage unit 106 and the quadrature component modulation pattern storage unit 107, respectively. When storing the modulation patterns for the in-phase component and the quadrature component in the storage units 106 and 107,
Paying attention to the regularity of the modulation signal, in-phase modulation signals (in-phase component and quadrature component) can be generated from each address generated from the symbol parameter and symbol number and the determination result of positive / negative inversion. Modulation patterns for the component and the quadrature component have been selected. In this way, the modulation patterns for the in-phase component and the quadrature component are stored in each storage unit 106,
By storing the data in 107, for example, the required memory amount of 256 words can be stored in 9 words for the in-phase component and
The total amount of words can be reduced to 18 words.

The positive / negative inversion determination unit 108 converts the modulation pattern stored in the in-phase component modulation pattern storage unit 106 and the quadrature component modulation pattern storage unit 107 into a modulation signal based on the symbol parameter and the symbol number. The presence / absence of positive / negative inversion necessary for the above is determined, and the determination result is output to the modulation signal generation unit 109.

The modulation signal generation unit 109 performs positive / negative inversion of the modulation pattern for the in-phase component and the quadrature component based on the determination result of the positive / negative inversion determination unit 108 to generate a modulation signal of the in-phase component and the quadrature component, and generates the modulation signal. The modulated signals of the in-phase component and the quadrature component are output from the output terminals 110 and 111, respectively.

Next, the operation of modulated signal generating apparatus 100 having the above configuration will be described with reference to the flowchart of FIG.

First, in ST1000, the input terminal 101
The bit string of the transmission symbol is input from and output to the symbol parameter generation unit 102 and the symbol number generation unit 103, respectively.

In ST1100, symbol parameter generating section 102 generates the symbol parameters corresponding to the bit string input in ST1000 in in-phase component address generating section 104 and orthogonal component address generating section in accordance with the symbol parameter generation table shown in FIG. It outputs to the unit 105 and the positive / negative inversion determination unit 108, respectively. Also, the symbol number generation unit 103 counts the symbol numbers of the bit string input in ST1000, and the in-phase component address generation unit 104 and the quadrature component address generation unit 105 are counted.
And the positive / negative inversion determination unit 108.

In ST1200, in-phase component address generation section 104 generates an in-phase component address based on the symbol parameter and the symbol number generated in ST1100, and stores the generated address in the in-phase component modulation pattern. It is output to the unit 106. Further, orthogonal component address generation section 105 also generates an orthogonal component address based on the symbol parameter and the symbol number, which are also respectively generated in ST1100, and outputs the generated address to orthogonal component modulation pattern storage section 107. . In addition, in the positive / negative inversion determination unit 108, similarly, ST110
The presence / absence of positive / negative inversion of the modulation pattern is determined based on the symbol parameter and the symbol number generated at 0, and the determination result is output to the modulation signal generation unit 109.

In ST1300, the in-phase component modulation pattern corresponding to the in-phase component address generated in ST1200 is read from the in-phase component modulation pattern storage unit 106, and the read in-phase component modulation pattern is generated as a modulation signal. It is output to the unit 109. The orthogonal component modulation pattern storage unit 107 also reads the orthogonal component modulation pattern corresponding to the orthogonal component address generated in ST1200, and outputs the read orthogonal component modulation pattern to the modulation signal generation unit 109.

Then, in ST1400, the modulation signal generation section 109 inverts the positive and negative sides of each modulation pattern for the in-phase component and the quadrature component read out in ST1300 based on the determination result in the positive / negative inversion determination section 108 in ST1200. Judge whether or not If there is positive / negative inversion as a result of this determination, the process proceeds to ST1500, and if there is no positive / negative inversion, the process proceeds to ST1600 immediately.

In ST1500, modulated signal generation section 109
Then, with respect to the modulation pattern determined to have positive / negative inversion, after inversion of the positive / negative, the process proceeds to ST1600. The positive / negative inversion is not performed for the modulation pattern determined to have no positive / negative inversion.

In ST1600, modulated signal generation section 109
Then, positive / negative inversion processing based on the determination result in ST1200 for each modulation pattern for the in-phase component and the quadrature component read in ST1300 (ST1400, ST1500).
The results of the above are output from the output terminals 110 and 111 as modulation signals of the in-phase component and the quadrature component, respectively.

As described above, according to the present embodiment, the modulation patterns for the in-phase component and the quadrature component selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity are stored for each component. Every other time, the address of the modulation pattern for the in-phase component and the quadrature component is generated using the symbol parameter and the symbol number, and the symbol parameter is set for the read modulation pattern for the in-phase component and the quadrature component in association with the generated address. Since the modulation signal is generated by performing positive / negative inversion according to the symbol number, the required memory amount can be reduced. For example, as described above, the memory amount required for 256 words is 18 in total for 9 words for in-phase components and 9 words for quadrature components
The amount of memory for words can be reduced (see FIG. 2).

Further, when the above configuration is realized by hardware, since the hardware configuration is only for address calculation, it can be realized only by a logical operation of a small number of bits without a code, and the circuit scale is reduced. be able to.

Further, the modulation signal generation device 1 of the present embodiment
00 can, of course, be installed in a mobile station device or base station device. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

(Embodiment 2) FIG. 4 is a block diagram showing the configuration of a modulated signal generating apparatus according to Embodiment 2 of the present invention. The modulation signal generation device 200 has the same basic configuration as the modulation signal generation device 100 shown in FIG. 1, and the same components are designated by the same reference numerals and the description thereof will be omitted.

As shown in FIG. 4, the present embodiment is characterized in that instead of the in-phase component modulation pattern storage section 106 and the quadrature component modulation pattern storage section 107 shown in FIG.
One modulation pattern storage unit 201 is provided. Therefore, the modulation pattern storage unit 201 stores a common modulation pattern for the in-phase component and the quadrature component. For example, an address generated by the in-phase component address generation unit 104a with an offset is used for the quadrature component. Address, and then the common-mode component address generation unit 1
A predetermined modulation pattern is stored corresponding to the address generated in 04a.

The modulation pattern storage unit 201 may store the modulation pattern corresponding to the address generated by the orthogonal component address generation unit 105a.
In this case, the address generated by the quadrature component address generation unit 105a with an offset becomes the in-phase component address.

FIG. 5 shows an example of memory contents in the modulation pattern storage unit 201. When storing the modulation pattern in the storage unit 201, pay attention to the fact that the modulation signal has a certain regularity and that one of the generated addresses can be made the other address by adding an offset. The predetermined modulation pattern is selected so that the modulation signals (in-phase component and quadrature component) of all patterns can be generated from the address generated from the symbol parameter and the symbol number, and the determination result of the presence / absence of positive / negative inversion. In this way, by storing the modulation pattern common to the in-phase component and the quadrature component in one storage unit 201,
For example, the amount of memory required for 256 words can be reduced to 12 words.

Next, the operation of modulated signal generating apparatus 200 having the above configuration will be described with reference to the flowchart of FIG. Note that here, the modulation pattern storage unit 2
The case where the modulation pattern is stored in 01 in correspondence with the address generated by the in-phase component address generation unit 104a will be described.
The same operation is performed when the modulation pattern is stored corresponding to the address generated in 5a.

In the present embodiment, as shown in FIG.
Insert T1310 into the flowchart shown in FIG.
1300 has been deleted.

Since ST1000 to ST1200 are the same as the steps of the flowchart shown in FIG. 3, the description thereof will be omitted. However, in the present embodiment, ST12
At 00, the address generated by the orthogonal component address generation unit 105a is the address generated by the in-phase component address generation unit 104a with an offset. In ST1200, the address generated by the in-phase component address generation unit 104a and the address generated by the quadrature component address generation unit 105a are also output to the modulation pattern storage unit 201.

Then, in ST1310, the modulation pattern for the in-phase component corresponding to the in-phase component address generated in ST1200 is read from the modulation pattern storage unit 201, and the read modulation pattern is modulated as the in-phase component modulation pattern. The signal is output to the signal generation unit 109. Also, from the same modulation pattern storage unit 201, ST1
The modulation pattern for the quadrature component corresponding to the quadrature component address generated in 200 is read, and the read modulation pattern is output to the modulation signal generation unit 109 as the modulation pattern for the quadrature component.

Since ST1400 to ST1600 are the same as the steps of the flowchart shown in FIG. 3, the description thereof will be omitted.

As described above, according to the present embodiment, the modulation pattern selected based on the predetermined regularity from the modulation signals of all patterns for the transmission symbol is stored,
The address of the modulation pattern for the in-phase component and the quadrature component is generated using the symbol parameter and the symbol number, respectively, and the symbol parameter for the modulation pattern for the in-phase component and the quadrature component read corresponding to the generated address Since the modulation signal is generated by performing positive / negative inversion according to the symbol number, the required memory amount can be reduced. For example, as described above, the memory amount required for 256 words can be reduced to a memory amount of 12 words (see FIG. 5), and the memory amount of 6 words can be further reduced as compared with the case of the first embodiment. You can

Further, when the above configuration is realized by hardware, the hardware configuration is only for address calculation, so that it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale is reduced. be able to.

Further, the modulation signal generator 2 of the present embodiment
00 can, of course, be installed in a mobile station device or base station device. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

(Third Embodiment) FIG. 7 is a block diagram showing the configuration of a modulated signal generating apparatus according to the third embodiment of the present invention. Note that this modulation signal generation device 300 has the same basic configuration as the modulation signal generation device 100 shown in FIG. 1, and the same components will be assigned the same reference numerals and explanations thereof will be omitted.

As shown in FIG. 7, the feature of this embodiment is that the in-phase component address generation unit 104, the quadrature component address generation unit 105, the in-phase component modulation pattern storage unit 106, and the quadrature component shown in FIG. Modulation pattern storage unit 1
Instead of 07, one address generation unit 301 and one modulation pattern storage unit 302 are provided.

Here, the address generator 301 determines, based on the input symbol parameter and symbol number.
Generate one address common to in-phase component and quadrature component,
Output to the modulation pattern storage unit 302. Further, the modulation pattern storage unit 302 stores the modulation patterns for the in-phase component and the quadrature component corresponding to the addresses common to the in-phase component and the quadrature component generated by the address generation unit 301. For example, when the total bit width of the modulation patterns stored in the modulation pattern storage unit 302 is 16 bits, the modulation pattern for the in-phase component is stored in the upper 8 bits and the modulation pattern for the quadrature component is stored in the lower 8 bits. ing. Note that the upper and lower bits may be assigned in reverse.

FIG. 8 shows an example of memory contents in the modulation pattern storage unit 302. When storing the modulation patterns for the in-phase component and the quadrature component in the storage unit 302, the modulation signal has a certain regularity, and the modulation pattern for each component is combined under a common address to obtain the upper bits. Paying attention to the fact that it can be assigned to the lower bits, a single common address generated from a symbol parameter and a symbol number, and a modulation signal (in-phase component and quadrature component) of all patterns is generated from the determination result of positive / negative inversion. A combination of modulation patterns for the in-phase component and the quadrature component is selected so that they can be. By thus combining the modulation patterns for the in-phase component and the quadrature component and storing them under one address, for example, the memory amount required for 256 words can be reduced to the memory amount of 9 words.

Next, the operation of modulation signal generating apparatus 300 having the above configuration will be described with reference to the flowchart in FIG.

In the present embodiment, as shown in FIG.
T1210 and ST1320 are inserted in the flowchart shown in FIG. 3, and ST1200 and ST1300 are deleted. In the present embodiment, in ST1210 of FIG. 9, predetermined processing is performed without separating the in-phase component and the quadrature component.

ST1000 and ST1100 are shown in FIG.
Since it is similar to each step of the flowchart shown in,
The description is omitted. However, in the present embodiment, the symbol parameter generated by the symbol parameter generation unit 102 and the symbol number generated by the symbol number generation unit 103 are output to both the address generation unit 301 and the positive / negative inversion determination unit 108, respectively. It

In ST1210, address generation section 301 generates one address common to the in-phase component and the quadrature component based on the symbol parameter and the symbol number generated in ST1100, and stores the generated address in the modulation pattern. It is output to the unit 302. Further, the positive / negative inversion determination unit 108 also determines whether the modulation pattern is positive / negative inversion based on the symbol parameter and the symbol number generated in ST1100, and outputs the determination result to the modulation signal generation unit 109.

Then, in ST1320, the combination of the modulation patterns for the in-phase component and the quadrature component corresponding to one address generated in ST1210 is read from the modulation pattern storage section 302, and the in-phase component and the quadrature component for the read combination are read. The respective modulation patterns of are output to the modulation signal generation unit 109.

Since ST1400 to ST1600 are the same as the steps of the flowchart shown in FIG. 3, the description thereof will be omitted.

As described above, according to the present embodiment, each modulation pattern stored in the modulation pattern storage unit 302 is
Since it is configured by combining the modulation patterns for the in-phase component and the quadrature component selected from the modulation signals of all the patterns based on the predetermined regularity, the calculation accuracy is lower than that of the first embodiment, but it is necessary. The amount of memory can be further reduced. For example, as described above, since the modulation patterns for the in-phase component and the quadrature component can be stored at one address, the memory amount of 9 words can be further reduced. Moreover, since one common address is generated for the in-phase component and the quadrature component, the amount of calculation processing can be suppressed.

Further, the modulation signal generation device 3 of the present embodiment
00 can, of course, be installed in a mobile station device or base station device. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

(Fourth Embodiment) FIG. 10 is a block diagram showing the structure of a reverse rotation signal generator according to a fourth embodiment of the present invention.

The reverse rotation signal generator 400 shown in FIG.
An input terminal 401, a symbol number generation unit 402, a cosine component address generation unit 403, a sine component address generation unit 404, and a cosine component reverse rotation pattern storage unit 405.
A reverse rotation pattern storage unit 406 for sine component, a positive / negative inversion determination unit 407, a reverse rotation signal generation unit 408, and output terminals 409 and 410.

The symbol number generation unit 402 uses the input terminal 4
The received symbol is extracted from the received data input via 01, and the symbol number obtained by counting the received symbol is used as the cosine component address generation unit 403, the sine component address generation unit 404, and the positive / negative inversion determination unit 407. Output to and respectively.

The cosine component address generation unit 403 generates an address based on the input symbol number, and the generated address is the cosine component reverse rotation pattern storage unit 405.
Output to.

The sine component address generation unit 404 generates an address based on the input symbol number, and the generated address is used for the sine component reverse rotation pattern storage unit 406.
Output to.

Reverse rotation pattern storage unit 405 for cosine component
Stores the reverse rotation pattern for the cosine component corresponding to the address generated based on the symbol number, and when the address is input from the cosine component address generation unit 403, is stored at the address. The reverse rotation pattern for the cosine component is output to the reverse rotation signal generation unit 408.

Reverse rotation pattern storage unit 406 for sine component
Stores the reverse rotation pattern for the sine component in the memory corresponding to the address generated based on the symbol number, and when the address is input from the sine component address generation unit 404, stores it in the address. The inverse rotation pattern for the generated sine component is output to the inverse rotation signal generation unit 408.

FIGS. 11A and 11B show examples of the memory contents in the cosine component reverse rotation pattern storage unit 405 and the sine component reverse rotation pattern storage unit 406, respectively. When storing the reverse rotation patterns for the cosine component and the sine component in the storage units 405 and 406, paying attention to the regularity of the reverse rotation signal, each address generated from the symbol number and the determination result of whether positive / negative inversion is present or not. Inverse rotation signal of all patterns from and (cosine and sine components)
The inverse rotation pattern for the cosine and sine components has been selected so that In this way, the reverse rotation patterns for the cosine component and the sine component are stored in the storage units 405, 40.
By storing the data in No. 6, for example, the required memory amount of 32 words can be reduced to a total memory amount of 10 words including 5 words for the cosine component and 5 words for the sine component.

The positive / negative inversion determining section 407 converts the reverse rotation pattern stored in the cosine component reverse rotation pattern storage section 405 and the sine component reverse rotation pattern storage section 406 into a reverse rotation signal based on the symbol number. The presence / absence of the required positive / negative inversion is determined, and the determination result is output to the reverse rotation signal generation unit 408.

The reverse rotation signal generation unit 408 inverts the positive / negative inversion of the reverse rotation signal pattern for the cosine component and the sine component based on the determination result of the positive / negative inversion determination unit 407, and outputs the reverse rotation signal of the cosine component and the sine component. Generated, and the generated inverse rotation signals of the cosine component and the sine component are output terminals 409 and 41.
Output from 0 respectively.

Next, the operation of the reverse rotation signal generation device 400 having the above configuration will be described with reference to the flowchart of FIG.

First, in ST2000, the input terminal 401
The bit string of the received symbol is input and output to the symbol number generation unit 402.

Then, in ST2100, the symbol number generation section 402 counts the symbol numbers of the bit string input in ST2000 to determine the cosine component address generation section 403, the sine component address generation section 404, and the positive / negative inversion judgment. And outputs to the units 407 and 407, respectively.

Then, in ST2200, the cosine component address generation unit 403 generates an address for the cosine component based on the symbol number generated in ST2100, and the generated address is used as the cosine component reverse rotation pattern storage unit 40.
Output to 5. Also, the sine component address generation unit 404
Then, the address for the sine component is generated based on the symbol number similarly generated at ST2100, and the generated address is output to the reverse rotation pattern storage unit 406 for the sine component. In addition, in the positive / negative inversion determination unit 407, the same
Based on the symbol number generated by 0, the presence / absence of positive / negative inversion of the reverse rotation pattern is determined, and the determination result is output to the reverse rotation signal generator 408.

In ST2300, the cosine component reverse rotation pattern storage unit 405 reads the cosine component reverse rotation pattern corresponding to the cosine component address generated in ST2200, and the read cosine component reverse rotation pattern is read out. It outputs to the reverse rotation signal generation unit 408. Also, from the reverse rotation pattern storage unit 406 for sine component,
The sine component reverse rotation pattern corresponding to the sine component address generated in 200 is read, and the read sine component reverse rotation pattern is output to the reverse rotation signal generation unit 408.

In ST2400, reverse rotation signal generation section 408 performs ST220 for each reverse rotation pattern for the cosine component and sine component read in ST2300.
Based on the determination result by the positive / negative inversion determination unit 407 at 0,
Determine whether there is a positive / negative inversion. If there is positive / negative inversion as a result of this determination, the process proceeds to ST2500, and if there is no positive / negative inversion, the process immediately proceeds to ST2600.

In ST2500, reverse rotation signal generator 40
With respect to the reverse rotation pattern determined to have positive / negative inversion in 8, the positive / negative is inverted, and the process proceeds to ST2600. For the reverse rotation pattern determined to have no positive / negative inversion, positive / negative inversion is not performed.

In ST2600, reverse rotation signal generator 40
At 8, the positive / negative inversion processing based on the determination result at ST2200 (ST2400, ST250) is performed on each reverse rotation pattern for the cosine component and the sine component read at ST2300.
The result of applying 0) is output from the output terminals 409 and 410 as reverse rotation signals of the cosine component and the sine component, respectively.

As described above, according to the embodiment of the present invention, only the reverse rotation pattern selected based on the predetermined regularity from the reverse rotation signals of all patterns for the received symbol is stored, and the symbol number is stored. An address is generated using this, and a reverse rotation signal is generated by performing positive / negative inversion according to the symbol number on the reverse rotation pattern read in association with the generated address, so that the required memory amount can be reduced. . For example, as described above, the required memory capacity of 32 words is 5 words for the cosine component and 5 words for the sine component.
The total amount of words can be reduced to 10 words (see FIG. 11).

Further, when the above configuration is realized by hardware, the hardware configuration is only for address calculation, so that it can be realized only by a logical operation with a small number of bits without a code, and the circuit scale is reduced. be able to.

Further, reverse rotation signal generating apparatus 400 of the present embodiment can of course be installed in a mobile station apparatus or base station apparatus. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

(Fifth Embodiment) FIG. 13 is a block diagram showing a configuration of a reverse rotation signal generation device according to a fifth embodiment of the present invention. The reverse rotation signal generation device 500 is
The reverse rotation signal generation device 400 shown in FIG. 10 has the same basic configuration, and the same components are designated by the same reference numerals and the description thereof will be omitted.

The feature of this embodiment is that, as shown in FIG. 13, the reverse rotation pattern storage unit 4 for the cosine component shown in FIG.
05 and one reverse rotation pattern storage unit 406 instead of the reverse rotation pattern storage unit 406 for sine component. Therefore, in the reverse rotation pattern storage unit 501,
A modulation pattern common to the cosine component and the sine component is stored, and, for example, the address generated by the cosine component address generation unit 403a with an offset is set to the sine component address. A predetermined reverse rotation pattern is stored corresponding to the address generated by the cosine component address generation unit 403a.

In the reverse rotation pattern storage unit 501,
The reverse rotation pattern may be stored corresponding to the address generated by the sine component address generation unit 404a. In this case, the address generated by the sine component address generation unit 404a with an offset becomes the address for the cosine component.

FIG. 14 shows an example of memory contents in the reverse rotation pattern storage unit 501. When storing the reverse rotation pattern in this storage unit 501, pay attention to the fact that the reverse rotation signal has a certain regularity, and that if one of the generated addresses is turned off, it can be changed to the other address. Then, the predetermined reverse rotation pattern is selected so that the reverse rotation signals (cosine component and sine component) of all patterns can be generated from the address generated from the symbol number and the determination result of the positive / negative inversion. By storing the reverse rotation pattern common to the cosine component and the sine component in one storage unit 501 in this way, for example, 32
The amount of memory required for words can be reduced to 5 words.

Next, the operation of the reverse rotation signal generation device 500 having the above configuration will be described with reference to the flowchart of FIG. Note that, here, a case will be described in which the reverse rotation pattern storage unit 501 stores the reverse rotation pattern corresponding to the address generated by the cosine component address generation unit 403a. However, in the sine component address generation unit 404a. The same operation is performed when the reverse rotation pattern is stored corresponding to the generated address.

In this embodiment, as shown in FIG.
Insert ST2310 into the flowchart shown in FIG.
ST2300 has been deleted.

Since ST2000 to ST2200 are the same as the steps of the flowchart shown in FIG. 12, the description thereof will be omitted. However, in the present embodiment, ST2
In 200, the address generated by the sine component address generation unit 404a is the address generated by the cosine component address generation unit 403a with an offset. Also in ST1200, the address generated by the cosine component address generation unit 403a and the address generated by the sine component address generation unit 404a are output to the reverse rotation pattern storage unit 501, respectively.

Then, in ST2310, the reverse rotation pattern for the cosine component corresponding to the cosine component address generated in ST2200 is read from the reverse rotation pattern storage section 501, and the read reverse rotation pattern is inverted for the cosine component. The rotation pattern is output to the reverse rotation signal generation unit 408. Further, the reverse rotation pattern for the sine component, which corresponds to the sine component address generated in ST2200, is read from the same reverse rotation pattern storage unit 501, and the read reverse rotation pattern is inverted as the reverse rotation pattern for the sine component. It is output to the rotation signal generation unit 408.

Since ST2400 to ST2600 are the same as the steps in the flowchart shown in FIG. 12, the description thereof will be omitted.

As described above, according to the present embodiment, the reverse rotation pattern selected from the reverse rotation signals of all patterns for the received symbol based on a predetermined regularity is stored, and the cosine is calculated using the symbol number. Generate the address of the reverse rotation pattern for the component and the sine component respectively, and perform positive / negative inversion according to the symbol number for the reverse rotation pattern for the cosine component and the sine component read corresponding to the generated address. Since the reverse rotation signal is generated, the required memory amount can be reduced. For example, as described above, the memory amount required for 32 words can be reduced to the memory amount of 5 words (see FIG. 14), and the memory amount of 5 words can be further reduced as compared with the case of the fourth embodiment. You can

Further, when the above configuration is implemented by hardware, the hardware configuration is only for address calculation, so that it can be implemented only by a logical operation with a small number of bits without a code, and the circuit scale is reduced. be able to.

Further, reverse rotation signal generating apparatus 500 of the present embodiment can of course be installed in a mobile station apparatus or base station apparatus. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

(Sixth Embodiment) FIG. 16 is a block diagram showing the configuration of a reverse rotation signal generation device according to a sixth embodiment of the present invention. The reverse rotation signal generation device 600 is
The reverse rotation signal generation device 400 shown in FIG. 10 has the same basic configuration, and the same components are designated by the same reference numerals and the description thereof will be omitted.

As shown in FIG. 16, the feature of the present embodiment is that the cosine component address generation unit 403, the sine component address generation unit 404, the cosine component reverse rotation pattern storage unit 405, and the sine as shown in FIG. Instead of the component reverse rotation pattern storage unit 406, an address generation unit 601 and one reverse rotation pattern storage unit 602 are provided.

Here, the address generation unit 601 generates one address common to the cosine component and the sine component based on the input symbol number, and the reverse rotation pattern storage unit 6
Reference numeral 02 stores the reverse rotation pattern for the cosine component and the sine component, which is generated by the address generation unit 601 and corresponds to the address common to the cosine component and the sine component. For example, when the bit width of the reverse rotation pattern stored in the reverse rotation pattern storage unit 602 is 16 bits in total, the reverse rotation pattern for the cosine component is in the upper 8 bits and the reverse rotation pattern for the sine component is in the lower 8 bits. Are stored respectively. Note that the upper and lower bits may be assigned in reverse.

FIG. 17 shows an example of memory contents in the reverse rotation pattern storage unit 602. When storing the reverse rotation pattern for the cosine component and the sine component in the storage unit 602, the reverse rotation signal has a certain regularity, and the reverse rotation pattern for each component is combined under a common address. Focusing on the fact that it can be assigned to upper bits and lower bits, the reverse rotation signal (cosine component and sine component) of all patterns can be calculated from one common address generated from the symbol number and the determination result of positive / negative inversion. A combination of inverse rotation patterns for the cosine and sine components has been selected so that they can be generated. In this way, by combining the reverse rotation patterns for the cosine component and the sine component and storing them under one address,
For example, the memory amount required for 32 words can be reduced to a memory amount of 5 words.

Next, the operation of the reverse rotation signal generation device 600 having the above configuration will be described with reference to the flowchart of FIG.

In this embodiment, as shown in FIG.
ST2210 and ST2320 are inserted in the flowchart shown in FIG. 12, and ST2200 and ST2300 are deleted. In this embodiment, ST221 in FIG.
At 0, a predetermined process is performed without separating the cosine component and the sine component.

ST2000 and ST2100 are shown in FIG.
Since the steps are the same as those in the flowchart shown in FIG. 2, the description thereof will be omitted. However, in the present embodiment,
The symbol number generated by the symbol number generation unit 402 is output to both the address generation unit 601 and the positive / negative inversion determination unit 407.

Then, in ST2210, the address generation unit 601 generates one address common to the cosine component and the sine component based on the symbol number generated in ST2100, and the generated address is stored in the reverse rotation pattern storage unit 602.
Output to. Further, the positive / negative inversion determination unit 407 determines whether or not the reverse rotation pattern has positive / negative inversion based on the symbol number generated in ST2100, and outputs the determination result to the reverse rotation signal generation unit 408.

Then, in ST2320, a combination of the reverse rotation patterns for the cosine component and the sine component corresponding to one address generated in ST2210 is read from the reverse rotation pattern storage section 602, and the cosine component and the sine of the read combination are read. The reverse rotation patterns for the components are output to the reverse rotation signal generation unit 408, respectively.

Since ST2400 to ST2600 are the same as the steps of the flowchart shown in FIG. 12, their description will be omitted.

As described above, according to this embodiment, each reverse rotation pattern stored in the reverse rotation pattern storage unit 602 has a cosine component selected from the reverse rotation signals of all patterns based on a predetermined regularity. And the reverse rotation pattern for the sine component are combined, the calculation accuracy is lower than that of the fourth embodiment, but the required memory amount can be reduced. For example, as described above, since the reverse rotation pattern for the cosine component and the sine component can be stored at one address, the memory amount of 5 words can be further reduced. Moreover, since one common address is generated for the cosine component and the sine component, the amount of calculation processing can be suppressed.

Further, reverse rotation signal generating apparatus 600 of the present embodiment can of course be installed in a mobile station apparatus or base station apparatus. Therefore, in this case, it is possible to provide a mobile station device and a base station device that have the same effects.

[0130]

As described above, according to the present invention,
The amount of memory required can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a modulation signal generation device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an example of a memory content that stores a modulation pattern of an in-phase component and a modulation pattern of a quadrature component according to the first embodiment of the present invention.

FIG. 3 is a flowchart showing an operation of the modulation signal generation device according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a modulation signal generation device according to a second embodiment of the present invention.

FIG. 5 is a diagram showing an example of memory contents storing a modulation pattern according to the second embodiment of the present invention.

FIG. 6 is a flowchart showing the operation of the modulation signal generation device according to the second embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a modulation signal generation device according to a third embodiment of the present invention.

FIG. 8 is a diagram showing an example of a memory content in which modulation patterns of an in-phase component and a quadrature component according to Embodiment 3 of the present invention are stored.

FIG. 9 is a flowchart showing the operation of the modulation signal generation device according to the third embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of a reverse rotation signal generation device according to a fourth embodiment of the present invention.

FIG. 11 is a diagram showing an example of a memory content storing a reverse rotation pattern of a cosine component and a reverse rotation pattern of a sine component according to the fourth embodiment of the present invention.

FIG. 12 is a flowchart showing the operation of the reverse rotation signal generation device according to the fourth embodiment of the present invention.

FIG. 13 is a block diagram showing a configuration of a reverse rotation signal generation device according to a fifth embodiment of the present invention.

FIG. 14 is a diagram showing an example of memory contents storing a reverse rotation pattern according to the fifth embodiment of the present invention.

FIG. 15 is a flowchart showing an operation of the reverse rotation signal generation device according to the fifth embodiment of the present invention.

FIG. 16 is a block diagram showing a configuration of a reverse rotation signal generation device according to a sixth embodiment of the present invention.

FIG. 17 is a diagram showing an example of a memory content storing a reverse rotation pattern of a cosine component and a sine component according to the sixth embodiment of the present invention.

FIG. 18 is a flowchart showing the operation of the reverse rotation signal generation device according to the sixth embodiment of the present invention.

FIG. 19 is a diagram showing an example of a symbol parameter generation table.

FIG. 20 is a diagram showing an example of mapping positions.

[Explanation of symbols]

101, 401 Input terminal 102 symbol parameter generation unit 103, 402 Symbol number generator 104, 104a In-phase component address generation unit 105, 105a Quadrature component address generator 106 In-phase component modulation pattern storage unit 107 Modulation Pattern Storage Unit for Quadrature Component 108, 407 Positive / negative inversion determination unit 109 Modulation signal generator 110, 111, 409, 410 output terminals 201, 302 Modulation pattern storage unit 301, 601 Address generator 403, 403a Cosine component address generator 404, 404a Sine component address generator 405 Inverse rotation pattern storage unit for cosine component 406 Sine component reverse rotation pattern storage unit 408 Reverse rotation signal generation unit 501 and 602 reverse rotation pattern storage unit

Claims (14)

[Claims] 1. Storage means for storing a modulation pattern selected from modulation signals of all patterns for transmission symbols based on a predetermined regularity; symbol parameter generation means for generating symbol parameters from a bit pattern of transmission symbols; Symbol number generation means for counting transmitted symbols to generate a symbol number, and stored in the storage means based on the symbol parameter generated by the symbol parameter generation means and the symbol number generated by the symbol number generation means. Address generating means for generating an address of the modulation pattern, and the variable stored in the storage means based on the symbol parameter generated by the symbol parameter generating means and the symbol number generated by the symbol number generating means. Based on the determination means for determining whether the pattern is positive or negative inversion, the modulation pattern read from the storage means in association with the address generated by the address generation means, and the determination result of the determination means, A modulation signal generation means for generating a modulation signal, and a modulation signal generation device comprising: 2. The first storage means for storing a modulation pattern for an in-phase component selected based on a predetermined regularity from the modulation signals of all patterns for transmission symbols, and the storage means for all patterns for transmission symbols. Second storage means for storing a modulation pattern for the orthogonal component selected from the modulation signal based on a predetermined regularity, wherein the address generation means and the symbol parameter generated by the symbol parameter generation means and the First address generating means for generating an address of the modulation pattern for the in-phase component stored in the first storing means based on the symbol number generated by the symbol number generating means, and generated by the symbol parameter generating means. The symbol parameter and the symbol number generated by the symbol number generation means. A second address generating means for generating the address of the modulation pattern for the orthogonal component stored in the second storing means based on the number of the channel number, and the determining means is generated by the symbol parameter generating means. Of the modulation pattern for the in-phase component stored in the first storage means and the modulation pattern for the quadrature component stored in the second storage means based on the symbol parameter and the symbol number generated by the symbol number generation means. The presence / absence of positive / negative inversion is determined, and the modulation signal generation means reads the in-phase component modulation pattern read from the first storage means in association with the address generated by the first address generation means, the second pattern. The transform for the quadrature component read from the storage means in association with the address generated by the second address generation means. Pattern, and on the basis of the determination result determining means, for generating a modulated signal of a transmission symbol, the modulation signal generator according to claim 1, characterized in that. 3. The in-phase one of the modulation patterns stored in the storage means is based on the symbol parameter generated by the symbol parameter generation means and the symbol number generated by the symbol number generation means. First address generating means for generating an address of a modulation pattern to be used as a component, and stored in the storing means based on the symbol parameter generated by the symbol parameter generating means and the symbol number generated by the symbol number generating means. Second address generating means for generating an address of a modulation pattern to be used for orthogonal components of the generated modulation pattern, wherein the determining means includes the symbol parameter generated by the symbol parameter generating means and the symbol number generating means. By Based on the generated symbol number, the presence / absence of positive / negative inversion of the modulation pattern for the in-phase component and the quadrature component stored in the storage unit is determined, and the modulation signal generation unit is configured to store the modulation signal from the storage unit. 1 modulation pattern for in-phase component read out in association with the address generated by the address generation means, for quadrature component read out from the storage means in association with the address generated by the second address generation means The modulation signal generation device according to claim 1, wherein a modulation signal of the transmission symbol is generated based on the modulation pattern to be set and the determination result of the determination means. 4. Each of the modulation patterns stored in the storage means is formed by combining modulation patterns for in-phase components and quadrature components selected from the modulation signals of all patterns based on a predetermined regularity. The modulation signal generation device according to claim 1, wherein 5. A mobile station apparatus comprising the modulated signal generation device according to claim 1. Description: 6. A base station apparatus comprising the modulation signal generating apparatus according to claim 1. Description: 7. A symbol parameter generation step of generating a symbol parameter from a bit pattern of a transmission symbol, a symbol number generation step of counting transmission symbols to generate a symbol number, a symbol parameter generated in the symbol parameter generation step, and Based on the symbol number generated in the symbol number generation step, the modulation pattern address stored in the storage means for storing the modulation pattern selected from the modulation signals of all the patterns for the transmission symbol based on the predetermined regularity is generated. The address generation step for performing the positive / negative inversion of the modulation pattern stored in the storage means based on the symbol parameter generated in the symbol parameter generation step and the symbol number generated in the symbol number generation step. A determination signal for determining the presence / absence, a modulation signal for generating a modulation signal of a transmission symbol based on the modulation pattern read from the storage means in association with the address generated in the address generation step and the determination result in the determination step A modulation signal generation method comprising: a generation step. 8. A storage means for storing a reverse rotation pattern selected from the reverse rotation signals of all patterns for the received symbol based on a predetermined regularity, and a symbol number generation means for counting the received symbols to generate a symbol number. An address generating means for generating an address of the reverse rotation pattern stored in the storage means based on the symbol number generated by the symbol number generating means, and based on the symbol number generated by the symbol number generating means Determination means for determining whether or not the reverse rotation pattern stored in the storage means is inverted, and the reverse rotation pattern and the reverse rotation pattern read from the storage means in association with the address generated by the address generation means. A reverse circuit that generates a reverse rotation signal of the received symbol based on the judgment result of the judgment means. Reverse rotation signal generating apparatus characterized by comprising a signal generating means. 9. The first storage means stores the reverse rotation pattern for the cosine component selected based on a predetermined regularity from the reverse rotation signals of all patterns for the received symbols, and the storage means for all received symbols. A second storage unit that stores a reverse rotation pattern for a sine component selected from a reverse rotation signal of the pattern based on a predetermined regularity, wherein the address generation unit is generated by the symbol number generation unit. First address generating means for generating an address of the reverse rotation pattern for the cosine component stored in the first storing means based on the symbol number; and based on the symbol number generated by the symbol number generating means, A second address generating means for generating an address of the reverse rotation pattern for the sine component stored in the second storage means, The stage has a reverse rotation pattern for the cosine component stored in the first storage means and a reverse rotation for the sine component stored in the second storage means, based on the symbol number generated by the symbol number generation means. The reverse rotation signal generation unit determines whether the pattern is inverted, and the reverse rotation signal generation unit reads the reverse rotation pattern for the cosine component read from the first storage unit in association with the address generated by the first address generation unit. , From the second storage means to the second
A reverse rotation signal of the received symbol is generated based on the reverse rotation pattern for the sine component read in association with the address generated by the address generation means, and the determination result of the determination means. The reverse rotation signal generation device according to claim 8. 10. The address generation means generates an address of a reverse rotation pattern for a cosine component of the reverse rotation pattern stored in the storage means, based on the symbol number generated by the symbol number generation means. And a second address for generating an address of the reverse rotation pattern for the sine component of the modulation pattern stored in the storage means based on the symbol number generated by the symbol number generation means. The determination means, based on the symbol number generated by the symbol number generation means, presence / absence of positive / negative inversion of the reverse rotation pattern for the cosine component and the sine component stored in the storage means. And the reverse rotation signal generation means generates the reverse rotation signal from the storage means by the first address generation means. Reverse rotation pattern for the cosine component read in association with the generated address, reverse rotation for the sine component read from the storage means in association with the address generated by the second address generation means The reverse rotation signal generation device according to claim 8, wherein a reverse rotation signal of the received symbol is generated based on the pattern and the determination result of the determination means. 11. The reverse rotation patterns stored in the storage means are configured by combining reverse rotation patterns for cosine components and sine components selected based on a predetermined regularity from the reverse rotation signals of all patterns. 9. The reverse rotation signal generation device according to claim 8, wherein the reverse rotation signal generation device is provided. 12. A mobile station device comprising the reverse rotation signal generation device according to any one of claims 8 to 11. 13. A base station device comprising the reverse rotation signal generation device according to claim 8. Description: 14. A symbol number generating step of counting received symbols to generate a symbol number, and based on the symbol number generated in the symbol number generating step, a predetermined regularity is obtained from a reverse rotation signal of all patterns for the received symbol. An address generation step of generating an address of the reverse rotation pattern stored in the storage means for storing the reverse rotation pattern selected on the basis of the symbol number generated in the symbol number generation step, and stored in the storage means. Based on the determination step of determining the presence or absence of positive and negative inversion of the reverse rotation pattern, the reverse rotation pattern read from the storage means in association with the address generated in the address generation step and the determination step, Inverse rotation signal generation space that generates the inverse rotation signal of the received symbol A reverse rotation signal generation method comprising: a step.