JP2003234627A - Semiconductor circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an AGC amplifier capable of widely taking the dynamic range of input. <P>SOLUTION: A semiconductor circuit is constituted of transistors 1 and 2 for inputting input signals P and N, transistors 3-6 for gain control and transistors 7a, 7b, 8a and 8b for foldover for transferring the current of the transistors 1 and 2 for input to the transistors 3-6 for the gain control. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor circuit,
In particular, it relates to an AGC amplifier composed of a semiconductor circuit.

[0002]

2. Description of the Related Art Conventionally, an AGC amplifier has been used in, for example, a receiver. Here, the AGC amplifier generally operates while automatically adjusting its own gain so as to amplify the input signal and output a signal having a constant amplitude. A Gilbert circuit is known as such an AGC amplifier.

FIG. 3 is a circuit configuration diagram of such a Gilbert cell type amplifier circuit. 3, the amplifier circuit includes a transistor 1 for inputting an input signal P, a transistor 2 for inputting an input signal N, transistors 3 and 6 for inputting a gain control voltage, and a transistor for inputting a fixed reference voltage. It consists of 4 and 5.

In this amplifier circuit, the difference between the input signal P and the input signal N (differential input) multiplied by the gain is obtained as the difference between the output signal P and the output signal N (differential output). Here, the gain is determined by the difference between the gain control voltage, which is a voltage fed back based on the output signals P and N, and the reference voltage. Further, this feedback system operates so that the amplitude of the output signal becomes constant. Therefore,
The amplitudes of the output signals P and N converge to a constant value.

[0005]

However, such A
In the GC amplifier, there are many elements such as transistors connected in series between VDD and GND. For example, in FIG.
In the amplifier circuit of, the current source 21, between VDD and GND,
There are resistors 31 and 32, input transistors 1 and 2, gain control transistors 3 to 6, resistors 33 and 34, and the number of stages of elements connected in series is increasing.

When a considerable number of elements are inserted between VDD and GND as described above, a sufficient input dynamic range cannot be obtained due to a voltage drop occurring in each element. That is, the output waveform may be distorted when the amplitude of the input signal increases.

An object of the present invention is to provide an amplifier circuit capable of setting a large input dynamic range.

[0008]

According to a first aspect of the present invention, a first transistor circuit for inputting first and second input signals and a second transistor circuit for inputting third and fourth input signals are provided.
And a transistor circuit for outputting a signal obtained by multiplying a difference between the first and second input signals and a difference between the third and fourth input signals as an output signal. By providing a semiconductor circuit characterized in that the first transistor circuit is connected to the second transistor circuit by a folding transistor circuit provided between the circuit and the second transistor circuit, the above problem is solved. Can be achieved.

Here, the first transistor circuit and the second transistor circuit are cut and folded back, and the gaps are connected by the folding transistor circuit. With this configuration, it is possible to reduce the number of elements connected in series on the path from the power supply to the ground, suppress the influence of the voltage drop that occurs in each element, and increase the input dynamic range. Is possible.

The folding transistor circuit may have a current mirror structure as described in claim 2 or a folded cascode structure as described in claim 3. . Moreover, as described in claim 4, the first transistor circuit may include a P-channel transistor.

According to a fifth aspect of the invention, a first circuit portion including one or more transistors and one or more transistors are included, and the first circuit portion includes the first circuit portion based on a current flowing through the first circuit portion. A second circuit portion that outputs a voltage corresponding to an input voltage to the second circuit portion and one or more transistors, and a current corresponding to a current flowing through the first circuit portion is supplied to the second circuit portion. The above-mentioned object can be achieved by providing a semiconductor circuit characterized by including a current transfer circuit drawn from the same.

In the above structure, the first circuit portion and the second circuit portion are not connected in series, and the current corresponding to the current flowing through the first circuit portion becomes the second current.
Will be drawn from the circuit part. Therefore,
It is possible to reduce the number of elements connected in series on the path from the power supply to the ground, suppress the influence of the voltage drop occurring in each element, and increase the input dynamic range.

The "corresponding current" means, for example, a current flowing through the other transistor corresponding to a current flowing through one transistor which is determined according to the ratio of the current mirror (transistor size). The ratio does not necessarily have to be 1: 1.

According to a sixth aspect of the present invention, the first and second circuit portions are respectively provided on the first DC potential side, and the current transfer circuit has a second DC potential different from the first DC potential side. May be provided on the DC potential side. In this case, the first DC potential is, for example, a power source, and
The second DC potential is, for example, ground. Also,
Conversely, the first DC potential may be used as the ground and the second DC potential may be used as the power source.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. A circuit configuration diagram of the AGC amplifier circuit of this embodiment is shown in FIG. The amplifier circuit of the present embodiment separates the circuit of FIG. 3 showing a conventional example at the location of arrow A, connects them using a current mirror circuit, and connects transistors 3 to 6 for inputting a gain control voltage or a reference voltage. It is obtained by folding back to the power supply side.

In FIG. 1A, the AGC amplifier circuit includes transistors 1 and 2 for inputting input signals P and N.
And gain control transistors 3 to 6 and folding transistors 7a, 7b, 8a and 8b for transferring the currents of the input transistors 1 and 2 to the gain control transistors 3 to 6. .

Here, the input signal P is applied to the transistor 1.
However, the input signal N is input to the transistor 2, respectively. That is, the transistor 1 and the transistor 2 form a set of transistors (differential pair) that receive a differential input. The gain control voltage is input to the transistors 3 and 6, and the reference voltage having a fixed value is input to the transistors 4 and 5, respectively. Incidentally, these elements constituting the circuit are also shown in the conventional circuit diagram of FIG.

In the AGC amplifier circuit configured as described above, the difference between the input signal P and the input signal N (differential input) multiplied by the gain by the difference between the gain control voltage signal and the reference voltage signal is output as the output signal P. It is obtained as the difference (differential output) of the signal N. The current i2 is a current corresponding to the current i1, and its value is determined according to the ratio of the transistor size (current mirror). That is, the transistor 7
Since a and 7b are current mirrors, the currents i1 and i2 are values proportional to the transistor sizes of the transistors 7a and 7b in FIG. However, since the signal flow path is folded back, the current i flows into the transistors 3 and 4 in the conventional circuit of FIG. 3, whereas the current i flows in the circuit of the present embodiment of FIG. i2
Are drawn from transistors 3 and 4. Therefore, the output signal N from the transistor 3 in the conventional example of FIG.
The output signal P from the transistor 4 is shown in FIG.
In (a), the output signal P is taken from the transistor 3 and the output signal N is taken from the transistor 4.

The transistors 8a and 8b also constitute a current mirror, and the operation thereof is the same as that of the transistors 7a and 7b described above. In this way
The currents of the input transistors 1 and 2 are transferred to the gain control transistors 3 to 6.

In FIG. 1A, it is desirable that the input transistors 1 and 2 are of P-channel type in order to suppress noise. In the above description, the current source 2
1 and one end of the gain control transistors 3 to 6 is VDD
And the folding transistors 7a, 7b, 8 provided on the side
Although one end of a and 8b was provided on the GND side, conversely,
The current source 21 and one ends of the gain control transistors 3 to 6 are provided on the GND side, and the folding transistors 7a and 7 are provided.
One end of b, 8a, and 8b may be provided on the VDD side.

With this configuration, VDD to GN
Between D, if the resistance is passed once and the transistor is passed twice, or if the current source is passed once, the resistor is passed once, and the transistor is passed twice, the VDD can be reached to the GND. As in the amplifier circuit of the conventional example, VDD is passed through the current source once, the resistor twice, and the transistor twice.
Since the number of times through the resistance is reduced by one compared with the case where the voltage reaches from GND to GND, the voltage drop can be suppressed by that amount, and a linear output can be obtained for an input in a wider range. The current source 21 is, for example, as shown in FIG.
In the configuration shown in FIG. 1B, the voltage drop due to the current source 21 in FIG. 1A corresponds to one transistor 11.

FIG. 2 shows another example A of this embodiment.
It is a figure which shows the circuit structure of a GC amplifier circuit. It should be noted that in FIG. 2, description of portions that overlap with FIG. 1 will be omitted. In FIG. 2 as well, as in FIG. 1, the circuit of FIG. 3 showing the conventional example is cut at the position of arrow A to separate the circuit. Then, connect the circuits cut using the folded cascode structure,
By folding the transistors 3 to 6 for inputting the gain control voltage or the reference voltage to the power supply side, the amplifier circuit of another example of this embodiment shown in FIG. 2 can be obtained.

In FIG. 2, a current source 22 supplies a current i3 having a predetermined value to the transistor 9a. Since the transistors 9a and 9b are current mirrors, the currents i3 and i4 in FIG. 2 are values proportional to the transistor sizes of the transistors 9a and 9b. Further, since the transistors 9a and 9c are also current mirrors, the currents i3 and i5 have values proportional to the transistor sizes of the transistors 9a and 9c.

When the transistor size ratio of the transistors 9a, 9b and 9c is 1: 1: 1, for example, i3 = 10 mA, i4 = i5 = 10 mA. In this case, further, the current value i2 of the input signal N is set to 3 m.
A and the current value i1 of the input signal P is 5 mA, i6 =
10-3 = 7 mA and i7 = 10-5 = 5 mA. Therefore, the difference (5-3 = 2 mA) between the current value i1 of the input signal P and the current value i2 of the input signal N is accurately transmitted to the gain control transistors 3 to 6 as the difference between the currents i6 and i7.

In this way, the currents of the input transistors 1 and 2 are transferred to the gain control transistors 3 to 6. In the circuit of FIG. 2, the signal flow path is folded back as compared with the circuit of the conventional example of FIG. For this reason,
In the circuit of the conventional example shown in FIG.
The current i6 is drawn from the transistors 3 and 4 in the circuit of another example of this embodiment shown in FIG.

Also in FIG. 2, similarly to FIG. 1, it is desirable to use P-channel type transistors for the input transistors 1 and 2 in order to suppress noise. In the above description, the current sources 21 and 22 and one ends of the gain control transistors 3 to 6 are provided on the VDD side, and one ends of the folding transistors 9a, 9b, 9c are provided on the GND side. Conversely, the current sources 21 and 22 and one ends of the gain control transistors 3 to 6 may be provided on the GND side, and one ends of the folding transistors 9a, 9b, 9c may be provided on the VDD side.

With this configuration, VDD-GN
Between D, if the resistance is passed once and the transistor is passed twice, or if the current source is passed once, the resistor is passed once, and the transistor is passed twice, the VDD can be reached to the GND. As in the amplifier circuit of the conventional example, VDD is passed through the current source once, the resistor twice, and the transistor twice.
Since the number of times through the resistance is reduced by one compared with the case where the voltage reaches from GND to GND, the voltage drop can be suppressed by that amount, and a linear output can be obtained for an input in a wider range.

Although the above description has been made with respect to the AGC amplifier circuit, the circuit provided between the power source and the ground is cut and connected with a transistor for folding, and the elements connected in series between the power source and the ground are connected. By keeping the number down,
If the configuration allows a wide input dynamic range, A
It can also be applied to circuits other than the GC amplifier circuit. For example, it can be applied to a multiplication circuit.

[0029]

As described above, according to the present invention, it is possible to realize a semiconductor circuit in which the distortion of the output waveform is small over a wide input voltage range.

[Brief description of drawings]

FIG. 1A is a diagram (No. 1) showing a circuit configuration of an amplifier circuit of the present embodiment, and FIG. 1B is an example of a detailed diagram of a current source.

FIG. 2 is a diagram (No. 2) showing a circuit configuration of an amplifier circuit according to the present embodiment.

FIG. 3 is a diagram showing a circuit configuration of an amplifier circuit of a conventional example.

[Explanation of symbols]

1-9, 11 transistors 21, 22 Current source 31-34 resistance

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroshi Miyagi             2-5-13 Saijocho, Joetsu City, Niigata Prefecture Niigata             Precision Co., Ltd. F term (reference) 5J066 AA01 AA12 CA32 FA00 HA09                       HA17 HA25 KA05 KA09 MA21                       ND02 ND03 ND12 ND25 PD02                       SA13                 5J100 AA16 BA06 BB02 BC02 EA02                       FA02                 5J500 AA01 AA12 AC32 AF00 AH09                       AH17 AH25 AK05 AK09 AM21                       AS13 DN02 DN03 DN12 DN25                       DP02

Claims (6)

[Claims] 1. A first for inputting first and second input signals
And a second transistor circuit for inputting the third and fourth input signals, the difference between the first and second input signals and the difference between the third and fourth input signals. In a semiconductor circuit which outputs a multiplied signal as an output signal, a folding transistor circuit provided between the first transistor circuit and the second transistor circuit causes the first transistor circuit to change the second transistor circuit to the second transistor circuit. A semiconductor circuit characterized by being connected to a circuit. 2. The semiconductor circuit according to claim 1, wherein the folding transistor circuit has a current mirror structure. 3. The semiconductor circuit according to claim 1, wherein the folding transistor has a folded cascode structure. 4. The semiconductor circuit according to claim 1, wherein the first transistor circuit includes a P-channel type transistor. 5. A first circuit portion including one or more transistors, and an input voltage to the first circuit portion including one or more transistors, which is based on a current flowing through the first circuit portion. A second circuit portion which outputs a corresponding voltage; and a current transfer circuit which includes one or more transistors and draws out a current corresponding to a current flowing through the first circuit portion from the second circuit portion. A semiconductor circuit comprising. 6. The first and second circuit portions are respectively provided on a first direct current potential side, and the current transfer circuit is provided on a second direct current potential side different from the first direct current potential. The semiconductor circuit according to claim 5, which is characterized in that.