JP2003209758A - Integrated circuit for tuner and television tuner employing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a television tuner configured simply with an integrated circuit for a tuner that is capable of extracting a switching voltage without the need for provision of a terminal exclusively for outputting the switching voltage to switch-over reception band. <P>SOLUTION: The integrated circuit for tuner is provided with: a mixer circuit 13 for applying frequency conversion to a television signal into an intermediate frequency signal; terminals 12a, 12b to which the television signal is applied; and a band switching voltage generating circuit 14 for generating a high level or low level switching voltage to receive a high frequency or low frequency television signal. An input terminal of the mixer circuit is connected to the terminals 12a, 12b in terms of high frequencies and the switching voltage is applied to the terminals 12a, 12b via a resistor 15. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuner integrated circuit and a television tuner using the tuner integrated circuit.

[0002]

2. Description of the Related Art The structure of a conventional tuner integrated circuit and a television tuner using the same will be described with reference to FIG. FIG. 2 particularly shows a television tuner to which a UHF band television signal is input. The input tuning circuit 31 to which a television signal is input has a varactor diode (not shown), and the tuning voltage V is applied to the varactor diode.
Is applied. An FET (dual gate FET) 32 forming a high frequency amplifier circuit is provided after the input tuning circuit 31, and the output end of the input tuning circuit 31 is coupled to the first gate of the FET 32.

One end of the inductance element 33 is connected to the first gate of the FET 32, and the other end is grounded at a high frequency by a DC cut capacitor 34 and also grounded by a resistor 35. The source is grounded, and the power supply voltage B is applied to the drain through a series circuit of the power feeding resistor 36 and the choke inductor 37. The connection point between the power feeding resistor 36 and the choke inductor 37 is grounded by the DC cut capacitor 38.

A double tuning circuit 39, which is an interstage tuning circuit, is provided next to the FET 32. The primary side parallel tuning circuit includes a varactor diode 39a and an inductance element 3.
Varactor diode 3 which is composed of 9b and is a high potential point
The connection point between the anode of 9a and the inductance element 39b is coupled to the drain of the FET 32 via the coupling capacitor 40. The cathode of the varactor diode 39a is grounded by the DC cut capacitor 39c, and the other end of the inductance element 39b is also grounded. And
The tuning voltage V is applied to the cathode of the varactor diode 39a.

The parallel tuning circuit on the secondary side of the double tuning circuit 39 is composed of a varactor diode 39d and an inductance element 39e, and the connection point between the anode of the varactor diode 39d, which is the high potential point, and the inductance element 39e is the coupling capacitor 41. Through a first terminal 42a of an integrated circuit for tuner (hereinafter, simply referred to as integrated circuit) 42
Be combined with. The cathode of the varactor diode 39d is grounded by the DC cut capacitor 39f,
The other end of the inductance element 39e is also grounded. The tuning voltage V is applied to the cathode of the varactor diode 39d.
Is applied.

A mixing circuit 43 for frequency conversion is formed in the integrated circuit 42. The mixing circuit 43 is configured in a balanced type and has two transistors 43a and 43b whose emitters are connected to each other and whose bases are input terminals. One base of the transistor 43a is connected to the first terminal 42a. The base of the other transistor 43b is connected to the second terminal 42b. A bias voltage is applied in the integrated circuit 42 to the bases of the two transistors 43a and 43b. In addition, each base has an integrated circuit 4
2. Diodes 43c for preventing electrostatic breakdown configured in 2 and 4
3d is connected.

A band switching voltage generation circuit 44 is formed in the integrated circuit 42. The band switching voltage generation circuit 44 receives the data D of the channel to be received, and thereby selects the band to which the channel belongs from high (approximately equal to the power supply voltage B) or low (approximately 0 volt or open state). Generates the switching voltage of. The switching voltage has a high level when receiving a television signal of a UHF band channel that is a high frequency band, and has a low level when receiving a television signal of a VHF band channel that is a low frequency band. The output terminal of the band switching voltage generating circuit 44 is connected to the third terminal 42c.

Then, the first terminal 42a and the second terminal 4
2b are connected to each other by an inductance element 45. The third terminal 42c is connected to the connection point between the inductance element 33 and the resistance 35 by the resistance 46. Also. The tuning voltage V applied to the input tuning circuit 31 and the double tuning circuit 39 is generated from the integrated circuit 42, but its detailed description is omitted.

In the above structure, the switching voltage becomes high when receiving a UHF band television signal.
A proper bias voltage is applied to the first gate of the ET 32, and the FET 32 operates normally. And the FET 32
The television signal, which is amplified by, and subsequently selected by the double-tuned circuit 39, is converted into a balance by the inductance element 45 and is fed to the first terminal 42a of the integrated circuit 42.
Is input to the second terminal 42b.

When the television signal in the VHF band is received, the switching voltage becomes low and the bias voltage is not applied to the first gate of the FET 32, and the FET 3
2 is in the inoperative state.

[0011]

In the above configuration, the FET 3 is used.
The switching voltage is used to switch 2 into the operating state or the non-operating state. Therefore, the integrated circuit 41 is provided with the dedicated third terminal 41c. Reducing the number of terminals is an important issue for downsizing the integrated circuit 42.

Therefore, it is an object of the tuner integrated circuit of the present invention to be able to take out the switching voltage without providing a dedicated terminal for outputting the switching voltage for switching the reception band.

Also, the television tuner of the present invention is
It is an object of the present invention to simplify the configuration by using the tuner integrated circuit.

[0014]

In order to solve the above problems, a tuner integrated circuit according to the present invention comprises a mixing circuit for frequency-converting a television signal into an intermediate frequency signal, and a terminal to which the television signal is input. A band switching voltage generating circuit for generating a high or low switching voltage for receiving a high-frequency or low-frequency television signal, and connecting the input end of the mixing circuit to the terminal at high frequency. The switching voltage was applied via a resistor.

Also, in the tuner integrated circuit of the present invention, the mixing circuit comprises two transistors configured in a balanced type with the base as an input terminal, two terminals are provided, and the bases of the respective transistors are respectively provided. The switching voltage was applied to one of the terminals by connecting the terminals through a capacitive element.

Further, the television tuner of the present invention is
The tuner integrated circuit according to claim 1, the amplification field-effect transistor to which a television signal is input to a gate, and the tuning circuit connected to the drain of the field-effect transistor. The end was coupled to the terminal of the tuner integrated circuit and the gate was dc connected to the terminal.

Further, the television tuner of the present invention is
The tuner integrated circuit according to claim 2, the amplification field-effect transistor to which a television signal is input to the gate, and the tuning circuit connected to the drain of the field-effect transistor, the output of the tuning circuit. The end was coupled to the other terminal of the tuner integrated circuit, the one terminal and the other terminal were connected to each other by an inductance element, and the gate was connected to the one terminal in terms of direct current.

Further, the television tuner of the present invention is
The tuning circuit is composed of a double tuning circuit, the gate and the other terminal are connected to each other by a resistor, and a stray capacitance is formed between the resistor and the high potential side of the primary side tuning circuit in the double tuning circuit. did.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An integrated circuit for a tuner of the present invention and a television tuner using the same will be described below with reference to FIG.

FIG. 1 particularly shows a television tuner to which a UHF band television signal is inputted. The input tuning circuit 1 to which a television signal is input has a varactor diode (not shown), and the tuning voltage V is applied to the varactor diode. An FET (dual gate FET) 2 forming a high frequency amplifier circuit is provided after the input tuning circuit 1, and an output end of the input tuning circuit 1 is coupled to a first gate of the FET 2. One end of the inductance element 3 is connected to the first gate of the FET 2, and the other end is grounded at a high frequency by the DC cut capacitor 4 and is grounded by the bias resistor 5. The source is grounded,
A power supply voltage B is applied to the drain via a series circuit of a power feeding resistor 6 and a choke inductor 7. The connection point between the power feeding resistor 6 and the choke inductor 7 is grounded by the DC cut capacitor 8.

A double tuning circuit 9 which is an interstage tuning circuit is provided at the next stage of the FET 2. The primary side parallel tuning circuit is composed of a varactor diode 9a and an inductance element 9b, and the connection point between the anode of the varactor diode 9a, which is a high potential point, and the inductance element 9b is coupled to the drain of the FET2 via the coupling capacitor 10. It The cathode of the varactor diode 9a is grounded by the DC cut capacitor 9c, and the inductance element 9a
The other end of b is also grounded. And the varactor diode 9
The tuning voltage V is applied to the cathode of a.

The secondary side parallel tuning circuit in the double tuning circuit 9 includes a varactor diode 9d and an inductance element 9e.
And a connection point between the anode of the varactor diode 9d, which is a high potential point, and the inductance element 9e is coupled to the first terminal 12a of the tuner integrated circuit (hereinafter simply referred to as integrated circuit) 12 via the coupling capacitor 11. To be done. The cathode of the varactor diode 9d is grounded by the DC cut capacitor 9f, and the other end of the inductance element 9e is also grounded. Then, the tuning voltage V is applied to the cathode of the varactor diode 9d.

A mixing circuit 13 for frequency conversion is formed in the integrated circuit 12. The mixing circuit 13 is of a balanced type and has two transistors 13a and 13b whose emitters are connected to each other.
The base of the first terminal 12a by the capacitor 13c
And the base of the other transistor 13b is coupled to the second terminal 12b by a capacitor 13d.
The capacitors 13c and 13d are included in the integrated circuit 12. A bias voltage is applied to the bases of the two transistors 13a and 13b in the integrated circuit 12. Further, diodes 13e and 13f for preventing electrostatic breakdown configured in the integrated circuit 41 are connected to each base.

A band switching voltage generating circuit 14 is formed in the integrated circuit 12. The band switching voltage generation circuit 14 receives the data D of the channel to be received, and thereby selects the band to which the channel belongs from high (approximately equal to the power supply voltage B) or low (approximately 0 volt or open state). Generates the switching voltage of. The switching voltage has a high level when receiving a television signal of a UHF band channel that is a high frequency band, and has a low level when receiving a television signal of a VHF band channel that is a low frequency band. The output terminal of the band switching voltage generation circuit 14 is connected to the second terminal 12b via the resistor 15.

The first terminal 12a and the second terminal 12b are connected to each other by the phase inversion inductance element 16 provided outside the integrated circuit 12. The first terminal 12a is connected to the connection point between the inductance element 3 and the bias resistor 5 by the resistor 17. In this case, the resistor 17 is provided in close proximity to the high potential point of the primary side tuning circuit in the double tuning circuit 9 so as to form a stray capacitance. Further, it is effective to form the stray capacitance by disposing the signal line at the high potential point and the resistor 17 so as to be orthogonal to each other, but the disposition form can be appropriately selected.

Since the parallel resonant circuit is constituted by the stray capacitance described above and the two inductance elements 9a and 9e of the double tuning circuit 9, this serves as a trap circuit and can attenuate unnecessary signals.

Also. The tuning voltage V applied to the input tuning circuit 1 and the double tuning circuit 9 is generated from the integrated circuit 12, but its detailed description is omitted.

In the above structure, the switching voltage becomes high when receiving the UHF band television signal.
A proper bias voltage is applied to the first gate of ET2, and FET2 operates normally. Then, the television signal amplified by the FET 2 and subsequently selected by the double tuning circuit 9 is converted into a balance by the inductance element 16 and input to the first terminal 12a and the second terminal 13b of the integrated circuit 12. . Although the switching voltage is superimposed on the first terminal 12a and the second terminal 12b together with the television signal, there is no effect on the reception of the television signal. When receiving a VHF band television signal, the switching voltage becomes low and F
The bias voltage is not applied to the first gate of ET2, and FET2 becomes inoperative.

[0029]

As described above, the tuner integrated circuit of the present invention includes a mixing circuit for frequency-converting a television signal into an intermediate frequency signal, a terminal to which the television signal is input, and a high or low frequency band. And a band switching voltage generating circuit for generating a high or low switching voltage for receiving the television signal, and the input terminal of the mixing circuit is connected to the terminal in high frequency, and the switching voltage is connected via a resistor. Since the voltage is applied, the terminal for inputting the television signal and the terminal for outputting the switching voltage can be made common, and the number of terminals can be reduced.

Also, in the tuner integrated circuit of the present invention, the mixing circuit is composed of two transistors configured in a balanced type with the base as an input terminal, two terminals are provided, and the base of each transistor is provided with a capacitive element. Since it is connected to each terminal via one terminal and the switching voltage is applied to one of the terminals, a balanced mixing circuit can be constructed.

Further, the television tuner of the present invention is
The tuner integrated circuit according to claim 1, the amplification field-effect transistor to which a television signal is input to the gate, and the tuning circuit connected to the drain of the field-effect transistor, the output terminal of the tuning circuit being provided. The gate is connected to the terminal of the integrated circuit for the tuner and the gate is connected to the terminal in direct current, so the operation of the field effect transistor can be switched by the switching voltage output to the terminal connected to the mixing circuit, and the tuner configuration is simple. become.

Further, the television tuner of the present invention is
The tuner integrated circuit according to claim 2, the amplification field-effect transistor to which a television signal is input to the gate, and the tuning circuit connected to the drain of the field-effect transistor, the output terminal of the tuning circuit being provided. Since it is coupled to the other terminal of the tuner integrated circuit, and one terminal and the other terminal are connected to each other by an inductance element, and the gate is connected to one terminal in terms of direct current, the balanced mixed circuit is balanced. A television signal can be input and the operation of the field effect transistor can be switched.

Further, the television tuner of the present invention is
The tuning circuit is composed of a double tuning circuit, and the gate and the other terminal are connected to each other by a resistor to form a stray capacitance between the resistor and the high potential side of the primary side tuning circuit in the double tuning circuit. The wrap circuit can eliminate image interference.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a tuner integrated circuit of the present invention and a television tuner using the same.

FIG. 2 is a circuit diagram showing a configuration of a conventional tuner integrated circuit and a television tuner using the same.

[Explanation of symbols]

1-input tuning circuit 2 Field effect transistor 3 Inductance element 4 DC cut capacitor 5 Bias resistance 6 Power supply resistance 7 Choke inductor 8 DC cut capacitor 9 Double tuning circuit 9a, 9d Varactor diode 9b, 9e Inductance element 9c, 9f DC cut capacitor 10, 11 coupling capacitors 12 Integrated circuit for tuner 12a First terminal 12b Second terminal 13 Mixed circuit 13a, 13b transistors 13c, 13d capacitors 13e, 13f diodes 14 Switching voltage generation circuit 15 Resistance 16 Inductance element 17 Resistance

Claims (5)

[Claims] 1. A mixing circuit for frequency-converting a television signal into an intermediate frequency signal, a terminal to which the television signal is input, and switching between high and low for receiving a high-frequency or low-frequency television signal. A band switching voltage generating circuit for generating a voltage, wherein the input terminal of the mixing circuit is connected to the terminal in high frequency, and the switching voltage is applied via a resistor. circuit. 2. The mixing circuit includes two transistors configured in a balanced type with a base as an input terminal, two terminals are provided, and the bases of the respective transistors are respectively connected to the respective terminals via a capacitive element. 2. The connection and the switching voltage is applied to one of the terminals.
An integrated circuit for a tuner according to. 3. The tuner integrated circuit according to claim 1, an amplification field effect transistor having a gate for inputting a television signal, and a tuning circuit connected to a drain of the field effect transistor. A television tuner in which an output terminal of the tuning circuit is coupled to the terminal of the tuner integrated circuit, and the gate is connected to the terminal in a direct current manner. 4. The tuner integrated circuit according to claim 2, a field effect transistor for amplification into which a television signal is input to a gate, and a tuning circuit connected to a drain of the field effect transistor, The output terminal of the tuning circuit is coupled to the other terminal of the tuner integrated circuit, the one terminal and the other terminal are connected to each other by an inductance element, and the gate is connected to the one terminal in terms of direct current. A television tuner characterized by what it has done. 5. The tuning circuit comprises a double tuning circuit,
5. The stray capacitance is formed between the gate and the other terminal by a resistor, and a stray capacitance is formed between the resistor and the high potential side of the primary side tuning circuit in the double tuning circuit. TV tuner.