JP2003204056A - Solid state imaging device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid state imaging device capable of reducing imaging defect (white spots) and suppressing rises in depletion voltage and shutter voltage, and to provide a method for manufacturing the same. <P>SOLUTION: The solid state imaging device comprises a photoelectric converting unit 60 disposed near a surface of a semiconductor substrate 31 and having an n-type impurity diffused layer 33 for photoelectric converting, a p-type impurity diffused layer disposed on a surface of the unit 60, and a charge transfer unit 61 made of an n-type impurity diffused layer 35 for transferring a signal charge so that the p-type impurity diffused layer has a central p-type high concentration region 34a having a higher impurity concentration than that of the p-type low concentration region 34b and the p-type low concentration region 34b of a periphery. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device and a method of manufacturing the same, and more particularly, to a solid-state image pickup in which an image pickup defect (white spot) is reduced and an increase in depletion voltage and an increase in shutter voltage are suppressed. The present invention relates to a device and a manufacturing method thereof.

[0002]

2. Description of the Related Art An image pickup device using a semiconductor such as a CCD (charge coupled device) image sensor has begun to be used in digital cameras and the like due to the spread of image input to PCs.
It is used in various applications such as scanners, digital copiers, and facsimiles. Further, along with the spread thereof, demands for smaller size, lower price, etc., as well as higher functionality and higher performance such as an increase in the number of pixels and an improvement in light receiving sensitivity are increasing.

Conventionally, as an example of a CCD, FIG.
An interline transfer type CCD as shown in (a) and (b) is used. Such a CCD has a plurality of photoelectric conversion units 50, which are two-dimensionally arranged in the vertical and horizontal directions pixel by pixel and accumulate signal charges according to the amount of incident light.
An image pickup unit is configured by a vertical shift register (vertical transfer unit) 51 that vertically transfers the signal charges read from the photoelectric conversion unit for each vertical column. Further, it has a horizontal shift register (horizontal transfer unit) 52 that transfers signal charges in the horizontal direction, and an output circuit unit 53 including an FDA (froating Diffusion Amplifier) or the like is provided at the final end of the horizontal shift register. ing.

The photoelectric conversion unit 50 includes an n-type silicon substrate 11
The vertical shift register 51 includes the first p-type well 12 formed on the surface of the first p-type well 12 and the n-type impurity diffusion layer 13 disposed therein.
Second p-type well 15 and n-type well 16 to be placed inside
It is composed by. Also, the vertical shift register 5
A first gate electrode 19 for charge transfer and a second gate electrode 20 for charge transfer and charge read are formed on the gate electrode 1 via a gate insulating film 18, and a light-shielding film 21 is formed thereon. Has been formed. Further, a second insulating film 22, a third insulating film 23 and a protective film 24 are formed on the area where these are formed.

A p-type diffusion layer 14 is formed on the photoelectric conversion section 50 in order to reduce imaging defects due to defects formed near the surface of the substrate during manufacturing of the solid-state imaging device. The upper part of the type impurity diffusion layer 13 is prevented from being depleted. The p-type diffusion layer 14
Is usually used with the first and second gate electrodes 19 and 20 as a mask to implant boron with an energy of 15 to 30 ke.
V and dose 1 × 10 ¹³ to 2 × 10 ¹⁴ cm ⁻² are formed by ion implantation. Also, the first p
A p-type diffusion layer 17 for pixel separation is formed on the surface of the well 12 between the p-type diffusion layer 14 and the n-type well 16.

In such a solid-state image pickup device, when light is incident from above the p-type diffusion layer 14, the p-type diffusion layer 14,
Photoelectric conversion is performed in the n-type impurity diffusion layer 13 and the first p-type well 12, and electron-hole pairs are generated. The generated electrons are accumulated in the n-type impurity diffusion layer 13 of the photoelectric conversion unit. Then, by applying a voltage to the second gate electrode 20, signal charges are instantaneously read out to the n-type well 16 of the vertical shift register 51 in a part of the vertical blanking period for each vertical column. The signal charges transferred to the vertical shift register 51 are sequentially transferred to the horizontal shift register 52 for each scanning line in the horizontal blanking period by the first gate electrode 19 and the second gate electrode 20, and are transferred in the horizontal direction. . The transferred signal charge is converted into a voltage and output in the output circuit section 53.

[0007]

The above-mentioned CCD has the following problems. That is, as shown in FIG. 5, in order to reduce the shutter voltage, it is necessary to increase the impurity concentration of the p-type diffusion layer 14. However, when the impurity concentration of the p-type diffusion layer 14 is increased, the depletion voltage rises as shown in FIG. As a result, there arises a problem that the read voltage of the signal charge generated in the photoelectric conversion unit to the vertical shift register 51 becomes high.

When the impurity concentration of the p-type diffusion layer 14 is increased, the p-type diffusion layer 14 and the vertical shift register 51 are also increased.
The electric field strength becomes large in the PN junction region formed with the n-type well 16. As a result, the exchange of charges between the n-type well 16 and the photoelectric conversion section 50 is promoted,
Imaging defects (white dots) are likely to occur. On the other hand, when the impurity concentration of the p-type diffusion layer 14 is lowered to reduce the depletion voltage, there is a trade-off relationship that the shutter voltage increases. The present invention has been made in view of the above problems, and provides a solid-state imaging device capable of reducing imaging defects (white spots) and suppressing an increase in depletion voltage and an increase in shutter voltage, and a manufacturing method thereof. The purpose is to provide.

[0009]

DISCLOSURE OF THE INVENTION The present invention is directed to a photoelectric conversion part which is arranged near the surface of a semiconductor substrate and comprises an n-type impurity diffusion layer for photoelectric conversion, and a p-type impurity diffusion which is arranged on the surface of the photoelectric conversion part. A solid-state imaging device comprising: a layer; and a charge transfer section including an n-type impurity diffusion layer that transfers the signal charge, wherein the p-type impurity diffusion layer includes a p-type low-concentration region in a peripheral portion and the p-type low-concentration region. P in the central part where the impurity concentration is higher than the concentration region
Provided is a solid-state imaging device including a mold high concentration region.

According to the present invention, (a) an n-type impurity diffusion layer serving as a charge transfer portion, an n-type impurity diffusion layer serving as a photoelectric conversion portion, and an n-type impurity diffusion layer serving as the photoelectric conversion portion are formed on a semiconductor substrate. Forming a p-type impurity diffusion layer on the surface of
(B) forming a p-type high concentration region in the central portion of the p-type impurity diffusion layer using a resist pattern having a window in the central portion of the p-type impurity diffusion layer as a mask, or (b ') A charge transfer electrode is formed on the charge transfer portion, a light shielding film extending from the charge transfer portion to a peripheral portion of the p type impurity diffusion layer is formed, and the light shielding film is used as a mask to form the p type impurity diffusion layer. Provided is a method for manufacturing a solid-state imaging device having a p-type high-concentration region formed in a central portion.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION The solid-state image pickup device of the present invention comprises at least a semiconductor substrate, a photoelectric conversion portion, a charge transfer portion, and a p-type impurity diffusion layer formed in the semiconductor substrate. The semiconductor substrate of this solid-state imaging device is not particularly limited as long as it is a substrate used for forming a semiconductor device, and examples thereof include elemental semiconductors such as silicon and germanium, GaAs, InGaAs, and Z.
A compound semiconductor such as nSe may be used. Of these, a silicon substrate is preferable. On the surface of the semiconductor substrate, in addition to the photoelectric conversion section, the charge transfer section, and the p-type impurity diffusion layer, there are separated regions, contact regions, channel stopper regions, etc.
One or more regions containing a high concentration of n-type or p-type impurities may be formed, and on the semiconductor substrate,
It may be formed by combining other semiconductor devices and circuits. The semiconductor substrate is preferably of p-type or n-type conductivity, and further, a p-type well (impurity diffusion layer) is preferably formed in a region where the solid-state imaging device is formed.

The photoelectric conversion section functions as a light receiving section for generating signal charges by photoelectric conversion when light is incident, and is composed of an n-type impurity diffusion layer. The size, shape, number, depth, impurity concentration, etc. of the n-type impurity diffusion layer are
It can be appropriately set according to the performance of the solid-state imaging device to be obtained. The depth of the n-type impurity diffusion layer is 0.8-1.
It is suitable that the impurity concentration is about 0 μm, the impurity concentration is about 10 ¹⁵ to 10 ¹⁹ cm ⁻³ , and further about 10 ¹⁶ to 10 ¹⁸ cm ⁻³ .
The photoelectric conversion unit is arranged on or near the surface of the semiconductor substrate so that the incident light reaches or the generated light is emitted. If the solid-state imaging device handles holes, the photoelectric conversion unit may be p-type.

The p-type impurity diffusion layer is for reducing imaging defects due to defects formed near the surface of the substrate during the manufacture of the solid-state imaging device, and is formed on the surface of the n-type impurity diffusion layer forming the photoelectric conversion section. It is arranged. The p-type impurity diffusion layer preferably corresponds to the size, shape and number of the n-type impurity diffusion layers. The depth of the p-type impurity diffusion layer can be appropriately adjusted by the depth of the n-type impurity diffusion layer, the impurity concentration, and the like. For example, it is preferably shallower than the depth of the n-type impurity diffusion layer. When the depth of the n-type impurity diffusion layer is within the above range, about 0.1 to 0.2 μm is suitable. Further, the p-type impurity diffusion layer is formed with a low concentration region having a low impurity concentration in the peripheral portion and a high concentration region having a higher impurity concentration in the central portion than in the peripheral portion. Specifically, in the peripheral area, 10 ¹⁷ to 10 ¹⁸ c
m ^-3 can be mentioned. The area ratio of the high-concentration region to the total p-type impurity diffusion layer can be appropriately adjusted by the shutter voltage. Due to the presence of such a concentration difference in the p-type impurity diffusion layer, it is possible to suppress an imaging defect (white spot), an increase in depletion voltage, and an increase in shutter voltage that occur when charges are read from the photoelectric conversion unit. . When the hole is handled as the solid-state imaging device, the conductivity type of the impurity diffusion layer may be changed as necessary.

The charge transfer section has a function of transferring signal charges.
This is achieved by the n-type impurity diffusion layer.
As long as it has an n-type impurity diffusion layer,
P-type or n-type immediately below the area or surrounding the area
An impurity diffusion layer may be formed. n-type impurity diffusion
Get the size, shape, number, depth, and impurity concentration of layers
Can be set appropriately according to the performance of the solid-state imaging device
it can. Specifically, the depth of the n-type impurity diffusion layer is 0.5.
μm, impurity concentration is 10¹⁵-10¹⁹cm ^-3Degree
Appropriate. The charge transfer unit is connected to the photoelectric conversion unit.
Is a surface of the semiconductor substrate for transferring charges to the photoelectric conversion unit.
It is preferably arranged on the surface. In addition, solid-state imaging device
Charge transfer when dealing with holes as
The part may be p-type.

In the solid-state image pickup device of the present invention, a charge transfer electrode and a light shielding film are further formed on the charge transfer portion. The charge transfer electrode is formed so as to almost completely cover the charge transfer portion via the insulating film, and a pulse is applied to the charge transfer electrode to transfer the signal charge.
As the insulating film in this case, for example, a silicon oxide film,
A silicon nitride film or a laminated film thereof can be used. A suitable film thickness is about 35 to 55 nm. The charge transfer electrode is not particularly limited as long as it is formed of a conductive material. For example, an amorphous, single crystal or polycrystalline N-type or P-type semiconductor (eg, silicon, germanium, etc.) Alternatively, a compound semiconductor (for example, G
aAs, InP, ZnSe, CsS, etc.); gold, platinum,
Metals or alloys of silver, copper, aluminum, etc .; refractory metals or alloys of titanium, tantalum, tungsten, etc .; silicides and polycides with refractory metals; single-layer films or laminated films of transparent conductive materials such as ITO, SnO ₂ etc. Can be formed by. The thickness of the charge transfer electrode is, for example, 300 to 6
The thickness is about 00 nm.

A light shielding film is formed on the charge transfer electrode via an insulating film. The light-shielding film is not particularly limited as long as it is a material and a film thickness capable of almost completely blocking visible light and / or infrared light, and is, for example, about 500 to 1000 nm formed of the above metal film, alloy film or the like. The film thickness of The insulating film is not particularly limited, and any of the commonly used insulating films can be used. The light-shielding film may be formed so as to cover at least the charge transfer electrode almost completely, but may be formed over the charge transfer portion and a part of the photoelectric conversion portion. Further, it is preferable that a high-concentration impurity diffusion layer of the same conductivity type as the semiconductor substrate or the well is formed as a pixel separation region between the photoelectric conversion unit and the charge transfer unit. The impurity concentration of this pixel isolation region is, for example, about 10 ¹⁹ cm ⁻³ .

A film having various functions such as a flattening film and a protective film is formed as a single layer or a laminated layer above the photoelectric conversion section and the charge transfer section. For example, a film thickness of 100
A silicon oxide film of about 3000 nm by the CVD method,
Plasma by the CVD method TEOS (Tetra-Ethoxy Silan)
e) film, LTO (Low Temperature Oxide) film, HTO
(High Temperature Oxide) film, NSG (None-Doped S)
Examples thereof include an ilicate glass) film, an SOG (Spin On Glass) film formed by spin coating, a single layer film such as a silicon nitride film formed by a CVD method, or a laminated film thereof. Furthermore, the microlens, which may have a convex microlens formed above the photoelectric conversion portion, is preferably made of a material having a property of transmitting visible light and / or near infrared light.

In the method of manufacturing a solid-state image pickup device of the present invention, in the step (a), an n-type impurity diffusion layer serving as a photoelectric conversion part, an n-type impurity diffusion layer serving as a charge transfer part, and a photoelectric conversion part are formed on the semiconductor substrate. A p-type impurity diffusion layer is formed on the surface of the n-type impurity diffusion layer. These impurity diffusion layers are
It can be formed by a method usually used in the art. For example, it is possible to form a resist mask having a predetermined shape by a known photolithography and etching process, and form the resist mask by ion implantation. Alternatively, a silicon film containing a predetermined impurity may be formed on a region where an impurity diffusion layer is to be formed and then solid-phase diffusion may be performed by heat treatment. The order of forming these impurity diffusion layers may be any order. Further, it may be formed before or after a part of the step (b) or (b ') described later, if possible, all the steps.

In step (b), a p-type high concentration region is formed in the center of the p-type impurity diffusion layer using the resist pattern having a window in the center of the p-type impurity diffusion layer as a mask. As described above, the method of forming the resist pattern includes known photolithography and etching steps. Further, as the method of forming the p-type high concentration region, as described above, in addition to ion implantation, vapor phase diffusion or the like can be used, but ion implantation is preferable.
In this case, it is preferable to use BF ₂ as the ionic species. As described above, this step does not necessarily have to be performed after the p-type impurity diffusion layer is formed, and may be formed in advance in the central portion of the region where the p-type impurity diffusion layer is to be formed. .

Further, in another method for manufacturing a solid-state image pickup device according to the present invention, a step (b ') is used instead of the step (b).
A charge transfer electrode is formed on the charge transfer portion, a light shielding film extending from the charge transfer portion to a peripheral portion of the p type impurity diffusion layer is formed, and the light shielding film is used as a mask to form the p type impurity diffusion layer. You may form a p-type high concentration area | region in the center part of.
According to such a process, the mask process can be omitted. In addition, in the method for manufacturing a solid-state imaging device of the present invention, in addition to the above steps, the steps usually performed in the field such as ion implantation, heat treatment, formation of a conductive film or an insulating film, formation of a wiring layer, and the like are performed. You may go before, during, or after.

The solid-state image pickup device of the present invention comprises a CCD and a CM.
Not only so-called solid-state imaging devices such as OS image sensor, CMD, charge injection device, bipolar image sensor, photoconductive film image sensor, stacked CCD, infrared image sensor, etc., but also light receiving manufactured in the manufacturing process of semiconductor integrated circuits. It includes all elements formed as various devices such as elements, light emitting elements such as light emitting diodes, or light transmission control elements such as liquid crystal panels. The solid-state imaging device and the method for manufacturing the same according to the present invention will be described below in detail with reference to the drawings.

As shown in FIG. 1, the solid-state image pickup device of the present invention includes a first p-type well 32 formed on the surface of an n-type silicon substrate 31 and an n-type diffusion layer 33 arranged therein. A photodiode unit (photoelectric conversion unit) 60 that performs photoelectric conversion to generate a signal charge, and the first p-type well 3
Second p-type well 35 and n-type well 3 placed in
6 and has a charge transfer section 61 for transferring signal charges. In addition, a first gate electrode 39 for charge transfer and a second gate electrode 40 for charge transfer and charge read are formed on the charge transfer section 61 with the gate insulating film 38 interposed therebetween, and a second gate electrode 40 for charge transfer and charge read is formed thereon. A light shielding film 41 is formed. Further, on the region where these are formed, the second insulating film 42 having a reflow property and the third insulating film 4 having a reflow property are formed.
3 and the protective film 44 are formed. The charges are read from the photoelectric conversion unit 60 by the second gate electrode 40. In addition, the charges read from the photoelectric conversion unit 60 by the first gate electrode 39 and the second gate electrode are vertically transferred (not shown, see FIG. 7A) and horizontally transferred (not shown). And a detection unit (not shown) at the final stage of the horizontal transfer unit.

On the photodiode portion 60,
In order to reduce imaging defects due to defects formed in the vicinity of the surface of the substrate during manufacturing of the solid-state imaging device, the p-type high concentration region 34a having a relatively high impurity concentration at the central portion and the impurity concentrations at both sides thereof are formed. A relatively low p-type low concentration region 34b is formed. Further, a p-type diffusion layer 37 for pixel separation is formed on the surface of the first p-type well 32 and between the p-type low concentration region 34 b and the n-type well 36.

In the solid-state image pickup device having such a structure, since the p-type high concentration region 34a and the p-type low concentration region 34b formed on the surface of the n-type diffusion layer 33 make only the central portion have high concentration, As shown in FIG. 7, while maintaining the depletion voltage as in the conventional structure, as shown in FIGS. 8 and 9, the shutter voltage, the p-type high concentration region 34a, the p-type low concentration region 34b and the charge are reduced. It is possible to suppress an increase in electric field strength with the transfer unit. As a result, it is possible to suppress the imaging defect (white spot) that occurs when the charge is read from the photoelectric conversion unit 60. Such a solid-state imaging device can be manufactured by the following method.

First, as shown in FIG. 2A, boron ions are implanted into the n-type silicon substrate 31 with an implantation energy of 5.
Ion implantation is performed under the conditions of 00 keV and a dose of 2 × 10 ¹¹ cm ^-2 , and a heat treatment is performed to form the first p-type well 3
Form 2. A resist pattern (not shown) having a window in a predetermined region is formed on the obtained silicon substrate 31, and using this as a mask, boron is implanted at an energy of 300 keV and a dose of 8 × 10 ¹¹ cm ⁻² . Ions are implanted under the conditions to form the second p-type well 35. Using the same resist pattern, phosphorus or arsenic is ion-implanted under the conditions of an implantation energy of 120 keV and a dose of 5 × 10 ¹² cm ⁻² to form an n-type well 36, and the resist pattern is removed. Further, another resist pattern having a window in a predetermined region is formed, and the resist pattern is used as a mask to implant boron with an implantation energy of 120 ke.
Ion implantation was performed under the conditions of V and dose 2 × 10 ¹² cm ^-2 , and
A p-type diffusion layer 37 for pixel separation is formed in a region adjacent to the mold well 36.

Then, a silicon oxide film having a film thickness of about 35 nm is formed as a gate insulating film 38 on the silicon substrate 31 by a thermal oxidation method, and a first poly-silicon film having a film thickness of about 350 nm is formed thereon by an LP-CVD method. A silicon film is formed. By existing lithography and etching technology,
The first polysilicon film is patterned to form the first gate electrode 39. The first gate electrode 39 is doped with phosphine, phosphorus chloride or the like so as to have a predetermined resistivity. Then, as shown in FIG.
A silicon oxide film having a film thickness of about 150 nm is formed on the first gate electrode 39 by thermal oxidation or a CVD method, and a silicon oxide film is formed on the silicon oxide film.
A second polysilicon film having a film thickness of about 350 nm is formed by the LP-CVD method. The second polysilicon film is patterned by the existing lithography and etching technique to form the second gate electrode 40. After that, the second gate electrode 40 is formed with a film thickness of 150 n by thermal oxidation or a CVD method.
A silicon oxide film of about m is formed.

Then, as shown in FIG. 2C, the first
Using the second gate electrodes 39 and 40 as masks, phosphorus ions are ion-implanted under the implantation conditions of an implantation energy of 300 to 600 keV and a dose of 7 × 10 ^{11 to} 1.5 × 10 ¹² cm ⁻² , and the n-type diffusion layer 33. To form. Further, with the first and second gate electrodes 39 and 40 as a mask, boron is implanted with an implantation energy of 15 to 20 keV and a dose of 1 to 2 ×.
Ions are implanted at 10 ¹³ cm ^-2 to form a p-type low concentration region 34b on the surface of the n-type diffusion layer 33. Then, FIG.
As shown in (D), a resist film is applied on the obtained silicon substrate 31 to form a resist pattern 45 having a window at the center of the p-type low concentration region 34b.

As shown in FIG. 3E, using this resist pattern as a mask, BF ₂ is ion-implanted under the conditions of an implantation energy of 15 to 20 KeV and a dose of 6 to 8 × 10 ¹³ cm ^-2 , A p-type high concentration region 34a is formed in the center of the p-type low concentration region 34b. Resist pattern 4
5F is removed, and as shown in FIG. 3F, a silicon oxide film having a film thickness of about 100 nm and a film thickness of 150 nm as the light shielding film 41 are formed on the obtained silicon substrate 31 by the CVD method.
A tungsten film is formed to some extent. A resist pattern (not shown) having a window on the p-type high concentration region 34a is formed thereon, and the tungsten film existing on the p-type high concentration region 34a is removed by etching. Further, on top of that, TEOS / O ₂ is added as a second insulating film 42 for the purpose of preventing a reaction with a third insulating film having a reflow property described later.
An oxide film having a film thickness of 100 to 400 nm is formed in a plasma atmosphere under the conditions of 00/350 SCCM and power of 460 W.

After that, as shown in FIG.
On the second insulating film 42 as a third insulating film 43.
A BPSG film having a thickness of about 0 nm is formed, heat treatment is performed at 950 ° C. for 30 minutes, and the third insulating film 43 is reflowed to be flattened. Then, a contact hole (not shown) is formed in a predetermined region, a wiring layer (not shown) made of an Al—Cu film is formed, and a SiN film having a thickness of about 300 nm is formed as a protective film 44 by the CVD method. Formed to obtain a solid-state imaging device.

In the above manufacturing method, the p-type high concentration region 34a is formed by using the photolithography and etching process. However, after forming the light shielding film 41, the light shielding film 41 is used as a mask. , Boron, implantation energy 15 to 20 KeV, dose 6 to 8 × 10 ¹³
Ions may be implanted at cm ⁻² to form the p-type high concentration region 34a.

[0031]

According to the present invention, the p-type impurity diffusion layer arranged on the surface of the photoelectric conversion portion is composed of the p-type low concentration region in the peripheral portion and the p-type high concentration region in the central portion. It is possible to suppress an increase in depletion voltage and an increase in shutter voltage while reducing an image pickup defect (white spot) by reducing the electric field strength between the photoelectric conversion unit and the charge transfer unit.

[Brief description of drawings]

FIG. 1 is a schematic sectional view of a main part of a solid-state imaging device according to the present invention.

FIG. 2 is a schematic cross-sectional affirmative view of essential parts showing a method for manufacturing a solid-state imaging device according to the present invention.

FIG. 3 is a schematic cross-sectional affirmative view of essential parts showing the method for manufacturing the solid-state imaging device of the present invention.

FIG. 4 is a graph showing the relationship between the impurity concentration of the p-type diffusion layer and the depletion voltage in the solid-state imaging device of the present invention.

FIG. 5 is a graph showing the relationship between the impurity concentration of the p-type diffusion layer and the shutter voltage in the solid-state imaging device of the present invention.

FIG. 6 is a graph showing the relationship between the impurity concentration of the p-type diffusion layer and the electric field strength between the p-type diffusion layer and the charge transfer section in the solid-state imaging device of the present invention.

7A and 7B are a schematic plan view and a schematic sectional view of a main part of a conventional CCD.

FIG. 8 is a graph showing a relationship between an impurity concentration of a p-type diffusion layer and a depletion voltage in a conventional CCD.

FIG. 9 is a graph showing the relationship between the impurity concentration of the p-type diffusion layer and the shutter voltage in a conventional CCD.

FIG. 10 is a graph showing the relationship between the impurity concentration of the p-type diffusion layer and the electric field strength between the p-type diffusion layer and the charge transfer portion in the conventional CCD.

[Explanation of symbols]

31 Silicon substrate 32 First p-type well 33 n-type diffusion layer 34a p-type high concentration region 34b p-type low concentration region 35 Second p-type well 36 n-type well 37 P-type diffusion layer for pixel separation 38 Gate insulating film 39 First gate electrode 40 Second gate electrode 41 Light-shielding film 42 Second insulating film 43 Third insulating film 44 Protective film 45 resist pattern 60 Photodiode part (photoelectric conversion part) 61 charge transfer unit

Claims (7)

[Claims] 1. A photoelectric conversion part, which is arranged near the surface of a semiconductor substrate and comprises an n-type impurity diffusion layer for photoelectric conversion, a p-type impurity diffusion layer arranged on the surface of the photoelectric conversion part, and the signal charges are transferred. A solid-state imaging device having a charge transfer portion formed of an n-type impurity diffusion layer, wherein the p-type impurity diffusion layer has a higher impurity concentration than the peripheral p-type low concentration region and the p-type low concentration region. A solid-state imaging device comprising a p-type high-concentration region in the central portion. 2. The peripheral p-type low concentration region is 10 ¹⁷ cm ^-3.
The device of claim 1 having an impurity concentration of. 3. The p-type high-concentration region in the central portion is p-type in the peripheral portion.
The apparatus according to claim 1, which has a distance of 0.1 μm or more from the end of the mold low-concentration region. 4. The device according to claim 1, wherein a charge transfer electrode and a light shielding film are formed on the charge transfer section. 5. (a) n serving as a charge transfer portion on a semiconductor substrate
-Type impurity diffusion layer, n-type impurity diffusion layer serving as a photoelectric conversion unit,
A p-type impurity diffusion layer is formed on the surface of the n-type impurity diffusion layer to be the photoelectric conversion section, and (b) the p-type impurity diffusion layer is patterned using the resist pattern having a window at the center thereof as a mask. The method for manufacturing a solid-state imaging device according to claim 1, wherein a p-type high concentration region is formed in a central portion of the type impurity diffusion layer. 6. (a) n serving as a charge transfer portion on a semiconductor substrate
-Type impurity diffusion layer, n-type impurity diffusion layer serving as a photoelectric conversion unit,
A p-type impurity diffusion layer is formed on the surface of the n-type impurity diffusion layer to be the photoelectric conversion unit, and (b ') a charge transfer electrode is formed on the charge transfer unit. 5. A p-type high concentration region is formed in the central portion of the p-type impurity diffusion layer by forming a light-shielding film extending on the peripheral portion of the impurity diffusion layer and using the light-shielding film as a mask. A method for manufacturing the described solid-state imaging device. 7. The method according to claim 5, wherein the p-type high concentration region is formed by using BF ₂ gas.