JP2003198376A - Coding method and apparatus, and record medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that coding has to be made while processing indefinite bits and discriminating constraint length for making coding equipment complex, and constraint length judgment due to variable length coding must be made. <P>SOLUTION: Coding for outputting a three-bit fixed-length output-coding word or terminating processing is made to the input bit of upper two bits, in an input bit series where DSV control bits that are accumulated in a shift register 110 are inserted using a coding table 111. The terminate processing is made by using a terminate table. A row of codewords having a small DSV value in rows of codeword that are accumulated in coding memories 116 and 117 is outputted from a memory control section 119. The row of codeword is coded as if it is fixed-length coding by using the coding table 111, and is a codeword that is subjected to DSV-controlled variable length coding. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coding method, a coding device and a recording medium, and more particularly to converting digital input data into a code word suitable for recording on a recording medium or transmitting through a transmission medium. The present invention relates to an encoding method, an encoding device, and a recording medium.

[0002]

2. Description of the Related Art Conventionally, as an encoding method for recording digital information on an optical recording medium such as a magnetic recording medium or an optical disk, an encoding method for obtaining a codeword string satisfying a run length limiting rule RLL (d, k) is used. Method is used. Here, the run length restriction rule RLL (d, k) is such that the minimum number of logical values “0” between the logical values “1” and “1” in the code word is d, and Logical values of "0" and "0"
It shows a rule in which the maximum number of logical values "1" between and is k.

This run length restriction rule RLL (d,
As a method of encoding digital information so as to satisfy k), block encoding such as EFMPlus used in a DVD (Digital Versatile Disc) and RLL (1,7) often used in magnetic recording are used. There is a representative variable length coding.

The former is 1 for 8 data bits
Encoding is performed using an encoding table to which 6-bit codewords can be assigned without fail. When encoding, RLL is used.
Although there are exceptions for satisfying the (d, k) restriction, 8-bit data can always be converted into 16-bit data. On the other hand, the latter basically converts 2-bit data into 3-bit codewords, but inputs 4 bits as 6 bits and 6 bits as 9 bits in order to satisfy the RLL (d, k) restriction. It has been generally used to perform conversion in which the constraint length of encoding differs depending on the bit pattern.

For example, Japanese Unexamined Patent Publication No. 9-232963 proposes an effective coding method for variable length codes. That is, this conventional encoding method is such that, when converting data having a basic data length of m bits into a variable-length code having a basic code length of n bits, bits at predetermined positions of a code whose run becomes infinite when continuous. Is an indeterminate bit, and is a code having a predetermined number of 0s or 1s consecutive from the least significant bit to the upper bit side, and the number of 0s or 1s and the most significant bit of the next succeeding code. Bits at predetermined positions of 0 or 1 consecutive from the least significant bit to the upper bit side of a code whose sum with the maximum value of the number of consecutive 0s or 1s on the bit side is larger than the maximum run k are indeterminate bits And a step of converting the data having the basic data length of m bits into a variable length code having the basic code length of n bits, and the consecutive number in the converted variable length code does not exceed the minimum run d. Or 1 A method comprising the steps of detecting a a method as a code that does not contain a sign and uncertain bits including indeterminate bit can be handled in the same manner.

Further, Japanese Patent Laid-Open No. 11-346154 proposes RLL (1,7) having a maximum constraint length of 8 bits (constraint length is 4 when 2 bits are a coding unit), and further coding is performed. The method is specified. That is, in this conventional encoding method, the number of "1" in the elements of the data string and the "1" in the elements of the codeword string to be converted
The conversion rule is such that the remainder when the number of is divided by 2 matches with 1 or 0, the first replacement code that limits the continuation of the minimum run d to a finite number of times or less, and the run length limit is kept. By performing the conversion process with the conversion table having the second replacement code for
(Digital Sum Value) control is possible.

[0007]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
According to the conventional encoding method described in Japanese Patent No. 232963,
Since the converted codeword contains uncertain elements, it is necessary to perform coding while processing the uncertain bits and determining the constraint length, which causes a problem that the encoder becomes complicated. There is. Further, according to the conventional encoding method disclosed in Japanese Patent Laid-Open No. 11-346154, it is necessary to perform a process such as a constraint length determination for the variable length code.

The present invention has been made in view of the above points,
For variable-length codes with different constraint lengths, the same code bit can always be output like a block code encoder.
An object of the present invention is to provide a coding method, a coding device, and a recording medium that can code codes having different constraint lengths with a simple coding algorithm.

[0009]

In order to achieve the above object, the first encoding method of the present invention is such that a predetermined run length limitation represented by RLL (d, k) is applied to an input bit sequence. In order to obtain a codeword string satisfying the rule according to the coding rule by the variable length code, the maximum constraint length at the time of coding is N
In a coding method for variable-length coding an input bit sequence with (N is an integer of 2 or more) variable-length coding rules, M (M is an integer of 2 or more) coding tables predetermined according to the variable-length coding rules. While preparing the elements, by referring to these M coding table elements, the code word bits for every predetermined n bits with respect to the m bits of the input bit sequence are coded as the output code words, and are preliminarily separated by predetermined frame delimiters. When inserting the synchronization word of a predetermined pattern, the length of the output code word is completed, DSV control bits are inserted at a predetermined data input bit interval, and the DSV control bit causes the DS of the output code word to be inserted.
It is characterized in that V control is performed.

According to the present invention, by referring to the M coding table elements, a predetermined n is set for m bits of the input bit sequence.
Encode the codeword bit for each bit as the output codeword,
Further, when inserting the sync word, the output code word is completed and the sync word is inserted, and then the DSV control is performed. Therefore, the same n bit code word bits are always used as in the block encoder. In addition to output, DSV control is possible.

Further, in order to achieve the above-mentioned object, the second encoding method of the present invention is configured such that each of the M encoding table elements in the first encoding method has one or more m bits. N bits of output codeword corresponding to the input bits,
Used to transform the next m input bits to obtain the next output codeword that satisfies the given run-length limiting rule RLL (d, k) even if the codewords are directly combined. , The state information that specifies one of the M encoding table elements is stored in association with each other, and the code indicated by the state information among these M encoding table elements is stored. In order to convert the p bits (p is an integer smaller than m) of the input bits into predetermined n-bit codewords with reference to the coded table element, and to complete the length of the output codeword, m bits are used. N for each input bit of
When the output codeword of bits and the codeword and the synchronization word are combined, a predetermined run length limiting rule RLL (d,
Next m to obtain the next output codeword that satisfies k)
Using a termination table in which a predetermined coding table element among M coding table elements used for converting input bits of bits is associated with status information indicating selection or non-selection. To do.

According to the present invention, among the M coding table elements, the coding table element indicated by the status information is referred to convert the p bits of the input bits into a predetermined n-bit code word, and the output code. In order to complete the word length, the termination table having the same structure as the above-mentioned coding table element is used. Therefore, it is always the same as the block code encoder without judging the constraint length. A variable-length coded codeword satisfying the RLL (d, k) restriction can be obtained even if n codeword bits are output, and the constraint length is determined by using a termination table. Without the end of the codeword.

Further, in order to achieve the above object, the encoding apparatus of the present invention uses an RLL for an input bit sequence.
In order to obtain a codeword string satisfying a predetermined run length restriction rule represented by (d, k) according to the coding rule by the variable length code, the maximum constraint length at the time of coding is N (N is an integer of 2 or more). In the coding device for variable-length coding an input bit sequence according to the variable-length coding rule, M (M is an integer of 2 or more) coding table elements that are predetermined according to the variable-length coding rule are prepared. Each of the M coding table elements corresponds to one or more m-bit input bits and has a predetermined run length limit even if the n-bit output codeword and the codeword are directly coupled. A coding table of one of the M coding table elements used to transform the next m input bits to obtain the next output codeword that satisfies the rule RLL (d, k). Corresponds to the state information that identifies the element Is configured to stored vignetting, these M-number of reference to p bits of the input bit coding table element indicating the state information of the coding table elements (p
Is an integer smaller than m) into a predetermined code word for every n bits, and a sync word having a predetermined pattern is inserted at a predetermined frame delimiter of the code word output from the coding means. When the synchronization word is inserted, the synchronization word insertion means for completing the length of the immediately preceding code word and the code word string in which the synchronization word is inserted are set at a predetermined data input bit interval DS.
After the V control bit is inserted, the DSV control bit performs DSV control of the code word by the DSV control bit.

According to the present invention, among the M coding table elements, the coding table element indicated by the status information is referenced to convert the p bits of the input bits into a predetermined n-bit code word and the output code. In order to complete the word length, the termination table having the same structure as the above-mentioned coding table element is used. Therefore, it is always the same as the block code encoder without judging the constraint length. Even if n code word bits are output, a variable length coded code word that satisfies the RLL (d, k) restriction can be obtained, and DSV control can also be performed.

The recording medium of the present invention is the first aspect of the present invention.
Alternatively, a codeword string obtained by encoding the input bit sequence by the second encoding method is recorded.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of an embodiment of an encoding apparatus according to the present invention. In the figure,
The input data is supplied to the 17 encoding unit 11, where processing such as synchronization word addition and DSV control is performed, and based on an encoding table 111 described later, the run length limiting rule RLL (1,7). Is coded, and every 11 bits of the input data, a code word obtained by converting the upper 2 bits into 3 bits is output.

The code word extracted from the 17 encoding unit 11 is NRZI converted by the NRZI conversion circuit 12 so that the minimum run length 1 and the maximum run length satisfy the run length limiting rule RLL (1,7). After being converted into a codeword sequence of 7 (recording data), it is sent to the output buffer 13. Then, it is recorded on an optical disc, which is an example of a recording medium, by a laser drive circuit, or recorded on a magnetic recording medium by a magnetic head drive circuit (neither is shown). Of course, the recording data from the output buffer 13 may be further channel-coded and transmitted via a transmission medium.

FIG. 2 shows a block diagram of an embodiment of the 17 encoder in FIG. In FIG. 2, the input data is
It is input to the encoding table 111 via the shift register 110 driven by a bit synchronous clock (not shown). The coding table 111 is composed of a coding table unit of six states in which the state information (table element) Sk is "0" to "5". Details of the configuration of the encoding table 111 will be described later.

The state information Sk output from the encoding table 111 is input to the encoding table 111 together with the bit pattern stored in the shift register 110, and the bit pattern of the encoding table element in the state determined by the state information Sk and And the state information Sk + 1 to be selected next is output together with the 3-bit output information.
In this embodiment, the shift register 110 is shifted by 2 bits.

Next, a configuration example of the coding table 111 will be described in detail with reference to FIGS. 4 to 8 by taking an example configured according to the coding rule of FIG. First, the coding rule shown in FIG. 3, which is a premise of the coding table 111, will be described. FIG. 3 shows the conversion rule (conversion table) of the RLL (1,7) code described in the above-mentioned Japanese Patent Laid-Open No. 11-346154, which is directly related to the present invention such as a synchronization word or a termination table. Although the non-existing part is omitted, the termination part can be realized by the present invention.

Here, as an example, the conversion rule conversion table described in the above-mentioned publication will be described as an example, but other conversion rules can be considered in the same way as the embodiments described below. It is obvious that it is possible to convert into a code word by.

The conversion table shown in FIG. 3 is a basic code that cannot be converted unless it is used as a conversion code (data "11" to "000000"), and conversion processing is possible without it. But with that,
Replacement codes (data "110111", "0000100000", "0" that enable more effective conversion processing
End code (data "00", "000") for terminating the code at any position.
0 "code). In addition, a synchronization signal is also defined in this conversion table.

The conversion table shown in FIG. 3 has a minimum run d = 1 and a maximum run k = 7, and includes an indeterminate code (a code including *) as an element of the basic code. The indeterminate code is
Regardless of the codeword string immediately before and immediately after, the minimum run d =
1 and maximum run k = 7 are determined to be “0” or “1”. For example, if the 2 bits to be converted are "11", the 1 channel bit of the immediately preceding codeword string is "11".
In the case of 1 ”, in order to keep the minimum run d = 1, the 2-bit data“ 11 ”is converted into the code word“ 000 ”, and when the 1-channel bit of the immediately preceding code word string is“ 0 ”,
2-bit data “11” to protect the maximum run k = 7
Is converted into the code word "101".

Further, when the input data is "110111", the code word string which follows further is referred to and "01"
When it is "0", this data is "0010000".
When the code string is converted into 0 "and the subsequent code string is other than" 010 ", the input data is in units of 2 bits (" 11 "," 0 ").
1 "," 11 ") is converted into a codeword, so the codeword *
Converted to 0 *, “010”, and * 0 *.

According to the conversion table shown in FIG. 3, R
In the LL (d, k) restriction, one of the data bits is 1 under the coding rule of d = 1, k = 7 and the coding rate of 2/3.
It is possible to perform encoding in which the evenness and the evenness of the code bit are equal, and d = 1, that is, the encoding that can limit the repetition of 2T in the recording data can be performed.

Next, in FIG. 3, when the constraint length is 1, it is expressed as shown in Table 1.

[Table 1]

Of these code words, * 0 * is "101" when the immediately preceding code bit is "0", as described above.
In the case of "1", it is defined as "000". Therefore, assuming that the table element 0 (state Sk = 0) has the immediately previous code bit "0" and the table element 1 (state Sk = 1) has the previous code bit "1", it is shown in FIG. An encoding table having such two table elements (state Sk) can be configured for a codeword with a constraint length of 1.

In FIG. 4, Dk indicates an input data bit, Ck is an output code word, the left numerical value indicates a decimal number, the right numerical value indicates a binary number, and Sk + 1 indicates a space between code words. The table element (state information) used to convert the next input data bit to obtain the next output codeword that satisfies the predetermined run length restriction rule RLL (1,7) even if directly combined Show (other FIG.
The same applies to FIG. 8).

Next, in FIG. 3, when the constraint length is 2, it is expressed as in Table 2.

[Table 2]

As shown in Table 2, there are three types of codewords having a constraint length of 2, and the data is "0" regardless of the previous bit.
If 01X "(X is indefinite; the same applies hereinafter), data"
The sign bit for "00" is given by "010",
In the case of 0001 ", the code bit is" 000 ". Therefore, the coding table of FIG. 5 is configured by further adding table elements to FIG.

In FIG. 5, Sk = 2 is a transition state when the constraint length is 2, for example, Sk = 0 and Dk =
When Dk = 10 is input after 00 is input, since the first input data 2 bits Dk = 00 is not in the table element 0 of Sk = 0, the subsequent input data 2 bits Dk
= 10, since the upper 3 bits are "001", Dk in the table element of Sk = 0 in FIG. 5 is "001".
The output code word Ck corresponding to "X", "010", is output.

Subsequently, Dk in the table element of Sk = 0
Since the next state Sk + 1 corresponding to “001X” is 2, the transition is made to table element 2 in the state of Sk = 2.
Next, since the input data Dk following the input data Dk “00” is “10”, the table element 2 in the state of Sk = 2
Since the next state Sk + 1 corresponding to “10XX” is 0 after the output codeword Ck “000” corresponding to Dk of “10XX” is output, the table element in the state of Sk = 0 again Transition to 0.

On the other hand, in FIG. 5, for example, when Dk = 00 or Dk = 00 is input and then Dk = 000 or 001 is input, Dk = 0 of the first 2-bit input data is input.
Since 0 does not exist in the table element 0 of Sk = 0, looking at the subsequent input data 3-bit Dk = 000 or 001, the upper 4-bit “0000” also does not exist in the table element of FIG. In this case, the output codeword Ck for 2 bits of Dk is calculated by the encoding table of constraint length 3 described below.
= 100 is output, and transition is made to the table element 3 as the next state Sk + 1. That is, the codeword having the constraint length of 3 is represented as shown in FIG. 3 to Table 3.

[0034]

[Table 3]

As shown in Table 3, there are four types of codewords having a constraint length of 3, and in order to satisfy this, a coding table as shown in FIG. 6 can be constructed by further adding table elements to FIG. . For example, in FIG. 6, Sk = 0 and Dk = 00.
When Dk = 001 is input after is input, first, the codeword Ck = 00 is calculated from Dk = 00001 of Sk = 0.
After 0 is output, transit to table element 2 in state 2,
Dk = 001 for the next upper 2 bits of Dk = 001
The code word Ck = 100 is output from XX, the constraint length of this code is greater than 2, and the transition to Sk = 3 is made as the next state.

Here, if the next input data Dk is "10", "000" is output as the code word Ck from the table of table element 3 (Sk = 3) and the table element 0 of state Sk = 0 is output. Transition. Therefore, for the input bit sequence “000010” at this time, the code word C to be output is
k becomes "000100000", which means that it follows the encoding rule shown in FIG.

In the encoding table of FIG. 6, Sk = 3
In table element 3 of, the order of input data words is "00XX
The reason why “0000X” is arranged higher than “X” is that it is necessary to make a judgment for Dk = 0000X first. Similarly, a judgment of “1000X” is made by “10XX”.
Do it before "X". That is, this table is arranged to compare the data words in order from the top and output the code words. Note that Sk + 1 = 4 included in Sk = 3 is the table element 4 when the constraint length is 4, which will be described next.

A codeword having a constraint length of 4 is represented as shown in FIGS.

[Table 4]

As shown in Table 4, there are two types of code words having a constraint length of 4, and in order to satisfy this, a coding element as shown in FIG. 7 is constructed by adding a table element 4 to FIG. it can. For example, the operation when Sk = 0 and the data sequence Dk = 00001000 having a constraint length of 4 is input is shown in Table 5
As shown in.

[0040]

[Table 5] That is, with respect to the input data series described above, the output codeword Dk is obtained by using the encoding table shown in FIG.
"000100100100" is output. this is,
It can be seen that the same result as the encoding rule shown in FIG. 3 is obtained.

As the input data Dk, "11011"
To satisfy the case where the exceptional condition "1" comes in,
The encoding table of FIG. 7 is not satisfactory. for that reason,
When the exceptional condition is added, a coding table as shown in FIG. 8 is constructed. For example, if the data sequence Dk of "11011100000" is input in the state of Sk = 0, the input data, the output codeword, and the table element (Sk + 1) to be used next in that case are the encoding table of FIG. Is used to obtain a 3-bit code word corresponding to every 2 bits of input data, as shown in Table 6.

[0042]

[Table 6] As can be seen from Table 6, the codeword obtained using the encoding table shown in FIG. 8 gives the same result as the encoding rule shown in FIG.

As described above, the coding table 11 shown in FIG.
1 is a table element 0 (Sk = 0) to 5 shown in FIG.
(Sk = 5) can be configured by an encoding table unit having six table elements, and the shift register 110 in FIG. 2 is configured by an 11-bit shift register.
By comparing 11 bits, the upper 2 bits of Dk of the encoding table are converted into 3 bits of the code word, and the state Sk + 1 of the next transition is output.

That is, according to the present embodiment, the 17-encoding unit 11 outputs a fixed-length output of 3 bits to the upper 2 bits of the input bit sequence stored in the 11-bit shift register 110. The codeword can be obtained. Further, even if the variable length code shown in FIG. 3 is output by outputting the coding table element to be coded next as the status information Sk + 1 and coding the next input bit with the table element corresponding to Sk + 1. It can be seen that coding similar to the block code is possible.

The coding table for basic conversion and the basic part of coding according to the present invention have been described above.

Since the encoding used in the present invention is a variable length code, the synchronization word 21 having a predetermined length as shown in FIG.
When a synchronization frame composed of a code word string 22 and a code word string 22 is formed, if the code word is not terminated at the rear end of the code word string and the constraint length extends to the next bit, the sync word is inserted. The run length restriction is no longer satisfied, which causes inconvenience that data cannot be decoded in the final frame. Therefore, it is known that a termination process is performed at the rear end of the synchronization frame (for example, the above-mentioned Japanese Patent Laid-Open No. 11-346).
154).

That is, the above-mentioned JP-A-11-34615.
In the encoding method described in Japanese Patent No. 4, the input data "00" is converted into the code "000", and the input data "000" is obtained.
For 0 ", the termination table for converting to the code" 010100 "is used when the constraint length is predetermined, and the first 1 bit of the synchronization signal pattern is used as the connection bit, and when the value is used for the termination table, By setting "1" and "0" when not used, it is possible to prevent the data immediately before that from being unable to be converted into a code when the synchronization signal is inserted.

On the other hand, in the present invention, the termination table (termination table) of the coding table configuration shown in FIG. 10 having the same configuration as the coding table of FIG. 8 is used for the termination processing. Next, the termination process in the present invention will be described.

In the coding method of this embodiment, coding is performed in units of two data bits, which is called a symbol. In the termination process, when the last symbol of the synchronization word or the data block to be encoded ends with "00", and when the last symbol and the immediately preceding symbol end with "0000", code words of "000" and "010100", respectively. Is converted to and the code word is terminated.

That is, in the encoding method according to the present invention,
In the termination process, the encoding table (termination table) shown in FIG. 10 is used, "000" is output when the data ends with "00", and "000" is output.
When the data ends with "0", "010" is output and then Sk + 1 = 4 is output, and transition is made to the coding table of the table element 4 in FIG. 8 to output "100" and terminate. Note that, in FIG. 10, Sk + 1 = X when the input data is “00” indicates that it is not necessary to determine Sk + 1.

When termination is performed, since the encoding according to the constraint length is completed and "0000" or "00" is input as a data symbol, Sk
It is limited to the case where encoding is performed with = 0 and Sk = 1.
Other than that, it is not necessary to terminate and normal encoding is possible according to the encoding table of FIG.

Next, the termination processing operation will be described in detail with reference to the flowchart of FIG. Note that FIG.
In the flow chart of "YE"
There is a branch of S "and a branch of" NO "in the horizontal direction.

The 17 encoding unit 11 of the present embodiment first determines whether the input symbol is one symbol before the minimum symbol or the last symbol (steps S1 and S2), and when neither is the normal processing, the normal processing is performed. (Step S
3) If one symbol before the final symbol, it is determined whether Sk = 0 or 1 (step S4). Sk = 0 and S
If neither k = 1, normal processing is performed (step S3). If Sk = 0 or Sk = 1, it is determined whether or not the input symbol is "0000XXXXXXXXX" (step S5).

If the determination in step S5 is YES, the process shown in FIG.
In accordance with the termination table of 0, the code word Ck “010” is output for the first 2 bits of the input symbol (step S6), and the next encoding table state information Sk + 1 = 4 is obtained from the termination table, and FIG. On the basis of the coding table of the table element 4 shown in (4), the code word Ck "100" is output for the next input symbol "00" (step S7).
00 "is obtained.

Also in the case of the final symbol, it is determined whether Sk = 0 or 1 (step S8). When neither Sk = 0 nor Sk = 1, normal processing is performed (step S3), and if Sk = 0 or Sk = 1, it is determined whether the input symbol is "00XXXXXXXXXX" (step S7). . The determination in step S7 is YE
If S, according to the termination table of FIG. 10, the code word Ck “000” is generated for the first 2 bits of the input symbol.
Is output (step S10).

That is, the processing of steps S5, S6, S9 and S10 shown within the broken line in FIG. 11 is performed by the termination table. After the processing of step S7 or S10, a synchronization word is added (step S11), and the termination processing ends. If the determinations in steps S5 and S9 are negative, normal processing is performed (step S
3).

Next, another embodiment of the coding apparatus of the present invention will be described. FIG. 12 shows a block diagram of a main part of another embodiment of the encoding device according to the present invention. In the figure,
The same components as those in FIG. 2 are designated by the same reference numerals and the description thereof will be omitted. The coding device shown in FIG. 12 is a device corresponding to the 17 coding unit 11 in FIG. 1, and performs the same coding as that in the above-mentioned embodiment and also uses the DSV control bits.
It is characterized in that it is controlled, and is disclosed in Japanese Patent Laid-Open No. 11-346154.
An example of the operation will be described taking the DSV control of the publication as an example.

The input data is input to the selector 113 together with the 1-bit DSV control bit whose value is 0 or 1. On the other hand, the timing control unit 112 controls the selector 113 according to the timing of inserting the DSV control bit at a predetermined data input bit interval to control the DS in the input data.
The V control bit is inserted and output to the shift register 110. The timing control unit 112 is driven by using a bit synchronization clock (not shown) as a master clock. The shift register 110 is an 11-bit shift register and is driven by a bit synchronization clock.

Using the encoding table 111, the selector 113 stored in the 11-bit shift register 110
In the input bit sequence in which the DSV control bits are inserted, the upper 2 input bits are subjected to encoding for outputting a 3-bit fixed-length output codeword or the above-described termination processing.

The code word output from the encoding table 111 is supplied to the selector 115, whereby the sequence to which the DSV control bit 0 is added is the first code memory 1
16 is supplied to and stored in the second code memory 117, and the sequence added with the DSV control bit 1 is supplied to and stored in the second code memory 117. Encoding of two series of code words can be performed by, for example, time division processing. Here, the codeword memories 116 and 117 store the codeword strings input after the time when the output codeword was output in the past.

On the other hand, the two series of codewords output from the selector 115 are also input to the DSV operation unit 118, where the DSV value of the codeword stored in the first code memory 116 and the second codeword are stored. The DSV values of the code words stored in the code memory 117 are calculated, and the absolute values of these DSV values are compared in magnitude. The memory control unit 119 uses the DS
The comparison result of the magnitude comparison of the absolute value of the DSV value by the V calculation unit 118 is received, and the code word memories 116 and 117 are
The timing control unit 112 receives the code word string from the code word memory in which the code word string with the smaller DSV value is stored.
From the NRZ of FIG.
Output to the I conversion circuit 12.

As described above, according to the present embodiment, the DS
When performing encoding while performing V control, fixed-length encoding can be performed using the encoding table 111 shown in FIG. 8, so there is no need to determine the constraint length of a codeword, and effective encoding is possible. It can be performed, and has an advantage that encoding can be simplified.

The present invention is not limited to the above embodiments, and other variable length codes are also configured with a coding table like block codes based on the same idea as described above. Needless to say, it is possible and included in the scope of the present invention. Further, in the present invention,
It includes a coding program for realizing the above-described coding method by a computer program.

[0064]

As described above, according to the present invention,
By referring to the M coding table elements, a predetermined n-bit codeword bit is coded as an output codeword with respect to m bits of the input bit sequence, and when a synchronization word is inserted, the output codeword After completing the length and inserting the sync word, D
By performing SV control, it is possible to always output the same n-bit codeword bits as in the block encoder and D
Since SV control is also possible, variable length coding is performed by a coding table similar to the coding of block codes,
In addition, it is possible to obtain a DSV-controlled codeword that satisfies the RLL (d, k) restriction.

Further, according to the present invention, it is possible to realize an encoding method and an encoding device capable of encoding a data bit pattern and state information as if they were fixed-length encoding without being restricted by a constraint length.

Further, according to the present invention, since the termination of the code word is performed by using the termination table having the same structure as the coding table of the block code, the synchronization word is inserted without judging the constraint length. A code word can be terminated at a point or a data end point.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of an encoding device of the present invention.

2 is a block diagram of an embodiment of an encoding unit in FIG. 1. FIG.

FIG. 3 is an RLL described in Japanese Patent Laid-Open No. 11-346154.
It is an encoding rule for the (1,7) code.

FIG. 4 is a diagram (No. 1) for explaining a coding table creating process used in the present invention.

FIG. 5 is a diagram (No. 2) for explaining the encoding table creating process used in the present invention.

FIG. 6 is a diagram (No. 3) for explaining the encoding table creating process used in the present invention.

FIG. 7 is a diagram (No. 4) for explaining a coding table creating process used in the present invention.

FIG. 8 is a diagram showing an example of an encoding table used in the present invention.

FIG. 9 is an explanatory diagram of a synchronization frame.

FIG. 10 is a diagram showing a configuration of an example of a termination table according to the present invention.

FIG. 11 is a flowchart of an example of termination processing according to the present invention.

FIG. 12 is a block diagram of essential parts of another embodiment of an encoding device according to the present invention.

[Explanation of symbols]

11 17 encoding unit 12 NRZI conversion circuit 13 Output buffer 14 Optical disc 15 Channel coding unit 110 shift register 111 encoding table 112 Timing control unit 113,115 Selector 116 and 117 code memory 118 DSV calculator 119 Memory control unit

Claims (6)

[Claims] 1. An RLL (d,
In order to obtain a codeword string satisfying the predetermined run length restriction rule represented by k) according to the coding rule by the variable length code, the maximum constraint length at the time of coding is N (N is an integer of 2 or more).
In the coding method for variable-length coding the input bit sequence according to the variable-length coding rule, M predetermined (M is an integer of 2 or more) coding table elements are prepared according to the variable-length coding rule. By referring to these M coding table elements, a predetermined code word bit for every n bits is coded as an output code word for m bits of the input bit sequence, and a predetermined pattern is synchronized at a predetermined frame delimiter. When inserting a word, the length of the output code word is completed, DSV control bits are inserted at a predetermined data input bit interval, and DSV control of the output code word is performed by the DSV control bit. Encoding method. 2. Each of the M coding table elements directly connects between the n-bit output codeword and the codeword corresponding to one or more of the m-bit input bits. Even if the predetermined run length restriction rule RLL
One of the M coding table elements used to transform the next m input bits to obtain the next output codeword that satisfies (d, k). Is stored in association with the state information that specifies the input information. The p-bit (p is the input bit) of the input bit is referred to by referring to the encoding table element indicated by the state information among the M encoding table elements. an integer less than m) into the predetermined n-bit codeword, and to complete the length of the output codeword, the n-bit output codeword for the m-bit input bits;
Transform the next m input bits to obtain the next output codeword that satisfies the predetermined run length restriction rule RLL (d, k) when the codeword and the sync word are combined. 2. A termination table associated with status information indicating selection or non-selection of a predetermined coding table element among the M coding table elements used for performing is used. Encoding method. 3. The predetermined run-length limiting rule RLL
3. The encoding method according to claim 1, wherein the minimum run length d of (d, k) is 1 and the maximum run length k is 7. 4. An RLL (d,
In order to obtain a codeword string satisfying the predetermined run length restriction rule represented by k) according to the coding rule by the variable length code, the maximum constraint length at the time of coding is N (N is an integer of 2 or more).
In a coding device for variable-length coding the input bit sequence according to the variable-length coding rule, M predetermined (M is an integer of 2 or more) coding table elements are prepared according to the variable-length coding rule. Each of the M coding table elements corresponds to one or more m-bit input bits, and even if the n-bit output codeword and the codeword are directly connected, the predetermined run is performed. One of the M coding table elements used to transform the next m input bits to obtain the next output codeword that satisfies the length limiting rule RLL (d, k) The state information specifying the coding table element is stored in association with each other, and the p of the input bit is referred to by referring to the coding table element indicated by the state information among the M coding table elements. bit( (p is an integer smaller than m) is converted into a code word for each of the predetermined n bits, and a synchronization word having a predetermined pattern is inserted at a predetermined frame delimiter of the code word output from the coding means. In addition, at the time of inserting the synchronization word, a synchronization word insertion means for completing the length of the immediately preceding code word, and a DSV control at a predetermined data input bit interval with respect to the code word string in which the synchronization word is inserted. And a DSV control means for performing DSV control of the code word by the DSV control bit after inserting the bit. 5. The predetermined run-length limiting rule RLL
The coding apparatus according to claim 4, wherein the minimum run length d of (d, k) is 1 and the maximum run length k is 7. 6. A recording medium on which a codeword string obtained by encoding the input bit sequence by the encoding method according to claim 1 or 2 is recorded.