JP2003198098A - Circuit board of multiple unit boards and method for evaluating dimensional accuracy - Google Patents
Circuit board of multiple unit boards and method for evaluating dimensional accuracyInfo
- Publication number
- JP2003198098A JP2003198098A JP2001394144A JP2001394144A JP2003198098A JP 2003198098 A JP2003198098 A JP 2003198098A JP 2001394144 A JP2001394144 A JP 2001394144A JP 2001394144 A JP2001394144 A JP 2001394144A JP 2003198098 A JP2003198098 A JP 2003198098A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- region
- board
- mother
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、広面積の母基板中
に半導体素子や抵抗器等の電子部品を搭載するための配
線基板となる配線基板領域を多数個配列形成して成る多
数個取り配線基板およびその寸法精度の評価方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-cavity structure in which a large number of wiring board regions, which are wiring boards for mounting electronic components such as semiconductor elements and resistors, are arranged in a mother board having a large area. The present invention relates to a wiring board and a method for evaluating its dimensional accuracy.
【0002】[0002]
【従来の技術】従来、半導体素子や抵抗器等の電子部品
を搭載するために用いられる配線基板として、ガラス繊
維基材に熱硬化性樹脂を含浸させて成る絶縁層と銅箔等
の導体層から成る配線導体とを交互に複数積層して成る
多層プリント配線基板が知られている。この多層プリン
ト配線基板は、その表面に保護用のソルダーレジスト層
が配線導体の一部を露出させるように被着されており、
さらにソルダーレジストから露出した配線導体の表面に
は配線導体の酸化を防止するためにニッケルめっきおよ
び金めっきが順次被着されている。2. Description of the Related Art Conventionally, an insulating layer formed by impregnating a glass fiber base material with a thermosetting resin and a conductor layer such as a copper foil are used as a wiring board used for mounting electronic components such as semiconductor elements and resistors. There is known a multilayer printed wiring board formed by alternately laminating a plurality of wiring conductors made of. This multilayer printed wiring board has a protective solder resist layer deposited on its surface so as to expose a part of the wiring conductor,
Further, nickel plating and gold plating are sequentially deposited on the surface of the wiring conductor exposed from the solder resist in order to prevent oxidation of the wiring conductor.
【0003】このような多層プリント配線基板は、ガラ
ス繊維基材に熱硬化性樹脂を含浸させて成る絶縁層と銅
箔等から成る導体層とを交互に複数積層して成る広面積
の母基板中に、それぞれが内部および表面に導体層から
成る配線導体を有する多層プリント配線基板となる多数
個の配線基板領域を縦横の並びに一体的に配列形成する
とともに、この多数個取り配線基板の各配線基板領域の
表面にソルダーレジスト加工およびニッケル・金めっき
加工を施し、その後、切削加工により、個々の多層プリ
ント配線基板に個片化されることにより製造されてい
る。なお、多数個取り配線基板を各多層プリント配線基
板に個片化するには、まず、母基板の外周部にドリル加
工等により基準穴を設けるとともに、その基準穴を基準
として各配線基板領域の境界を母基板の設計値に従って
自動的に切断する切削加工プログラムにより個片化する
方法が採用されている。Such a multi-layer printed wiring board is a mother board having a large area formed by alternately laminating a plurality of insulating layers made by impregnating a glass fiber base material with a thermosetting resin and conductor layers made of copper foil or the like. A plurality of wiring board regions, each of which is a multi-layer printed wiring board having wiring conductors formed of conductor layers on the inside and the surface thereof, are formed vertically and horizontally in an integrated array, and each wiring of the multi-cavity wiring board is formed. It is manufactured by subjecting the surface of the substrate area to solder resist processing and nickel / gold plating processing, and then cutting into individual multilayer printed wiring boards. In order to separate the multi-cavity wiring board into individual multilayer printed wiring boards, first, a reference hole is formed on the outer peripheral portion of the mother board by drilling or the like, and the reference hole is used as a reference for each wiring board area. A method of dividing the boundary into individual pieces by a cutting program that automatically cuts according to the design value of the mother board is adopted.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、従来の
多数個取り配線基板は、ソルダーレジスト加工やニッケ
ル・金めっき加工によって加熱工程や乾燥工程を経る
と、母基板に伸縮や反り、うねりが発生して母基板の寸
法精度が悪くなってしまう。このため、各配線基板領域
の母基板内での設計寸法からの相対位置関係に狂いが生
じてしまい、その結果、母基板を設計寸法値通りの切削
加工プログラムで個片に切断すると、配線基板領域まで
切削されてしまい、得られる多層プリント配線基板が寸
法不良になり、この多層プリント配線基板上に電子部品
を正確に搭載することができなくなったり、あるいはこ
の多層プリント配線基板を外部の電気回路基板に正確に
接続することができなくなったりすることがあるという
問題点を有していた。However, in the conventional multi-cavity wiring board, when the heating step and the drying step are performed by solder resist processing or nickel / gold plating processing, expansion / contraction, warpage, and waviness occur in the mother board. As a result, the dimensional accuracy of the mother board deteriorates. As a result, the relative positional relationship between each wiring board area and the design dimension in the mother board becomes incorrect. As a result, when the mother board is cut into individual pieces by the cutting program according to the design dimension values, the wiring board The area is cut and the resulting multilayer printed wiring board becomes defective in dimension, and electronic components cannot be accurately mounted on this multilayer printed wiring board, or this multilayer printed wiring board is connected to an external electrical circuit. There is a problem in that it may not be possible to accurately connect to the board.
【0005】本発明は上記従来技術における問題点に鑑
み完成されたものであり、その目的は、母基板の寸法精
度を簡単に評価することができ、その結果を基に母基板
の切削加工プログラムを補正して、各配線基板領域の境
界を正確に切断して正確な寸法の多層プリント配線基板
を得ることが可能な、多数個取り配線基板およびその寸
法精度の評価方法を提供するものである。The present invention has been completed in view of the above problems in the prior art, and an object thereof is to easily evaluate the dimensional accuracy of a mother substrate, and based on the result, a machining program for the mother substrate. The present invention provides a multi-cavity wiring board and a method for evaluating the dimensional accuracy thereof, by which the boundary of each wiring board region is accurately cut to obtain a multilayer printed wiring board with accurate dimensions. .
【0006】[0006]
【課題を解決するための手段】本発明の多数個取り配線
基板は、ガラス繊維基材に熱硬化性樹脂を含浸させて成
る複数の絶縁層および導体層を積層して成る略四角平板
状の母基板の中央部に、導体層から成る配線導体を母基
板の内部および表面に有する複数の配線基板領域が縦横
の並びに一体的に配列形成されているとともに、母基板
の外周部に複数の配線基板領域を取り囲む枠状の捨て代
領域を形成して成る多数個取り配線基板であって、捨て
代領域の四隅の表面に、縦横の間隔が50〜200μmで配
線基板領域の並びと平行に配置された導体層から成る格
子状のパターンが0.5〜2.5mmの幅および長さの範囲に
被着された寸法測定領域を設けるとともに、この寸法測
定領域に直径が縦横の間隔よりも小さな貫通孔が形成さ
れていることを特徴とするものである。A multi-cavity wiring board of the present invention is a substantially rectangular flat plate formed by laminating a plurality of insulating layers and conductor layers obtained by impregnating a glass fiber base material with a thermosetting resin. In the central portion of the mother board, a plurality of wiring board regions having wiring conductors composed of conductor layers on the inside and the surface of the mother board are formed vertically and horizontally and integrally, and a plurality of wirings are formed on the outer peripheral portion of the mother board. A multi-cavity wiring substrate formed by forming a frame-shaped discarding margin region surrounding the substrate region, and arranged in parallel on the surface of the four corners of the discarding margin region with vertical and horizontal intervals of 50 to 200 μm. The grid-like pattern consisting of the conductor layers is applied in the width and length range of 0.5 to 2.5 mm to provide the dimension measurement area, and the dimension measurement area is provided with the through holes whose diameter is smaller than the vertical and horizontal intervals. Characterized by being formed It is something.
【0007】また、本発明の多数個取り配線基板の寸法
精度の評価方法は、ガラス繊維基材に熱硬化性樹脂を含
浸させて成る複数の絶縁層および導体層を積層して成る
略四角平板状の母基板の中央部に、導体層から成る配線
導体を母基板の内部および表面に有する複数の配線基板
領域が縦横の並びに一体的に配列形成されているととも
に、母基板の外周部に複数の配線基板領域を取り囲む枠
状の捨て代領域を形成して成る多数個取り配線基板の捨
て代領域の四隅の表面に、縦横の間隔が50〜200μmで
配線基板領域の並びと平行に配置された導体層から成る
格子状のパターンが0.5〜2.5mmの幅および長さの範囲
に被着された寸法測定領域を設けておき、次に、母基板
の設計寸法における寸法測定領域の中心位置に、直径が
縦横の間隔よりも小さな貫通孔を形成し、次に、その貫
通孔と寸法測定領域の実際の中心位置とのずれを測定す
ることにより、母基板の寸法精度を評価することを特徴
とするものである。Further, the method for evaluating the dimensional accuracy of a multi-cavity wiring board of the present invention is a substantially rectangular flat plate formed by laminating a plurality of insulating layers and conductor layers obtained by impregnating a glass fiber base material with a thermosetting resin. A plurality of wiring board regions having wiring conductors formed of conductor layers on the inside and surface of the mother board are vertically and horizontally arranged integrally in the central portion of the mother board, and a plurality of wiring board regions are formed on the outer periphery of the mother board. Is formed in parallel with the arrangement of the wiring board areas at the vertical and horizontal intervals of 50 to 200 μm on the surfaces of the four corners of the discarding area of the multi-cavity wiring board formed by forming a frame-shaped discarding area surrounding the wiring board area. A dimension-measuring region is provided in which a grid-like pattern consisting of a conductor layer is applied in a width and length range of 0.5 to 2.5 mm, and then the center position of the dimension-measuring region in the design dimension of the mother board is provided. , The diameter is smaller than the vertical and horizontal intervals The dimensional accuracy of the mother substrate is evaluated by forming a through hole and then measuring the deviation between the through hole and the actual center position of the dimension measuring region.
【0008】本発明の多数個取り配線基板によれば、母
基板の外周部に設けた捨て代領域の四隅の表面に、縦横
の間隔が50〜200μmで配線基板領域の並びと平行に配
置された導体層から成る格子状のパターンが0.5〜2.5m
mの幅および長さの範囲に被着された寸法測定領域を設
けるとともに、この寸法測定領域に直径が縦横の間隔よ
りも小さな貫通孔が形成されていることから、その貫通
孔と寸法測定領域の中心位置とのずれを測定することに
より母基板の寸法精度を容易、かつ正確に評価すること
ができ、その結果を基にして母基板の切削加工プログラ
ムを補正して各配線基板領域の境界を正確に切断して正
確な寸法の多層プリント配線基板を得ることができる。According to the multi-cavity wiring board of the present invention, the vertical and horizontal intervals are arranged parallel to the arrangement of the wiring board areas on the surfaces of the four corners of the discarding margin area provided on the outer peripheral portion of the mother board. 0.5-2.5m in a grid pattern consisting of
Since the dimension measuring region is provided in the range of the width and length of m, and the through hole having the diameter smaller than the vertical and horizontal intervals is formed in the dimension measuring region, the through hole and the dimension measuring region are formed. By measuring the deviation from the center position of the mother board, the dimensional accuracy of the mother board can be evaluated easily and accurately. Based on the result, the cutting process program of the mother board is corrected and the boundary of each wiring board area is corrected. Can be accurately cut to obtain a multilayer printed wiring board having accurate dimensions.
【0009】また、本発明の多数個取り配線基板の寸法
精度の評価方法によれば、複数の配線基板領域が配列形
成された母基板の外周部に配線基板領域を取り囲む枠状
の捨て代領域を形成して成る多数個取り配線基板の捨て
代領域の四隅の表面に、縦横の間隔が50〜200μmで配
線基板領域の並びと平行に配置された導体層から成る格
子状のパターンが0.5〜2.5mmの幅および長さの範囲に
被着された寸法測定領域を設けておき、次に、母基板の
設計寸法におけるその寸法測定領域の中心位置に、直径
が縦横の間隔よりも小さな貫通孔を形成し、次に、貫通
孔とその寸法測定領域の実際の中心位置とのずれを測定
することにより、母基板の寸法精度を評価することか
ら、母基板の寸法精度を容易、かつ正確に評価すること
ができる。したがって、その結果を基にして母基板の切
削加工プログラムを補正して各配線基板領域の境界を正
確に切断して正確な寸法の多層プリント配線基板を得る
ことが可能である。Further, according to the method for evaluating the dimensional accuracy of a multi-cavity wiring board according to the present invention, a frame-shaped discarding margin area surrounding the wiring board area is provided on the outer peripheral portion of the mother board on which a plurality of wiring board areas are arranged. On the surface of the four corners of the discarding area of the multi-cavity wiring board formed by forming a grid pattern consisting of conductor layers arranged in parallel with the wiring board area at an interval of 50 to 200 μm. A dimension measurement area is attached in a width and length range of 2.5 mm, and then a through hole with a diameter smaller than the vertical and horizontal intervals is provided at the center position of the dimension measurement area in the design dimension of the mother board. Then, the dimensional accuracy of the mother board is evaluated by measuring the deviation between the through hole and the actual center position of the dimensional measurement area. Can be evaluated. Therefore, it is possible to correct the cutting processing program of the mother board based on the result and accurately cut the boundary of each wiring board region to obtain a multilayer printed wiring board having accurate dimensions.
【0010】[0010]
【発明の実施の形態】つぎに、本発明の多数個取り配線
基板を添付の図面に基づいて詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION Next, a multi-cavity wiring board of the present invention will be described in detail with reference to the accompanying drawings.
【0011】図1は本発明の多数個取り配線基板の平面
図であり、図2は寸法測定領域の拡大平面図である。こ
れらの図において、1は母基板、2は配線基板領域、3
は捨て代領域であり、主にこれらで本発明の多数個取り
配線基板が構成されている。FIG. 1 is a plan view of a multi-cavity wiring board of the present invention, and FIG. 2 is an enlarged plan view of a dimension measuring region. In these figures, 1 is a mother substrate, 2 is a wiring substrate region, 3
Is a discarding margin area, and mainly constitutes the multi-cavity wiring board of the present invention.
【0012】母基板1は、ガラス繊維基材にエポキシ樹
脂等の熱硬化性樹脂を含浸させて成る複数の絶縁層およ
び銅箔から成る導体層を積層して成る略四角平板状であ
り、例えば、その厚みが0.1〜3mmで縦横の大きさが2
00〜600mm程度である。The mother substrate 1 is a substantially rectangular flat plate formed by laminating a plurality of insulating layers formed by impregnating a glass fiber base material with a thermosetting resin such as epoxy resin and a conductor layer formed of copper foil. , Its thickness is 0.1 to 3 mm, and its vertical and horizontal dimensions are 2.
It is about 00 to 600 mm.
【0013】母基板1の中央部には、各々の内部および
表面に銅箔や銅めっき膜等の導体層から成る配線導体を
有する多数の配線基板領域2が縦横の並びに一体的に配
列形成されている。また、各配線基板領域2は個片化さ
れて配線基板となる領域である。さらに、母基板1の外
周部には、中央部に配列形成された複数の配線基板領域
2を取り囲むようにして幅が5〜50mm程度の四角枠状
の捨て代領域3が形成されている。この捨て代領域3
は、母基板1の取り扱いを容易とするとともに、その四
隅の表面に母基板1の寸法精度を評価するための寸法測
定領域4を有している。In the central portion of the mother board 1, a large number of wiring board regions 2 each having a wiring conductor formed of a conductor layer such as a copper foil or a copper plating film inside and on the surface thereof are formed vertically and horizontally in an array. ing. In addition, each wiring board region 2 is a region that becomes a wiring board by being divided into individual pieces. Further, in the outer peripheral portion of the mother substrate 1, a rectangular frame-shaped discarding margin region 3 having a width of about 5 to 50 mm is formed so as to surround the plurality of wiring substrate regions 2 arranged and formed in the central portion. This discard area 3
Has a dimension measuring region 4 for facilitating the handling of the mother substrate 1 and evaluating the dimension accuracy of the mother substrate 1 on the surfaces of the four corners.
【0014】捨て代領域3に形成された寸法測定領域4
は、母基板1の寸法精度を評価するための領域であり、
図2に要部拡大平面図で示すように、縦横の間隔が50〜
200μmで、配線基板領域2の並びと平行に配置された
格子状のパターン4aがそれぞれ0.5〜2.5mmの幅Wお
よび長さLの範囲に被着されている。このパターン4a
は銅箔等から成り、母基板1表層の配線導体を形成する
のと同時にフォトリソグラフィにより形成される。ま
た、このパターン4aの幅は20〜70μm程度であり、パ
ターン4aの厚みは5〜50μm程度である。Dimensional measurement area 4 formed in the waste area 3
Is an area for evaluating the dimensional accuracy of the mother board 1,
As shown in the enlarged plan view of the main part in FIG.
The grid-shaped patterns 4a having a size of 200 μm and arranged in parallel with the arrangement of the wiring board regions 2 are applied in a range of a width W and a length L of 0.5 to 2.5 mm, respectively. This pattern 4a
Is made of copper foil or the like, and is formed by photolithography at the same time as forming the wiring conductor on the surface layer of the mother substrate 1. The width of the pattern 4a is about 20 to 70 μm, and the thickness of the pattern 4a is about 5 to 50 μm.
【0015】その後、それぞれの表面には、その表面に
被着された配線導体の一部を露出させるようにしてエポ
キシ樹脂等の熱硬化性樹脂から成る厚みが10〜70μmの
ソルダーレジスト層が被着形成され、次にそのソルダー
レジスト層から露出した配線導体の表面には、厚みが1
〜10μm程度のニッケルめっきと厚みが0.1〜3μm程
度の金めっきを順次析出させることにより形成されてい
る。Thereafter, a solder resist layer having a thickness of 10 to 70 μm made of a thermosetting resin such as an epoxy resin is coated on each surface so as to expose a part of the wiring conductor deposited on the surface. The surface of the wiring conductor that is exposed from the solder resist layer after being formed by adhesion has a thickness of 1
It is formed by sequentially depositing nickel plating having a thickness of about 10 μm and gold plating having a thickness of about 0.1 to 3 μm.
【0016】さらにその後、表面にソルダーレジスト層
が被着形成され、配線導体の表面にニッケルおよび金め
っきが被着形成された母基板1の、設計寸法における、
寸法測定領域4内の所定の位置に貫通孔5を穿孔する。
貫通孔5は、その直径が20〜150μm程度で従来周知の
レーザ等により形成される。After that, a solder resist layer is adhered on the surface, and nickel and gold plating is adhered on the surface of the wiring conductor.
Through holes 5 are drilled at predetermined positions in the dimension measurement region 4.
The through hole 5 has a diameter of about 20 to 150 μm and is formed by a conventionally known laser or the like.
【0017】そして、次工程の母基板1を各配線基板に
個片化する切削加工は、この貫通孔5と寸法測定領域4
の仕上がった中心位置とのずれを寸法測定領域4に形成
された格子状のパターン4aを目安として、例えば画像
認識装置により認識することにより、母基板1の寸法精
度を容易かつ正確に評価することにより自動切断加工プ
ログラムを補正ができるため、正確な寸法の配線基板が
多数個、同時集約的に製作される。In the next step, the mother board 1 is cut into individual wiring boards in the cutting process.
The dimensional accuracy of the mother substrate 1 can be easily and accurately evaluated by recognizing the deviation from the finished center position of the mother board 1 with the grid pattern 4a formed in the dimension measuring region 4 as a guide, for example, by an image recognition device. Since it is possible to correct the automatic cutting processing program, a large number of wiring boards with accurate dimensions can be manufactured collectively at the same time.
【0018】また、本発明の多数個取り配線基板および
その寸法精度の評価方法によれば、この貫通孔5と寸法
測定領域4の実際の中心位置とのずれを寸法測定領域4
に形成された格子状のパターン4aを目安として、例え
ば画像認識装置により認識することにより、母基板1の
寸法精度を容易かつ正確に評価することができる。した
がって、その評価結果を基にして母基板1を各配線基板
に個片化する切削加工プログラムを補正して各配線基板
領域2の境界を正確に切断して正確な寸法の多層プリン
ト配線基板を得ることができる。Further, according to the multi-cavity wiring board and the method of evaluating the dimensional accuracy thereof of the present invention, the deviation between the through hole 5 and the actual center position of the dimensional measurement area 4 is measured as the dimensional measurement area 4.
The dimensional accuracy of the mother substrate 1 can be easily and accurately evaluated by recognizing, for example, an image recognizing device using the lattice-shaped pattern 4a formed in the above as a guide. Therefore, based on the evaluation result, the cutting program for dividing the mother board 1 into individual wiring boards is corrected to accurately cut the boundaries of the respective wiring board regions 2 to form a multilayer printed wiring board having accurate dimensions. Obtainable.
【0019】なお、寸法測定領域4は、その幅Wおよび
長さLが0.5mm未満であると、例えば画像認識装置に
よりこの寸法測定領域を認識させる際に、認識する領域
が小さすぎるために母基板1の寸法精度を正確に認識さ
せることが困難になる傾向があり、2.5mmを超える
と、画像認識の倍率を下げて行う必要があるため認識の
精度が低下する傾向がある。したがって、寸法測定領域
4の幅Wおよび長さLは0.5〜2.5mmの範囲とすること
が好ましい。If the width W and the length L of the dimension measuring area 4 are less than 0.5 mm, the area to be recognized is too small when the dimension measuring area is recognized by, for example, an image recognition device. It tends to be difficult to accurately recognize the dimensional accuracy of the substrate 1, and if it exceeds 2.5 mm, the recognition accuracy tends to decrease because it is necessary to reduce the magnification of image recognition. Therefore, it is preferable that the width W and the length L of the dimension measurement region 4 be in the range of 0.5 to 2.5 mm.
【0020】また、バターン4aの縦横の間隔が50μm
未満であると、そのような狭い間隔の格子状のパターン
4aを正確に形成することが困難となる傾向にあり、20
0μmを超えると、母基板1の寸法精度の評価を緻密に
行うことが困難となる。したがって、パターン4aの縦
横の間隔は50〜200μmの範囲が好ましい。The vertical and horizontal intervals of the pattern 4a are 50 μm.
If it is less than 20%, it tends to be difficult to accurately form the lattice-shaped pattern 4a having such a narrow interval.
If it exceeds 0 μm, it becomes difficult to evaluate the dimensional accuracy of the mother substrate 1 precisely. Therefore, the vertical and horizontal intervals of the pattern 4a are preferably in the range of 50 to 200 μm.
【0021】さらに、貫通孔5の直径がパターン4aの
縦横の間隔よりも大きいと、貫通孔5と寸法測定領域4
の実際の中心位置とのずれを寸法測定領域4に形成され
た格子状のパターン4aを目安として正確かつ容易に認
識させることが困難となる傾向にある。したがって、貫
通孔5の直径は、パターン4aの縦横の間隔よりも小さ
いことに特定される。Further, when the diameter of the through hole 5 is larger than the vertical and horizontal intervals of the pattern 4a, the through hole 5 and the dimension measuring region 4 are formed.
There is a tendency that it becomes difficult to accurately and easily recognize the deviation from the actual center position by using the grid pattern 4a formed in the dimension measurement region 4 as a guide. Therefore, the diameter of the through hole 5 is specified to be smaller than the vertical and horizontal intervals of the pattern 4a.
【0022】かくして、本発明の多数個取り配線基板お
よびその寸法精度の評価方法によれば、母基板1の捨て
代領域3の寸法測定領域4に形成された貫通孔5と寸法
測定領域4の実際の中心位置とのずれを測定することに
より母基板1の寸法精度を正確に評価し、その評価結果
を基にして母基板1を各配線基板に個片化する切削加工
プログラムを補正して各配線基板領域2の境界を正確に
切断することにより正確な寸法の多層プリント配線基板
を多数個、同時集約的に得ることができる。Thus, according to the multi-cavity wiring board and the method for evaluating the dimensional accuracy thereof of the present invention, the through holes 5 and the dimension measuring area 4 formed in the dimension measuring area 4 of the discarding margin area 3 of the mother substrate 1 are formed. The dimensional accuracy of the mother board 1 is accurately evaluated by measuring the deviation from the actual center position, and based on the evaluation result, the cutting program for separating the mother board 1 into individual wiring boards is corrected. By accurately cutting the boundary of each wiring board region 2, it is possible to collectively obtain a large number of multilayer printed wiring boards having accurate dimensions.
【0023】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能である。The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the gist of the present invention.
【0024】[0024]
【発明の効果】本発明の多数個取り配線基板によれば、
母基板の外周部に設けた捨て代領域の四隅の表面に、縦
横の間隔が50〜200μmで配線基板領域の並びと平行に
配置された導体層から成る格子状のパターンが0.5〜2.5
mmの幅および長さの範囲に被着された寸法測定領域を
設けるとともに、この寸法測定領域に直径が縦横の間隔
よりも小さな貫通孔が形成されていることから、その貫
通孔と寸法測定領域の中心位置とのずれを測定すること
により母基板の寸法精度を容易、かつ正確に評価するこ
とができ、その結果を基にして母基板の切削加工プログ
ラムを補正して各配線基板領域の境界を正確に切断して
正確な寸法の多層プリント配線基板を得ることができ
る。According to the multi-cavity wiring board of the present invention,
On the surface of the four corners of the discard area provided on the outer periphery of the mother board, a grid-like pattern consisting of conductor layers arranged in parallel with the alignment of the wiring board area with a vertical and horizontal spacing of 50 to 200 μm is 0.5 to 2.5.
A dimension measuring area is provided in a width and length range of mm, and a through hole having a diameter smaller than the vertical and horizontal intervals is formed in the dimension measuring area. By measuring the deviation from the center position of the mother board, the dimensional accuracy of the mother board can be evaluated easily and accurately. Based on the result, the cutting process program of the mother board is corrected and the boundary of each wiring board area is corrected. Can be accurately cut to obtain a multilayer printed wiring board having accurate dimensions.
【0025】また、多数個取り配線基板の寸法精度の評
価方法によれば、複数の配線基板領域が配列形成された
母基板の外周部にその配線基板領域を取り囲む枠状の捨
て代領域を形成して成る多数個取り配線基板の捨て代領
域の四隅の表面に、縦横の間隔が50〜200μmで配線基
板領域の並びと平行に配置された導体層から成る格子状
のパターンが0.5〜2.5mmの幅および長さの範囲に被着
された寸法測定領域を設けておき、次に、その母基板の
設計寸法におけるその寸法測定領域の中心位置に、直径
が前記縦横の間隔よりも小さな貫通孔を形成し、次に、
貫通孔とその寸法測定領域の実際の中心位置とのずれを
測定することにより、その母基板の寸法精度を評価する
ことから、母基板の寸法精度を容易、かつ正確に評価す
ることができる。したがって、その結果を基にして母基
板の切削加工プログラムを補正して各配線基板領域の境
界を正確に切断して正確な寸法の多層プリント配線基板
を得ることが可能である。According to the method for evaluating the dimensional accuracy of a multi-cavity wiring board, a frame-shaped discarding margin area surrounding the wiring board area is formed on the outer peripheral portion of the mother board on which a plurality of wiring board areas are formed. On the surface of the four corners of the discarding area of the multi-cavity wiring board, the grid-like pattern consisting of conductor layers arranged in parallel with the wiring board area with a vertical and horizontal spacing of 50 to 200 μm is 0.5 to 2.5 mm. Is provided in the range of width and length of the through hole, and the through hole having a diameter smaller than the vertical and horizontal intervals is provided at the center position of the size measuring area in the design dimension of the mother board. Form, and then
Since the dimensional accuracy of the mother substrate is evaluated by measuring the deviation between the through hole and the actual center position of the dimensional measurement region, the dimensional accuracy of the mother substrate can be easily and accurately evaluated. Therefore, it is possible to correct the cutting processing program of the mother board based on the result and accurately cut the boundary of each wiring board region to obtain a multilayer printed wiring board having accurate dimensions.
【図1】本発明の多数個取り配線基板の実施の形態の一
例を示す平面図である。FIG. 1 is a plan view showing an example of an embodiment of a multi-cavity wiring board of the present invention.
【図2】図1に示す多数個取り配線基板の要部拡大平面
図である。FIG. 2 is an enlarged plan view of an essential part of the multi-cavity wiring board shown in FIG.
1・・・・・・母基板 2・・・・・・配線基板領域 3・・・・・・ソルダーレジスト層 4・・・・・・寸法測定領域 4a・・・・・格子状のパターン W・・・・・・幅 L・・・・・・長さ 5・・・・・・貫通孔 1 ... Mother board 2 ·· Wiring board area 3 ... Solder resist layer 4 ・ ・ Dimension measurement area 4a ... Lattice pattern W ... width L: Length 5 ... through holes
Claims (2)
せて成る複数の絶縁層および導体層を積層して成る略四
角平板状の母基板の中央部に、前記導体層から成る配線
導体を前記母基板の内部および表面に有する複数の配線
基板領域が縦横の並びに一体的に配列形成されていると
ともに、前記母基板の外周部に前記複数の配線基板領域
を取り囲む枠状の捨て代領域を形成して成る多数個取り
配線基板であって、前記捨て代領域の四隅の表面に、縦
横の間隔が50〜200μmで前記配線基板領域の並び
と平行に配置された前記導体層から成る格子状のパター
ンが0.5〜2.5mmの幅および長さの範囲に被着さ
れた寸法測定領域を設けるとともに、該寸法測定領域に
直径が前記縦横の間隔よりも小さな貫通孔が形成されて
いることを特徴とする多数個取り配線基板。1. A wiring conductor comprising the conductor layer in the center of a substantially rectangular flat plate-shaped mother substrate formed by laminating a plurality of insulating layers and conductor layers obtained by impregnating a glass fiber base material with a thermosetting resin. A plurality of wiring board regions having the inside and the surface of the mother board are vertically and horizontally arranged in an integrated manner, and a frame-shaped discarding margin region surrounding the plurality of wiring board areas is provided on an outer peripheral portion of the mother board. A multi-cavity wiring substrate formed by forming conductors on the surface of the four corners of the discarding region, the grid consisting of the conductor layers arranged in parallel with the wiring substrate region at vertical and horizontal intervals of 50 to 200 μm. The pattern has a dimension measuring region applied in a width and length range of 0.5 to 2.5 mm, and through holes having a diameter smaller than the vertical and horizontal intervals are formed in the dimension measuring region. Is characterized by Multi-piece wiring board.
せて成る複数の絶縁層および導体層を積層して成る略四
角平板状の母基板の中央部に、前記導体層から成る配線
導体を前記母基板の内部および表面に有する複数の配線
基板領域が縦横の並びに一体的に配列形成されていると
ともに、前記母基板の外周部に前記複数の配線基板領域
を取り囲む枠状の捨て代領域を形成して成る多数個取り
配線基板の前記捨て代領域の四隅の表面に、縦横の間隔
が50〜200μmで前記配線基板領域の並びと平行に
配置された前記導体層から成る格子状のパターンが0.
5〜2.5mmの幅および長さの範囲に被着された寸法
測定領域を設けておき、次に、前記母基板の設計寸法に
おける前記寸法測定領域の中心位置に、直径が前記縦横
の間隔よりも小さな貫通孔を形成し、次に、該貫通孔と
前記寸法測定領域の実際の中心位置とのずれを測定する
ことにより、前記母基板の寸法精度を評価することを特
徴とする多数個取り配線基板の寸法精度の評価方法。2. A wiring conductor comprising the conductor layer in the center of a substantially rectangular flat plate-shaped mother board formed by laminating a plurality of insulating layers and conductor layers formed by impregnating a glass fiber base material with a thermosetting resin. A plurality of wiring board regions having the inside and the surface of the mother board are vertically and horizontally arranged in an integrated manner, and a frame-shaped discarding margin region surrounding the plurality of wiring board areas is provided on an outer peripheral portion of the mother board. A multi-cavity wiring board formed by forming on the four corner surfaces of the discarding margin area, the grid-like pattern consisting of the conductor layers arranged in parallel with the arrangement of the wiring board areas with vertical and horizontal intervals of 50 to 200 μm. Is 0.
A dimension measurement region is provided in a width and length range of 5 to 2.5 mm, and then, at the center position of the dimension measurement region in the design dimension of the mother substrate, the diameter is the vertical and horizontal intervals. Forming a through hole smaller than that, and then measuring the deviation between the through hole and the actual center position of the dimension measuring region to evaluate the dimensional accuracy of the mother substrate. Evaluation method of dimensional accuracy of wiring board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001394144A JP2003198098A (en) | 2001-12-26 | 2001-12-26 | Circuit board of multiple unit boards and method for evaluating dimensional accuracy |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001394144A JP2003198098A (en) | 2001-12-26 | 2001-12-26 | Circuit board of multiple unit boards and method for evaluating dimensional accuracy |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2003198098A true JP2003198098A (en) | 2003-07-11 |
Family
ID=27600965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001394144A Pending JP2003198098A (en) | 2001-12-26 | 2001-12-26 | Circuit board of multiple unit boards and method for evaluating dimensional accuracy |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2003198098A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112985276A (en) * | 2019-12-13 | 2021-06-18 | 万润科技精机(昆山)有限公司 | Thickness measuring method and thickness measuring system for circuit board |
-
2001
- 2001-12-26 JP JP2001394144A patent/JP2003198098A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112985276A (en) * | 2019-12-13 | 2021-06-18 | 万润科技精机(昆山)有限公司 | Thickness measuring method and thickness measuring system for circuit board |
CN112985276B (en) * | 2019-12-13 | 2023-03-10 | 万润科技精机(昆山)有限公司 | Thickness measuring method and system for circuit board |
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