JP2003197891A - Solid-state image pickup element and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a solid-state image pickup elements, which makes field strength in the horizontal direction of a semiconductor substrate to be large and that of a depth direction to be small so that a high light sensitivity is obtained. <P>SOLUTION: Arsenic ions are injected on a P<SP>-</SP>-type charge discharge control layer 13 and the arsenic ions are thermally diffused by heating. The conditions of ion injection and annealing are suitably selected so that a moderate impurity profile in the depth direction in the semiconductor substrate 11 is formed. Then, an N-type charge accumulation layer 14 constituting a part of the deep part of the photoelectric conversion part 10A is formed. Then, a P-type charge transfer lower layer 15, an N-type charge transfer layer 16 and a P-type pixel separation layer 17 are sequentially formed. A charge transfer electrode 18 is formed on the N-type charge transfer layer 16. Heating is necessary at that time but the condition is suitably selected when forming the N-type charge accumulation layer 14, so that impurity diffusion equally occurs in the horizontal direction and the depth direction of the semiconductor substrate 11. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD (Charge Coupled Dev) used in video cameras and digital cameras.
The present invention relates to a solid-state image sensor such as ice) and a method for manufacturing the same, and particularly to a solid-state image sensor improved in formation of an impurity profile in a semiconductor substrate and a method for manufacturing the same.

[0002]

2. Description of the Related Art Generally, in the manufacture of CCD image pickup devices, the impurity profile in a semiconductor substrate is determined by implanting impurity ions by ion implantation after a mask is formed in a predetermined region of the semiconductor substrate surface, if necessary. ,
Then, by heating to diffuse the impurity ions, a predetermined impurity region is formed. Then, a desired impurity profile is obtained by repeating this process while changing the ion implantation condition and the heating condition.

Conventionally, a method of manufacturing this type of CCD image pickup device is disclosed in, for example, Japanese Patent Laid-Open No. 6-53472. Hereinafter, this method will be briefly described. First, as shown in FIG. 8A, a P ⁻ type charge discharge control layer 113 and a P type charge transfer layer lower layer are formed on an N type silicon substrate 111 on which a gate insulating film 112 is formed by an ion implantation method or the like. 115, N-type charge transfer layer 116 and P-type pixel separation layer 1
17 are sequentially formed. Next, after forming a polycrystalline silicon film or the like, a photoresist film having a predetermined pattern is formed on the polycrystalline silicon film, and the polycrystalline silicon film is etched using the photoresist film as a mask. The charge transfer electrode 118 is formed. At this time,
Impurities need to be introduced to make the polycrystalline silicon film conductive, but in this case, a high temperature heating step is required. Also, when the charge transfer electrode 118 has a laminated structure, it is necessary to go through a high temperature heating step such as forming an oxide film. Next, using the charge transfer electrode 118 as a mask, an N-type silicon substrate 1 is formed by an ion implantation method or the like.
N-type charge storage layer 119 and P ⁺ -type surface layer 12 on the surface of 11
Form 0.

Subsequently, although not shown, the gate insulating film 11 is formed.
An insulating film, a light-shielding film, an insulating film, a color filter layer, a protective film, and a condenser lens are sequentially formed on 2 so as to cover the charge transfer electrode 118. As described above, the CCD image pickup device including the photoelectric conversion unit 110A, the charge transfer unit 110B, and the read gate unit 110C is completed.

In such a CCD image pickup device, the signal charge generated in the photoelectric conversion section 110A is read out by the read gate section 11
The data is read out to the vertical transfer unit of the charge transfer unit 110B by 0C and sent to the horizontal transfer unit through the vertical transfer unit.

[0006]

By the way, in such a conventional method of manufacturing a CCD image pickup device, as described above,
When forming the charge transfer electrode 118, it is necessary to go through a high temperature heating process. Therefore, due to the heat applied to the charge transfer electrode 118, diffusion of the impurity profiles other than the photoelectric conversion unit 110A is too large in the horizontal direction and insufficient in the depth direction. 8 (B) and 9 (B) show the impurity profile and FIG.
(A) and (C) show the potential profile. With the impurity profiles shown in FIGS. 8B and 9B, as shown in FIG. 9C, the electric field strength decreases in the horizontal direction, and the P-type pixel separation layer 117 and the N-type charge transfer layer are formed. The influence of 116 increases, and as shown in FIG.
The depth potential of is not uniform due to two-dimensional or three-dimensional modulation. Moreover, there is a problem that the potential profile of the P ⁻ type charge discharge control layer 113 becomes non-uniform and the P ⁻ type charge discharge control layer 113 moves to the shallow side of the silicon substrate 111. In particular, when the pixel size is small, there is a problem that these problems become more apparent because the ratio of the distance in the horizontal direction and the distance in the depth direction are approximately the same or the distance in the depth direction becomes large.

As described above, the potential profile of the silicon substrate 111 in the depth direction is two-dimensionally or three-dimensionally modulated, and the potential profile of the P ⁻ type charge discharge control layer 113 is not uniform, so that the shallow side of the silicon substrate 111. In the case where the photoelectric conversion is performed in the deep portion of the silicon substrate 111, the generated charge is discharged to the back surface side of the silicon substrate 111 without being stored in the photoelectric conversion portion 110A. The light sensitivity will be reduced. Further, due to the two-dimensional or three-dimensional modulation of the potential profile of the silicon substrate 111 in the depth direction, the followability of the P ⁻ -type charge discharge control layer 113 with respect to the potential of the silicon substrate 111 is lowered, and the P ⁻ -type charge discharge control layer is reduced. It becomes difficult to control the potential of 113. Although it is possible to form a pseudo impurity profile in the depth direction by performing multiple ion implantations in the photoelectric conversion unit 110A, this method leads to an increase in the number of manufacturing steps. Realization is difficult.

The present invention has been made in view of the above problems, and an object thereof is to increase the electric field strength in the horizontal direction of the semiconductor substrate and decrease the electric field strength in the depth direction to achieve high photosensitivity. An object of the present invention is to provide a solid-state image sensor and a method for manufacturing the same that can be realized.

[0009]

According to the method of manufacturing a solid-state image pickup device of the present invention, a semiconductor substrate having a charge discharge control layer for controlling charge outflow to a deep portion and a charge discharge control layer of the semiconductor substrate are formed. A charge transfer including a photoelectric conversion part formed above, a charge transfer layer formed in a region in contact with the photoelectric conversion part, and a charge transfer electrode formed on the charge transfer layer with a gate insulating film interposed therebetween. Forming a charge discharge control layer in a semiconductor substrate, and forming a charge storage layer forming a part of a deep portion of the photoelectric conversion unit on the charge discharge control layer. And a gate insulating film is formed after forming the charge storage layer, the charge transfer electrode of the charge transfer portion is formed on the gate insulating film, and the light receiving opening is formed above the photoelectric conversion portion. It includes a process and

A solid-state image pickup device according to the present invention includes a semiconductor substrate having a charge discharge control layer for controlling charge discharge to a deep portion, and a photoelectric conversion unit formed above the charge discharge control layer of the semiconductor substrate. A solid-state imaging device comprising: a charge transfer layer formed in a region in contact with the photoelectric conversion section; and a charge transfer section including a charge transfer electrode formed on the charge transfer layer with a gate insulating film interposed therebetween. Therefore, it has a structure in which the charge storage layer forming a part of the deep portion of the photoelectric conversion portion is provided on the charge discharge control layer.

In the solid-state imaging device and the manufacturing method thereof according to the present invention, before forming the charge transfer electrode, the charge storage layer forming a part of the deep portion of the photoelectric conversion portion is formed on the charge discharge control layer, The impurity profile in the depth direction of the semiconductor substrate is gently formed without being modulated.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings.

1 to 7 show manufacturing steps of a CCD image pickup device as a solid-state image pickup device according to an embodiment of the present invention. 1 to 3, FIG. 1B shows the impurity profile in the cross section taken along the line AA ′ of FIG. 5 and 6, FIG. 5A shows the impurity profile in the section taken along the line AA ′ of FIG. 4, and FIG. 5B shows the potential profile in the section taken along the line BB ′. The gate insulating film 12 is not included in the cross section taken along the line AA '. Here, 1
It represents the configuration area of one pixel.

First, as shown in FIG. 1A, a semiconductor substrate 11 made of, for example, N-type silicon (Si) is prepared. A gate insulating film 12 made of a silicon oxide film (SiO ₂ ) having a thickness of 5 to 60 nm is formed on the semiconductor substrate 11 by, for example, a thermal oxidation method.

Next, for example, by an ion implantation method, the incident angle is 0 to 7 degrees, the acceleration voltage is 1 to 5 MeV, and the dose is 1 × 10.
Boron (B) ions are implanted under the condition of ¹⁰ to 1 × 10 ¹³ cm ⁻² . Then, for example, 900 to 1000 degrees, 30 to
Annealing for 120 minutes,
By thermally diffusing the ion-implanted boron, the P ⁻ type charge discharge control layer 13 having a depth of 3 to 7 μm and a thickness of about 1 μm is formed from the surface of the semiconductor substrate 11.

Next, for example, by an ion implantation method, for example, an incident angle of 0 to 7 degrees and an acceleration voltage of 500 keV to 5 Me.
Arsenic (As) ions are implanted under the conditions of V and a dose amount of 1 × 10 ¹¹ to 1 × 10 ¹³ cm ⁻² . Next, 900-100
Annealing is performed at 0 ° C. for 30 to 120 minutes to thermally diffuse the ion-implanted arsenic to form an N-type charge storage layer 14 having a thickness of 1 to 5 μm on the P ⁻ -type charge discharge control layer 13. Form. The N-type charge storage layer 14 becomes a part of the deep part of the photoelectric conversion part. At this time, by appropriately selecting the ion implantation conditions and the heating conditions as described above, the impurity profile in the depth direction of the semiconductor substrate 11 is gently formed as shown in FIG. The N-type charge storage layer 14 corresponds to a specific but not limitative example of “charge storage layer” in the present invention.

Next, as shown in FIG. 2A, a first photoresist film (not shown) is formed by using, for example, a lithography method, and the first photoresist film is used as a mask (first). 1 mask), an incident angle of 0 to 7 degrees, an acceleration voltage of about 600 keV,
Boron ions are implanted under the condition of a dose amount of 1 × 10 ¹¹ to 1 × 10 ¹³ cm ^-2 . When implanting this boron ion, the concentration of the boron ion must be increased in order to compensate a part of the N-type charge storage layer 14. Next, for example, annealing is performed under conditions of 900 to 1000 ° C. for 30 to 120 minutes, and boron is thermally diffused to form a P-type charge transfer portion lower layer 15 having a depth of about 1 μm and a thickness of about 1 μm from the surface of the semiconductor substrate 11. To form.

Then, using the first photoresist film as a mask, an incident angle of 0 to 7 degrees and an acceleration voltage of 300 k are formed above the P-type charge transfer section lower layer 15 by, for example, an ion implantation method.
Arsenic (As) ions are implanted under the conditions of about eV and a dose amount of 1 × 10 ¹¹ to 1 × 10 ¹³ cm ⁻² . After implanting arsenic ions in this manner, for example, 900 to 1000 degrees, 30
Annealing is performed for about 120 minutes to thermally diffuse arsenic, thereby forming an N-type charge transfer layer 16 having a thickness of about several hundred nm between the surface of the semiconductor substrate 11 and the P-type charge transfer section lower layer 15. Form.

After removing the first photoresist film, a second photoresist film (not shown) is formed by a lithography method, and the second photoresist film is used as a mask (second mask). As, for example, by the ion implantation method,
Implant boron ions. After implanting boron ions in this way, annealing is performed to thermally diffuse boron, thereby forming a P-type pixel separation layer 17 in a region in contact with the N-type charge transfer layer 16 of an adjacent pixel. At this time, the impurity profile in the depth direction of the semiconductor substrate 11 is formed as shown in FIG.

After removing the second photoresist film, as shown in FIG. 3A, a conductive film made of polycrystalline silicon having a thickness of 100 to 600 nm is formed on the gate insulating film 12 by, for example, the CVD method. Form a film (not shown). Next, a third photoresist film (not shown) is formed by a lithographic method, and the conductive film is etched by using this third photoresist film as a mask, so that the third photoresist film and the charge transfer electrode 18 as well as the light receiving electrode are formed. The opening 18A is formed.
A photoelectric conversion unit is formed below the opening 18A as described later. The charge transfer electrode 18 may have a single layer structure or a laminated structure.

In the step of forming the charge transfer electrode 18, it is necessary to introduce impurities into the charge transfer electrode 18 and to form an oxide film when the electrode has a laminated structure. At this time, if a high temperature heating step is required, in the present embodiment, the respective conditions of ion implantation and annealing performed when forming the N-type charge storage layer 14 are appropriately selected. Impurity diffusion is semiconductor substrate 1
In both the horizontal direction and the depth direction of 1, the P ⁻ type charge discharge control layer 13, the N type charge storage layer 14, the P type charge transfer section lower layer 15,
The same occurs in the N-type charge transfer layer 16 and the P-type pixel separation layer 17, and the relative impurity concentration ratio in each layer does not change. On the other hand, when a low-temperature heating process is required, the impurity diffusion in the depth direction of the semiconductor substrate 11 is already determined when the N-type charge storage layer 14 is formed, and therefore the impurity profile is two. It is less susceptible to three-dimensional or three-dimensional modulation. From the above, the impurity profile is
As shown in FIG. 3B, it is formed gently in the depth direction.

In this way, the N-type charge transfer layer 16 and the charge transfer electrode 18 formed with the gate insulating film 12 in between form a charge transfer portion 10B. The charge transfer unit 10B includes a vertical transfer unit provided for each column of the photoelectric conversion units, and a horizontal transfer unit vertically connected to the plurality of vertical transfer units provided for each column. In the charge transfer unit 10B, the signal charge from the photoelectric conversion unit is transferred to the N of the vertical transfer unit.
The charges are read out to the N-type charge transfer layer and transferred to the N-type charge transfer layer of the horizontal transfer unit by successively passing through the N-type charge transfer layers of the adjacent pixels.

After removing the third photoresist film, the charge transfer electrode 18 is used as a mask as shown in FIG.
For example, by an ion implantation method, arsenic ions are implanted through the opening 18A under the conditions of an incident angle of 0 to 15 degrees, an acceleration voltage of about 1 MeV, and a dose of about 1 × 10 ¹³ cm ^-2 .
After implanting arsenic ions in this way, annealing is performed under conditions of, for example, about 900 ° C. and about 30 minutes to thermally diffuse arsenic, thereby self-aligning with the N-type charge storage layer 14 from the surface of the semiconductor substrate 11. The N-type charge storage layer 19 having a depth of about 1 μm is formed. The N-type charge storage layer 19
Corresponds to a specific example of "another charge storage layer" of the invention.

Then, using the charge transfer electrode 18 as a mask, the incident angle is 0 to 30 degrees by, for example, an ion implantation method.
Accelerating voltage of 100 keV, Dose amount 1 × 10 ¹⁴ cm ^-2
Boron ions are implanted through the opening 18A under moderate conditions. After implanting boron ions in this way, annealing is performed, for example, at 900 ° C. for about 30 minutes,
By thermally diffusing boron, the N-type charge storage layer 19
Several hundred nm deep from the surface of the semiconductor substrate 11 in self-alignment with
The P ⁺ type surface layer 20 is formed to a certain degree. As described above, the photoelectric conversion portion 10A including the N-type charge storage layer 19 and the P ⁺ -type surface layer 20 and the photoelectric transfer portion 1 includes the charge transfer electrode 18.
A read gate section 10C is formed in a region between 0A and the vertical transfer section, the read gate section 10C including the side on which the P-type pixel separation layer 17 is not formed. In addition, in the step of forming the photoelectric conversion unit 10A, the maximum potential (potential) in the photoelectric conversion unit 10A is determined.

At this time, the impurity profile in the depth direction of the semiconductor substrate 11 is formed gently as shown in FIG. 5A, and the electric field strength is reduced. Therefore, the potential profile of the semiconductor substrate 11 in the depth direction becomes gentle as shown in FIG. 5B, and the depletion layer is expanded. On the other hand, the impurity profile in the horizontal direction of the semiconductor substrate 11 is steeply formed as shown in FIG. 6A, and the electric field strength increases. Therefore, the potential profile of the semiconductor substrate 11 in the horizontal direction becomes steep without being modulated in two dimensions or three dimensions, as shown in FIG.

Next, as shown in FIG. 7, a thickness of 100 n made of, for example, a silicon nitride film (Si ₃ N ₄ ) is formed on the gate insulating film 12 so as to cover the charge transfer electrode 18.
m insulating film 21, for example, a light shielding film 22 made of tungsten (W) having a thickness of about 100 nm, an insulating film 23 made of, for example, a silicon nitride film having a thickness of about 3 μm, a color filter layer 24, a protective film (not shown). And condenser lens 25
Then, the CCD image pickup device 10 is completed.

In the CCD image pickup device 10, when light enters the photoelectric conversion portion 10A through the condenser lens 25, signal charges are generated by photoelectric conversion. The signal charges are read to the N-type charge transfer layer of the vertical transfer unit by applying a voltage to the read gate unit 10C. A pulse voltage is applied to the charge transfer electrode 18 at a predetermined cycle, and the read signal charges pass through the N-type charge transfer layers of adjacent pixels one after another, whereby the charge is vertically connected to the vertical transfer unit. The data is transferred to the horizontal transfer unit of the transfer unit. Finally, the signal charges transferred to the horizontal transfer section are carried to an output terminal (not shown) connected to the horizontal transfer section and output as a video signal.

As described above, in the present embodiment, before the charge transfer electrode 18 is formed, the ion implantation conditions and the heating conditions are appropriately selected on the P ⁻ type charge discharge control layer 13 so that the impurity profile has a semiconductor substrate. The N-type charge storage layer 14 that partially forms the deep portion of the photoelectric conversion unit 10A is formed so as to be gentle in the depth direction of 11. As a result, the electric field strength decreases in the depth direction of the semiconductor substrate 11, and the depletion layer region of the photoelectric conversion unit 10A expands. Therefore, the volume of the photoelectric conversion unit 10A is effectively increased, so that the signal charges generated by the photoelectric conversion can be effectively accumulated in the charge accumulation region. Further, even if the potential of the semiconductor substrate 11 is changed, the P ⁻ type charge discharge control layer 1
The followability of the potential barrier of 3 is improved. Therefore,
Higher sensitivity of the device can be achieved.

After forming the N-type charge storage layer 14,
Since the N-type charge transfer layer 16 and the P-type pixel separation layer 17 are formed, the electric field strength in the horizontal direction of the semiconductor substrate 11 increases, and the electrostatic storage capacitance of the N-type charge transfer layer 16 increases. It is possible to increase the maximum transfer charge amount per one electrode and reduce the size of the P-type pixel isolation region 17 and the like. Therefore, the sensitivity of the device can be further increased and the device can be miniaturized.

Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made. For example, in the above-described embodiment, the photoelectric transfer unit 10 is used with the charge transfer electrode 18 as a mask.
N-type charge storage layer 19 and P ⁺ surface layer 20 constituting A
Although ion implantation was performed to form the film, ion implantation may be performed using a mask formed by a lithography method.

[0031]

As described above, according to the first and second aspects.
According to the method for manufacturing a solid-state imaging device described above, before forming the charge transfer electrode, the ion implantation conditions and the heating conditions are appropriately selected so that the impurity profile becomes gentle in the depth direction of the semiconductor substrate. Since the charge storage layer partially forming the deep portion of the photoelectric conversion portion is formed on the emission control layer, the electric field strength becomes small in the depth direction of the semiconductor substrate, and the depletion layer region of the photoelectric conversion portion is reduced. Stretched.
Therefore, the volume of the photoelectric conversion portion is effectively increased, and the signal charges generated by the photoelectric conversion can be effectively accumulated in the charge accumulation region. Further, even if the potential of the semiconductor substrate is changed, the followability of the potential barrier of the charge emission control layer is improved. Therefore, high sensitivity of the device can be achieved.

In particular, according to the method of manufacturing a solid-state image sensor according to the second aspect, since the charge transfer layer lower layer, the charge transfer layer and the pixel separation layer are formed after the charge storage layer is formed, the semiconductor substrate is formed. The electric field strength in the horizontal direction of
The electrostatic storage capacity of the charge transfer layer is increased, the maximum transfer charge amount per one electrode is increased, and the pixel separation layer and the like can be reduced in size. Therefore, the sensitivity of the device can be further increased and the device can be miniaturized.

Further, according to the third and fourth aspects of the solid-state imaging device, the charge storage layer forming a part of the deep portion of the photoelectric conversion portion on the charge discharge control layer, and the openings of the charge storage layer and the charge transfer electrode. And the other charge storage layer that forms the photoelectric conversion portion and is formed between the semiconductor substrate and the semiconductor layer, it is possible to form an impurity profile gently in the depth direction of the semiconductor substrate and reduce the electric field strength. Therefore, the depletion layer region of the photoelectric conversion unit can be expanded. Further, in the horizontal direction of the semiconductor substrate, the impurity profile can be formed steeply, and the electric field strength can be increased. Therefore, the volume of the photoelectric conversion portion is effectively increased in the depth direction of the semiconductor substrate, and the signal charges generated by the photoelectric conversion can be effectively accumulated in the charge accumulation region. Further, even if the potential of the semiconductor substrate is changed, the followability of the potential barrier of the charge emission control layer is improved. On the other hand, in the horizontal direction of the semiconductor substrate, the electric field strength increases, the electrostatic storage capacity of the charge transfer layer increases, the maximum transfer charge amount per electrode increases, and the pixel separation layer and the like become smaller. This makes it possible to increase the sensitivity of the device and reduce the size of the device.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a method for manufacturing a solid-state image sensor according to an embodiment of the present invention, in which (A) is a process chart,
(B) is an impurity profile diagram in the depth direction of the semiconductor substrate.

2A is a diagram for explaining a step following FIG. 1A, and FIG. 2B is an impurity profile diagram in the depth direction of the semiconductor substrate of FIG.

3A is a diagram for explaining a process following FIG. 2A, and FIG. 3B is an impurity profile diagram in the depth direction of the semiconductor substrate of FIG.

FIG. 4 is a process drawing for explaining the process following FIG.

5A is a diagram for explaining an impurity profile in the depth direction of the semiconductor substrate of FIG. 4, and FIG. 5B is a diagram for explaining a potential profile of the semiconductor substrate in FIG. 4 in the depth direction.

6A is a diagram for explaining a horizontal impurity profile of the semiconductor substrate of FIG. 5, and FIG. 6B is a diagram for explaining a horizontal potential profile of the semiconductor substrate of FIG.

FIG. 7 is a process diagram for explaining a process following the process in FIG.

FIG. 8A is a sectional view for explaining a conventional solid-state imaging device, and FIG. 8B is a view for explaining an impurity profile in a depth direction of a semiconductor substrate.

FIG. 9 is a diagram for explaining an impurity profile and a potential profile of a conventional solid-state imaging device.

[Explanation of symbols]

10 ... CCD image pickup device, 10A ... Photoelectric conversion unit, 10
B ... Charge transfer section, 10C ... Read gate section, 11 ...
-Semiconductor substrate, 12 ... Gate insulating film, 13 ... P ^- type charge discharge control layer, 14, 19 ... N-type charge storage layer, 15
... P-type charge transfer layer lower layer, 16 ... N-type charge transfer layer, 1
7 ... P-type pixel separation layer, 18 ... Charge transfer electrode, 18A
... Openings, 20 ... P ⁺ type surface layers 21, 23 ... Insulating films, 22 ... Light-shielding films, 24 ... Color filter layers, 2
5 ... Condensing lens

Claims (4)

[Claims] 1. A semiconductor substrate on which a charge discharge control layer for controlling charge discharge to a deep portion is formed, a photoelectric conversion unit formed on the semiconductor substrate above the charge discharge control layer, and a photoelectric conversion unit on the photoelectric conversion unit. A method for manufacturing a solid-state imaging device, comprising: a charge transfer layer formed in a contact region; and a charge transfer section including a charge transfer electrode formed on the charge transfer layer with a gate insulating film interposed therebetween, Forming a charge discharge control layer in the semiconductor substrate; forming a charge storage layer forming a part of a deep portion of the photoelectric conversion unit on the charge discharge control layer; After forming the gate insulating film,
Forming a charge transfer electrode of the charge transfer section on the gate insulating film, and forming an opening for light reception above the photoelectric conversion section. . 2. A step of forming a first mask after forming the charge storage layer, and using the first mask to form a charge transfer section lower layer below the charge transfer section; Forming a charge transfer layer between the lower layer of the transfer section and the surface of the semiconductor substrate; and removing the first mask, forming a second mask, and using the second mask to form the charge A step of forming a pixel separation layer for separating adjacent pixels in a region in contact with the transfer layer; and, after forming the charge transfer electrode, using the charge transfer electrode as a mask, removing the shallow portion of the photoelectric conversion unit. Constituting, forming another charge storage layer different from the charge storage layer, and, after forming the other charge storage layer, using the charge transfer electrode as a mask, on the other charge storage layer, Form a surface layer that constitutes the shallow part of the photoelectric conversion part Method for manufacturing a solid-state imaging device according to claim 1, characterized in that it comprises a that step. 3. A semiconductor substrate on which a charge discharge control layer for controlling charge discharge to a deep portion is formed, a photoelectric conversion unit formed on the semiconductor substrate above the charge discharge control layer, and a photoelectric conversion unit on the photoelectric conversion unit. A solid-state imaging device comprising: a charge transfer layer formed in a region in contact with the charge transfer layer; and a charge transfer section including a charge transfer electrode formed on the charge transfer layer with a gate insulating film interposed therebetween. A solid-state imaging device comprising a charge storage layer forming a part of a deep portion of the photoelectric conversion unit on the control layer. 4. A charge storage layer different from the charge storage layer, which is formed between the charge storage layer and the opening of the charge transfer electrode and constitutes a shallow portion of the photoelectric conversion unit, The solid-state imaging device according to claim 3, further comprising: a surface layer that is formed between another charge storage layer and an opening of the charge transfer electrode and that forms a shallow portion of the photoelectric conversion unit.