JP2003197456A - Laminated capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the parasitic inductance of a capacitor. <P>SOLUTION: A dielectric layer 3, having a current input side capacitor electrode 2 and a dielectric layer 5, having a current output side capacitor electrode 4 for constituting the capacitor are alternately laminated. A through-hole 8, as a current supply unit arriving at a bottom of a laminate 6 from the current input side capacitor electrode 2 of an uppermost layer, is provided by avoiding peripheral regions of the layers 3, 5. An opening 10 for insulating from the hole 8 is formed at the electrode 4. A side face electrode 7 is formed on the side face of the laminated capacitor 1, and the electrode 7 is connected to the electrode 7. The electrode 7 is used as a current output unit. As a result a current flows radially from a through-hole 8 forming a region to the electrode 2 and the electrode 4 in a direction of diffusion, the parasitic inductance of the capacitor can be suppressed to a very small value. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer capacitor in which a plurality of electrodes are laminated and arranged via a dielectric layer.

[0002]

BACKGROUND ART FIG. 7 (a) is a schematic perspective view showing an example of a multilayer capacitor, and FIG. 7 (b) shows FIG. 7 (a).
7 is an exploded view of the multilayer capacitor of FIG.
7C is a simplified sectional view of the AA portion of the multilayer capacitor of FIG. 7A.

A multilayer capacitor 30 shown in FIGS. 7A to 7C has a dielectric layer 33 having one side of electrode pairs 31 and 32 forming the capacitor and a dielectric layer having the other side thereof. The layers 33 are alternately laminated and integrated. In the laminated body 34 including the electrodes 31 and 32 and the dielectric layer 33, connecting electrodes 35 and 36 are formed on a pair of side surfaces facing each other. Laminate 34
One side of the electrodes 31, 32 inside the electrode (in the example shown, the electrode 3
One (31a, 31b)) is connected to the electrode 35, and the other side (for example, the electrode 32 (32a, 32b)) is connected to the electrode 36.

When such a multilayer capacitor 30 is mounted on, for example, a circuit board (not shown), solder 37 is attached to the bottom surface of the electrodes 35 and 36 of the multilayer capacitor 30, for example.
Are formed (see FIG. 7C). And the solder 37
The multilayer capacitor 30 can be mounted on the circuit board by bonding the to the set land of the circuit board.
Thereby, for example, one side (for example, the electrode 35) of the connecting electrodes 35 and 36 is grounded to the ground of the circuit board,
The other side (for example, the electrode 36) is connected to the circuit portion of the circuit board. From the circuit part, for example, via the electrode 36, the electrode 32
When a current is applied to the pair of electrodes, an electrostatic capacitance is generated between the paired electrodes 31 and 32 to function as a capacitor.

[0005]

By the way, the electrodes 32,
When electricity is applied to 31, a magnetic field is generated. A parasitic inductance is generated in series in the capacitor composed of the electrodes 31 and 32 due to the magnetic field thereof. In the configuration of the multilayer capacitor 30, almost all of the current passed through the electrodes 31 and 32 flows in the same direction as indicated by an arrow I in FIG. 7B, for example. Therefore, a parasitic inductance of a size that cannot be ignored is generated. Since the impedance generated by this parasitic inductance becomes larger as the alternating current supplied to the capacitor becomes higher in frequency, the multilayer capacitor 30 may not be able to properly function as a capacitor when the supplied current becomes higher in frequency. Therefore, the multilayer capacitor 30 has a problem that it is difficult to incorporate it into a high frequency circuit.

Therefore, in order to solve such a problem, the following multilayer capacitor has been proposed (Japanese Patent Laid-Open No. Hei 10 (1999) -264242).
See 11-204372). FIG. 6A shows an example of the proposed multilayer capacitor 20 in a simplified sectional view. The multilayer capacitor 20 of this proposal is also similar to the multilayer capacitor 30 in that the electrode pairs 21 and 22 forming the capacitor
The dielectric layer 23 having one side formed thereon and the dielectric layer 23 having the other side formed are alternately laminated and integrated.
It is characterized by a configuration for connecting 1 and 22 to the outside.

That is, the dielectric layer 23 has a plurality of electrodes 2
Through hole 2 which is commonly connected to 1 and is not connected to electrode 22
4 and, on the contrary, a plurality of through holes 25 that are commonly connected to the plurality of electrodes 22 and are not connected to the electrodes 21 are formed. On the bottom surface of the multilayer capacitor 20, a plurality of external terminal electrodes 26 are connected and formed in one-to-one correspondence with the through holes 24, 25. Note that FIG. 6B is a top view schematically showing an extracted portion of the electrode 21.

In this multilayer capacitor 20, for example, the electrode 21 is grounded to the ground of the circuit board via the through hole 24 and the external terminal electrode 26, and the electrode 22 is grounded to the circuit board via the external terminal electrode 26 and the through hole 25. Connected to the circuit section. When a current is supplied from the circuit section to the electrode 22 through the through hole 25, for example, a current flows through the electrode 21 as indicated by an arrow I in FIG. 6C. Also, the electrode 2
A current flows through 2 in the direction opposite to the arrow in FIG.
As described above, since the currents are distributed to the electrodes 21 and 22 in almost four directions, the magnetic fields caused by the current flow cancel each other out, and the parasitic inductance of the capacitor including the electrodes 21 and 22 is reduced. It can be reduced.

However, in the structure of the multilayer capacitor 20, reduction of the parasitic inductance is not satisfactory, and further reduction of the parasitic inductance is required. Further, since it is necessary to form a plurality of through holes for connecting the electrodes 21 to the outside and a plurality of through holes for connecting the electrodes 22 to the outside, the multilayer capacitor 20 inevitably becomes large in size. There is a problem that it ends up.

The present invention has been made to solve such a problem, and an object thereof is to reduce the parasitic inductance to a smaller level and to function properly in a high frequency circuit. To provide a multilayer capacitor.

[0011]

In order to achieve the above-mentioned object, the present invention has the following constitution as means for solving the above-mentioned problems. That is, the first invention is a multilayer capacitor in which a dielectric layer having a current input side capacitor electrode forming a capacitor and a dielectric layer having a current output side capacitor electrode are alternately laminated, Whether each current input side capacitor electrode is commonly connected to the current supply unit while avoiding the peripheral region of the electrode, and the current output side capacitor electrode is connected to the current output unit all around the peripheral region of the electrode, Alternatively, it is characterized in that it is connected to a plurality of current output parts in the peripheral region in a scattered manner in the circumferential direction.

A second invention comprises the structure of the first invention,
The current supply section is characterized in that it is connected to the central portion of the current input side capacitor electrode.

A third invention comprises the configuration of the second invention,
The current-input-side capacitor electrode and the current-output-side capacitor electrode are characterized by having a shape that is substantially point-symmetrical with respect to the central portion.

A fourth aspect of the invention comprises the configuration of the first, second or third aspect of the invention, wherein the current supply unit is the uppermost current input side capacitor electrode of the plurality of stacked current input side capacitor electrodes. It is composed of through holes in the dielectric layer that reach the bottom surface of the multilayer capacitor, and the through holes serve as a current supply unit common to multiple current input side capacitor electrodes. The output-side capacitor electrode is characterized in that an opening, which is larger than the through hole and is insulated from the through hole, is formed in the through hole forming region.

A fifth aspect of the invention is provided with the structure of any one of the first to fourth aspects of the invention, wherein the side surface of the multilayer capacitor is
The side electrode is formed over the entire circumference, or a plurality of strip-shaped side electrodes extending between the upper side and the bottom side are arranged and formed in the circumferential direction with an interval therebetween, and the side electrode is the peripheral edge of the current output side capacitor electrode. It is characterized in that it is connected to the region to form a current output part.

A sixth aspect of the present invention comprises the constitution of any one of the first to fourth aspects of the invention, wherein a multilayer capacitor is provided in the peripheral region of the dielectric layer via a plurality of current output side capacitor electrodes. Through holes are formed scattered along the side surface of the multilayer capacitor, and these through holes form a current output section common to multiple current output side capacitor electrodes. The side capacitor electrode is characterized by being formed so as to avoid the peripheral region where the through holes are formed.

A seventh invention comprises the configuration of the sixth invention,
The upper surface and the side surface of the multilayer capacitor are characterized by forming an electrode non-formation region.

An eighth aspect of the invention has the structure of any one of the first to seventh aspects of the invention, wherein both the current supply section and the current output section are formed on the bottom surface of the multilayer capacitor at the portions connected to the outside. It is configured by being characterized.

A ninth aspect of the present invention comprises the configuration of any one of the first to eighth aspects of the invention, wherein the current output side capacitor electrode is a ground electrode grounded to the ground. Has been done.

A tenth invention comprises the structure of any one of the first to ninth inventions, wherein the lowermost dielectric layer is made of a material having a dielectric constant smaller than that of the other dielectric layers. It is characterized by that.

An eleventh invention has the structure of the tenth invention, and is characterized in that the lowermost dielectric layer is composed of a resin material.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1A is a schematic perspective view of a first embodiment of the multilayer capacitor, and FIG. 1B is an exploded view of the multilayer capacitor of the first embodiment. 1C is a schematic cross-sectional view passing through the central portion of the multilayer capacitor of the first embodiment, and FIG. 1D is a bottom view of the multilayer capacitor of the first embodiment. The view seen from is shown.

Multilayer capacitor 1 of the first embodiment
Is a dielectric layer 3 having a current input side capacitor electrode 2 which is one side of a pair of electrodes forming a capacitor, and a dielectric layer 5 having a current output side capacitor electrode 4 which is the other side thereof. And are alternately laminated and integrated.

In the example of FIG. 1, the electrodes 2, 4 and the dielectric layer 3,
The upper surface of the laminated body 6 made of 5 constitutes the current output side capacitor electrode 4, and the side surface electrode 7 is formed on the entire side surface. The bottom side of the side electrode 7 wraps around the bottom edge of the laminated body 6.

The current output side capacitor electrode 4 is formed on almost the entire upper surface of the dielectric layer 5, and is connected to the side surface electrode 7 over the entire circumference of the peripheral edge of the electrode 4. On the other hand, the current input side capacitor electrode 2 is not formed in the peripheral region of the dielectric layer 3 in order to avoid connection with the side surface electrode 7.

A through hole 8 is formed in the center of the laminated body 6. The through-holes 8 are continuously formed from the uppermost current input side capacitor electrode 2 of the plurality of stacked current input side capacitor electrodes 2 to the bottom surface of the laminated body 6, and the plurality of current input side capacitor electrodes 2 are formed. Are commonly connected to. Further, the current output side capacitor electrode 4 (4a, 4a) of the dielectric layer 5 in which the through hole 8 is formed.
In b), an opening 10 that is larger than the through hole 8 and is insulated from the through hole 8 is formed in the area where the through hole 8 is formed.

In the first embodiment, the current-input-side capacitor electrode 2 and the current-output-side capacitor electrode 4 are substantially point-symmetric with respect to the portion where the through hole 8 is formed (that is, the central portion of the laminated body 6). It has a unique shape.

On the bottom surface of the laminated body 6, a part of the side surface electrode 7 that wraps around from the side surface is formed in the peripheral portion, and the electrode 12 is formed so as to protrude from the through hole 8.
The electrode 12 and the side surface electrode 7 are formed so as not to be connected to each other.

At the side electrode 7 formed on the bottom surface of the laminated body 6 (multilayer capacitor 1), for example, solder balls 13 are scattered around the bottom surface periphery, and at the bottom of the through hole 8. Also, the solder balls 14 are arranged.
The multilayer capacitor 1 has the solder balls 13,
14 is used for mounting on a circuit board to be mounted, for example.

By mounting the multilayer capacitor 1 on the circuit board in this way, for example, each current input side capacitor electrode 2 is conductively connected to the circuit portion of the circuit board through the common through hole 8 and the solder ball 14. Then, the current from the circuit portion is received. That is, in the first embodiment, the through hole 8 serves as a current supply unit common to the plurality of current input side capacitor electrodes 2.

Further, a plurality of current output side capacitor electrodes 4
All are grounded to the ground of the circuit board through the side electrodes 7 and the solder balls 13 to form a ground electrode.
That is, in the first embodiment, the side surface electrode 7 is a current output portion common to the plurality of current output side capacitor electrodes 4.

In the first embodiment, as described above,
A through hole 8 (current supply portion) is connected to the center of the current input side capacitor electrode 2, and a peripheral edge portion of the current output side capacitor electrode 4 is connected to the side surface electrode 7 (current output portion) over the entire circumference. There is. Therefore, when current is supplied to the central portion of the current input side capacitor electrode 2, for example, as shown in FIG.
As indicated by an arrow I, the current-input-side capacitor electrode 2 and the current-output-side capacitor electrode 4 are energized in the direction in which the current is radially diffused from the central portion toward the peripheral edge, Current is output from the entire circumference.

By such current conduction in the radial diffusion direction, the magnetic fields resulting from the current conduction are in a state of canceling each other. In particular, in the first embodiment, both the current input side capacitor electrode 2 and the current output side capacitor electrode 4 have a point-symmetrical shape centered on the through hole 8 which is the current supply portion, so that the magnetic field is canceled. Is achieved more reliably.

Therefore, the parasitic inductance of the capacitor composed of the current input side capacitor electrode 2 and the current output side capacitor electrode 4 can be suppressed to a very small level. Therefore, the multilayer capacitor 1 of the first embodiment example is
Can be properly functioned as a capacitor even when incorporated in a high frequency circuit, with almost no adverse effects of parasitic inductance. As a result, the multilayer capacitor 1 can be effectively used as, for example, a decoupling capacitor or a bypass capacitor.

In addition, in the first embodiment, since only one through hole is provided, it is much more difficult than the structure in which a large number of through holes are provided as in the multilayer capacitor 20 shown in FIG. It is possible to reduce the size of the multilayer capacitor 1.

Further, in the first embodiment, both the portion where the side surface electrode 7 is connected to the outside and the portion where the through hole 8 is connected to the outside are both formed on the bottom surface of the multilayer capacitor 1. . Therefore, the solder balls 13 and 14 for mounting the multilayer capacitor 1 on, for example, a circuit board.
The side electrode 7 can be grounded, for example, to the ground of the circuit board, or the through hole 8 can be connected to the circuit portion of the circuit board.

With this structure, the multilayer capacitor 1 can be mounted on the circuit board, and at the same time, the side electrode 7 can be connected to the ground of the circuit board and the through hole 8 can be connected to the circuit portion of the circuit board. Therefore, the side electrode 7
It is not necessary to provide a process for connecting the through hole 8 and the through hole 8 to a set connection partner separately from the mounting process for the multilayer capacitor 1. As a result, the manufacturing process can be simplified.

By the way, in the first embodiment, the current input side capacitor electrode 2 and the current output side capacitor electrode 4 are provided.
In order to increase the capacity of the capacitor consisting of, the dielectric layers sandwiched between the current input side capacitor electrode 2 and the current output side capacitor electrode 4, that is, the dielectric layers 3 and 5 excluding the lowermost dielectric layer 3A are high. It is composed of a material having a dielectric constant. On the other hand, the lowermost dielectric layer 3A is made of a material having a lower dielectric constant than the dielectric layer having the high dielectric constant.

The reason for lowering the dielectric constant of the lowermost dielectric layer 3A is as follows. That is, the through hole 8 formed in the lowermost dielectric layer 3A is a current line connecting the circuit portion of the circuit board and the lowermost current input side capacitor electrode 2. This line has an inductance when viewed from the circuit board side and participates in the parasitic inductance of the capacitor. For this reason, it is preferable that the through hole 8 formed in the lowermost dielectric layer 3A has a small inductance. In consideration of this, in the first embodiment, the dielectric constant of the lowermost dielectric layer 3A is reduced to shorten the electrical length, so that the through layer formed in the lowermost dielectric layer 3A is formed. The inductance of the hole 8 is reduced. This configuration also contributes to the suppression of the parasitic inductance of the capacitor.

Since the lowermost dielectric layer 3A has no relation to the capacitance of the capacitor composed of the current input side capacitor electrode 2 and the current output side capacitor electrode 4, the dielectric constant of the lowermost dielectric layer 3A is Even if it is made small, the capacity of the capacitor is not changed. In other words, the configuration in which the dielectric constant of the lowermost dielectric layer 3A is reduced can obtain the effect of reducing the parasitic inductance of the capacitor without changing the capacitance of the capacitor.

The material forming the lowermost dielectric layer 3A is not particularly limited, and the lowermost dielectric layer 3A may be composed of an appropriate dielectric material. For example, by configuring the lowermost dielectric layer 3A with a resin material,
It is possible to reduce the dielectric constant of the dielectric layer 3A as compared with the case of using a ceramic material.

In the manufacturing process of the multilayer capacitor 1, the dielectric layer 3 on which the current input side capacitor electrode 2 is formed
After alternately laminating (for example, a ceramics layer) and dielectric layer 5 (for example, a ceramics layer) having current output side capacitor electrode 4 formed thereon, a process of sintering and laminating the laminated body 6 is performed. In this step, in order to avoid problems such as cracking of the dielectric layers 3 and 5 due to the difference in coefficient of thermal expansion, the dielectric material forming the lowermost dielectric layer 3A and other dielectric layers 3 , 5 is preferably the same or close in thermal expansion coefficient.

The second embodiment will be described below. In the description of the second embodiment, the same components as those of the first embodiment will be designated by the same reference numerals, and duplicate description of the common parts will be omitted.

FIG. 3A shows a perspective view of the multilayer capacitor of the second embodiment, and FIG. 3B shows a schematic exploded view of the multilayer capacitor of the second embodiment. Figure 3
FIG. 6C schematically shows the bottom view of the multilayer capacitor of the second embodiment.

In the second embodiment, the side electrode 7 is not formed as the current output portion of the current output side capacitor electrode 4, but the through hole 16 is formed inside the laminated body 6 as the current output portion. There is. The through hole 16 is
This is a conductive line that reaches the bottom surface of the laminated body 6 through the laminated current output side capacitor electrodes 4, and in the second embodiment, a plurality of through holes 16 are laminated in the peripheral regions of the dielectric layers 3 and 5. They are scattered around the side surface of the body 6 in the circumferential direction.

In order to insulate the through holes 16 from each other, the current input side capacitor electrode 2 is formed so as to avoid the peripheral region of the dielectric layer 3 where the through holes 16 are formed.

The bottoms of the through hole 8 and the plurality of through holes 16 are exposed and formed on the bottom surface of the laminated body 6. Solder balls 13 and 14 are formed on the bottoms of the through holes 8 and 16, respectively, and the multilayer capacitor 1 can be mounted on a mounting target, for example, a circuit board by using the solder balls 13 and 14.

As a result, similarly to the first embodiment, for example, each current input side capacitor electrode 2 is connected to the circuit section of the circuit board through the through hole 8 which is a common current supply section and is connected to the current input side. A current is supplied to the capacitor electrode 2 through the through hole 8. Further, each current output side capacitor electrode 4 is grounded to the ground of the circuit board through a plurality of through holes 16 which are current output parts, and each current output side capacitor electrode 4 outputs a current through each through hole 16. It In addition, in FIG.
Reference numeral 8 indicates an electrode that is formed by protruding from the through hole 16.

In the second embodiment, since the through hole 16 as the current output portion is formed inside the laminated body 6, the side electrode 7 need not be formed. Therefore, in this second embodiment, no electrode is formed on the side surface of the laminated body 6. Further, each current output side capacitor electrode 4 is formed so that its peripheral edge is not exposed on the side surface of the laminated body 6. Further, the uppermost dielectric layer of the laminated body 6 constitutes the electrode non-forming layer 17 in which no electrode is formed. That is, in the second embodiment, the upper surface and the side surface of the multilayer body 6 (multilayer capacitor 1) are electrode non-formation regions.

Therefore, when the multilayer capacitor 1 is mounted on, for example, a circuit board to be mounted, no electrodes are formed on the upper surface and the side surfaces exposed to the outside, and the multilayer capacitor 1 having high electrical safety is formed. Can be provided.

Also in the second embodiment, as in the first embodiment, the current is supplied to the central portion of the current input side capacitor electrode 2, and the current output side capacitor electrode 4 is provided.
The current is output from the peripheral portion of the. For this reason,
In the current input side capacitor electrode 2 and the current output side capacitor electrode 4, the currents are conducted in the direction in which they diffuse radially from the central portion to the peripheral portion, and the magnetic fields caused by the current conduction cancel each other. As a result, the parasitic inductance of the capacitor composed of the current input side capacitor electrode 2 and the current output side capacitor electrode 4 can be suppressed.

The present invention is not limited to the first and second embodiments, but various embodiments can be adopted. For example, in the first embodiment, the side surface electrode 7 is formed over the entire circumference of the laminated body 6, but as shown in FIG. 4, for example, it extends between the upper side and the bottom side of the laminated body 6. A configuration may be employed in which a plurality of strip-shaped side surface electrodes 7 are arranged and formed in the circumferential direction with an interval therebetween.

In the first embodiment, the electrode (current output side capacitor electrode 4) was formed on the upper surface of the laminated body 6, but the dielectric layer without the electrode (see the second embodiment). ) As the uppermost layer, the upper surface of the laminate 6 may be an electrode non-formation region.

Further, in the first and second embodiments,
The current input side capacitor electrode 2 and the current output side capacitor electrode 4 were alternately stacked from the bottom side, but conversely, the current output side capacitor electrode 4 and the current input side capacitor electrode 2 were alternately stacked from the bottom side. You may laminate | stack and arrange. Further, in each of the first and second embodiments, each of the current input side capacitor electrode 2 and the current output side capacitor electrode 4 is formed by three layers, but the current input side capacitor electrode 2 and the current output side capacitor electrode are formed. The number of layers of 4 is not particularly limited and may be appropriately set according to, for example, specifications.

Further, in the first and second embodiments,
Both the current input side capacitor electrode 2 and the current output side capacitor electrode 4 had a point-symmetrical shape around the through hole 8 (current supply part), but the current input side capacitor electrode 2 and the current output side capacitor electrode 4 One or both of them may not have a point-symmetrical shape as shown in FIG. 5, for example.

Furthermore, in the first and second embodiments,
The lowermost dielectric layer 3A was made of a material having a lower dielectric constant than the other dielectric layers, but the lowermost dielectric layer 3 was used.
A may also be made of the same material as the other dielectric layers 3 and 5.

Furthermore, in the first and second embodiments,
Although both the current supply section and the current output section are formed on the bottom surface of the laminate 6 to connect to the outside, for example, one or both of the current supply section and the current output section are not mounting solders, For example, in the case of using a terminal, a wire, or the like to connect to the outside, the external connection part of the current supply part or the current output part may be formed on a part other than the bottom surface of the laminate 6.

Further, in the first embodiment, the laminated body 6
The portion of the bottom surface of the side electrode 7 connected to the outside is connected to the circuit board, for example, in a point contact state by the solder ball 13. However, for example, the entire external connection portion of the side electrode 7 is shown. May be connected to, for example, a circuit board in a surface contact state.

Further, in the second embodiment, the upper surface of the laminated body 6 is the electrode non-formation region. For example, when it is desired to promote the thinning of the laminated capacitor 1, the dielectric without the electrode is formed. The body layer 17 may be omitted, and one of the current input side capacitor electrode 2 and the current output side capacitor electrode 4 may be formed on the upper surface of the laminated body 6.

Furthermore, in the first and second embodiments,
The current supply portion (through hole 8) was arranged at the center of the current input side capacitor electrode 2 and the current output side capacitor electrode 4, but, for example, if it is a portion avoiding the peripheral region, the current input side capacitor electrode 2 Alternatively, it may be arranged at a position displaced from the center of the current output side capacitor electrode 4.

[0062]

According to the present invention, the current input side capacitor electrode is connected to the current supply portion while avoiding the peripheral region of the electrode, and the current output side capacitor electrode extends over the entire periphery of the peripheral region of the electrode. Is connected to the current output section,
Alternatively, it is configured to be connected to the plurality of current output portions in the peripheral region in a scattered manner in the circumferential direction. With this configuration, the current is supplied to the capacitor electrode on the current input side in the direction in which the current radially diffuses from the current supply portion toward the peripheral region. Therefore, the magnetic fields caused by the current flow cancel each other out. Thereby, the parasitic inductance of the capacitor due to the magnetic field can be suppressed.

In particular, when the current supply unit is connected to the central portion of the current input side capacitor electrode, or when the current input side capacitor electrode and the current output side capacitor electrode are formed in a substantially point-symmetrical shape with respect to the central portion. If so, the magnetic field caused by the current flow is more reliably canceled, and the parasitic inductance of the capacitor can be suppressed to a very small value.

Since the parasitic inductance of the capacitor can be suppressed to be small as described above, the multilayer capacitor of the present invention can function properly as a capacitor with almost no adverse effects of the parasitic inductance even when incorporated in a high frequency circuit. it can.

Further, since it is not necessary to provide a plurality of current supply parts for supplying a current to each current input side capacitor electrode, it is smaller than the multilayer capacitor of the proposed example in which a large number of current supply parts must be provided. It is much easier to achieve this.

In the case where the through hole is formed in the dielectric layer as the current supply section, the current supply section common to the current input side capacitor electrodes can be formed with a simple structure.

In the case where the side surface electrode as the current output portion is formed on the side surface of the multilayer capacitor, only by forming the electrode on the side surface of the multilayer capacitor, the current output portion common to the current output side capacitor electrodes can be formed. Since it is formed, the structure is simplified, and the multilayer capacitor can be further miniaturized as compared with the case where the current output portion is formed inside the multilayer capacitor.

In the case where the through hole as the current output portion is formed inside the multilayer capacitor, the area of the electrode formed on the surface of the multilayer capacitor can be reduced. For example, the upper surface and the side surface of the multilayer capacitor can be the electrode non-formation region. In this case,
When the multilayer capacitor is mounted on, for example, a circuit board to be mounted, electrodes are not formed on all exposed surfaces, so that electrical safety can be improved.

In the case where both the current supply section and the current output section are formed on the bottom surface of the multilayer capacitor for connecting to the outside, for example, solder for mounting the multilayer capacitor on the circuit board to be mounted is used. It is possible to connect the current supply unit and the current output unit to the circuit unit of the circuit board and the ground by using the. Therefore, the multilayer capacitor can be mounted on, for example, a circuit board, and at the same time, the current supply unit and the current output unit can be connected to the set connection partner. As a result, the work of incorporating the multilayer capacitor into, for example, a high-frequency circuit can be performed very easily.

In the case where the lowermost dielectric layer is made of a material having a smaller dielectric constant than other dielectric layers, the dielectric constant of the lowermost dielectric layer is reduced to implement mounting. For example, the inductance of the current conducting line between the target circuit board and the capacitor electrode of the bottom layer can be reduced, and the dielectric layer of the bottom layer does not contribute much to the capacitance of the capacitor. It is possible to further suppress the parasitic inductance of the capacitor without changing

When the lowermost dielectric layer is made of a resin material, it is easier to make the dielectric constant of the lowermost dielectric layer smaller than that when ceramics is used. .

[Brief description of drawings]

FIG. 1 is a diagram for explaining a first embodiment example of a multilayer capacitor according to the present invention.

FIG. 2 is a diagram for explaining an example of a current flowing direction of a current input side capacitor electrode that constitutes the multilayer capacitor of the first embodiment.

FIG. 3 is a diagram for explaining a second embodiment example.

FIG. 4 is a diagram for explaining another embodiment example.

FIG. 5 is a diagram for explaining another embodiment example.

FIG. 6 is a diagram for explaining a proposed example of a multilayer capacitor.

FIG. 7 is a diagram for explaining a conventional example of a multilayer capacitor.

[Explanation of symbols]

1 Multilayer capacitor 2 Current input side capacitor electrode 3,5 Dielectric layer 4 Current output side capacitor electrode 7 Side electrode 8,16 through hole 10 openings

Claims (11)

[Claims] 1. A multilayer capacitor in which a dielectric layer having a current-input-side capacitor electrode and a dielectric layer having a current-output-side capacitor electrode, which compose a capacitor, are alternately laminated, The side capacitor electrode is commonly connected to the current supply unit while avoiding the peripheral region of the electrode, and the current output side capacitor electrode is connected to the current output unit over the entire periphery of the peripheral region of the electrode, or A multilayer capacitor, characterized in that it is connected to a plurality of current output parts in a region in a scattered manner in the winding direction. 2. The multilayer capacitor according to claim 1, wherein the current supply unit is connected to the central portion of the current input side capacitor electrode. 3. The multilayer capacitor according to claim 2, wherein the current-input-side capacitor electrode and the current-output-side capacitor electrode are substantially point-symmetrical with respect to the central portion. 4. The current supply section is constituted by a through hole of a dielectric layer extending from the uppermost current input side capacitor electrode of a plurality of laminated current input side capacitor electrodes to the bottom surface of the multilayer capacitor, and the through hole is It forms a common current supply part for multiple current input side capacitor electrodes, and the through hole is formed in the current output side capacitor electrode of the dielectric layer in which the through hole is provided. The multilayer capacitor according to claim 1, wherein an opening for insulating the through hole is formed. 5. A side surface electrode of the multilayer capacitor is formed over the entire circumference, or a plurality of strip-shaped side surface electrodes extending between the upper side and the bottom side are arranged at intervals in the circumferential direction. 6. The multilayer capacitor according to claim 1, wherein the side surface electrode is connected to a peripheral area of the current output side capacitor electrode to form a current output portion. 6. In the peripheral area of the dielectric layer, through holes are formed in a scattered manner along the side surface of the multilayer capacitor to reach the bottom surface of the multilayer capacitor through a plurality of stacked current output side capacitor electrodes. The through holes form a current output portion common to the plurality of current output side capacitor electrodes, and the current input side capacitor electrodes are formed so as to avoid the peripheral region where the through holes are formed. The multilayer capacitor according to any one of claims 1 to 4, which is characterized by the above. 7. The multilayer capacitor according to claim 6, wherein an upper surface and a side surface of the multilayer capacitor form an electrode non-formation region. 8. The current supply unit and the current output unit both have a portion connected to the outside formed on the bottom surface of the multilayer capacitor.
The multilayer capacitor described in 1. 9. The multilayer capacitor according to claim 1, wherein the current output side capacitor electrode is a ground electrode grounded to the ground. 10. The lowermost dielectric layer is made of a material having a dielectric constant smaller than that of the other dielectric layers, according to any one of claims 1 to 9. Multilayer capacitor. 11. The multilayer capacitor according to claim 10, wherein the lowermost dielectric layer is made of a resin material.