JP2003177928A - Scheduling method for variable time-slice time - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To actualize scheduling which generates no partiality of a scheduling pattern as scheduling in which logical computer having different service ratios are present. <P>SOLUTION: According to the service ratio of a logical computer, a time-slice time allotted to each time is made variable to equalize the scheduling frequency in a fixed time which is different with the service ratio of the logical computer, and thus the scheduling pattern of the logical computer always has the same interval, thereby carrying out the scheduling on a first-in first-out (FIFO) basis. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time slice scheduling method in a logical computer system.

[0002]

2. Description of the Related Art Conventionally, a time slice time used in a time slice scheduling method is based on a fixed value according to the capacity of a computer. Such a time slice scheduling method is discussed in Kyoritsu Shuppan Co., Ltd., Virtual Machine, Masami Yamatani, page 183, December 1, 1978.

[0003]

In the above conventional technique, the time slice times of all logical computers are the same. When the service ratio control, which is a function for guaranteeing the allocation amount to the instruction processor for the logical computer, is combined by such a scheduling method, the allocation guarantee to the instruction processor is that the time slice time is a fixed value. Therefore, the number of times of scheduling within a fixed time is set to a value (variable value) calculated from the specified service ratio. For example, as shown in FIG. 5, a logical computer 50 having a service ratio = 10, a service ratio = 20, and a service ratio = 70.
When 0, 501, and 502 exist, if the service ratio is 5 for one time slice time, the service ratio is 10
Logical computer 500 of 2 times, logical computer 501 of service ratio = 20 4 times, logical computer 502 of service = 70
Schedules 14 times within a fixed time 506 at the same time slice time to control the service ratio.

However, when the logical computers having the above service ratio are simultaneously scheduled, the logical computer 500 is not scheduled in the section 504 and the logical computer 501 is not scheduled in the section 505. This is a bias in scheduling due to the fact that there are logical computers with a small service ratio and computers with a large service ratio. In the scheduling method in which the bias of the scheduling pattern occurs and the scheduling method in which the scheduling interval becomes large,
The time corresponding to the scheduling interval is extended and becomes the time. The delay time causes the input / output completion interrupt of the operating system operating on the logical computer to be kept waiting.
In addition, since the processing speed of the input / output operation is improving year by year, the extended time becomes a factor that the throughput of the system cannot be ignored. In order to prevent this decrease in throughput, it is required to guarantee scheduling opportunities at regular intervals.

It is an object of the present invention to realize a scheduling in which a scheduling pattern is biased and a scheduling interval is shortened regardless of the logical computer having any service ratio specified.

[0006]

In order to achieve the above object, the present invention provides a plurality of logical computers by logically dividing physical computer resources configured in one computer device (physical computer system). In a logical computer system capable of simultaneously executing one or more operating systems and having a function of sharing one or a plurality of instruction processors with a plurality of logical computers by time slice control. A hypervisor that manages and controls a logical computer provides a time slice scheduling method that determines a variable time slice time from a service ratio to an instruction processor assigned to each logical computer.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment for carrying out the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a system configuration diagram of an embodiment of the present invention. The physical computer 100 is the logical computer 10
It has 1, 102, 103, and it is possible to operate a plurality of operating systems simultaneously. Each logical computer has a service ratio 11 indicating the usage rate of the instruction processor.
Based on 0, 111, and 112, the usage rate of the instruction process is designated. The service ratio designated for each logical computer can be dynamically changed by the service ratio setting means 120. The service ratio designated in the logical computer is managed by the service ratio management table 200 shown in FIG. The service ratio management table 200 includes a total service ratio 210 for all logical computers and a service ratio 2 for each logical computer.
It manages with 11.

The time slice time determining means 122 operates when the designated service ratio of the logical computer is changed and the running state of the logical computer is changed. Time slice time determination means 12
The time slice time of each logical computer obtained by 2 is
It is managed by the time slice time management table 300 shown in FIG. The time slice management table 300 manages the time slice time of a logical computer in a CPU timer format that the physical computer 100 can recognize. Generally, a physical computer is equipped with a CPU timer and can be used by a control program. By managing in the CPU timer format, it is possible to minimize the processing steps required for conversion.

FIG. 4 is a flow chart of the processing for determining the time slice time from the service ratio designated for each logical computer.

The flowchart of FIG. 4 will be described below with reference to FIG. The service ratio of the logical computer 600 is 10, the service ratio of the logical computer 601 is 20, the service ratio of the logical computer 603 is 70, the fixed time is 100 milliseconds, and the number of schedulings in the fixed time is 1 at the service ratio = 5. The case will be described as an example.

To determine the time slice time, first, the number of scheduling times for each logical computer is calculated (step 40).
0-402). As the number of times of scheduling of each logical computer, the number of times of scheduling within a fixed time obtained from the service ratio is calculated. The number of services of each logical computer obtained by this process is 2 for the logical computer 600, 4 for the logical computer 601, and 14 for the logical computer 602.

The number of times of scheduling obtained for each logical computer is summed up to obtain the total number of times of scheduling within a fixed time of 100 milliseconds (step 403).
The total number of scheduling times obtained by this processing is 20 times.

The sum of the number of schedulings is divided by the number of all logical computers, the average value of the number of schedulings is obtained, and the obtained value is set as the common scheduling number (step 404). The number of common schedulings obtained by this process is 7.

The service time of the logical computer that services the instruction processor within a fixed time can be obtained from the fixed time and the service ratio. One time slice time for each logical computer is a value obtained by dividing the service time by the common scheduling count. Do this process for all logical computers,
It is stored in the time slice time management table (steps 405 to 407).

The time slice time of each logical computer obtained by this processing is 1.428 milliseconds for the logical computer 600,
Logical computer 601 is 2.856 ms, logical computer 60
2 becomes 10.0 milliseconds.

The tie slice time of the logical computer managed by the time slice time management table 300 is stored in the scheduling control table 124 used when scheduling the logical computer and queued in the scheduling queue. Since the time slice time of the logical computer is stored from the time slice time management table every time it is queued in the scheduling queue, the new time slice time is always used even if the time slice time is dynamically changed.

The scheduling means 126 is performed by first-in first-out (FIFO). Since the logical computers that share the instruction processor have the same number of schedulings, the scheduling patterns are always the same and are performed regularly.

[0019]

As described above, according to the present invention, even when a logical computer having a small service ratio and a logical computer having a large service ratio are mixed and scheduled, the scheduling pattern is not biased, and the delay time is extended. Since it is shortened, the throughput of all logical computers can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing an outline of a system configuration diagram of an embodiment of the present invention.

FIG. 2 is a table diagram for managing a service ratio of a logical computer.

FIG. 3 is a table diagram for managing a time slice time to a logical computer.

FIG. 4 is a flowchart showing a process of obtaining a time slice time for a logical computer.

FIG. 5 is a diagram showing a scheduling pattern and a time slice time of a logical computer in the conventional method.

FIG. 6 is a diagram showing a scheduling pattern and a time slice time of a logical computer according to the present invention.

[Explanation of symbols]

100 physical calculator 101, 102, 103 logical computers 121 Service ratio management table 122 time slice time determination means 123 Time slice time management table 124 Scheduling control table 126 Scheduling means 127 instruction processor 128 CPU timer

Continued front page    (72) Inventor Hokuto Kobayashi             81-81 Onoe-machi, Naka-ku, Yokohama-shi, Kanagawa             Hitachi Software Engineering Stock Association             In-house (72) Inventor Akira Kato             5030 Totsuka Town, Totsuka Ward, Yokohama City, Kanagawa Prefecture             Ceremony company Hitachi Ltd. software division F term (reference) 5B098 AA10 FF04 GA01 GC06 HH04

Claims (2)

[Claims] 1. A plurality of logical computers are generated by logically dividing physical computer resources configured in one computer device (physical computer system), and one or more operating systems can be executed simultaneously. In a logical computer system having a function of sharing one or a plurality of instruction processors with a plurality of logical computers by time slice control in a logical computer system, a hypervisor for managing and controlling each logical computer A logical computer system having a time slice scheduling method for determining a variable time slice time from a service ratio to an assigned instruction processor. 2. The system according to claim 1, wherein the time slice time of each logical computer is calculated from the service ratio to the instruction processor set for each logical computer,
A time slice scheduling method in which the number of times each logical computer is scheduled within a fixed time is the same.